drivers/infiniband/hw/mthca/mthca_av.c

   1 /*
   2  * Copyright (c) 2004 Topspin Communications.  All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  * $Id: mthca_av.c 1349 2004-12-16 21:09:43Z roland $
  33  */
  34
  35 #include <linux/init.h>
  36
  37 #include <ib_verbs.h>
  38 #include <ib_cache.h>
  39
  40 #include "mthca_dev.h"
  41
  42 struct mthca_av {
  43         u32 port_pd;
  44         u8  reserved1;
  45         u8  g_slid;
  46         u16 dlid;
  47         u8  reserved2;
  48         u8  gid_index;
  49         u8  msg_sr;
  50         u8  hop_limit;
  51         u32 sl_tclass_flowlabel;
  52         u32 dgid[4];
  53 };
  54
  55 int mthca_create_ah(struct mthca_dev *dev,
  56                     struct mthca_pd *pd,
  57                     struct ib_ah_attr *ah_attr,
  58                     struct mthca_ah *ah)
  59 {
  60         u32 index = -1;
  61         struct mthca_av *av = NULL;
  62
  63         ah->on_hca = 0;
  64
  65         if (!atomic_read(&pd->sqp_count) &&
  66             !(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
  67                 index = mthca_alloc(&dev->av_table.alloc);
  68
  69                 /* fall back to allocate in host memory */
  70                 if (index == -1)
  71                         goto host_alloc;
  72
  73                 av = kmalloc(sizeof *av, GFP_KERNEL);
  74                 if (!av)
  75                         goto host_alloc;
  76
  77                 ah->on_hca = 1;
  78                 ah->avdma  = dev->av_table.ddr_av_base +
  79                         index * MTHCA_AV_SIZE;
  80         }
  81
  82  host_alloc:
  83         if (!ah->on_hca) {
  84                 ah->av = pci_pool_alloc(dev->av_table.pool,
  85                                         SLAB_KERNEL, &ah->avdma);
  86                 if (!ah->av)
  87                         return -ENOMEM;
  88
  89                 av = ah->av;
  90         }
  91
  92         ah->key = pd->ntmr.ibmr.lkey;
  93
  94         memset(av, 0, MTHCA_AV_SIZE);
  95
  96         av->port_pd = cpu_to_be32(pd->pd_num | (ah_attr->port_num << 24));
  97         av->g_slid  = ah_attr->src_path_bits;
  98         av->dlid    = cpu_to_be16(ah_attr->dlid);
  99         av->msg_sr  = (3 << 4) | /* 2K message */
 100                 ah_attr->static_rate;
 101         av->sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28);
 102         if (ah_attr->ah_flags & IB_AH_GRH) {
 103                 av->g_slid |= 0x80;
 104                 av->gid_index = (ah_attr->port_num - 1) * dev->limits.gid_table_len +
 105                         ah_attr->grh.sgid_index;
 106                 av->hop_limit = ah_attr->grh.hop_limit;
 107                 av->sl_tclass_flowlabel |=
 108                         cpu_to_be32((ah_attr->grh.traffic_class << 20) |
 109                                     ah_attr->grh.flow_label);
 110                 memcpy(av->dgid, ah_attr->grh.dgid.raw, 16);
 111         } else {
 112                 /* Arbel workaround -- low byte of GID must be 2 */
 113                 av->dgid[3] = cpu_to_be32(2);
 114         }
 115
 116         if (0) {
 117                 int j;
 118
 119                 mthca_dbg(dev, "Created UDAV at %p/%08lx:\n",
 120                           av, (unsigned long) ah->avdma);
 121                 for (j = 0; j < 8; ++j)
 122                         printk(KERN_DEBUG "  [%2x] %08x\n",
 123                                j * 4, be32_to_cpu(((u32 *) av)[j]));
 124         }
 125
 126         if (ah->on_hca) {
 127                 memcpy_toio(dev->av_table.av_map + index * MTHCA_AV_SIZE,
 128                             av, MTHCA_AV_SIZE);
 129                 kfree(av);
 130         }
 131
 132         return 0;
 133 }
 134
 135 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah)
 136 {
 137         if (ah->on_hca)
 138                 mthca_free(&dev->av_table.alloc,
 139                            (ah->avdma - dev->av_table.ddr_av_base) /
 140                            MTHCA_AV_SIZE);
 141         else
 142                 pci_pool_free(dev->av_table.pool, ah->av, ah->avdma);
 143
 144         return 0;
 145 }
 146
 147 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
 148                   struct ib_ud_header *header)
 149 {
 150         if (ah->on_hca)
 151                 return -EINVAL;
 152
 153         header->lrh.service_level   = be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 28;
 154         header->lrh.destination_lid = ah->av->dlid;
 155         header->lrh.source_lid      = ah->av->g_slid & 0x7f;
 156         if (ah->av->g_slid & 0x80) {
 157                 header->grh_present = 1;
 158                 header->grh.traffic_class =
 159                         (be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 20) & 0xff;
 160                 header->grh.flow_label    =
 161                         ah->av->sl_tclass_flowlabel & cpu_to_be32(0xfffff);
 162                 ib_get_cached_gid(&dev->ib_dev,
 163                                   be32_to_cpu(ah->av->port_pd) >> 24,
 164                                   ah->av->gid_index,
 165                                   &header->grh.source_gid);
 166                 memcpy(header->grh.destination_gid.raw,
 167                        ah->av->dgid, 16);
 168         } else {
 169                 header->grh_present = 0;
 170         }
 171
 172         return 0;
 173 }
 174
 175 int __devinit mthca_init_av_table(struct mthca_dev *dev)
 176 {
 177         int err;
 178
 179         err = mthca_alloc_init(&dev->av_table.alloc,
 180                                dev->av_table.num_ddr_avs,
 181                                dev->av_table.num_ddr_avs - 1,
 182                                0);
 183         if (err)
 184                 return err;
 185
 186         dev->av_table.pool = pci_pool_create("mthca_av", dev->pdev,
 187                                              MTHCA_AV_SIZE,
 188                                              MTHCA_AV_SIZE, 0);
 189         if (!dev->av_table.pool)
 190                 goto out_free_alloc;
 191
 192         if (!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
 193                 dev->av_table.av_map = ioremap(pci_resource_start(dev->pdev, 4) +
 194                                                dev->av_table.ddr_av_base -
 195                                                dev->ddr_start,
 196                                                dev->av_table.num_ddr_avs *
 197                                                MTHCA_AV_SIZE);
 198                 if (!dev->av_table.av_map)
 199                         goto out_free_pool;
 200         } else
 201                 dev->av_table.av_map = NULL;
 202
 203         return 0;
 204
 205  out_free_pool:
 206         pci_pool_destroy(dev->av_table.pool);
 207
 208  out_free_alloc:
 209         mthca_alloc_cleanup(&dev->av_table.alloc);
 210         return -ENOMEM;
 211 }
 212
 213 void __devexit mthca_cleanup_av_table(struct mthca_dev *dev)
 214 {
 215         if (dev->av_table.av_map)
 216                 iounmap(dev->av_table.av_map);
 217         pci_pool_destroy(dev->av_table.pool);
 218         mthca_alloc_cleanup(&dev->av_table.alloc);
 219 }