2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
38 #include <linux/spinlock.h>
39 #include <linux/kernel.h>
40 #include <linux/pci.h>
41 #include <linux/dma-mapping.h>
42 #include <asm/semaphore.h>
44 #include "mthca_provider.h"
45 #include "mthca_doorbell.h"
47 #define DRV_NAME "ib_mthca"
48 #define PFX DRV_NAME ": "
49 #define DRV_VERSION "0.06-pre"
50 #define DRV_RELDATE "November 8, 2004"
52 /* Types of supported HCA */
55 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
56 ARBEL_NATIVE /* MT25208 with extended features */
60 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
61 MTHCA_FLAG_SRQ = 1 << 2,
62 MTHCA_FLAG_MSI = 1 << 3,
63 MTHCA_FLAG_MSI_X = 1 << 4,
64 MTHCA_FLAG_NO_LAM = 1 << 5
73 MTHCA_EQ_CONTEXT_SIZE = 0x40,
74 MTHCA_CQ_CONTEXT_SIZE = 0x40,
75 MTHCA_QP_CONTEXT_SIZE = 0x200,
76 MTHCA_RDB_ENTRY_SIZE = 0x20,
78 MTHCA_MGM_ENTRY_SIZE = 0x40,
80 /* Arbel FW gives us these, but we need them for Tavor */
81 MTHCA_MPT_ENTRY_SIZE = 0x40,
82 MTHCA_MTT_SEG_SIZE = 0x40,
94 struct semaphore hcr_sem;
95 struct semaphore poll_sem;
96 struct semaphore event_sem;
98 spinlock_t context_lock;
100 struct mthca_cmd_context *context;
104 struct mthca_limits {
110 int local_ca_ack_delay;
141 unsigned long *table;
151 struct mthca_pd_table {
152 struct mthca_alloc alloc;
155 struct mthca_mr_table {
156 struct mthca_alloc mpt_alloc;
158 unsigned long **mtt_buddy;
160 struct mthca_icm_table *mtt_table;
161 struct mthca_icm_table *mpt_table;
164 struct mthca_eq_table {
165 struct mthca_alloc alloc;
166 void __iomem *clr_int;
168 struct mthca_eq eq[MTHCA_NUM_EQ];
170 struct page *icm_page;
176 struct mthca_cq_table {
177 struct mthca_alloc alloc;
179 struct mthca_array cq;
180 struct mthca_icm_table *table;
183 struct mthca_qp_table {
184 struct mthca_alloc alloc;
189 struct mthca_array qp;
190 struct mthca_icm_table *qp_table;
191 struct mthca_icm_table *eqp_table;
194 struct mthca_av_table {
195 struct pci_pool *pool;
198 void __iomem *av_map;
199 struct mthca_alloc alloc;
202 struct mthca_mcg_table {
203 struct semaphore sem;
204 struct mthca_alloc alloc;
208 struct ib_device ib_dev;
209 struct pci_dev *pdev;
212 unsigned long mthca_flags;
227 struct mthca_icm *fw_icm;
228 struct mthca_icm *aux_icm;
236 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
237 struct semaphore cap_mask_mutex;
240 void __iomem *ecr_base;
241 void __iomem *clr_base;
244 struct mthca_cmd cmd;
245 struct mthca_limits limits;
247 struct mthca_pd_table pd_table;
248 struct mthca_mr_table mr_table;
249 struct mthca_eq_table eq_table;
250 struct mthca_cq_table cq_table;
251 struct mthca_qp_table qp_table;
252 struct mthca_av_table av_table;
253 struct mthca_mcg_table mcg_table;
255 struct mthca_pd driver_pd;
256 struct mthca_mr driver_mr;
258 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
259 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
263 #define mthca_dbg(mdev, format, arg...) \
264 dev_dbg(&mdev->pdev->dev, format, ## arg)
265 #define mthca_err(mdev, format, arg...) \
266 dev_err(&mdev->pdev->dev, format, ## arg)
267 #define mthca_info(mdev, format, arg...) \
268 dev_info(&mdev->pdev->dev, format, ## arg)
269 #define mthca_warn(mdev, format, arg...) \
270 dev_warn(&mdev->pdev->dev, format, ## arg)
272 extern void __buggy_use_of_MTHCA_GET(void);
273 extern void __buggy_use_of_MTHCA_PUT(void);
275 #define MTHCA_GET(dest, source, offset) \
277 void *__p = (char *) (source) + (offset); \
278 switch (sizeof (dest)) { \
279 case 1: (dest) = *(u8 *) __p; break; \
280 case 2: (dest) = be16_to_cpup(__p); break; \
281 case 4: (dest) = be32_to_cpup(__p); break; \
282 case 8: (dest) = be64_to_cpup(__p); break; \
283 default: __buggy_use_of_MTHCA_GET(); \
287 #define MTHCA_PUT(dest, source, offset) \
289 __typeof__(source) *__p = \
290 (__typeof__(source) *) ((char *) (dest) + (offset)); \
291 switch (sizeof(source)) { \
292 case 1: *__p = (source); break; \
293 case 2: *__p = cpu_to_be16(source); break; \
294 case 4: *__p = cpu_to_be32(source); break; \
295 case 8: *__p = cpu_to_be64(source); break; \
296 default: __buggy_use_of_MTHCA_PUT(); \
300 int mthca_reset(struct mthca_dev *mdev);
302 u32 mthca_alloc(struct mthca_alloc *alloc);
303 void mthca_free(struct mthca_alloc *alloc, u32 obj);
304 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
306 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
307 void *mthca_array_get(struct mthca_array *array, int index);
308 int mthca_array_set(struct mthca_array *array, int index, void *value);
309 void mthca_array_clear(struct mthca_array *array, int index);
310 int mthca_array_init(struct mthca_array *array, int nent);
311 void mthca_array_cleanup(struct mthca_array *array, int nent);
313 int mthca_init_pd_table(struct mthca_dev *dev);
314 int mthca_init_mr_table(struct mthca_dev *dev);
315 int mthca_init_eq_table(struct mthca_dev *dev);
316 int mthca_init_cq_table(struct mthca_dev *dev);
317 int mthca_init_qp_table(struct mthca_dev *dev);
318 int mthca_init_av_table(struct mthca_dev *dev);
319 int mthca_init_mcg_table(struct mthca_dev *dev);
321 void mthca_cleanup_pd_table(struct mthca_dev *dev);
322 void mthca_cleanup_mr_table(struct mthca_dev *dev);
323 void mthca_cleanup_eq_table(struct mthca_dev *dev);
324 void mthca_cleanup_cq_table(struct mthca_dev *dev);
325 void mthca_cleanup_qp_table(struct mthca_dev *dev);
326 void mthca_cleanup_av_table(struct mthca_dev *dev);
327 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
329 int mthca_register_device(struct mthca_dev *dev);
330 void mthca_unregister_device(struct mthca_dev *dev);
332 int mthca_pd_alloc(struct mthca_dev *dev, struct mthca_pd *pd);
333 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
335 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
336 u32 access, struct mthca_mr *mr);
337 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
338 u64 *buffer_list, int buffer_size_shift,
339 int list_len, u64 iova, u64 total_size,
340 u32 access, struct mthca_mr *mr);
341 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
343 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
344 void mthca_unmap_eq_icm(struct mthca_dev *dev);
346 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
347 struct ib_wc *entry);
348 void mthca_arm_cq(struct mthca_dev *dev, struct mthca_cq *cq,
350 int mthca_init_cq(struct mthca_dev *dev, int nent,
351 struct mthca_cq *cq);
352 void mthca_free_cq(struct mthca_dev *dev,
353 struct mthca_cq *cq);
354 void mthca_cq_event(struct mthca_dev *dev, u32 cqn);
355 void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn);
357 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
358 enum ib_event_type event_type);
359 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
360 int mthca_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
361 struct ib_send_wr **bad_wr);
362 int mthca_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
363 struct ib_recv_wr **bad_wr);
364 int mthca_free_err_wqe(struct mthca_qp *qp, int is_send,
365 int index, int *dbd, u32 *new_wqe);
366 int mthca_alloc_qp(struct mthca_dev *dev,
368 struct mthca_cq *send_cq,
369 struct mthca_cq *recv_cq,
370 enum ib_qp_type type,
371 enum ib_sig_type send_policy,
372 enum ib_sig_type recv_policy,
373 struct mthca_qp *qp);
374 int mthca_alloc_sqp(struct mthca_dev *dev,
376 struct mthca_cq *send_cq,
377 struct mthca_cq *recv_cq,
378 enum ib_sig_type send_policy,
379 enum ib_sig_type recv_policy,
382 struct mthca_sqp *sqp);
383 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
384 int mthca_create_ah(struct mthca_dev *dev,
386 struct ib_ah_attr *ah_attr,
387 struct mthca_ah *ah);
388 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
389 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
390 struct ib_ud_header *header);
392 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
393 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
395 int mthca_process_mad(struct ib_device *ibdev,
399 struct ib_grh *in_grh,
400 struct ib_mad *in_mad,
401 struct ib_mad *out_mad);
402 int mthca_create_agents(struct mthca_dev *dev);
403 void mthca_free_agents(struct mthca_dev *dev);
405 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
407 return container_of(ibdev, struct mthca_dev, ib_dev);
410 #endif /* MTHCA_DEV_H */