2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/config.h>
19 #include <linux/init.h>
20 #include <linux/serio.h>
21 #include <linux/err.h>
25 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
26 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
27 MODULE_LICENSE("GPL");
29 static unsigned int i8042_noaux;
30 module_param_named(noaux, i8042_noaux, bool, 0);
31 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
33 static unsigned int i8042_nomux;
34 module_param_named(nomux, i8042_nomux, bool, 0);
35 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
37 static unsigned int i8042_unlock;
38 module_param_named(unlock, i8042_unlock, bool, 0);
39 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
41 static unsigned int i8042_reset;
42 module_param_named(reset, i8042_reset, bool, 0);
43 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
45 static unsigned int i8042_direct;
46 module_param_named(direct, i8042_direct, bool, 0);
47 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
49 static unsigned int i8042_dumbkbd;
50 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
51 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
53 static unsigned int i8042_noloop;
54 module_param_named(noloop, i8042_noloop, bool, 0);
55 MODULE_PARM_DESC(dumbkbd, "Disable the AUX Loopback command while probing for the AUX port");
58 static int i8042_noacpi;
59 module_param_named(noacpi, i8042_noacpi, bool, 0);
60 MODULE_PARM_DESC(noacpi, "Do not use ACPI to detect controller settings");
65 static int i8042_debug;
66 module_param_named(debug, i8042_debug, bool, 0600);
67 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
70 __obsolete_setup("i8042_noaux");
71 __obsolete_setup("i8042_nomux");
72 __obsolete_setup("i8042_unlock");
73 __obsolete_setup("i8042_reset");
74 __obsolete_setup("i8042_direct");
75 __obsolete_setup("i8042_dumbkbd");
79 DEFINE_SPINLOCK(i8042_lock);
83 unsigned char disable;
90 static struct i8042_values i8042_kbd_values = {
91 .disable = I8042_CTR_KBDDIS,
92 .irqen = I8042_CTR_KBDINT,
97 static struct i8042_values i8042_aux_values = {
98 .disable = I8042_CTR_AUXDIS,
99 .irqen = I8042_CTR_AUXINT,
104 static struct i8042_values i8042_mux_values[I8042_NUM_MUX_PORTS];
106 static struct serio *i8042_kbd_port;
107 static struct serio *i8042_aux_port;
108 static struct serio *i8042_mux_port[I8042_NUM_MUX_PORTS];
109 static unsigned char i8042_initial_ctr;
110 static unsigned char i8042_ctr;
111 static unsigned char i8042_mux_open;
112 static unsigned char i8042_mux_present;
113 static struct timer_list i8042_timer;
114 static struct platform_device *i8042_platform_device;
117 * Shared IRQ's require a device pointer, but this driver doesn't support
120 #define i8042_request_irq_cookie (&i8042_timer)
122 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs);
125 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
126 * be ready for reading values from it / writing values to it.
127 * Called always with i8042_lock held.
130 static int i8042_wait_read(void)
133 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
137 return -(i == I8042_CTL_TIMEOUT);
140 static int i8042_wait_write(void)
143 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
147 return -(i == I8042_CTL_TIMEOUT);
151 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
152 * of the i8042 down the toilet.
155 static int i8042_flush(void)
161 spin_lock_irqsave(&i8042_lock, flags);
163 while ((i8042_read_status() & I8042_STR_OBF) && (i++ < I8042_BUFFER_SIZE)) {
165 data = i8042_read_data();
166 dbg("%02x <- i8042 (flush, %s)", data,
167 i8042_read_status() & I8042_STR_AUXDATA ? "aux" : "kbd");
170 spin_unlock_irqrestore(&i8042_lock, flags);
176 * i8042_command() executes a command on the i8042. It also sends the input
177 * parameter(s) of the commands to it, and receives the output value(s). The
178 * parameters are to be stored in the param array, and the output is placed
179 * into the same array. The number of the parameters and output values is
180 * encoded in bits 8-11 of the command number.
183 static int i8042_command(unsigned char *param, int command)
186 int retval = 0, i = 0;
188 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
191 spin_lock_irqsave(&i8042_lock, flags);
193 retval = i8042_wait_write();
195 dbg("%02x -> i8042 (command)", command & 0xff);
196 i8042_write_command(command & 0xff);
200 for (i = 0; i < ((command >> 12) & 0xf); i++) {
201 if ((retval = i8042_wait_write())) break;
202 dbg("%02x -> i8042 (parameter)", param[i]);
203 i8042_write_data(param[i]);
207 for (i = 0; i < ((command >> 8) & 0xf); i++) {
208 if ((retval = i8042_wait_read())) break;
209 if (i8042_read_status() & I8042_STR_AUXDATA)
210 param[i] = ~i8042_read_data();
212 param[i] = i8042_read_data();
213 dbg("%02x <- i8042 (return)", param[i]);
216 spin_unlock_irqrestore(&i8042_lock, flags);
219 dbg(" -- i8042 (timeout)");
225 * i8042_kbd_write() sends a byte out through the keyboard interface.
228 static int i8042_kbd_write(struct serio *port, unsigned char c)
233 spin_lock_irqsave(&i8042_lock, flags);
235 if(!(retval = i8042_wait_write())) {
236 dbg("%02x -> i8042 (kbd-data)", c);
240 spin_unlock_irqrestore(&i8042_lock, flags);
246 * i8042_aux_write() sends a byte out through the aux interface.
249 static int i8042_aux_write(struct serio *port, unsigned char c)
251 struct i8042_values *values = port->port_data;
258 if (values->mux == -1)
259 retval = i8042_command(&c, I8042_CMD_AUX_SEND);
261 retval = i8042_command(&c, I8042_CMD_MUX_SEND + values->mux);
264 * Make sure the interrupt happens and the character is received even
265 * in the case the IRQ isn't wired, so that we can receive further
269 i8042_interrupt(0, NULL, NULL);
274 * i8042_activate_port() enables port on a chip.
277 static int i8042_activate_port(struct serio *port)
279 struct i8042_values *values = port->port_data;
284 * Enable port again here because it is disabled if we are
285 * resuming (normally it is enabled already).
287 i8042_ctr &= ~values->disable;
289 i8042_ctr |= values->irqen;
291 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
292 i8042_ctr &= ~values->irqen;
301 * i8042_open() is called when a port is open by the higher layer.
302 * It allocates the interrupt and calls i8042_enable_port.
305 static int i8042_open(struct serio *port)
307 struct i8042_values *values = port->port_data;
309 if (values->mux != -1)
310 if (i8042_mux_open++)
313 if (request_irq(values->irq, i8042_interrupt,
314 SA_SHIRQ, "i8042", i8042_request_irq_cookie)) {
315 printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", values->irq, values->name);
319 if (i8042_activate_port(port)) {
320 printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", values->name);
324 i8042_interrupt(0, NULL, NULL);
329 free_irq(values->irq, i8042_request_irq_cookie);
333 serio_unregister_port_delayed(port);
339 * i8042_close() frees the interrupt, so that it can possibly be used
340 * by another driver. We never know - if the user doesn't have a mouse,
341 * the BIOS could have used the AUX interrupt for PCI.
344 static void i8042_close(struct serio *port)
346 struct i8042_values *values = port->port_data;
348 if (values->mux != -1)
349 if (--i8042_mux_open)
352 i8042_ctr &= ~values->irqen;
354 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
355 printk(KERN_ERR "i8042.c: Can't write CTR while closing %s.\n", values->name);
359 free_irq(values->irq, i8042_request_irq_cookie);
365 * i8042_interrupt() is the most important function in this driver -
366 * it handles the interrupts from the i8042, and sends incoming bytes
367 * to the upper layers.
370 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs)
373 unsigned char str, data = 0;
375 unsigned int aux_idx;
378 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
380 spin_lock_irqsave(&i8042_lock, flags);
381 str = i8042_read_status();
382 if (str & I8042_STR_OBF)
383 data = i8042_read_data();
384 spin_unlock_irqrestore(&i8042_lock, flags);
386 if (~str & I8042_STR_OBF) {
387 if (irq) dbg("Interrupt %d, without any data", irq);
392 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
393 static unsigned long last_transmit;
394 static unsigned char last_str;
397 if (str & I8042_STR_MUXERR) {
398 dbg("MUX error, status is %02x, data is %02x", str, data);
402 * When MUXERR condition is signalled the data register can only contain
403 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
404 * it is not always the case. Some KBC just get confused which port the
405 * data came from and signal error leaving the data intact. They _do not_
406 * revert to legacy mode (actually I've never seen KBC reverting to legacy
407 * mode yet, when we see one we'll add proper handling).
408 * Anyway, we will assume that the data came from the same serio last byte
409 * was transmitted (if transmission happened not too long ago).
411 if (time_before(jiffies, last_transmit + HZ/10)) {
415 /* fall through - report timeout */
417 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
418 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
422 aux_idx = (str >> 6) & 3;
424 dbg("%02x <- i8042 (interrupt, aux%d, %d%s%s)",
426 dfl & SERIO_PARITY ? ", bad parity" : "",
427 dfl & SERIO_TIMEOUT ? ", timeout" : "");
429 if (likely(i8042_mux_values[aux_idx].exists))
430 serio_interrupt(i8042_mux_port[aux_idx], data, dfl, regs);
433 last_transmit = jiffies;
437 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
438 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
440 dbg("%02x <- i8042 (interrupt, %s, %d%s%s)",
441 data, (str & I8042_STR_AUXDATA) ? "aux" : "kbd", irq,
442 dfl & SERIO_PARITY ? ", bad parity" : "",
443 dfl & SERIO_TIMEOUT ? ", timeout" : "");
446 if (str & I8042_STR_AUXDATA) {
447 if (likely(i8042_aux_values.exists))
448 serio_interrupt(i8042_aux_port, data, dfl, regs);
450 if (likely(i8042_kbd_values.exists))
451 serio_interrupt(i8042_kbd_port, data, dfl, regs);
457 return IRQ_RETVAL(ret);
461 * i8042_set_mux_mode checks whether the controller has an active
462 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
465 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
470 * Get rid of bytes in the queue.
476 * Internal loopback test - send three bytes, they should come back from the
477 * mouse interface, the last should be version. Note that we negate mouseport
478 * command responses for the i8042_check_aux() routine.
482 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x0f)
484 param = mode ? 0x56 : 0xf6;
485 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0xa9 : 0x09))
487 param = mode ? 0xa4 : 0xa5;
488 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0x5b : 0x5a))
492 *mux_version = ~param;
499 * i8042_enable_mux_ports enables 4 individual AUX ports after
500 * the controller has been switched into Multiplexed mode
503 static int i8042_enable_mux_ports(struct i8042_values *values)
508 * Disable all muxed ports by disabling AUX.
511 i8042_ctr |= I8042_CTR_AUXDIS;
512 i8042_ctr &= ~I8042_CTR_AUXINT;
514 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
515 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
520 * Enable all muxed ports.
523 for (i = 0; i < 4; i++) {
524 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
525 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
533 * i8042_check_mux() checks whether the controller supports the PS/2 Active
534 * Multiplexing specification by Synaptics, Phoenix, Insyde and
538 static int __init i8042_check_mux(struct i8042_values *values)
540 unsigned char mux_version;
542 if (i8042_set_mux_mode(1, &mux_version))
545 /* Workaround for interference with USB Legacy emulation */
546 /* that causes a v10.12 MUX to be found. */
547 if (mux_version == 0xAC)
550 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
551 (mux_version >> 4) & 0xf, mux_version & 0xf);
553 if (i8042_enable_mux_ports(values))
556 i8042_mux_present = 1;
562 * i8042_check_aux() applies as much paranoia as it can at detecting
563 * the presence of an AUX interface.
566 static int __init i8042_check_aux(struct i8042_values *values)
569 static int i8042_check_aux_cookie;
572 * Check if AUX irq is available. If it isn't, then there is no point
573 * in trying to detect AUX presence.
576 if (request_irq(values->irq, i8042_interrupt, SA_SHIRQ,
577 "i8042", &i8042_check_aux_cookie))
579 free_irq(values->irq, &i8042_check_aux_cookie);
582 * Get rid of bytes in the queue.
588 * Internal loopback test - filters out AT-type i8042's. Unfortunately
589 * SiS screwed up and their 5597 doesn't support the LOOP command even
590 * though it has an AUX port.
594 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xa5) {
597 * External connection test - filters out AT-soldered PS/2 i8042's
598 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
599 * 0xfa - no error on some notebooks which ignore the spec
600 * Because it's common for chipsets to return error on perfectly functioning
601 * AUX ports, we test for this only when the LOOP command failed.
604 if (i8042_command(¶m, I8042_CMD_AUX_TEST)
605 || (param && param != 0xfa && param != 0xff))
610 * Bit assignment test - filters out PS/2 i8042's in AT mode
613 if (i8042_command(¶m, I8042_CMD_AUX_DISABLE))
615 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
616 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
617 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
620 if (i8042_command(¶m, I8042_CMD_AUX_ENABLE))
622 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
626 * Disable the interface.
629 i8042_ctr |= I8042_CTR_AUXDIS;
630 i8042_ctr &= ~I8042_CTR_AUXINT;
632 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
640 * i8042_port_register() marks the device as existing,
641 * registers it, and reports to the user.
644 static int __init i8042_port_register(struct serio *port)
646 struct i8042_values *values = port->port_data;
650 i8042_ctr &= ~values->disable;
652 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
653 printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n");
658 printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n",
660 (unsigned long) I8042_DATA_REG,
661 (unsigned long) I8042_COMMAND_REG,
664 serio_register_port(port);
670 static void i8042_timer_func(unsigned long data)
672 i8042_interrupt(0, NULL, NULL);
677 * i8042_controller init initializes the i8042 controller, and,
678 * most importantly, sets it into non-xlated mode if that's
682 static int i8042_controller_init(void)
687 * Test the i8042. We need to know if it thinks it's working correctly
688 * before doing anything else.
697 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
698 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
702 if (param != I8042_RET_CTL_TEST) {
703 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
704 param, I8042_RET_CTL_TEST);
710 * Save the CTR for restoral on unload / reboot.
713 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
714 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
718 i8042_initial_ctr = i8042_ctr;
721 * Disable the keyboard interface and interrupt.
724 i8042_ctr |= I8042_CTR_KBDDIS;
725 i8042_ctr &= ~I8042_CTR_KBDINT;
731 spin_lock_irqsave(&i8042_lock, flags);
732 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
734 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
736 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
738 spin_unlock_irqrestore(&i8042_lock, flags);
741 * If the chip is configured into nontranslated mode by the BIOS, don't
742 * bother enabling translating and be happy.
745 if (~i8042_ctr & I8042_CTR_XLATE)
749 * Set nontranslated mode for the kbd interface if requested by an option.
750 * After this the kbd interface becomes a simple serial in/out, like the aux
751 * interface is. We don't do this by default, since it can confuse notebook
756 i8042_ctr &= ~I8042_CTR_XLATE;
762 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
763 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
772 * Reset the controller.
774 void i8042_controller_reset(void)
779 * Reset the controller if requested.
783 if (i8042_command(¶m, I8042_CMD_CTL_TEST))
784 printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n");
787 * Disable MUX mode if present.
790 if (i8042_mux_present)
791 i8042_set_mux_mode(0, NULL);
794 * Restore the original control register setting.
797 i8042_ctr = i8042_initial_ctr;
799 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
800 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
805 * Here we try to reset everything back to a state in which the BIOS will be
806 * able to talk to the hardware when rebooting.
809 void i8042_controller_cleanup(void)
816 * Reset anything that is connected to the ports.
819 if (i8042_kbd_values.exists)
820 serio_cleanup(i8042_kbd_port);
822 if (i8042_aux_values.exists)
823 serio_cleanup(i8042_aux_port);
825 for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
826 if (i8042_mux_values[i].exists)
827 serio_cleanup(i8042_mux_port[i]);
829 i8042_controller_reset();
833 static int blink_frequency = 500;
834 module_param_named(panicblink, blink_frequency, int, 0600);
836 /* Catch the case when the kbd interrupt is off */
837 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
839 /* Tell the user who may be running in X and not see the console that we have
840 panic'ed. This is to distingush panics from "real" lockups. */
841 static long i8042_panic_blink(long count)
844 static long last_blink;
846 /* Roughly 1/2s frequency. KDB uses about 1s. Make sure it is
848 if (!blink_frequency)
850 if (count - last_blink < blink_frequency)
853 while (i8042_read_status() & I8042_STR_IBF)
855 i8042_write_data(0xed); /* set leds */
857 while (i8042_read_status() & I8042_STR_IBF)
860 i8042_write_data(led);
869 * Here we try to restore the original BIOS settings
872 static int i8042_suspend(struct device *dev, u32 state, u32 level)
874 if (level == SUSPEND_DISABLE) {
875 del_timer_sync(&i8042_timer);
876 i8042_controller_reset();
884 * Here we try to reset everything back to a state in which suspended
887 static int i8042_resume(struct device *dev, u32 level)
891 if (level != RESUME_ENABLE)
894 if (i8042_controller_init()) {
895 printk(KERN_ERR "i8042: resume failed\n");
899 if (i8042_mux_present)
900 if (i8042_set_mux_mode(1, NULL) ||
901 i8042_enable_mux_ports(&i8042_aux_values)) {
902 printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n");
906 * Reconnect anything that was connected to the ports.
909 if (i8042_kbd_values.exists && i8042_activate_port(i8042_kbd_port) == 0)
910 serio_reconnect(i8042_kbd_port);
912 if (i8042_aux_values.exists && i8042_activate_port(i8042_aux_port) == 0)
913 serio_reconnect(i8042_aux_port);
915 for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
916 if (i8042_mux_values[i].exists && i8042_activate_port(i8042_mux_port[i]) == 0)
917 serio_reconnect(i8042_mux_port[i]);
919 * Restart timer (for polling "stuck" data)
921 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
923 panic_blink = i8042_panic_blink;
930 * We need to reset the 8042 back to original mode on system shutdown,
931 * because otherwise BIOSes will be confused.
934 static void i8042_shutdown(struct device *dev)
936 i8042_controller_cleanup();
939 static struct device_driver i8042_driver = {
941 .bus = &platform_bus_type,
942 .suspend = i8042_suspend,
943 .resume = i8042_resume,
944 .shutdown = i8042_shutdown,
947 static struct serio * __init i8042_allocate_kbd_port(void)
951 serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
953 memset(serio, 0, sizeof(struct serio));
954 serio->type = i8042_direct ? SERIO_8042 : SERIO_8042_XL,
955 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write,
956 serio->open = i8042_open,
957 serio->close = i8042_close,
958 serio->port_data = &i8042_kbd_values,
959 serio->dev.parent = &i8042_platform_device->dev;
960 strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name));
961 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
967 static struct serio * __init i8042_allocate_aux_port(void)
971 serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
973 memset(serio, 0, sizeof(struct serio));
974 serio->type = SERIO_8042;
975 serio->write = i8042_aux_write;
976 serio->open = i8042_open;
977 serio->close = i8042_close;
978 serio->port_data = &i8042_aux_values,
979 serio->dev.parent = &i8042_platform_device->dev;
980 strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name));
981 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
987 static struct serio * __init i8042_allocate_mux_port(int index)
990 struct i8042_values *values = &i8042_mux_values[index];
992 serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
994 *values = i8042_aux_values;
995 snprintf(values->name, sizeof(values->name), "AUX%d", index);
998 memset(serio, 0, sizeof(struct serio));
999 serio->type = SERIO_8042;
1000 serio->write = i8042_aux_write;
1001 serio->open = i8042_open;
1002 serio->close = i8042_close;
1003 serio->port_data = values;
1004 serio->dev.parent = &i8042_platform_device->dev;
1005 snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index);
1006 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1);
1012 int __init i8042_init(void)
1019 init_timer(&i8042_timer);
1020 i8042_timer.function = i8042_timer_func;
1022 if (i8042_platform_init())
1025 i8042_aux_values.irq = I8042_AUX_IRQ;
1026 i8042_kbd_values.irq = I8042_KBD_IRQ;
1028 if (i8042_controller_init())
1031 err = driver_register(&i8042_driver);
1035 i8042_platform_device = platform_device_register_simple("i8042", -1, NULL, 0);
1036 if (IS_ERR(i8042_platform_device)) {
1037 driver_unregister(&i8042_driver);
1038 return PTR_ERR(i8042_platform_device);
1041 if (!i8042_noaux && !i8042_check_aux(&i8042_aux_values)) {
1042 if (!i8042_nomux && !i8042_check_mux(&i8042_aux_values))
1043 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1044 i8042_mux_port[i] = i8042_allocate_mux_port(i);
1045 if (i8042_mux_port[i])
1046 i8042_port_register(i8042_mux_port[i]);
1049 i8042_aux_port = i8042_allocate_aux_port();
1051 i8042_port_register(i8042_aux_port);
1055 i8042_kbd_port = i8042_allocate_kbd_port();
1057 i8042_port_register(i8042_kbd_port);
1059 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
1064 void __exit i8042_exit(void)
1068 i8042_controller_cleanup();
1070 if (i8042_kbd_values.exists)
1071 serio_unregister_port(i8042_kbd_port);
1073 if (i8042_aux_values.exists)
1074 serio_unregister_port(i8042_aux_port);
1076 for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
1077 if (i8042_mux_values[i].exists)
1078 serio_unregister_port(i8042_mux_port[i]);
1080 del_timer_sync(&i8042_timer);
1082 platform_device_unregister(i8042_platform_device);
1083 driver_unregister(&i8042_driver);
1085 i8042_platform_exit();
1090 module_init(i8042_init);
1091 module_exit(i8042_exit);