2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2002 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/config.h>
19 #include <linux/reboot.h>
20 #include <linux/init.h>
21 #include <linux/sysdev.h>
23 #include <linux/serio.h>
27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29 MODULE_LICENSE("GPL");
31 static unsigned int i8042_noaux;
32 module_param_named(noaux, i8042_noaux, bool, 0);
33 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
35 static unsigned int i8042_nomux;
36 module_param_named(nomux, i8042_nomux, bool, 0);
37 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
39 static unsigned int i8042_unlock;
40 module_param_named(unlock, i8042_unlock, bool, 0);
41 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
43 static unsigned int i8042_reset;
44 module_param_named(reset, i8042_reset, bool, 0);
45 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
47 static unsigned int i8042_direct;
48 module_param_named(direct, i8042_direct, bool, 0);
49 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
51 static unsigned int i8042_dumbkbd;
52 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
53 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
55 __obsolete_setup("i8042_noaux");
56 __obsolete_setup("i8042_nomux");
57 __obsolete_setup("i8042_unlock");
58 __obsolete_setup("i8042_reset");
59 __obsolete_setup("i8042_direct");
60 __obsolete_setup("i8042_dumbkbd");
65 spinlock_t i8042_lock = SPIN_LOCK_UNLOCKED;
69 unsigned char disable;
77 static struct serio i8042_kbd_port;
78 static struct serio i8042_aux_port;
79 static unsigned char i8042_initial_ctr;
80 static unsigned char i8042_ctr;
81 static unsigned char i8042_mux_open;
82 static unsigned char i8042_mux_present;
83 static unsigned char i8042_sysdev_initialized;
84 static struct pm_dev *i8042_pm_dev;
85 struct timer_list i8042_timer;
88 * Shared IRQ's require a device pointer, but this driver doesn't support
91 #define i8042_request_irq_cookie (&i8042_timer)
93 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs);
96 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
97 * be ready for reading values from it / writing values to it.
100 static int i8042_wait_read(void)
103 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
107 return -(i == I8042_CTL_TIMEOUT);
110 static int i8042_wait_write(void)
113 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
117 return -(i == I8042_CTL_TIMEOUT);
121 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
122 * of the i8042 down the toilet.
125 static int i8042_flush(void)
131 spin_lock_irqsave(&i8042_lock, flags);
133 while ((i8042_read_status() & I8042_STR_OBF) && (i++ < I8042_BUFFER_SIZE)) {
134 data = i8042_read_data();
135 dbg("%02x <- i8042 (flush, %s)", data,
136 i8042_read_status() & I8042_STR_AUXDATA ? "aux" : "kbd");
139 spin_unlock_irqrestore(&i8042_lock, flags);
145 * i8042_command() executes a command on the i8042. It also sends the input
146 * parameter(s) of the commands to it, and receives the output value(s). The
147 * parameters are to be stored in the param array, and the output is placed
148 * into the same array. The number of the parameters and output values is
149 * encoded in bits 8-11 of the command number.
152 static int i8042_command(unsigned char *param, int command)
155 int retval = 0, i = 0;
157 spin_lock_irqsave(&i8042_lock, flags);
159 retval = i8042_wait_write();
161 dbg("%02x -> i8042 (command)", command & 0xff);
162 i8042_write_command(command & 0xff);
166 for (i = 0; i < ((command >> 12) & 0xf); i++) {
167 if ((retval = i8042_wait_write())) break;
168 dbg("%02x -> i8042 (parameter)", param[i]);
169 i8042_write_data(param[i]);
173 for (i = 0; i < ((command >> 8) & 0xf); i++) {
174 if ((retval = i8042_wait_read())) break;
175 if (i8042_read_status() & I8042_STR_AUXDATA)
176 param[i] = ~i8042_read_data();
178 param[i] = i8042_read_data();
179 dbg("%02x <- i8042 (return)", param[i]);
182 spin_unlock_irqrestore(&i8042_lock, flags);
185 dbg(" -- i8042 (timeout)");
191 * i8042_kbd_write() sends a byte out through the keyboard interface.
194 static int i8042_kbd_write(struct serio *port, unsigned char c)
199 spin_lock_irqsave(&i8042_lock, flags);
201 if(!(retval = i8042_wait_write())) {
202 dbg("%02x -> i8042 (kbd-data)", c);
206 spin_unlock_irqrestore(&i8042_lock, flags);
212 * i8042_aux_write() sends a byte out through the aux interface.
215 static int i8042_aux_write(struct serio *port, unsigned char c)
217 struct i8042_values *values = port->driver;
224 if (values->mux == -1)
225 retval = i8042_command(&c, I8042_CMD_AUX_SEND);
227 retval = i8042_command(&c, I8042_CMD_MUX_SEND + values->mux);
230 * Make sure the interrupt happens and the character is received even
231 * in the case the IRQ isn't wired, so that we can receive further
235 i8042_interrupt(0, NULL, NULL);
240 * i8042_activate_port() enables port on a chip.
243 static int i8042_activate_port(struct serio *port)
245 struct i8042_values *values = port->driver;
250 * Enable port again here because it is disabled if we are
251 * resuming (normally it is enabled already).
253 i8042_ctr &= ~values->disable;
255 i8042_ctr |= values->irqen;
257 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
258 i8042_ctr &= ~values->irqen;
267 * i8042_open() is called when a port is open by the higher layer.
268 * It allocates the interrupt and calls i8042_enable_port.
271 static int i8042_open(struct serio *port)
273 struct i8042_values *values = port->driver;
275 if (values->mux != -1)
276 if (i8042_mux_open++)
279 if (request_irq(values->irq, i8042_interrupt,
280 SA_SHIRQ, "i8042", i8042_request_irq_cookie)) {
281 printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", values->irq, values->name);
285 if (i8042_activate_port(port)) {
286 printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", values->name);
290 i8042_interrupt(0, NULL, NULL);
295 free_irq(values->irq, i8042_request_irq_cookie);
299 serio_unregister_port_delayed(port);
305 * i8042_close() frees the interrupt, so that it can possibly be used
306 * by another driver. We never know - if the user doesn't have a mouse,
307 * the BIOS could have used the AUX interrupt for PCI.
310 static void i8042_close(struct serio *port)
312 struct i8042_values *values = port->driver;
314 if (values->mux != -1)
315 if (--i8042_mux_open)
318 i8042_ctr &= ~values->irqen;
320 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
321 printk(KERN_ERR "i8042.c: Can't write CTR while closing %s.\n", values->name);
325 free_irq(values->irq, i8042_request_irq_cookie);
331 * Structures for registering the devices in the serio.c module.
334 static struct i8042_values i8042_kbd_values = {
335 .irqen = I8042_CTR_KBDINT,
336 .disable = I8042_CTR_KBDDIS,
341 static struct serio i8042_kbd_port =
343 .type = SERIO_8042_XL,
344 .write = i8042_kbd_write,
346 .close = i8042_close,
347 .driver = &i8042_kbd_values,
348 .name = "i8042 Kbd Port",
349 .phys = I8042_KBD_PHYS_DESC,
352 static struct i8042_values i8042_aux_values = {
353 .irqen = I8042_CTR_AUXINT,
354 .disable = I8042_CTR_AUXDIS,
359 static struct serio i8042_aux_port =
362 .write = i8042_aux_write,
364 .close = i8042_close,
365 .driver = &i8042_aux_values,
366 .name = "i8042 Aux Port",
367 .phys = I8042_AUX_PHYS_DESC,
370 static struct i8042_values i8042_mux_values[4];
371 static struct serio i8042_mux_port[4];
372 static char i8042_mux_names[4][32];
373 static char i8042_mux_short[4][16];
374 static char i8042_mux_phys[4][32];
377 * i8042_interrupt() is the most important function in this driver -
378 * it handles the interrupts from the i8042, and sends incoming bytes
379 * to the upper layers.
382 static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs)
385 unsigned char str, data = 0;
389 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
391 spin_lock_irqsave(&i8042_lock, flags);
392 str = i8042_read_status();
393 if (str & I8042_STR_OBF)
394 data = i8042_read_data();
395 spin_unlock_irqrestore(&i8042_lock, flags);
397 if (~str & I8042_STR_OBF) {
398 if (irq) dbg("Interrupt %d, without any data", irq);
403 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
404 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
406 if (i8042_mux_values[0].exists && (str & I8042_STR_AUXDATA)) {
408 if (str & I8042_STR_MUXERR) {
411 case 0xfe: dfl = SERIO_TIMEOUT; break;
412 case 0xff: dfl = SERIO_PARITY; break;
417 dbg("%02x <- i8042 (interrupt, aux%d, %d%s%s)",
418 data, (str >> 6), irq,
419 dfl & SERIO_PARITY ? ", bad parity" : "",
420 dfl & SERIO_TIMEOUT ? ", timeout" : "");
422 serio_interrupt(i8042_mux_port + ((str >> 6) & 3), data, dfl, regs);
427 dbg("%02x <- i8042 (interrupt, %s, %d%s%s)",
428 data, (str & I8042_STR_AUXDATA) ? "aux" : "kbd", irq,
429 dfl & SERIO_PARITY ? ", bad parity" : "",
430 dfl & SERIO_TIMEOUT ? ", timeout" : "");
432 if (i8042_aux_values.exists && (str & I8042_STR_AUXDATA)) {
433 serio_interrupt(&i8042_aux_port, data, dfl, regs);
437 if (!i8042_kbd_values.exists)
440 serio_interrupt(&i8042_kbd_port, data, dfl, regs);
445 return IRQ_RETVAL(ret);
449 * i8042_enable_mux_mode checks whether the controller has an active
450 * multiplexor and puts the chip into Multiplexed (as opposed to
454 static int i8042_enable_mux_mode(struct i8042_values *values, unsigned char *mux_version)
459 * Get rid of bytes in the queue.
465 * Internal loopback test - send three bytes, they should come back from the
466 * mouse interface, the last should be version. Note that we negate mouseport
467 * command responses for the i8042_check_aux() routine.
471 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x0f)
474 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xa9)
477 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == 0x5b) {
480 * Do another loop test with the 0x5a value. Doing anything else upsets
481 * Profusion/ServerWorks OSB4 chipsets.
485 i8042_command(¶m, I8042_CMD_AUX_LOOP);
490 *mux_version = ~param;
497 * i8042_enable_mux_ports enables 4 individual AUX ports after
498 * the controller has been switched into Multiplexed mode
501 static int i8042_enable_mux_ports(struct i8042_values *values)
506 * Disable all muxed ports by disabling AUX.
509 i8042_ctr |= I8042_CTR_AUXDIS;
510 i8042_ctr &= ~I8042_CTR_AUXINT;
512 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
513 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
518 * Enable all muxed ports.
521 for (i = 0; i < 4; i++) {
522 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
523 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
531 * i8042_check_mux() checks whether the controller supports the PS/2 Active
532 * Multiplexing specification by Synaptics, Phoenix, Insyde and
536 static int __init i8042_check_mux(struct i8042_values *values)
538 unsigned char mux_version;
540 if (i8042_enable_mux_mode(values, &mux_version))
543 /* Workaround for broken chips which seem to support MUX, but in reality don't. */
544 /* They all report version 10.12 */
545 if (mux_version == 0xAC)
548 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
549 (mux_version >> 4) & 0xf, mux_version & 0xf);
551 if (i8042_enable_mux_ports(values))
554 i8042_mux_present = 1;
560 * i8042_check_aux() applies as much paranoia as it can at detecting
561 * the presence of an AUX interface.
564 static int __init i8042_check_aux(struct i8042_values *values)
567 static int i8042_check_aux_cookie;
570 * Check if AUX irq is available. If it isn't, then there is no point
571 * in trying to detect AUX presence.
574 if (request_irq(values->irq, i8042_interrupt, SA_SHIRQ,
575 "i8042", &i8042_check_aux_cookie))
577 free_irq(values->irq, &i8042_check_aux_cookie);
580 * Get rid of bytes in the queue.
586 * Internal loopback test - filters out AT-type i8042's. Unfortunately
587 * SiS screwed up and their 5597 doesn't support the LOOP command even
588 * though it has an AUX port.
592 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xa5) {
595 * External connection test - filters out AT-soldered PS/2 i8042's
596 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
597 * 0xfa - no error on some notebooks which ignore the spec
598 * Because it's common for chipsets to return error on perfectly functioning
599 * AUX ports, we test for this only when the LOOP command failed.
602 if (i8042_command(¶m, I8042_CMD_AUX_TEST)
603 || (param && param != 0xfa && param != 0xff))
608 * Bit assignment test - filters out PS/2 i8042's in AT mode
611 if (i8042_command(¶m, I8042_CMD_AUX_DISABLE))
613 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
614 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
615 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
618 if (i8042_command(¶m, I8042_CMD_AUX_ENABLE))
620 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
624 * Disable the interface.
627 i8042_ctr |= I8042_CTR_AUXDIS;
628 i8042_ctr &= ~I8042_CTR_AUXINT;
630 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
638 * i8042_port_register() marks the device as existing,
639 * registers it, and reports to the user.
642 static int __init i8042_port_register(struct i8042_values *values, struct serio *port)
646 i8042_ctr &= ~values->disable;
648 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
649 printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n");
654 printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n",
656 (unsigned long) I8042_DATA_REG,
657 (unsigned long) I8042_COMMAND_REG,
660 serio_register_port(port);
666 static void i8042_timer_func(unsigned long data)
668 i8042_interrupt(0, NULL, NULL);
673 * i8042_controller init initializes the i8042 controller, and,
674 * most importantly, sets it into non-xlated mode if that's
678 static int i8042_controller_init(void)
682 * Test the i8042. We need to know if it thinks it's working correctly
683 * before doing anything else.
692 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
693 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
697 if (param != I8042_RET_CTL_TEST) {
698 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
699 param, I8042_RET_CTL_TEST);
705 * Save the CTR for restoral on unload / reboot.
708 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
709 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
713 i8042_initial_ctr = i8042_ctr;
716 * Disable the keyboard interface and interrupt.
719 i8042_ctr |= I8042_CTR_KBDDIS;
720 i8042_ctr &= ~I8042_CTR_KBDINT;
726 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
728 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
730 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
734 * If the chip is configured into nontranslated mode by the BIOS, don't
735 * bother enabling translating and be happy.
738 if (~i8042_ctr & I8042_CTR_XLATE)
742 * Set nontranslated mode for the kbd interface if requested by an option.
743 * After this the kbd interface becomes a simple serial in/out, like the aux
744 * interface is. We don't do this by default, since it can confuse notebook
749 i8042_ctr &= ~I8042_CTR_XLATE;
750 i8042_kbd_port.type = SERIO_8042;
757 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
758 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
767 * Reset the controller.
769 void i8042_controller_reset(void)
774 if (i8042_command(¶m, I8042_CMD_CTL_TEST))
775 printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n");
779 * Restore the original control register setting.
782 i8042_ctr = i8042_initial_ctr;
784 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
785 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
790 * Here we try to reset everything back to a state in which the BIOS will be
791 * able to talk to the hardware when rebooting.
794 void i8042_controller_cleanup(void)
801 * Reset anything that is connected to the ports.
804 if (i8042_kbd_values.exists)
805 serio_cleanup(&i8042_kbd_port);
807 if (i8042_aux_values.exists)
808 serio_cleanup(&i8042_aux_port);
810 for (i = 0; i < 4; i++)
811 if (i8042_mux_values[i].exists)
812 serio_cleanup(i8042_mux_port + i);
814 i8042_controller_reset();
819 * Here we try to restore the original BIOS settings
822 static int i8042_controller_suspend(void)
824 del_timer_sync(&i8042_timer);
825 i8042_controller_reset();
832 * Here we try to reset everything back to a state in which suspended
835 static int i8042_controller_resume(void)
839 if (i8042_controller_init()) {
840 printk(KERN_ERR "i8042: resume failed\n");
844 if (i8042_mux_present)
845 if (i8042_enable_mux_mode(&i8042_aux_values, NULL) ||
846 i8042_enable_mux_ports(&i8042_aux_values)) {
847 printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n");
851 * Reconnect anything that was connected to the ports.
854 if (i8042_kbd_values.exists && i8042_activate_port(&i8042_kbd_port) == 0)
855 serio_reconnect(&i8042_kbd_port);
857 if (i8042_aux_values.exists && i8042_activate_port(&i8042_aux_port) == 0)
858 serio_reconnect(&i8042_aux_port);
860 for (i = 0; i < 4; i++)
861 if (i8042_mux_values[i].exists && i8042_activate_port(i8042_mux_port + i) == 0)
862 serio_reconnect(i8042_mux_port + i);
864 * Restart timer (for polling "stuck" data)
866 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
873 * We need to reset the 8042 back to original mode on system shutdown,
874 * because otherwise BIOSes will be confused.
877 static int i8042_notify_sys(struct notifier_block *this, unsigned long code,
880 if (code == SYS_DOWN || code == SYS_HALT)
881 i8042_controller_cleanup();
885 static struct notifier_block i8042_notifier=
893 * Suspend/resume handlers for the new PM scheme (driver model)
895 static int i8042_suspend(struct sys_device *dev, u32 state)
897 return i8042_controller_suspend();
900 static int i8042_resume(struct sys_device *dev)
902 return i8042_controller_resume();
905 static struct sysdev_class kbc_sysclass = {
906 set_kset_name("i8042"),
907 .suspend = i8042_suspend,
908 .resume = i8042_resume,
911 static struct sys_device device_i8042 = {
913 .cls = &kbc_sysclass,
917 * Suspend/resume handler for the old PM scheme (APM)
919 static int i8042_pm_callback(struct pm_dev *dev, pm_request_t request, void *dummy)
923 return i8042_controller_suspend();
926 return i8042_controller_resume();
932 static void __init i8042_init_mux_values(struct i8042_values *values, struct serio *port, int index)
934 memcpy(port, &i8042_aux_port, sizeof(struct serio));
935 memcpy(values, &i8042_aux_values, sizeof(struct i8042_values));
936 sprintf(i8042_mux_names[index], "i8042 Aux-%d Port", index);
937 sprintf(i8042_mux_phys[index], I8042_MUX_PHYS_DESC, index + 1);
938 sprintf(i8042_mux_short[index], "AUX%d", index);
939 port->name = i8042_mux_names[index];
940 port->phys = i8042_mux_phys[index];
941 port->driver = values;
942 values->name = i8042_mux_short[index];
946 int __init i8042_init(void)
952 init_timer(&i8042_timer);
953 i8042_timer.function = i8042_timer_func;
955 if (i8042_platform_init())
958 i8042_aux_values.irq = I8042_AUX_IRQ;
959 i8042_kbd_values.irq = I8042_KBD_IRQ;
961 if (i8042_controller_init())
965 i8042_kbd_port.write = NULL;
967 if (!i8042_noaux && !i8042_check_aux(&i8042_aux_values)) {
968 if (!i8042_nomux && !i8042_check_mux(&i8042_aux_values))
969 for (i = 0; i < 4; i++) {
970 i8042_init_mux_values(i8042_mux_values + i, i8042_mux_port + i, i);
971 i8042_port_register(i8042_mux_values + i, i8042_mux_port + i);
974 i8042_port_register(&i8042_aux_values, &i8042_aux_port);
977 i8042_port_register(&i8042_kbd_values, &i8042_kbd_port);
979 mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
981 if (sysdev_class_register(&kbc_sysclass) == 0) {
982 if (sysdev_register(&device_i8042) == 0)
983 i8042_sysdev_initialized = 1;
985 sysdev_class_unregister(&kbc_sysclass);
988 i8042_pm_dev = pm_register(PM_SYS_DEV, PM_SYS_UNKNOWN, i8042_pm_callback);
990 register_reboot_notifier(&i8042_notifier);
995 void __exit i8042_exit(void)
999 unregister_reboot_notifier(&i8042_notifier);
1002 pm_unregister(i8042_pm_dev);
1004 if (i8042_sysdev_initialized) {
1005 sysdev_unregister(&device_i8042);
1006 sysdev_class_unregister(&kbc_sysclass);
1009 i8042_controller_cleanup();
1011 if (i8042_kbd_values.exists)
1012 serio_unregister_port(&i8042_kbd_port);
1014 if (i8042_aux_values.exists)
1015 serio_unregister_port(&i8042_aux_port);
1017 for (i = 0; i < 4; i++)
1018 if (i8042_mux_values[i].exists)
1019 serio_unregister_port(i8042_mux_port + i);
1020 del_timer_sync(&i8042_timer);
1022 i8042_platform_exit();
1025 module_init(i8042_init);
1026 module_exit(i8042_exit);