drivers/isdn/hisax/enternow_pci.c

   1 /* enternow_pci.c,v 0.99 2001/10/02
   2  *
   3  * enternow_pci.c       Card-specific routines for
   4  *                      Formula-n enter:now ISDN PCI ab
   5  *                      Gerdes AG Power ISDN PCI
   6  *                      Woerltronic SA 16 PCI
   7  *                      (based on HiSax driver by Karsten Keil)
   8  *
   9  * Author               Christoph Ersfeld <info@formula-n.de>
  10  *                      Formula-n Europe AG (www.formula-n.com)
  11  *                      previously Gerdes AG
  12  *
  13  *
  14  *                      This file is (c) under GNU PUBLIC LICENSE
  15  *
  16  * Notes:
  17  * This driver interfaces to netjet.c which performs B-channel
  18  * processing.
  19  *
  20  * Version 0.99 is the first release of this driver and there are
  21  * certainly a few bugs.
  22  * It isn't testet on linux 2.4 yet, so consider this code to be
  23  * beta.
  24  *
  25  * Please don't report me any malfunction without sending
  26  * (compressed) debug-logs.
  27  * It would be nearly impossible to retrace it.
  28  *
  29  * Log D-channel-processing as follows:
  30  *
  31  * 1. Load hisax with card-specific parameters, this example ist for
  32  *    Formula-n enter:now ISDN PCI and compatible
  33  *    (f.e. Gerdes Power ISDN PCI)
  34  *
  35  *    modprobe hisax type=41 protocol=2 id=gerdes
  36  *
  37  *    if you chose an other value for id, you need to modify the
  38  *    code below, too.
  39  *
  40  * 2. set debug-level
  41  *
  42  *    hisaxctrl gerdes 1 0x3ff
  43  *    hisaxctrl gerdes 11 0x4f
  44  *    cat /dev/isdnctrl >> ~/log &
  45  *
  46  * Please take also a look into /var/log/messages if there is
  47  * anything importand concerning HISAX.
  48  *
  49  *
  50  * Credits:
  51  * Programming the driver for Formula-n enter:now ISDN PCI and
  52  * necessary the driver for the used Amd 7930 D-channel-controller
  53  * was spnsored by Formula-n Europe AG.
  54  * Thanks to Karsten Keil and Petr Novak, who gave me support in
  55  * Hisax-specific questions.
  56  * I want so say special thanks to Carl-Friedrich Braun, who had to
  57  * answer a lot of questions about generally ISDN and about handling
  58  * of the Amd-Chip.
  59  *
  60  */
  61
  62
  63 #include <linux/config.h>
  64 #include "hisax.h"
  65 #include "isac.h"
  66 #include "isdnl1.h"
  67 #include "amd7930_fn.h"
  68 #include <linux/interrupt.h>
  69 #include <linux/ppp_defs.h>
  70 #include <linux/pci.h>
  71 #include <linux/init.h>
  72 #include "netjet.h"
  73
  74
  75
  76 static const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
  77
  78
  79 /* für PowerISDN PCI */
  80 #define TJ_AMD_IRQ                                              0x20
  81 #define TJ_LED1                                                 0x40
  82 #define TJ_LED2                                                 0x80
  83
  84
  85 /* Das Fenster zum AMD...
  86  * Ab Adresse hw.njet.base + TJ_AMD_PORT werden vom AMD jeweils 8 Bit in
  87  * den TigerJet i/o-Raum gemappt
  88  * -> 0x01 des AMD bei hw.njet.base + 0C4 */
  89 #define TJ_AMD_PORT                                             0xC0
  90
  91
  92
  93 /* *************************** I/O-Interface functions ************************************* */
  94
  95
  96 /* cs->readisac, macro rByteAMD */
  97 static unsigned char
  98 ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
  99 {
 100         /* direktes Register */
 101         if(offset < 8)
 102                 return (inb(cs->hw.njet.isac + 4*offset));
 103
 104         /* indirektes Register */
 105         else {
 106                 outb(offset, cs->hw.njet.isac + 4*AMD_CR);
 107                 return(inb(cs->hw.njet.isac + 4*AMD_DR));
 108         }
 109 }
 110
 111 /* cs->writeisac, macro wByteAMD */
 112 static void
 113 WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
 114 {
 115         /* direktes Register */
 116         if(offset < 8)
 117                 outb(value, cs->hw.njet.isac + 4*offset);
 118
 119         /* indirektes Register */
 120         else {
 121                 outb(offset, cs->hw.njet.isac + 4*AMD_CR);
 122                 outb(value, cs->hw.njet.isac + 4*AMD_DR);
 123         }
 124 }
 125
 126
 127 static void
 128 enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
 129         if (!val)
 130                 outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
 131         else
 132                 outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
 133 }
 134
 135
 136 static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
 137 {
 138         return(5);
 139 }
 140
 141 static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
 142 {
 143
 144 }
 145
 146
 147 /* ******************************************************************************** */
 148
 149
 150 static void
 151 reset_enpci(struct IsdnCardState *cs)
 152 {
 153         if (cs->debug & L1_DEB_ISAC)
 154                 debugl1(cs, "enter:now PCI: reset");
 155
 156         /* Reset on, (also for AMD) */
 157         cs->hw.njet.ctrl_reg = 0x07;
 158         outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
 159         mdelay(20);
 160         /* Reset off */
 161         cs->hw.njet.ctrl_reg = 0x30;
 162         outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
 163         /* 20ms delay */
 164         mdelay(20);
 165         cs->hw.njet.auxd = 0;  // LED-status
 166         cs->hw.njet.dmactrl = 0;
 167         outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
 168         outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
 169         outb(cs->hw.njet.auxd, cs->hw.njet.auxa); // LED off
 170 }
 171
 172
 173 static int
 174 enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
 175 {
 176         u_long flags;
 177         unsigned char *chan;
 178
 179         if (cs->debug & L1_DEB_ISAC)
 180                 debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
 181
 182         switch (mt) {
 183                 case CARD_RESET:
 184                         spin_lock_irqsave(&cs->lock, flags);
 185                         reset_enpci(cs);
 186                         Amd7930_init(cs);
 187                         spin_unlock_irqrestore(&cs->lock, flags);
 188                         break;
 189                 case CARD_RELEASE:
 190                         release_io_netjet(cs);
 191                         break;
 192                 case CARD_INIT:
 193                         reset_enpci(cs);
 194                         inittiger(cs);
 195                         /* irq must be on here */
 196                         Amd7930_init(cs);
 197                         break;
 198                 case CARD_TEST:
 199                         break;
 200                 case MDL_ASSIGN:
 201                         /* TEI assigned, LED1 on */
 202                         cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
 203                         outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
 204                         break;
 205                 case MDL_REMOVE:
 206                         /* TEI removed, LEDs off */
 207                         cs->hw.njet.auxd = 0;
 208                         outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
 209                         break;
 210                 case MDL_BC_ASSIGN:
 211                         /* activate B-channel */
 212                         chan = (unsigned char *)arg;
 213
 214                         if (cs->debug & L1_DEB_ISAC)
 215                                 debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
 216
 217                         cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
 218                         /* at least one b-channel in use, LED 2 on */
 219                         cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
 220                         outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
 221                         break;
 222                 case MDL_BC_RELEASE:
 223                         /* deactivate B-channel */
 224                         chan = (unsigned char *)arg;
 225
 226                         if (cs->debug & L1_DEB_ISAC)
 227                                 debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
 228
 229                         cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
 230                         /* no b-channel active -> LED2 off */
 231                         if (!(cs->dc.amd7930.lmr1 & 3)) {
 232                                 cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
 233                                 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
 234                         }
 235                         break;
 236                 default:
 237                         break;
 238
 239         }
 240         return(0);
 241 }
 242
 243 static irqreturn_t
 244 enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
 245 {
 246         struct IsdnCardState *cs = dev_id;
 247         unsigned char s0val, s1val, ir;
 248         u_long flags;
 249
 250         spin_lock_irqsave(&cs->lock, flags);
 251         s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
 252
 253         /* AMD threw an interrupt */
 254         if (!(s1val & TJ_AMD_IRQ)) {
 255                 /* read and clear interrupt-register */
 256                 ir = ReadByteAmd7930(cs, 0x00);
 257                 Amd7930_interrupt(cs, ir);
 258                 s1val = 1;
 259         } else
 260                 s1val = 0;
 261         s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
 262         if ((s0val | s1val)==0) { // shared IRQ
 263                 spin_unlock_irqrestore(&cs->lock, flags);
 264                 return IRQ_NONE;
 265         }
 266         if (s0val)
 267                 outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
 268
 269         /* DMA-Interrupt: B-channel-stuff */
 270         /* set bits in sval to indicate which page is free */
 271         if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
 272                 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
 273                 /* the 2nd write page is free */
 274                 s0val = 0x08;
 275         else    /* the 1st write page is free */
 276                 s0val = 0x04;
 277         if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
 278                 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
 279                 /* the 2nd read page is free */
 280                 s0val = s0val | 0x02;
 281         else    /* the 1st read page is free */
 282                 s0val = s0val | 0x01;
 283         if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
 284         {
 285                 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
 286                         spin_unlock_irqrestore(&cs->lock, flags);
 287                         return IRQ_HANDLED;
 288                 }
 289                 cs->hw.njet.irqstat0 = s0val;
 290                 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
 291                         (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
 292                         /* we have a read dma int */
 293                         read_tiger(cs);
 294                 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
 295                         (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
 296                         /* we have a write dma int */
 297                         write_tiger(cs);
 298                 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
 299         }
 300         spin_unlock_irqrestore(&cs->lock, flags);
 301         return IRQ_HANDLED;
 302 }
 303
 304
 305 static struct pci_dev *dev_netjet __initdata = NULL;
 306
 307 /* called by config.c */
 308 int __init
 309 setup_enternow_pci(struct IsdnCard *card)
 310 {
 311         int bytecnt;
 312         struct IsdnCardState *cs = card->cs;
 313         char tmp[64];
 314
 315 #ifdef CONFIG_PCI
 316 #ifdef __BIG_ENDIAN
 317 #error "not running on big endian machines now"
 318 #endif
 319         strcpy(tmp, enternow_pci_rev);
 320         printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp));
 321         if (cs->typ != ISDN_CTYPE_ENTERNOW)
 322                 return(0);
 323         test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
 324
 325         for ( ;; )
 326         {
 327                 if ((dev_netjet = pci_find_device(PCI_VENDOR_ID_TIGERJET,
 328                         PCI_DEVICE_ID_TIGERJET_300,  dev_netjet))) {
 329                         if (pci_enable_device(dev_netjet))
 330                                 return(0);
 331                         cs->irq = dev_netjet->irq;
 332                         if (!cs->irq) {
 333                                 printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
 334                                 return(0);
 335                         }
 336                         cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
 337                         if (!cs->hw.njet.base) {
 338                                 printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
 339                                 return(0);
 340                         }
 341                         /* checks Sub-Vendor ID because system crashes with Traverse-Card */
 342                         if ((dev_netjet->subsystem_vendor != 0x55) ||
 343                                 (dev_netjet->subsystem_device != 0x02)) {
 344                                 printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
 345                                 printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
 346                                 return(0);
 347                         }
 348                 } else {
 349                         printk(KERN_WARNING "enter:now PCI: No PCI card found\n");
 350                         return(0);
 351                 }
 352
 353                 cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
 354                 cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD
 355
 356                 /* Reset an */
 357                 cs->hw.njet.ctrl_reg = 0x07;  // geändert von 0xff
 358                 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
 359                 /* 20 ms Pause */
 360                 mdelay(20);
 361
 362                 cs->hw.njet.ctrl_reg = 0x30;  /* Reset Off and status read clear */
 363                 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
 364                 mdelay(10);
 365
 366                 cs->hw.njet.auxd = 0x00; // war 0xc0
 367                 cs->hw.njet.dmactrl = 0;
 368
 369                 outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
 370                 outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
 371                 outb(cs->hw.njet.auxd, cs->hw.njet.auxa);
 372
 373                 break;
 374         }
 375 #else
 376
 377         printk(KERN_WARNING "enter:now PCI: NO_PCI_BIOS\n");
 378         printk(KERN_WARNING "enter:now PCI: unable to config Formula-n enter:now ISDN PCI ab\n");
 379         return (0);
 380
 381 #endif /* CONFIG_PCI */
 382
 383         bytecnt = 256;
 384
 385         printk(KERN_INFO
 386                 "enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
 387                 cs->hw.njet.base, cs->irq);
 388         if (!request_region(cs->hw.njet.base, bytecnt, "Fn_ISDN")) {
 389                 printk(KERN_WARNING
 390                            "HiSax: %s config port %lx-%lx already in use\n",
 391                            CardType[card->typ],
 392                            cs->hw.njet.base,
 393                            cs->hw.njet.base + bytecnt);
 394                 return (0);
 395         }
 396         setup_Amd7930(cs);
 397         cs->hw.njet.last_is0 = 0;
 398         /* macro rByteAMD */
 399         cs->readisac = &ReadByteAmd7930;
 400         /* macro wByteAMD */
 401         cs->writeisac = &WriteByteAmd7930;
 402         cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
 403
 404         cs->BC_Read_Reg  = &dummyrr;
 405         cs->BC_Write_Reg = &dummywr;
 406         cs->BC_Send_Data = &netjet_fill_dma;
 407         cs->cardmsg = &enpci_card_msg;
 408         cs->irq_func = &enpci_interrupt;
 409         cs->irq_flags |= SA_SHIRQ;
 410
 411         return (1);
 412 }