drivers/media/dvb/dibusb/dvb-dibusb-fe-i2c.c

   1 /*
   2  * dvb-dibusb-fe-i2c.c is part of the driver for mobile USB Budget DVB-T devices
   3  * based on reference design made by DiBcom (http://www.dibcom.fr/)
   4  *
   5  * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
   6  *
   7  * see dvb-dibusb-core.c for more copyright details.
   8  *
   9  * This file contains functions for attaching, initializing of an appropriate
  10  * demodulator/frontend. I2C-stuff is also located here.
  11  *
  12  */
  13 #include "dvb-dibusb.h"
  14
  15 #include <linux/usb.h>
  16
  17 int dibusb_i2c_msg(struct usb_dibusb *dib, u8 addr,
  18                 u8 *wbuf, u16 wlen, u8 *rbuf, u16 rlen)
  19 {
  20         u8 sndbuf[wlen+4]; /* lead(1) devaddr,direction(1) addr(2) data(wlen) (len(2) (when reading)) */
  21         /* write only ? */
  22         int wo = (rbuf == NULL || rlen == 0),
  23                 len = 2 + wlen + (wo ? 0 : 2);
  24
  25         sndbuf[0] = wo ? DIBUSB_REQ_I2C_WRITE : DIBUSB_REQ_I2C_READ;
  26         sndbuf[1] = (addr << 1) | (wo ? 0 : 1);
  27
  28         memcpy(&sndbuf[2],wbuf,wlen);
  29
  30         if (!wo) {
  31                 sndbuf[wlen+2] = (rlen >> 8) & 0xff;
  32                 sndbuf[wlen+3] = rlen & 0xff;
  33         }
  34
  35         return dibusb_readwrite_usb(dib,sndbuf,len,rbuf,rlen);
  36 }
  37
  38 /*
  39  * I2C master xfer function
  40  */
  41 static int dibusb_i2c_xfer(struct i2c_adapter *adap,struct i2c_msg msg[],int num)
  42 {
  43         struct usb_dibusb *dib = i2c_get_adapdata(adap);
  44         int i;
  45
  46         if (down_interruptible(&dib->i2c_sem) < 0)
  47                 return -EAGAIN;
  48
  49         if (num > 2)
  50                 warn("more than 2 i2c messages at a time is not handled yet. TODO.");
  51
  52         for (i = 0; i < num; i++) {
  53                 /* write/read request */
  54                 if (i+1 < num && (msg[i+1].flags & I2C_M_RD)) {
  55                         if (dibusb_i2c_msg(dib, msg[i].addr, msg[i].buf,msg[i].len,
  56                                                 msg[i+1].buf,msg[i+1].len) < 0)
  57                                 break;
  58                         i++;
  59                 } else
  60                         if (dibusb_i2c_msg(dib, msg[i].addr, msg[i].buf,msg[i].len,NULL,0) < 0)
  61                                 break;
  62         }
  63
  64         up(&dib->i2c_sem);
  65         return i;
  66 }
  67
  68 static u32 dibusb_i2c_func(struct i2c_adapter *adapter)
  69 {
  70         return I2C_FUNC_I2C;
  71 }
  72
  73 static struct i2c_algorithm dibusb_algo = {
  74         .name                   = "DiBcom USB i2c algorithm",
  75         .id                             = I2C_ALGO_BIT,
  76         .master_xfer    = dibusb_i2c_xfer,
  77         .functionality  = dibusb_i2c_func,
  78 };
  79
  80 static int dibusb_general_demod_init(struct dvb_frontend *fe);
  81 static u8 dibusb_general_pll_addr(struct dvb_frontend *fe);
  82 static int dibusb_general_pll_init(struct dvb_frontend *fe, u8 pll_buf[5]);
  83 static int dibusb_general_pll_set(struct dvb_frontend *fe,
  84                 struct dvb_frontend_parameters* params, u8 pll_buf[5]);
  85
  86 static struct mt352_config mt352_hanftek_umt_010_config = {
  87         .demod_address = 0x1e,
  88         .demod_init = dibusb_general_demod_init,
  89         .pll_set = dibusb_general_pll_set,
  90 };
  91
  92 static int dibusb_tuner_quirk(struct usb_dibusb *dib)
  93 {
  94         switch (dib->dibdev->dev_cl->id) {
  95                 case DIBUSB1_1: /* some these device have the ENV77H11D5 and some the THOMSON CABLE */
  96                 case DIBUSB1_1_AN2235: { /* actually its this device, but in warm state they are indistinguishable */
  97                         struct dibusb_tuner *t;
  98                         u8 b[2] = { 0,0 } ,b2[1];
  99                         struct i2c_msg msg[2] = {
 100                                 { .flags = 0, .buf = b, .len = 2 },
 101                                 { .flags = I2C_M_RD, .buf = b2, .len = 1},
 102                         };
 103
 104                         t = &dibusb_tuner[DIBUSB_TUNER_COFDM_PANASONIC_ENV77H11D5];
 105
 106                         msg[0].addr = msg[1].addr = t->pll_addr;
 107
 108                         if (dib->xfer_ops.tuner_pass_ctrl != NULL)
 109                                 dib->xfer_ops.tuner_pass_ctrl(dib->fe,1,t->pll_addr);
 110                         dibusb_i2c_xfer(&dib->i2c_adap,msg,2);
 111                         if (dib->xfer_ops.tuner_pass_ctrl != NULL)
 112                                 dib->xfer_ops.tuner_pass_ctrl(dib->fe,0,t->pll_addr);
 113
 114                         if (b2[0] == 0xfe)
 115                                 info("this device has the Thomson Cable onboard. Which is default.");
 116                         else {
 117                                 dib->tuner = t;
 118                                 info("this device has the Panasonic ENV77H11D5 onboard.");
 119                         }
 120                         break;
 121                 }
 122                 default:
 123                         break;
 124         }
 125         return 0;
 126 }
 127
 128 /* there is a ugly pid_filter in the firmware of the umt devices, it is accessible
 129  * by i2c address 0x8. Don't know how to deactivate it and how many rows it has.
 130  */
 131 static int dibusb_umt_pid_control(struct dvb_frontend *fe, int index, int pid, int onoff)
 132 {
 133         struct usb_dibusb *dib = fe->dvb->priv;
 134         u8 b[3];
 135         b[0] = index;
 136         if (onoff) {
 137                 b[1] = (pid >> 8) & 0xff;
 138                 b[2] = pid & 0xff;
 139         } else {
 140                 b[1] = 0;
 141                 b[2] = 0;
 142         }
 143         dibusb_i2c_msg(dib, 0x8, b, 3, NULL,0);
 144         dibusb_set_streaming_mode(dib,0);
 145         dibusb_set_streaming_mode(dib,1);
 146         return 0;
 147 }
 148
 149 int dibusb_fe_init(struct usb_dibusb* dib)
 150 {
 151         struct dib3000_config demod_cfg;
 152         int i;
 153
 154         if (dib->init_state & DIBUSB_STATE_I2C) {
 155                 for (i = 0; i < sizeof(dib->dibdev->dev_cl->demod->i2c_addrs) / sizeof(unsigned char) &&
 156                                 dib->dibdev->dev_cl->demod->i2c_addrs[i] != 0; i++) {
 157
 158                         demod_cfg.demod_address = dib->dibdev->dev_cl->demod->i2c_addrs[i];
 159                         demod_cfg.pll_addr = dibusb_general_pll_addr;
 160                         demod_cfg.pll_set = dibusb_general_pll_set;
 161                         demod_cfg.pll_init = dibusb_general_pll_init;
 162
 163                         switch (dib->dibdev->dev_cl->demod->id) {
 164                                 case DIBUSB_DIB3000MB:
 165                                         dib->fe = dib3000mb_attach(&demod_cfg,&dib->i2c_adap,&dib->xfer_ops);
 166                                 break;
 167                                 case DIBUSB_DIB3000MC:
 168                                         dib->fe = dib3000mc_attach(&demod_cfg,&dib->i2c_adap,&dib->xfer_ops);
 169                                 break;
 170                                 case DIBUSB_MT352:
 171                                         mt352_hanftek_umt_010_config.demod_address = dib->dibdev->dev_cl->demod->i2c_addrs[i];
 172                                         dib->fe = mt352_attach(&mt352_hanftek_umt_010_config, &dib->i2c_adap);
 173                                         dib->xfer_ops.pid_ctrl = dibusb_umt_pid_control;
 174                                 break;
 175                         }
 176                         if (dib->fe != NULL) {
 177                                 info("found demodulator at i2c address 0x%x",dib->dibdev->dev_cl->demod->i2c_addrs[i]);
 178                                 break;
 179                         }
 180                 }
 181                 if (dib->fe->ops->sleep != NULL)
 182                         dib->fe_sleep = dib->fe->ops->sleep;
 183                 dib->fe->ops->sleep = dibusb_hw_sleep;
 184
 185                 if (dib->fe->ops->init != NULL )
 186                         dib->fe_init = dib->fe->ops->init;
 187                 dib->fe->ops->init = dibusb_hw_wakeup;
 188
 189                 /* setting the default tuner */
 190                 dib->tuner = dib->dibdev->dev_cl->tuner;
 191
 192                 /* check which tuner is mounted on this device, in case this is unsure */
 193                 dibusb_tuner_quirk(dib);
 194         }
 195         if (dib->fe == NULL) {
 196                 err("A frontend driver was not found for device '%s'.",
 197                        dib->dibdev->name);
 198                 return -ENODEV;
 199         } else {
 200                 if (dvb_register_frontend(dib->adapter, dib->fe)) {
 201                         err("Frontend registration failed.");
 202                         if (dib->fe->ops->release)
 203                                 dib->fe->ops->release(dib->fe);
 204                         dib->fe = NULL;
 205                         return -ENODEV;
 206                 }
 207         }
 208         return 0;
 209 }
 210
 211 int dibusb_fe_exit(struct usb_dibusb *dib)
 212 {
 213         if (dib->fe != NULL)
 214                 dvb_unregister_frontend(dib->fe);
 215         return 0;
 216 }
 217
 218 int dibusb_i2c_init(struct usb_dibusb *dib)
 219 {
 220         int ret = 0;
 221
 222         dib->adapter->priv = dib;
 223
 224         strncpy(dib->i2c_adap.name,dib->dibdev->name,I2C_NAME_SIZE);
 225 #ifdef I2C_ADAP_CLASS_TV_DIGITAL
 226         dib->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL,
 227 #else
 228         dib->i2c_adap.class = I2C_CLASS_TV_DIGITAL,
 229 #endif
 230         dib->i2c_adap.algo              = &dibusb_algo;
 231         dib->i2c_adap.algo_data = NULL;
 232         dib->i2c_adap.id                = I2C_ALGO_BIT;
 233
 234         i2c_set_adapdata(&dib->i2c_adap, dib);
 235
 236         if ((ret = i2c_add_adapter(&dib->i2c_adap)) < 0)
 237                 err("could not add i2c adapter");
 238
 239         dib->init_state |= DIBUSB_STATE_I2C;
 240
 241         return ret;
 242 }
 243
 244 int dibusb_i2c_exit(struct usb_dibusb *dib)
 245 {
 246         if (dib->init_state & DIBUSB_STATE_I2C)
 247                 i2c_del_adapter(&dib->i2c_adap);
 248         dib->init_state &= ~DIBUSB_STATE_I2C;
 249         return 0;
 250 }
 251
 252
 253 /* pll stuff, maybe removed soon (thx to Gerd/Andrew in advance) */
 254 static int thomson_cable_eu_pll_set(struct dvb_frontend_parameters *fep, u8 pllbuf[4])
 255 {
 256         u32 tfreq = (fep->frequency + 36125000) / 62500;
 257         int vu,p0,p1,p2;
 258
 259         if (fep->frequency > 403250000)
 260                 vu = 1, p2 = 1, p1 = 0, p0 = 1;
 261         else if (fep->frequency > 115750000)
 262                 vu = 0, p2 = 1, p1 = 1, p0 = 0;
 263         else if (fep->frequency > 44250000)
 264                 vu = 0, p2 = 0, p1 = 1, p0 = 1;
 265         else
 266                 return -EINVAL;
 267
 268         pllbuf[0] = (tfreq >> 8) & 0x7f;
 269         pllbuf[1] = tfreq & 0xff;
 270         pllbuf[2] = 0x8e;
 271         pllbuf[3] = (vu << 7) | (p2 << 2) | (p1 << 1) | p0;
 272         return 0;
 273 }
 274
 275 static int panasonic_cofdm_env57h1xd5_pll_set(struct dvb_frontend_parameters *fep, u8 pllbuf[4])
 276 {
 277         u32 freq = fep->frequency;
 278         u32 tfreq = ((freq + 36125000)*6 + 500000) / 1000000;
 279         u8 TA, T210, R210, ctrl1, cp210, p4321;
 280         if (freq > 858000000) {
 281                 err("frequency cannot be larger than 858 MHz.");
 282                 return -EINVAL;
 283         }
 284
 285         // contol data 1 : 1 | T/A=1 | T2,T1,T0 = 0,0,0 | R2,R1,R0 = 0,1,0
 286         TA = 1;
 287         T210 = 0;
 288         R210 = 0x2;
 289         ctrl1 = (1 << 7) | (TA << 6) | (T210 << 3) | R210;
 290
 291 // ********    CHARGE PUMP CONFIG vs RF FREQUENCIES     *****************
 292         if (freq < 470000000)
 293                 cp210 = 2;  // VHF Low and High band ch E12 to E4 to E12
 294         else if (freq < 526000000)
 295                 cp210 = 4;  // UHF band Ch E21 to E27
 296         else // if (freq < 862000000)
 297                 cp210 = 5;  // UHF band ch E28 to E69
 298
 299 //*********************    BW select  *******************************
 300         if (freq < 153000000)
 301                 p4321  = 1; // BW selected for VHF low
 302         else if (freq < 470000000)
 303                 p4321  = 2; // BW selected for VHF high E5 to E12
 304         else // if (freq < 862000000)
 305                 p4321  = 4; // BW selection for UHF E21 to E69
 306
 307         pllbuf[0] = (tfreq >> 8) & 0xff;
 308         pllbuf[1] = (tfreq >> 0) & 0xff;
 309         pllbuf[2] = 0xff & ctrl1;
 310         pllbuf[3] =  (cp210 << 5) | (p4321);
 311
 312         return 0;
 313 }
 314
 315 /*
 316  *                          7   6               5       4       3       2       1       0
 317  * Address Byte             1   1               0       0       0       MA1     MA0     R/~W=0
 318  *
 319  * Program divider byte 1   0   n14             n13     n12     n11     n10     n9      n8
 320  * Program divider byte 2       n7      n6              n5      n4      n3      n2      n1      n0
 321  *
 322  * Control byte 1           1   T/A=1   T2      T1      T0      R2      R1      R0
 323  *                          1   T/A=0   0       0       ATC     AL2     AL1     AL0
 324  *
 325  * Control byte 2           CP2 CP1             CP0     BS5     BS4     BS3     BS2     BS1
 326  *
 327  * MA0/1 = programmable address bits
 328  * R/~W  = read/write bit (0 for writing)
 329  * N14-0 = programmable LO frequency
 330  *
 331  * T/A   = test AGC bit (0 = next 6 bits AGC setting,
 332  *                       1 = next 6 bits test and reference divider ratio settings)
 333  * T2-0  = test bits
 334  * R2-0  = reference divider ratio and programmable frequency step
 335  * ATC   = AGC current setting and time constant
 336  *         ATC = 0: AGC current = 220nA, AGC time constant = 2s
 337  *         ATC = 1: AGC current = 9uA, AGC time constant = 50ms
 338  * AL2-0 = AGC take-over point bits
 339  * CP2-0 = charge pump current
 340  * BS5-1 = PMOS ports control bits;
 341  *             BSn = 0 corresponding port is off, high-impedance state (at power-on)
 342  *             BSn = 1 corresponding port is on
 343  */
 344
 345
 346 static int panasonic_cofdm_env77h11d5_tda6650_init(struct dvb_frontend *fe, u8 pllbuf[4])
 347 {
 348         pllbuf[0] = 0x0b;
 349         pllbuf[1] = 0xf5;
 350         pllbuf[2] = 0x85;
 351         pllbuf[3] = 0xab;
 352         return 0;
 353 }
 354
 355 static int panasonic_cofdm_env77h11d5_tda6650_set (struct dvb_frontend_parameters *fep,u8 pllbuf[4])
 356 {
 357         int tuner_frequency = 0;
 358         u8 band, cp, filter;
 359
 360         // determine charge pump
 361         tuner_frequency = fep->frequency + 36166000;
 362         if (tuner_frequency < 87000000)
 363                 return -EINVAL;
 364         else if (tuner_frequency < 130000000)
 365                 cp = 3;
 366         else if (tuner_frequency < 160000000)
 367                 cp = 5;
 368         else if (tuner_frequency < 200000000)
 369                 cp = 6;
 370         else if (tuner_frequency < 290000000)
 371                 cp = 3;
 372         else if (tuner_frequency < 420000000)
 373                 cp = 5;
 374         else if (tuner_frequency < 480000000)
 375                 cp = 6;
 376         else if (tuner_frequency < 620000000)
 377                 cp = 3;
 378         else if (tuner_frequency < 830000000)
 379                 cp = 5;
 380         else if (tuner_frequency < 895000000)
 381                 cp = 7;
 382         else
 383                 return -EINVAL;
 384
 385         // determine band
 386         if (fep->frequency < 49000000)
 387                 return -EINVAL;
 388         else if (fep->frequency < 161000000)
 389                 band = 1;
 390         else if (fep->frequency < 444000000)
 391                 band = 2;
 392         else if (fep->frequency < 861000000)
 393                 band = 4;
 394         else
 395                 return -EINVAL;
 396
 397         // setup PLL filter
 398         switch (fep->u.ofdm.bandwidth) {
 399                 case BANDWIDTH_6_MHZ:
 400                 case BANDWIDTH_7_MHZ:
 401                         filter = 0;
 402                         break;
 403                 case BANDWIDTH_8_MHZ:
 404                         filter = 1;
 405                         break;
 406                 default:
 407                         return -EINVAL;
 408         }
 409
 410         // calculate divisor
 411         // ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
 412         tuner_frequency = (((fep->frequency / 1000) * 6) + 217496) / 1000;
 413
 414         // setup tuner buffer
 415         pllbuf[0] = (tuner_frequency >> 8) & 0x7f;
 416         pllbuf[1] = tuner_frequency & 0xff;
 417         pllbuf[2] = 0xca;
 418         pllbuf[3] = (cp << 5) | (filter << 3) | band;
 419         return 0;
 420 }
 421
 422 /*
 423  *                          7   6       5       4       3       2       1       0
 424  * Address Byte             1   1       0       0       0       MA1     MA0     R/~W=0
 425  *
 426  * Program divider byte 1   0   n14     n13     n12     n11     n10     n9      n8
 427  * Program divider byte 2       n7      n6      n5      n4      n3      n2      n1      n0
 428  *
 429  * Control byte             1   CP      T2      T1      T0      RSA     RSB     OS
 430  *
 431  * Band Switch byte         X   X       X       P4      P3      P2      P1      P0
 432  *
 433  * Auxiliary byte           ATC AL2     AL1     AL0     0       0       0       0
 434  *
 435  * Address: MA1 MA0     Address
 436  *          0   0       c0
 437  *          0   1       c2 (always valid)
 438  *          1   0       c4
 439  *          1   1       c6
 440  *
 441  *
 442  *
 443  */
 444
 445 static int lg_tdtp_e102p_tua6034(struct dvb_frontend_parameters* fep, u8 pllbuf[4])
 446 {
 447         u32 div;
 448         u8 p3210, p4;
 449
 450 #define TUNER_MUL 62500
 451
 452         div = (fep->frequency + 36125000 + TUNER_MUL / 2) / TUNER_MUL;
 453
 454         if (fep->frequency < 174500000)
 455                 p3210 = 1; // not supported by the tdtp_e102p
 456         else if (fep->frequency < 230000000) // VHF
 457                 p3210 = 2;
 458         else
 459                 p3210 = 4;
 460
 461         if (fep->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 462                 p4 = 0;
 463         else
 464                 p4 = 1;
 465
 466         pllbuf[0] = (div >> 8) & 0x7f;
 467         pllbuf[1] = div & 0xff;
 468         pllbuf[2] = 0xce;
 469         pllbuf[3] = (p4 << 4) | p3210;
 470
 471         return 0;
 472 }
 473
 474 static int lg_tdtp_e102p_mt352_demod_init(struct dvb_frontend *fe)
 475 {
 476         static u8 mt352_clock_config[] = { 0x89, 0xb0, 0x2d };
 477         static u8 mt352_reset[] = { 0x50, 0x80 };
 478         static u8 mt352_mclk_ratio[] = { 0x8b, 0x00 };
 479         static u8 mt352_adc_ctl_1_cfg[] = { 0x8E, 0x40 };
 480         static u8 mt352_agc_cfg[] = { 0x67, 0x14, 0x22 };
 481         static u8 mt352_sec_agc_cfg[] = { 0x69, 0x00, 0xff, 0xff, 0x00, 0xff, 0x00, 0x40, 0x40 };
 482
 483         static u8 mt352_unk [] = { 0xb5, 0x7a };
 484
 485         static u8 mt352_acq_ctl[] = { 0x53, 0x5f };
 486         static u8 mt352_input_freq_1[] = { 0x56, 0xf1, 0x05 };
 487
 488 //      static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
 489
 490         mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
 491         udelay(2000);
 492         mt352_write(fe, mt352_reset, sizeof(mt352_reset));
 493         mt352_write(fe, mt352_mclk_ratio, sizeof(mt352_mclk_ratio));
 494
 495         mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
 496         mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg));
 497
 498         mt352_write(fe, mt352_sec_agc_cfg, sizeof(mt352_sec_agc_cfg));
 499
 500         mt352_write(fe, mt352_unk, sizeof(mt352_unk));
 501
 502         mt352_write(fe, mt352_acq_ctl, sizeof(mt352_acq_ctl));
 503         mt352_write(fe, mt352_input_freq_1, sizeof(mt352_input_freq_1));
 504
 505 //      mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
 506
 507         return 0;
 508 }
 509
 510 static int dibusb_general_demod_init(struct dvb_frontend *fe)
 511 {
 512         struct usb_dibusb* dib = (struct usb_dibusb*) fe->dvb->priv;
 513         switch (dib->dibdev->dev_cl->id) {
 514                 case UMT2_0:
 515                         return lg_tdtp_e102p_mt352_demod_init(fe);
 516                 default: /* other device classes do not have device specific demod inits */
 517                         break;
 518         }
 519         return 0;
 520 }
 521
 522 static u8 dibusb_general_pll_addr(struct dvb_frontend *fe)
 523 {
 524         struct usb_dibusb* dib = (struct usb_dibusb*) fe->dvb->priv;
 525         return dib->tuner->pll_addr;
 526 }
 527
 528 static int dibusb_pll_i2c_helper(struct usb_dibusb *dib, u8 pll_buf[5], u8 buf[4])
 529 {
 530         if (pll_buf == NULL) {
 531                 struct i2c_msg msg = {
 532                         .addr = dib->tuner->pll_addr,
 533                         .flags = 0,
 534                         .buf = buf,
 535                         .len = sizeof(buf)
 536                 };
 537                 if (i2c_transfer (&dib->i2c_adap, &msg, 1) != 1)
 538                         return -EIO;
 539                 msleep(1);
 540         } else {
 541                 pll_buf[0] = dib->tuner->pll_addr << 1;
 542                 memcpy(&pll_buf[1],buf,4);
 543         }
 544
 545         return 0;
 546 }
 547
 548 static int dibusb_general_pll_init(struct dvb_frontend *fe,
 549                 u8 pll_buf[5])
 550 {
 551         struct usb_dibusb* dib = (struct usb_dibusb*) fe->dvb->priv;
 552         u8 buf[4];
 553         int ret=0;
 554         switch (dib->tuner->id) {
 555                 case DIBUSB_TUNER_COFDM_PANASONIC_ENV77H11D5:
 556                         ret = panasonic_cofdm_env77h11d5_tda6650_init(fe,buf);
 557                         break;
 558                 default:
 559                         break;
 560         }
 561
 562         if (ret)
 563                 return ret;
 564
 565         return dibusb_pll_i2c_helper(dib,pll_buf,buf);
 566 }
 567
 568 static int dibusb_general_pll_set(struct dvb_frontend *fe,
 569                 struct dvb_frontend_parameters *fep, u8 pll_buf[5])
 570 {
 571         struct usb_dibusb* dib = (struct usb_dibusb*) fe->dvb->priv;
 572         u8 buf[4];
 573         int ret=0;
 574
 575         switch (dib->tuner->id) {
 576                 case DIBUSB_TUNER_CABLE_THOMSON:
 577                         ret = thomson_cable_eu_pll_set(fep, buf);
 578                         break;
 579                 case DIBUSB_TUNER_COFDM_PANASONIC_ENV57H1XD5:
 580                         ret = panasonic_cofdm_env57h1xd5_pll_set(fep, buf);
 581                         break;
 582                 case DIBUSB_TUNER_CABLE_LG_TDTP_E102P:
 583                         ret = lg_tdtp_e102p_tua6034(fep, buf);
 584                         break;
 585                 case DIBUSB_TUNER_COFDM_PANASONIC_ENV77H11D5:
 586                         ret = panasonic_cofdm_env77h11d5_tda6650_set(fep,buf);
 587                         break;
 588                 default:
 589                         warn("no pll programming routine found for tuner %d.\n",dib->tuner->id);
 590                         ret = -ENODEV;
 591                         break;
 592         }
 593
 594         if (ret)
 595                 return ret;
 596
 597         return dibusb_pll_i2c_helper(dib,pll_buf,buf);
 598 }