drivers/media/video/cx88/cx88-tvaudio.c

   1 /*
   2
   3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
   4
   5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
   6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
   7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
   8
   9     -----------------------------------------------------------------------
  10
  11     Lot of voodoo here.  Even the data sheet doesn't help to
  12     understand what is going on here, the documentation for the audio
  13     part of the cx2388x chip is *very* bad.
  14
  15     Some of this comes from party done linux driver sources I got from
  16     [undocumented].
  17
  18     Some comes from the dscaler sources, one of the dscaler driver guy works
  19     for Conexant ...
  20
  21     -----------------------------------------------------------------------
  22
  23     This program is free software; you can redistribute it and/or modify
  24     it under the terms of the GNU General Public License as published by
  25     the Free Software Foundation; either version 2 of the License, or
  26     (at your option) any later version.
  27
  28     This program is distributed in the hope that it will be useful,
  29     but WITHOUT ANY WARRANTY; without even the implied warranty of
  30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  31     GNU General Public License for more details.
  32
  33     You should have received a copy of the GNU General Public License
  34     along with this program; if not, write to the Free Software
  35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/errno.h>
  41 #include <linux/kernel.h>
  42 #include <linux/slab.h>
  43 #include <linux/mm.h>
  44 #include <linux/poll.h>
  45 #include <linux/pci.h>
  46 #include <linux/signal.h>
  47 #include <linux/ioport.h>
  48 #include <linux/sched.h>
  49 #include <linux/types.h>
  50 #include <linux/interrupt.h>
  51 #include <linux/vmalloc.h>
  52 #include <linux/init.h>
  53 #include <linux/smp_lock.h>
  54 #include <linux/delay.h>
  55 #include <linux/kthread.h>
  56
  57 #include "cx88.h"
  58
  59 static unsigned int audio_debug = 0;
  60 module_param(audio_debug, int, 0644);
  61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
  62
  63 static unsigned int always_analog = 0;
  64 module_param(always_analog,int,0644);
  65 MODULE_PARM_DESC(always_analog,"force analog audio out");
  66
  67
  68 #define dprintk(fmt, arg...)    if (audio_debug) \
  69         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  70
  71 /* ----------------------------------------------------------- */
  72
  73 static char *aud_ctl_names[64] = {
  74         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
  75         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
  76         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
  77         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
  78         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
  79         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
  80         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
  81         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
  82         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
  83         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
  84         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
  85         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
  86         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
  87         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
  88         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
  89         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
  90         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
  91         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
  92         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
  93         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
  94         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
  95         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
  96         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
  97 };
  98
  99 struct rlist {
 100         u32 reg;
 101         u32 val;
 102 };
 103
 104 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
 105 {
 106         int i;
 107
 108         for (i = 0; l[i].reg; i++) {
 109                 switch (l[i].reg) {
 110                 case AUD_PDF_DDS_CNST_BYTE2:
 111                 case AUD_PDF_DDS_CNST_BYTE1:
 112                 case AUD_PDF_DDS_CNST_BYTE0:
 113                 case AUD_QAM_MODE:
 114                 case AUD_PHACC_FREQ_8MSB:
 115                 case AUD_PHACC_FREQ_8LSB:
 116                         cx_writeb(l[i].reg, l[i].val);
 117                         break;
 118                 default:
 119                         cx_write(l[i].reg, l[i].val);
 120                         break;
 121                 }
 122         }
 123 }
 124
 125 static void set_audio_start(struct cx88_core *core, u32 mode)
 126 {
 127         /* mute */
 128         cx_write(AUD_VOL_CTL, (1 << 6));
 129
 130         /* start programming */
 131         cx_write(AUD_INIT, mode);
 132         cx_write(AUD_INIT_LD, 0x0001);
 133         cx_write(AUD_SOFT_RESET, 0x0001);
 134 }
 135
 136 static void set_audio_finish(struct cx88_core *core, u32 ctl)
 137 {
 138         u32 volume;
 139
 140 #ifndef CONFIG_VIDEO_CX88_ALSA
 141         /* restart dma; This avoids buzz in NICAM and is good in others  */
 142         cx88_stop_audio_dma(core);
 143 #endif
 144         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
 145 #ifndef CONFIG_VIDEO_CX88_ALSA
 146         cx88_start_audio_dma(core);
 147 #endif
 148
 149         if (cx88_boards[core->board].blackbird) {
 150                 /* sets sound input from external adc */
 151                 switch (core->board) {
 152                 case CX88_BOARD_HAUPPAUGE_ROSLYN:
 153                 case CX88_BOARD_KWORLD_MCE200_DELUXE:
 154                 case CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT:
 155                 case CX88_BOARD_PIXELVIEW_PLAYTV_P7000:
 156                 case CX88_BOARD_ASUS_PVR_416:
 157                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
 158                         break;
 159                 default:
 160                         cx_set(AUD_CTL, EN_I2SIN_ENABLE);
 161                 }
 162
 163                 cx_write(AUD_I2SINPUTCNTL, 4);
 164                 cx_write(AUD_BAUDRATE, 1);
 165                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
 166                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
 167                 cx_write(AUD_I2SOUTPUTCNTL, 1);
 168                 cx_write(AUD_I2SCNTL, 0);
 169                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
 170         }
 171         if ((always_analog) || (!cx88_boards[core->board].blackbird)) {
 172                 ctl |= EN_DAC_ENABLE;
 173                 cx_write(AUD_CTL, ctl);
 174         }
 175
 176         /* finish programming */
 177         cx_write(AUD_SOFT_RESET, 0x0000);
 178
 179         /* unmute */
 180         volume = cx_sread(SHADOW_AUD_VOL_CTL);
 181         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
 182 }
 183
 184 /* ----------------------------------------------------------- */
 185
 186 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
 187                                     u32 mode)
 188 {
 189         static const struct rlist btsc[] = {
 190                 {AUD_AFE_12DB_EN, 0x00000001},
 191                 {AUD_OUT1_SEL, 0x00000013},
 192                 {AUD_OUT1_SHIFT, 0x00000000},
 193                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
 194                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
 195                 {AUD_DBX_IN_GAIN, 0x00004734},
 196                 {AUD_DBX_WBE_GAIN, 0x00004640},
 197                 {AUD_DBX_SE_GAIN, 0x00008d31},
 198                 {AUD_DCOC_0_SRC, 0x0000001a},
 199                 {AUD_IIR1_4_SEL, 0x00000021},
 200                 {AUD_DCOC_PASS_IN, 0x00000003},
 201                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 202                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 203                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 204                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 205                 {AUD_DN0_FREQ, 0x0000283b},
 206                 {AUD_DN2_SRC_SEL, 0x00000008},
 207                 {AUD_DN2_FREQ, 0x00003000},
 208                 {AUD_DN2_AFC, 0x00000002},
 209                 {AUD_DN2_SHFT, 0x00000000},
 210                 {AUD_IIR2_2_SEL, 0x00000020},
 211                 {AUD_IIR2_2_SHIFT, 0x00000000},
 212                 {AUD_IIR2_3_SEL, 0x0000001f},
 213                 {AUD_IIR2_3_SHIFT, 0x00000000},
 214                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
 215                 {AUD_CRDC1_SHIFT, 0x00000000},
 216                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 217                 {AUD_DCOC_1_SRC, 0x0000001b},
 218                 {AUD_DCOC1_SHIFT, 0x00000000},
 219                 {AUD_RDSI_SEL, 0x00000008},
 220                 {AUD_RDSQ_SEL, 0x00000008},
 221                 {AUD_RDSI_SHIFT, 0x00000000},
 222                 {AUD_RDSQ_SHIFT, 0x00000000},
 223                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 224                 { /* end of list */ },
 225         };
 226         static const struct rlist btsc_sap[] = {
 227                 {AUD_AFE_12DB_EN, 0x00000001},
 228                 {AUD_DBX_IN_GAIN, 0x00007200},
 229                 {AUD_DBX_WBE_GAIN, 0x00006200},
 230                 {AUD_DBX_SE_GAIN, 0x00006200},
 231                 {AUD_IIR1_1_SEL, 0x00000000},
 232                 {AUD_IIR1_3_SEL, 0x00000001},
 233                 {AUD_DN1_SRC_SEL, 0x00000007},
 234                 {AUD_IIR1_4_SHIFT, 0x00000006},
 235                 {AUD_IIR2_1_SHIFT, 0x00000000},
 236                 {AUD_IIR2_2_SHIFT, 0x00000000},
 237                 {AUD_IIR3_0_SHIFT, 0x00000000},
 238                 {AUD_IIR3_1_SHIFT, 0x00000000},
 239                 {AUD_IIR3_0_SEL, 0x0000000d},
 240                 {AUD_IIR3_1_SEL, 0x0000000e},
 241                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
 242                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 243                 {AUD_DEEMPH1_G0, 0x00004000},
 244                 {AUD_DEEMPH1_A0, 0x00000000},
 245                 {AUD_DEEMPH1_B0, 0x00000000},
 246                 {AUD_DEEMPH1_A1, 0x00000000},
 247                 {AUD_DEEMPH1_B1, 0x00000000},
 248                 {AUD_OUT0_SEL, 0x0000003f},
 249                 {AUD_OUT1_SEL, 0x0000003f},
 250                 {AUD_DN1_AFC, 0x00000002},
 251                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 252                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 253                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 254                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 255                 {AUD_IIR1_0_SEL, 0x0000001d},
 256                 {AUD_IIR1_2_SEL, 0x0000001e},
 257                 {AUD_IIR2_1_SEL, 0x00000002},
 258                 {AUD_IIR2_2_SEL, 0x00000004},
 259                 {AUD_IIR3_2_SEL, 0x0000000f},
 260                 {AUD_DCOC2_SHIFT, 0x00000001},
 261                 {AUD_IIR3_2_SHIFT, 0x00000001},
 262                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
 263                 {AUD_CORDIC_SHIFT_1, 0x00000006},
 264                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
 265                 {AUD_DMD_RA_DDS, 0x00f696e6},
 266                 {AUD_IIR2_3_SEL, 0x00000025},
 267                 {AUD_IIR1_4_SEL, 0x00000021},
 268                 {AUD_DN1_FREQ, 0x0000c965},
 269                 {AUD_DCOC_PASS_IN, 0x00000003},
 270                 {AUD_DCOC_0_SRC, 0x0000001a},
 271                 {AUD_DCOC_1_SRC, 0x0000001b},
 272                 {AUD_DCOC1_SHIFT, 0x00000000},
 273                 {AUD_RDSI_SEL, 0x00000009},
 274                 {AUD_RDSQ_SEL, 0x00000009},
 275                 {AUD_RDSI_SHIFT, 0x00000000},
 276                 {AUD_RDSQ_SHIFT, 0x00000000},
 277                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 278                 { /* end of list */ },
 279         };
 280
 281         mode |= EN_FMRADIO_EN_RDS;
 282
 283         if (sap) {
 284                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
 285                 set_audio_start(core, SEL_SAP);
 286                 set_audio_registers(core, btsc_sap);
 287                 set_audio_finish(core, mode);
 288         } else {
 289                 dprintk("%s (status: known-good)\n", __FUNCTION__);
 290                 set_audio_start(core, SEL_BTSC);
 291                 set_audio_registers(core, btsc);
 292                 set_audio_finish(core, mode);
 293         }
 294 }
 295
 296 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
 297 {
 298         static const struct rlist nicam_l[] = {
 299                 {AUD_AFE_12DB_EN, 0x00000001},
 300                 {AUD_RATE_ADJ1, 0x00000060},
 301                 {AUD_RATE_ADJ2, 0x000000F9},
 302                 {AUD_RATE_ADJ3, 0x000001CC},
 303                 {AUD_RATE_ADJ4, 0x000002B3},
 304                 {AUD_RATE_ADJ5, 0x00000726},
 305                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 306                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 307                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 308                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 309                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 310                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 311                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 312                 {AUD_DMD_RA_DDS, 0x00C00000},
 313                 {AUD_PLL_INT, 0x0000001E},
 314                 {AUD_PLL_DDS, 0x00000000},
 315                 {AUD_PLL_FRAC, 0x0000E542},
 316                 {AUD_START_TIMER, 0x00000000},
 317                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 318                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 319                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 320                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 321                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 322                 {AUD_QAM_MODE, 0x05},
 323                 {AUD_PHACC_FREQ_8MSB, 0x34},
 324                 {AUD_PHACC_FREQ_8LSB, 0x4C},
 325                 {AUD_DEEMPHGAIN_R, 0x00006680},
 326                 {AUD_RATE_THRES_DMD, 0x000000C0},
 327                 { /* end of list */ },
 328         };
 329
 330         static const struct rlist nicam_bgdki_common[] = {
 331                 {AUD_AFE_12DB_EN, 0x00000001},
 332                 {AUD_RATE_ADJ1, 0x00000010},
 333                 {AUD_RATE_ADJ2, 0x00000040},
 334                 {AUD_RATE_ADJ3, 0x00000100},
 335                 {AUD_RATE_ADJ4, 0x00000400},
 336                 {AUD_RATE_ADJ5, 0x00001000},
 337                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
 338                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
 339                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
 340                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
 341                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 342                 {AUD_DEEMPHGAIN_R, 0x000023c2},
 343                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 344                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
 345                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
 346                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 347                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 348                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 349                 {AUD_QAM_MODE, 0x05},
 350                 { /* end of list */ },
 351         };
 352
 353         static const struct rlist nicam_i[] = {
 354                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 355                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 356                 {AUD_PHACC_FREQ_8LSB, 0x93},
 357                 { /* end of list */ },
 358         };
 359
 360         static const struct rlist nicam_default[] = {
 361                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
 362                 {AUD_PHACC_FREQ_8MSB, 0x34},
 363                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 364                 { /* end of list */ },
 365         };
 366
 367         set_audio_start(core,SEL_NICAM);
 368         switch (core->tvaudio) {
 369         case WW_L:
 370                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
 371                 set_audio_registers(core, nicam_l);
 372                 break;
 373         case WW_I:
 374                 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
 375                 set_audio_registers(core, nicam_bgdki_common);
 376                 set_audio_registers(core, nicam_i);
 377                 break;
 378         default:
 379                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
 380                 set_audio_registers(core, nicam_bgdki_common);
 381                 set_audio_registers(core, nicam_default);
 382                 break;
 383         };
 384
 385         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
 386         set_audio_finish(core, mode);
 387 }
 388
 389 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
 390 {
 391         static const struct rlist a2_bgdk_common[] = {
 392                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 393                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 394                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 395                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 396                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 397                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 398                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 399                 {AUD_QAM_MODE, 0x05},
 400                 {AUD_PHACC_FREQ_8MSB, 0x34},
 401                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 402                 {AUD_RATE_ADJ1, 0x00000100},
 403                 {AUD_RATE_ADJ2, 0x00000200},
 404                 {AUD_RATE_ADJ3, 0x00000300},
 405                 {AUD_RATE_ADJ4, 0x00000400},
 406                 {AUD_RATE_ADJ5, 0x00000500},
 407                 {AUD_THR_FR, 0x00000000},
 408                 {AAGC_HYST, 0x0000001a},
 409                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 410                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 411                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 412                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 413                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 414                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 415                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 416                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 417                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 418                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 419                 {AUD_MODE_CHG_TIMER, 0x00000040},
 420                 {AUD_AFE_12DB_EN, 0x00000001},
 421                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 422                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 423                 {AUD_DEEMPH0_G0, 0x00000380},
 424                 {AUD_DEEMPH1_G0, 0x00000380},
 425                 {AUD_DCOC_0_SRC, 0x0000001a},
 426                 {AUD_DCOC0_SHIFT, 0x00000000},
 427                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 428                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 429                 {AUD_DCOC_PASS_IN, 0x00000003},
 430                 {AUD_IIR3_0_SEL, 0x00000021},
 431                 {AUD_DN2_AFC, 0x00000002},
 432                 {AUD_DCOC_1_SRC, 0x0000001b},
 433                 {AUD_DCOC1_SHIFT, 0x00000000},
 434                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 435                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 436                 {AUD_IIR3_1_SEL, 0x00000023},
 437                 {AUD_RDSI_SEL, 0x00000017},
 438                 {AUD_RDSI_SHIFT, 0x00000000},
 439                 {AUD_RDSQ_SEL, 0x00000017},
 440                 {AUD_RDSQ_SHIFT, 0x00000000},
 441                 {AUD_PLL_INT, 0x0000001e},
 442                 {AUD_PLL_DDS, 0x00000000},
 443                 {AUD_PLL_FRAC, 0x0000e542},
 444                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 445                 {AUD_START_TIMER, 0x00000000},
 446                 { /* end of list */ },
 447         };
 448
 449         static const struct rlist a2_bg[] = {
 450                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 451                 {AUD_C1_UP_THR, 0x00007000},
 452                 {AUD_C1_LO_THR, 0x00005400},
 453                 {AUD_C2_UP_THR, 0x00005400},
 454                 {AUD_C2_LO_THR, 0x00003000},
 455                 { /* end of list */ },
 456         };
 457
 458         static const struct rlist a2_dk[] = {
 459                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 460                 {AUD_C1_UP_THR, 0x00007000},
 461                 {AUD_C1_LO_THR, 0x00005400},
 462                 {AUD_C2_UP_THR, 0x00005400},
 463                 {AUD_C2_LO_THR, 0x00003000},
 464                 {AUD_DN0_FREQ, 0x00003a1c},
 465                 {AUD_DN2_FREQ, 0x0000d2e0},
 466                 { /* end of list */ },
 467         };
 468
 469         static const struct rlist a1_i[] = {
 470                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 471                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 472                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 473                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 474                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 475                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 476                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 477                 {AUD_QAM_MODE, 0x05},
 478                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 479                 {AUD_PHACC_FREQ_8LSB, 0x93},
 480                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 481                 {AUD_PLL_INT, 0x0000001e},
 482                 {AUD_PLL_DDS, 0x00000004},
 483                 {AUD_PLL_FRAC, 0x0000e542},
 484                 {AUD_RATE_ADJ1, 0x00000100},
 485                 {AUD_RATE_ADJ2, 0x00000200},
 486                 {AUD_RATE_ADJ3, 0x00000300},
 487                 {AUD_RATE_ADJ4, 0x00000400},
 488                 {AUD_RATE_ADJ5, 0x00000500},
 489                 {AUD_THR_FR, 0x00000000},
 490                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 491                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 492                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 493                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 494                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 495                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 496                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 497                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 498                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 499                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 500                 {AUD_MODE_CHG_TIMER, 0x00000060},
 501                 {AUD_AFE_12DB_EN, 0x00000001},
 502                 {AAGC_HYST, 0x0000000a},
 503                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 504                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 505                 {AUD_C1_UP_THR, 0x00007000},
 506                 {AUD_C1_LO_THR, 0x00005400},
 507                 {AUD_C2_UP_THR, 0x00005400},
 508                 {AUD_C2_LO_THR, 0x00003000},
 509                 {AUD_DCOC_0_SRC, 0x0000001a},
 510                 {AUD_DCOC0_SHIFT, 0x00000000},
 511                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 512                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 513                 {AUD_DCOC_PASS_IN, 0x00000003},
 514                 {AUD_IIR3_0_SEL, 0x00000021},
 515                 {AUD_DN2_AFC, 0x00000002},
 516                 {AUD_DCOC_1_SRC, 0x0000001b},
 517                 {AUD_DCOC1_SHIFT, 0x00000000},
 518                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 519                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 520                 {AUD_IIR3_1_SEL, 0x00000023},
 521                 {AUD_DN0_FREQ, 0x000035a3},
 522                 {AUD_DN2_FREQ, 0x000029c7},
 523                 {AUD_CRDC0_SRC_SEL, 0x00000511},
 524                 {AUD_IIR1_0_SEL, 0x00000001},
 525                 {AUD_IIR1_1_SEL, 0x00000000},
 526                 {AUD_IIR3_2_SEL, 0x00000003},
 527                 {AUD_IIR3_2_SHIFT, 0x00000000},
 528                 {AUD_IIR3_0_SEL, 0x00000002},
 529                 {AUD_IIR2_0_SEL, 0x00000021},
 530                 {AUD_IIR2_0_SHIFT, 0x00000002},
 531                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
 532                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
 533                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 534                 {AUD_START_TIMER, 0x00000000},
 535                 { /* end of list */ },
 536         };
 537
 538         static const struct rlist am_l[] = {
 539                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 540                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 541                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 542                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 543                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
 544                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
 545                 {AUD_QAM_MODE, 0x00},
 546                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
 547                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 548                 {AUD_PHACC_FREQ_8LSB, 0x4a},
 549                 {AUD_DEEMPHGAIN_R, 0x00006680},
 550                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 551                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 552                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 553                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 554                 {AUD_FM_MODE_ENABLE, 0x00000007},
 555                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 556                 {AUD_AFE_12DB_EN, 0x00000001},
 557                 {AAGC_GAIN, 0x00000000},
 558                 {AAGC_HYST, 0x00000018},
 559                 {AAGC_DEF, 0x00000020},
 560                 {AUD_DN0_FREQ, 0x00000000},
 561                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
 562                 {AUD_DCOC_0_SRC, 0x00000021},
 563                 {AUD_IIR1_0_SEL, 0x00000000},
 564                 {AUD_IIR1_0_SHIFT, 0x00000007},
 565                 {AUD_IIR1_1_SEL, 0x00000002},
 566                 {AUD_IIR1_1_SHIFT, 0x00000000},
 567                 {AUD_DCOC_1_SRC, 0x00000003},
 568                 {AUD_DCOC1_SHIFT, 0x00000000},
 569                 {AUD_DCOC_PASS_IN, 0x00000000},
 570                 {AUD_IIR1_2_SEL, 0x00000023},
 571                 {AUD_IIR1_2_SHIFT, 0x00000000},
 572                 {AUD_IIR1_3_SEL, 0x00000004},
 573                 {AUD_IIR1_3_SHIFT, 0x00000007},
 574                 {AUD_IIR1_4_SEL, 0x00000005},
 575                 {AUD_IIR1_4_SHIFT, 0x00000007},
 576                 {AUD_IIR3_0_SEL, 0x00000007},
 577                 {AUD_IIR3_0_SHIFT, 0x00000000},
 578                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
 579                 {AUD_DEEMPH0_SHIFT, 0x00000000},
 580                 {AUD_DEEMPH0_G0, 0x00007000},
 581                 {AUD_DEEMPH0_A0, 0x00000000},
 582                 {AUD_DEEMPH0_B0, 0x00000000},
 583                 {AUD_DEEMPH0_A1, 0x00000000},
 584                 {AUD_DEEMPH0_B1, 0x00000000},
 585                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
 586                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 587                 {AUD_DEEMPH1_G0, 0x00007000},
 588                 {AUD_DEEMPH1_A0, 0x00000000},
 589                 {AUD_DEEMPH1_B0, 0x00000000},
 590                 {AUD_DEEMPH1_A1, 0x00000000},
 591                 {AUD_DEEMPH1_B1, 0x00000000},
 592                 {AUD_OUT0_SEL, 0x0000003F},
 593                 {AUD_OUT1_SEL, 0x0000003F},
 594                 {AUD_DMD_RA_DDS, 0x00F5C285},
 595                 {AUD_PLL_INT, 0x0000001E},
 596                 {AUD_PLL_DDS, 0x00000000},
 597                 {AUD_PLL_FRAC, 0x0000E542},
 598                 {AUD_RATE_ADJ1, 0x00000100},
 599                 {AUD_RATE_ADJ2, 0x00000200},
 600                 {AUD_RATE_ADJ3, 0x00000300},
 601                 {AUD_RATE_ADJ4, 0x00000400},
 602                 {AUD_RATE_ADJ5, 0x00000500},
 603                 {AUD_RATE_THRES_DMD, 0x000000C0},
 604                 { /* end of list */ },
 605         };
 606
 607         static const struct rlist a2_deemph50[] = {
 608                 {AUD_DEEMPH0_G0, 0x00000380},
 609                 {AUD_DEEMPH1_G0, 0x00000380},
 610                 {AUD_DEEMPHGAIN_R, 0x000011e1},
 611                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 612                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
 613                 { /* end of list */ },
 614         };
 615
 616         set_audio_start(core, SEL_A2);
 617         switch (core->tvaudio) {
 618         case WW_BG:
 619                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
 620                 set_audio_registers(core, a2_bgdk_common);
 621                 set_audio_registers(core, a2_bg);
 622                 set_audio_registers(core, a2_deemph50);
 623                 break;
 624         case WW_DK:
 625                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
 626                 set_audio_registers(core, a2_bgdk_common);
 627                 set_audio_registers(core, a2_dk);
 628                 set_audio_registers(core, a2_deemph50);
 629                 break;
 630         case WW_I:
 631                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
 632                 set_audio_registers(core, a1_i);
 633                 set_audio_registers(core, a2_deemph50);
 634                 break;
 635         case WW_L:
 636                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
 637                 set_audio_registers(core, am_l);
 638                 break;
 639         default:
 640                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
 641                 return;
 642                 break;
 643         };
 644
 645         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
 646         set_audio_finish(core, mode);
 647 }
 648
 649 static void set_audio_standard_EIAJ(struct cx88_core *core)
 650 {
 651         static const struct rlist eiaj[] = {
 652                 /* TODO: eiaj register settings are not there yet ... */
 653
 654                 { /* end of list */ },
 655         };
 656         dprintk("%s (status: unknown)\n", __FUNCTION__);
 657
 658         set_audio_start(core, SEL_EIAJ);
 659         set_audio_registers(core, eiaj);
 660         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
 661 }
 662
 663 static void set_audio_standard_FM(struct cx88_core *core,
 664                                   enum cx88_deemph_type deemph)
 665 {
 666         static const struct rlist fm_deemph_50[] = {
 667                 {AUD_DEEMPH0_G0, 0x0C45},
 668                 {AUD_DEEMPH0_A0, 0x6262},
 669                 {AUD_DEEMPH0_B0, 0x1C29},
 670                 {AUD_DEEMPH0_A1, 0x3FC66},
 671                 {AUD_DEEMPH0_B1, 0x399A},
 672
 673                 {AUD_DEEMPH1_G0, 0x0D80},
 674                 {AUD_DEEMPH1_A0, 0x6262},
 675                 {AUD_DEEMPH1_B0, 0x1C29},
 676                 {AUD_DEEMPH1_A1, 0x3FC66},
 677                 {AUD_DEEMPH1_B1, 0x399A},
 678
 679                 {AUD_POLYPH80SCALEFAC, 0x0003},
 680                 { /* end of list */ },
 681         };
 682         static const struct rlist fm_deemph_75[] = {
 683                 {AUD_DEEMPH0_G0, 0x091B},
 684                 {AUD_DEEMPH0_A0, 0x6B68},
 685                 {AUD_DEEMPH0_B0, 0x11EC},
 686                 {AUD_DEEMPH0_A1, 0x3FC66},
 687                 {AUD_DEEMPH0_B1, 0x399A},
 688
 689                 {AUD_DEEMPH1_G0, 0x0AA0},
 690                 {AUD_DEEMPH1_A0, 0x6B68},
 691                 {AUD_DEEMPH1_B0, 0x11EC},
 692                 {AUD_DEEMPH1_A1, 0x3FC66},
 693                 {AUD_DEEMPH1_B1, 0x399A},
 694
 695                 {AUD_POLYPH80SCALEFAC, 0x0003},
 696                 { /* end of list */ },
 697         };
 698
 699         /* It is enough to leave default values? */
 700         static const struct rlist fm_no_deemph[] = {
 701
 702                 {AUD_POLYPH80SCALEFAC, 0x0003},
 703                 { /* end of list */ },
 704         };
 705
 706         dprintk("%s (status: unknown)\n", __FUNCTION__);
 707         set_audio_start(core, SEL_FMRADIO);
 708
 709         switch (deemph) {
 710         case FM_NO_DEEMPH:
 711                 set_audio_registers(core, fm_no_deemph);
 712                 break;
 713
 714         case FM_DEEMPH_50:
 715                 set_audio_registers(core, fm_deemph_50);
 716                 break;
 717
 718         case FM_DEEMPH_75:
 719                 set_audio_registers(core, fm_deemph_75);
 720                 break;
 721         }
 722
 723         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
 724 }
 725
 726 /* ----------------------------------------------------------- */
 727
 728 static int cx88_detect_nicam(struct cx88_core *core)
 729 {
 730         int i, j = 0;
 731
 732         dprintk("start nicam autodetect.\n");
 733
 734         for (i = 0; i < 6; i++) {
 735                 /* if bit1=1 then nicam is detected */
 736                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
 737
 738                 if (j == 1) {
 739                         dprintk("nicam is detected.\n");
 740                         return 1;
 741                 }
 742
 743                 /* wait a little bit for next reading status */
 744                 msleep(10);
 745         }
 746
 747         dprintk("nicam is not detected.\n");
 748         return 0;
 749 }
 750
 751 void cx88_set_tvaudio(struct cx88_core *core)
 752 {
 753         switch (core->tvaudio) {
 754         case WW_BTSC:
 755                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 756                 break;
 757         case WW_BG:
 758         case WW_DK:
 759         case WW_I:
 760         case WW_L:
 761                 /* prepare all dsp registers */
 762                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 763
 764                 /* set nicam mode - otherwise
 765                    AUD_NICAM_STATUS2 contains wrong values */
 766                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
 767                 if (0 == cx88_detect_nicam(core)) {
 768                         /* fall back to fm / am mono */
 769                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 770                         core->use_nicam = 0;
 771                 } else {
 772                         core->use_nicam = 1;
 773                 }
 774                 break;
 775         case WW_EIAJ:
 776                 set_audio_standard_EIAJ(core);
 777                 break;
 778         case WW_FM:
 779                 set_audio_standard_FM(core, FM_NO_DEEMPH);
 780                 break;
 781         case WW_NONE:
 782         default:
 783                 printk("%s/0: unknown tv audio mode [%d]\n",
 784                        core->name, core->tvaudio);
 785                 break;
 786         }
 787         return;
 788 }
 789
 790 void cx88_newstation(struct cx88_core *core)
 791 {
 792         core->audiomode_manual = UNSET;
 793 }
 794
 795 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
 796 {
 797         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
 798         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
 799         u32 reg, mode, pilot;
 800
 801         reg = cx_read(AUD_STATUS);
 802         mode = reg & 0x03;
 803         pilot = (reg >> 2) & 0x03;
 804
 805         if (core->astat != reg)
 806                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
 807                         reg, m[mode], p[pilot],
 808                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
 809         core->astat = reg;
 810
 811 /* TODO
 812        Reading from AUD_STATUS is not enough
 813        for auto-detecting sap/dual-fm/nicam.
 814        Add some code here later.
 815 */
 816
 817 # if 0
 818         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
 819             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
 820         t->rxsubchans = V4L2_TUNER_SUB_MONO;
 821         t->audmode = V4L2_TUNER_MODE_MONO;
 822
 823         switch (core->tvaudio) {
 824         case WW_BTSC:
 825                 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
 826                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
 827                 if (1 == pilot) {
 828                         /* SAP */
 829                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
 830                 }
 831                 break;
 832         case WW_A2_BG:
 833         case WW_A2_DK:
 834         case WW_A2_M:
 835                 if (1 == pilot) {
 836                         /* stereo */
 837                         t->rxsubchans =
 838                             V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
 839                         if (0 == mode)
 840                                 t->audmode = V4L2_TUNER_MODE_STEREO;
 841                 }
 842                 if (2 == pilot) {
 843                         /* dual language -- FIXME */
 844                         t->rxsubchans =
 845                             V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
 846                         t->audmode = V4L2_TUNER_MODE_LANG1;
 847                 }
 848                 break;
 849         case WW_NICAM_BGDKL:
 850                 if (0 == mode) {
 851                         t->audmode = V4L2_TUNER_MODE_STEREO;
 852                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
 853                 }
 854                 break;
 855         case WW_SYSTEM_L_AM:
 856                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
 857                         t->audmode = V4L2_TUNER_MODE_STEREO;
 858                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
 859                 }
 860                 break;
 861         default:
 862                 /* nothing */
 863                 break;
 864         }
 865 # endif
 866         return;
 867 }
 868
 869 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
 870 {
 871         u32 ctl = UNSET;
 872         u32 mask = UNSET;
 873
 874         if (manual) {
 875                 core->audiomode_manual = mode;
 876         } else {
 877                 if (UNSET != core->audiomode_manual)
 878                         return;
 879         }
 880         core->audiomode_current = mode;
 881
 882         switch (core->tvaudio) {
 883         case WW_BTSC:
 884                 switch (mode) {
 885                 case V4L2_TUNER_MODE_MONO:
 886                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
 887                         break;
 888                 case V4L2_TUNER_MODE_LANG1:
 889                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 890                         break;
 891                 case V4L2_TUNER_MODE_LANG2:
 892                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
 893                         break;
 894                 case V4L2_TUNER_MODE_STEREO:
 895                 case V4L2_TUNER_MODE_LANG1_LANG2:
 896                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
 897                         break;
 898                 }
 899                 break;
 900         case WW_BG:
 901         case WW_DK:
 902         case WW_I:
 903         case WW_L:
 904                 if (1 == core->use_nicam) {
 905                         switch (mode) {
 906                         case V4L2_TUNER_MODE_MONO:
 907                         case V4L2_TUNER_MODE_LANG1:
 908                                 set_audio_standard_NICAM(core,
 909                                                          EN_NICAM_FORCE_MONO1);
 910                                 break;
 911                         case V4L2_TUNER_MODE_LANG2:
 912                                 set_audio_standard_NICAM(core,
 913                                                          EN_NICAM_FORCE_MONO2);
 914                                 break;
 915                         case V4L2_TUNER_MODE_STEREO:
 916                         case V4L2_TUNER_MODE_LANG1_LANG2:
 917                                 set_audio_standard_NICAM(core,
 918                                                          EN_NICAM_FORCE_STEREO);
 919                                 break;
 920                         }
 921                 } else {
 922                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
 923                                 /* fall back to fm / am mono */
 924                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 925                         } else {
 926                                 /* TODO: Add A2 autodection */
 927                                 switch (mode) {
 928                                 case V4L2_TUNER_MODE_MONO:
 929                                 case V4L2_TUNER_MODE_LANG1:
 930                                         set_audio_standard_A2(core,
 931                                                               EN_A2_FORCE_MONO1);
 932                                         break;
 933                                 case V4L2_TUNER_MODE_LANG2:
 934                                         set_audio_standard_A2(core,
 935                                                               EN_A2_FORCE_MONO2);
 936                                         break;
 937                                 case V4L2_TUNER_MODE_STEREO:
 938                                 case V4L2_TUNER_MODE_LANG1_LANG2:
 939                                         set_audio_standard_A2(core,
 940                                                               EN_A2_FORCE_STEREO);
 941                                         break;
 942                                 }
 943                         }
 944                 }
 945                 break;
 946         case WW_FM:
 947                 switch (mode) {
 948                 case V4L2_TUNER_MODE_MONO:
 949                         ctl = EN_FMRADIO_FORCE_MONO;
 950                         mask = 0x3f;
 951                         break;
 952                 case V4L2_TUNER_MODE_STEREO:
 953                         ctl = EN_FMRADIO_AUTO_STEREO;
 954                         mask = 0x3f;
 955                         break;
 956                 }
 957                 break;
 958         }
 959
 960         if (UNSET != ctl) {
 961                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
 962                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
 963                         mask, ctl, cx_read(AUD_STATUS),
 964                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
 965                 cx_andor(AUD_CTL, mask, ctl);
 966         }
 967         return;
 968 }
 969
 970 int cx88_audio_thread(void *data)
 971 {
 972         struct cx88_core *core = data;
 973         struct v4l2_tuner t;
 974         u32 mode = 0;
 975
 976         dprintk("cx88: tvaudio thread started\n");
 977         for (;;) {
 978                 msleep_interruptible(1000);
 979                 if (kthread_should_stop())
 980                         break;
 981
 982                 /* just monitor the audio status for now ... */
 983                 memset(&t, 0, sizeof(t));
 984                 cx88_get_stereo(core, &t);
 985
 986                 if (UNSET != core->audiomode_manual)
 987                         /* manually set, don't do anything. */
 988                         continue;
 989
 990                 /* monitor signal */
 991                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
 992                         mode = V4L2_TUNER_MODE_STEREO;
 993                 else
 994                         mode = V4L2_TUNER_MODE_MONO;
 995                 if (mode == core->audiomode_current)
 996                         continue;
 997
 998                 /* automatically switch to best available mode */
 999                 cx88_set_stereo(core, mode, 0);
1000         }
1001
1002         dprintk("cx88: tvaudio thread exiting\n");
1003         return 0;
1004 }
1005
1006 /* ----------------------------------------------------------- */
1007
1008 EXPORT_SYMBOL(cx88_set_tvaudio);
1009 EXPORT_SYMBOL(cx88_newstation);
1010 EXPORT_SYMBOL(cx88_set_stereo);
1011 EXPORT_SYMBOL(cx88_get_stereo);
1012 EXPORT_SYMBOL(cx88_audio_thread);
1013
1014 /*
1015  * Local variables:
1016  * c-basic-offset: 8
1017  * End:
1018  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1019  */