drivers/message/fusion/lsi/mpi_ioc.h

   1 /*
   2  *  Copyright (c) 2000-2005 LSI Logic Corporation.
   3  *
   4  *
   5  *           Name:  mpi_ioc.h
   6  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7  *  Creation Date:  August 11, 2000
   8  *
   9  *    mpi_ioc.h Version:  01.05.10
  10  *
  11  *  Version History
  12  *  ---------------
  13  *
  14  *  Date      Version   Description
  15  *  --------  --------  ------------------------------------------------------
  16  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
  17  *  05-24-00  00.10.02  Added _MSG_IOC_INIT_REPLY structure.
  18  *  06-06-00  01.00.01  Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19  *  06-12-00  01.00.02  Added _MSG_PORT_ENABLE_REPLY structure.
  20  *                      Added _MSG_EVENT_ACK_REPLY structure.
  21  *                      Added _MSG_FW_DOWNLOAD_REPLY structure.
  22  *                      Added _MSG_TOOLBOX_REPLY structure.
  23  *  06-30-00  01.00.03  Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24  *  07-27-00  01.00.04  Added _EVENT_DATA structure definitions for _SCSI,
  25  *                      _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26  *  08-11-00  01.00.05  Switched positions of MsgLength and Function fields in
  27  *                      _MSG_EVENT_ACK_REPLY structure to match specification.
  28  *  11-02-00  01.01.01  Original release for post 1.0 work.
  29  *                      Added a value for Manufacturer to WhoInit.
  30  *  12-04-00  01.01.02  Modified IOCFacts reply, added FWUpload messages, and
  31  *                      removed toolbox message.
  32  *  01-09-01  01.01.03  Added event enabled and disabled defines.
  33  *                      Added structures for FwHeader and DataHeader.
  34  *                      Added ImageType to FwUpload reply.
  35  *  02-20-01  01.01.04  Started using MPI_POINTER.
  36  *  02-27-01  01.01.05  Added event for RAID status change and its event data.
  37  *                      Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38  *  03-27-01  01.01.06  Added defines for ProductId field of MPI_FW_HEADER.
  39  *                      Added structure offset comments.
  40  *  04-09-01  01.01.07  Added structure EVENT_DATA_EVENT_CHANGE.
  41  *  08-08-01  01.02.01  Original release for v1.2 work.
  42  *                      New format for FWVersion and ProductId in
  43  *                      MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44  *  08-31-01  01.02.02  Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45  *                      related structure and defines.
  46  *                      Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47  *                      Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48  *                      Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49  *                      IOCExceptions and changed DataImageSize to reserved.
  50  *                      Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51  *                      MPI_FW_UPLOAD_ITYPE_NVDATA.
  52  *  09-28-01  01.02.03  Modified Event Data for Integrated RAID.
  53  *  11-01-01  01.02.04  Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54  *  03-14-02  01.02.05  Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55  *  05-31-02  01.02.06  Added define for
  56  *                      MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57  *                      Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58  *  04-01-03  01.02.07  Added defines for MPI_FW_HEADER_SIGNATURE_.
  59  *  06-26-03  01.02.08  Added new values to the product family defines.
  60  *  04-29-04  01.02.09  Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61  *                      added related defines.
  62  *  05-11-04  01.03.01  Original release for MPI v1.3.
  63  *  08-19-04  01.05.01  Added four new fields to MSG_IOC_INIT.
  64  *                      Added three new fields to MSG_IOC_FACTS_REPLY.
  65  *                      Defined four new bits for the IOCCapabilities field of
  66  *                      the IOCFacts reply.
  67  *                      Added two new PortTypes for the PortFacts reply.
  68  *                      Added six new events along with their EventData
  69  *                      structures.
  70  *                      Added a new MsgFlag to the FwDownload request to
  71  *                      indicate last segment.
  72  *                      Defined a new image type of boot loader.
  73  *                      Added FW family codes for SAS product families.
  74  *  10-05-04  01.05.02  Added ReplyFifoHostSignalingAddr field to
  75  *                      MSG_IOC_FACTS_REPLY.
  76  *  12-07-04  01.05.03  Added more defines for SAS Discovery Error event.
  77  *  12-09-04  01.05.04  Added Unsupported device to SAS Device event.
  78  *  01-15-05  01.05.05  Added event data for SAS SES Event.
  79  *  02-09-05  01.05.06  Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80  *  02-22-05  01.05.07  Added Host Page Buffer Persistent flag to IOC Facts
  81  *                      Reply and IOC Init Request.
  82  *  03-11-05  01.05.08  Added family code for 1068E family.
  83  *                      Removed IOCFacts Reply EEDP Capability bit.
  84  *  06-24-05  01.05.09  Added 5 new IOCFacts Reply IOCCapabilities bits.
  85  *                      Added Max SATA Targets to SAS Discovery Error event.
  86  *  08-30-05  01.05.10  Added 4 new events and their event data structures.
  87  *                      Added new ReasonCode value for SAS Device Status Change
  88  *                      event.
  89  *                      Added new family code for FC949E.
  90  *  --------------------------------------------------------------------------
  91  */
  92
  93 #ifndef MPI_IOC_H
  94 #define MPI_IOC_H
  95
  96
  97 /*****************************************************************************
  98 *
  99 *               I O C    M e s s a g e s
 100 *
 101 *****************************************************************************/
 102
 103 /****************************************************************************/
 104 /*  IOCInit message                                                         */
 105 /****************************************************************************/
 106
 107 typedef struct _MSG_IOC_INIT
 108 {
 109     U8                      WhoInit;                    /* 00h */
 110     U8                      Reserved;                   /* 01h */
 111     U8                      ChainOffset;                /* 02h */
 112     U8                      Function;                   /* 03h */
 113     U8                      Flags;                      /* 04h */
 114     U8                      MaxDevices;                 /* 05h */
 115     U8                      MaxBuses;                   /* 06h */
 116     U8                      MsgFlags;                   /* 07h */
 117     U32                     MsgContext;                 /* 08h */
 118     U16                     ReplyFrameSize;             /* 0Ch */
 119     U8                      Reserved1[2];               /* 0Eh */
 120     U32                     HostMfaHighAddr;            /* 10h */
 121     U32                     SenseBufferHighAddr;        /* 14h */
 122     U32                     ReplyFifoHostSignalingAddr; /* 18h */
 123     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 1Ch */
 124     U16                     MsgVersion;                 /* 28h */
 125     U16                     HeaderVersion;              /* 2Ah */
 126 } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
 127   IOCInit_t, MPI_POINTER pIOCInit_t;
 128
 129 /* WhoInit values */
 130 #define MPI_WHOINIT_NO_ONE                              (0x00)
 131 #define MPI_WHOINIT_SYSTEM_BIOS                         (0x01)
 132 #define MPI_WHOINIT_ROM_BIOS                            (0x02)
 133 #define MPI_WHOINIT_PCI_PEER                            (0x03)
 134 #define MPI_WHOINIT_HOST_DRIVER                         (0x04)
 135 #define MPI_WHOINIT_MANUFACTURER                        (0x05)
 136
 137 /* Flags values */
 138 #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT   (0x04)
 139 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL        (0x02)
 140 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE              (0x01)
 141
 142 /* MsgVersion */
 143 #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK               (0xFF00)
 144 #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT              (8)
 145 #define MPI_IOCINIT_MSGVERSION_MINOR_MASK               (0x00FF)
 146 #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT              (0)
 147
 148 /* HeaderVersion */
 149 #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK             (0xFF00)
 150 #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT            (8)
 151 #define MPI_IOCINIT_HEADERVERSION_DEV_MASK              (0x00FF)
 152 #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT             (0)
 153
 154
 155 typedef struct _MSG_IOC_INIT_REPLY
 156 {
 157     U8                      WhoInit;                    /* 00h */
 158     U8                      Reserved;                   /* 01h */
 159     U8                      MsgLength;                  /* 02h */
 160     U8                      Function;                   /* 03h */
 161     U8                      Flags;                      /* 04h */
 162     U8                      MaxDevices;                 /* 05h */
 163     U8                      MaxBuses;                   /* 06h */
 164     U8                      MsgFlags;                   /* 07h */
 165     U32                     MsgContext;                 /* 08h */
 166     U16                     Reserved2;                  /* 0Ch */
 167     U16                     IOCStatus;                  /* 0Eh */
 168     U32                     IOCLogInfo;                 /* 10h */
 169 } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
 170   IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
 171
 172
 173
 174 /****************************************************************************/
 175 /*  IOC Facts message                                                       */
 176 /****************************************************************************/
 177
 178 typedef struct _MSG_IOC_FACTS
 179 {
 180     U8                      Reserved[2];                /* 00h */
 181     U8                      ChainOffset;                /* 01h */
 182     U8                      Function;                   /* 02h */
 183     U8                      Reserved1[3];               /* 03h */
 184     U8                      MsgFlags;                   /* 04h */
 185     U32                     MsgContext;                 /* 08h */
 186 } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
 187   IOCFacts_t, MPI_POINTER pIOCFacts_t;
 188
 189 typedef struct _MPI_FW_VERSION_STRUCT
 190 {
 191     U8                      Dev;                        /* 00h */
 192     U8                      Unit;                       /* 01h */
 193     U8                      Minor;                      /* 02h */
 194     U8                      Major;                      /* 03h */
 195 } MPI_FW_VERSION_STRUCT;
 196
 197 typedef union _MPI_FW_VERSION
 198 {
 199     MPI_FW_VERSION_STRUCT   Struct;
 200     U32                     Word;
 201 } MPI_FW_VERSION;
 202
 203 /* IOC Facts Reply */
 204 typedef struct _MSG_IOC_FACTS_REPLY
 205 {
 206     U16                     MsgVersion;                 /* 00h */
 207     U8                      MsgLength;                  /* 02h */
 208     U8                      Function;                   /* 03h */
 209     U16                     HeaderVersion;              /* 04h */
 210     U8                      IOCNumber;                  /* 06h */
 211     U8                      MsgFlags;                   /* 07h */
 212     U32                     MsgContext;                 /* 08h */
 213     U16                     IOCExceptions;              /* 0Ch */
 214     U16                     IOCStatus;                  /* 0Eh */
 215     U32                     IOCLogInfo;                 /* 10h */
 216     U8                      MaxChainDepth;              /* 14h */
 217     U8                      WhoInit;                    /* 15h */
 218     U8                      BlockSize;                  /* 16h */
 219     U8                      Flags;                      /* 17h */
 220     U16                     ReplyQueueDepth;            /* 18h */
 221     U16                     RequestFrameSize;           /* 1Ah */
 222     U16                     Reserved_0101_FWVersion;    /* 1Ch */ /* obsolete 16-bit FWVersion */
 223     U16                     ProductID;                  /* 1Eh */
 224     U32                     CurrentHostMfaHighAddr;     /* 20h */
 225     U16                     GlobalCredits;              /* 24h */
 226     U8                      NumberOfPorts;              /* 26h */
 227     U8                      EventState;                 /* 27h */
 228     U32                     CurrentSenseBufferHighAddr; /* 28h */
 229     U16                     CurReplyFrameSize;          /* 2Ch */
 230     U8                      MaxDevices;                 /* 2Eh */
 231     U8                      MaxBuses;                   /* 2Fh */
 232     U32                     FWImageSize;                /* 30h */
 233     U32                     IOCCapabilities;            /* 34h */
 234     MPI_FW_VERSION          FWVersion;                  /* 38h */
 235     U16                     HighPriorityQueueDepth;     /* 3Ch */
 236     U16                     Reserved2;                  /* 3Eh */
 237     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 40h */
 238     U32                     ReplyFifoHostSignalingAddr; /* 4Ch */
 239 } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
 240   IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
 241
 242 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK              (0xFF00)
 243 #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT             (8)
 244 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK              (0x00FF)
 245 #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT             (0)
 246
 247 #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK               (0xFF00)
 248 #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT              (8)
 249 #define MPI_IOCFACTS_HDRVERSION_DEV_MASK                (0x00FF)
 250 #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT               (0)
 251
 252 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL        (0x0001)
 253 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID         (0x0002)
 254 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL            (0x0004)
 255 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL       (0x0008)
 256
 257 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT             (0x01)
 258 #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL       (0x02)
 259 #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT  (0x04)
 260
 261 #define MPI_IOCFACTS_EVENTSTATE_DISABLED                (0x00)
 262 #define MPI_IOCFACTS_EVENTSTATE_ENABLED                 (0x01)
 263
 264 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q              (0x00000001)
 265 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL       (0x00000002)
 266 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING     (0x00000004)
 267 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER       (0x00000008)
 268 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER         (0x00000010)
 269 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER         (0x00000020)
 270 #define MPI_IOCFACTS_CAPABILITY_EEDP                    (0x00000040)
 271 #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL           (0x00000080)
 272 #define MPI_IOCFACTS_CAPABILITY_MULTICAST               (0x00000100)
 273 #define MPI_IOCFACTS_CAPABILITY_SCSIIO32                (0x00000200)
 274 #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16             (0x00000400)
 275
 276
 277 /*****************************************************************************
 278 *
 279 *               P o r t    M e s s a g e s
 280 *
 281 *****************************************************************************/
 282
 283 /****************************************************************************/
 284 /*  Port Facts message and Reply                                            */
 285 /****************************************************************************/
 286
 287 typedef struct _MSG_PORT_FACTS
 288 {
 289      U8                     Reserved[2];                /* 00h */
 290      U8                     ChainOffset;                /* 02h */
 291      U8                     Function;                   /* 03h */
 292      U8                     Reserved1[2];               /* 04h */
 293      U8                     PortNumber;                 /* 06h */
 294      U8                     MsgFlags;                   /* 07h */
 295      U32                    MsgContext;                 /* 08h */
 296 } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
 297   PortFacts_t, MPI_POINTER pPortFacts_t;
 298
 299 typedef struct _MSG_PORT_FACTS_REPLY
 300 {
 301      U16                    Reserved;                   /* 00h */
 302      U8                     MsgLength;                  /* 02h */
 303      U8                     Function;                   /* 03h */
 304      U16                    Reserved1;                  /* 04h */
 305      U8                     PortNumber;                 /* 06h */
 306      U8                     MsgFlags;                   /* 07h */
 307      U32                    MsgContext;                 /* 08h */
 308      U16                    Reserved2;                  /* 0Ch */
 309      U16                    IOCStatus;                  /* 0Eh */
 310      U32                    IOCLogInfo;                 /* 10h */
 311      U8                     Reserved3;                  /* 14h */
 312      U8                     PortType;                   /* 15h */
 313      U16                    MaxDevices;                 /* 16h */
 314      U16                    PortSCSIID;                 /* 18h */
 315      U16                    ProtocolFlags;              /* 1Ah */
 316      U16                    MaxPostedCmdBuffers;        /* 1Ch */
 317      U16                    MaxPersistentIDs;           /* 1Eh */
 318      U16                    MaxLanBuckets;              /* 20h */
 319      U16                    Reserved4;                  /* 22h */
 320      U32                    Reserved5;                  /* 24h */
 321 } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
 322   PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
 323
 324
 325 /* PortTypes values */
 326
 327 #define MPI_PORTFACTS_PORTTYPE_INACTIVE         (0x00)
 328 #define MPI_PORTFACTS_PORTTYPE_SCSI             (0x01)
 329 #define MPI_PORTFACTS_PORTTYPE_FC               (0x10)
 330 #define MPI_PORTFACTS_PORTTYPE_ISCSI            (0x20)
 331 #define MPI_PORTFACTS_PORTTYPE_SAS              (0x30)
 332
 333 /* ProtocolFlags values */
 334
 335 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR       (0x01)
 336 #define MPI_PORTFACTS_PROTOCOL_LAN              (0x02)
 337 #define MPI_PORTFACTS_PROTOCOL_TARGET           (0x04)
 338 #define MPI_PORTFACTS_PROTOCOL_INITIATOR        (0x08)
 339
 340
 341 /****************************************************************************/
 342 /*  Port Enable Message                                                     */
 343 /****************************************************************************/
 344
 345 typedef struct _MSG_PORT_ENABLE
 346 {
 347     U8                      Reserved[2];                /* 00h */
 348     U8                      ChainOffset;                /* 02h */
 349     U8                      Function;                   /* 03h */
 350     U8                      Reserved1[2];               /* 04h */
 351     U8                      PortNumber;                 /* 06h */
 352     U8                      MsgFlags;                   /* 07h */
 353     U32                     MsgContext;                 /* 08h */
 354 } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
 355   PortEnable_t, MPI_POINTER pPortEnable_t;
 356
 357 typedef struct _MSG_PORT_ENABLE_REPLY
 358 {
 359     U8                      Reserved[2];                /* 00h */
 360     U8                      MsgLength;                  /* 02h */
 361     U8                      Function;                   /* 03h */
 362     U8                      Reserved1[2];               /* 04h */
 363     U8                      PortNumber;                 /* 05h */
 364     U8                      MsgFlags;                   /* 07h */
 365     U32                     MsgContext;                 /* 08h */
 366     U16                     Reserved2;                  /* 0Ch */
 367     U16                     IOCStatus;                  /* 0Eh */
 368     U32                     IOCLogInfo;                 /* 10h */
 369 } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
 370   PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
 371
 372
 373 /*****************************************************************************
 374 *
 375 *               E v e n t    M e s s a g e s
 376 *
 377 *****************************************************************************/
 378
 379 /****************************************************************************/
 380 /*  Event Notification messages                                             */
 381 /****************************************************************************/
 382
 383 typedef struct _MSG_EVENT_NOTIFY
 384 {
 385     U8                      Switch;                     /* 00h */
 386     U8                      Reserved;                   /* 01h */
 387     U8                      ChainOffset;                /* 02h */
 388     U8                      Function;                   /* 03h */
 389     U8                      Reserved1[3];               /* 04h */
 390     U8                      MsgFlags;                   /* 07h */
 391     U32                     MsgContext;                 /* 08h */
 392 } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
 393   EventNotification_t, MPI_POINTER pEventNotification_t;
 394
 395 /* Event Notification Reply */
 396
 397 typedef struct _MSG_EVENT_NOTIFY_REPLY
 398 {
 399      U16                    EventDataLength;            /* 00h */
 400      U8                     MsgLength;                  /* 02h */
 401      U8                     Function;                   /* 03h */
 402      U8                     Reserved1[2];               /* 04h */
 403      U8                     AckRequired;                /* 06h */
 404      U8                     MsgFlags;                   /* 07h */
 405      U32                    MsgContext;                 /* 08h */
 406      U8                     Reserved2[2];               /* 0Ch */
 407      U16                    IOCStatus;                  /* 0Eh */
 408      U32                    IOCLogInfo;                 /* 10h */
 409      U32                    Event;                      /* 14h */
 410      U32                    EventContext;               /* 18h */
 411      U32                    Data[1];                    /* 1Ch */
 412 } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
 413   EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
 414
 415 /* Event Acknowledge */
 416
 417 typedef struct _MSG_EVENT_ACK
 418 {
 419     U8                      Reserved[2];                /* 00h */
 420     U8                      ChainOffset;                /* 02h */
 421     U8                      Function;                   /* 03h */
 422     U8                      Reserved1[3];               /* 04h */
 423     U8                      MsgFlags;                   /* 07h */
 424     U32                     MsgContext;                 /* 08h */
 425     U32                     Event;                      /* 0Ch */
 426     U32                     EventContext;               /* 10h */
 427 } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
 428   EventAck_t, MPI_POINTER pEventAck_t;
 429
 430 typedef struct _MSG_EVENT_ACK_REPLY
 431 {
 432     U8                      Reserved[2];                /* 00h */
 433     U8                      MsgLength;                  /* 02h */
 434     U8                      Function;                   /* 03h */
 435     U8                      Reserved1[3];               /* 04h */
 436     U8                      MsgFlags;                   /* 07h */
 437     U32                     MsgContext;                 /* 08h */
 438     U16                     Reserved2;                  /* 0Ch */
 439     U16                     IOCStatus;                  /* 0Eh */
 440     U32                     IOCLogInfo;                 /* 10h */
 441 } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
 442   EventAckReply_t, MPI_POINTER pEventAckReply_t;
 443
 444 /* Switch */
 445
 446 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF   (0x00)
 447 #define MPI_EVENT_NOTIFICATION_SWITCH_ON    (0x01)
 448
 449 /* Event */
 450
 451 #define MPI_EVENT_NONE                      (0x00000000)
 452 #define MPI_EVENT_LOG_DATA                  (0x00000001)
 453 #define MPI_EVENT_STATE_CHANGE              (0x00000002)
 454 #define MPI_EVENT_UNIT_ATTENTION            (0x00000003)
 455 #define MPI_EVENT_IOC_BUS_RESET             (0x00000004)
 456 #define MPI_EVENT_EXT_BUS_RESET             (0x00000005)
 457 #define MPI_EVENT_RESCAN                    (0x00000006)
 458 #define MPI_EVENT_LINK_STATUS_CHANGE        (0x00000007)
 459 #define MPI_EVENT_LOOP_STATE_CHANGE         (0x00000008)
 460 #define MPI_EVENT_LOGOUT                    (0x00000009)
 461 #define MPI_EVENT_EVENT_CHANGE              (0x0000000A)
 462 #define MPI_EVENT_INTEGRATED_RAID           (0x0000000B)
 463 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
 464 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED      (0x0000000D)
 465 #define MPI_EVENT_QUEUE_FULL                (0x0000000E)
 466 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE  (0x0000000F)
 467 #define MPI_EVENT_SAS_SES                   (0x00000010)
 468 #define MPI_EVENT_PERSISTENT_TABLE_FULL     (0x00000011)
 469 #define MPI_EVENT_SAS_PHY_LINK_STATUS       (0x00000012)
 470 #define MPI_EVENT_SAS_DISCOVERY_ERROR       (0x00000013)
 471 #define MPI_EVENT_IR_RESYNC_UPDATE          (0x00000014)
 472 #define MPI_EVENT_IR2                       (0x00000015)
 473 #define MPI_EVENT_SAS_DISCOVERY             (0x00000016)
 474 #define MPI_EVENT_LOG_ENTRY_ADDED           (0x00000021)
 475
 476 /* AckRequired field values */
 477
 478 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
 479 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED     (0x01)
 480
 481 /* EventChange Event data */
 482
 483 typedef struct _EVENT_DATA_EVENT_CHANGE
 484 {
 485     U8                      EventState;                 /* 00h */
 486     U8                      Reserved;                   /* 01h */
 487     U16                     Reserved1;                  /* 02h */
 488 } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
 489   EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
 490
 491 /* LogEntryAdded Event data */
 492
 493 /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
 494 #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH    (0x1C)
 495 typedef struct _EVENT_DATA_LOG_ENTRY
 496 {
 497     U32         TimeStamp;                          /* 00h */
 498     U32         Reserved1;                          /* 04h */
 499     U16         LogSequence;                        /* 08h */
 500     U16         LogEntryQualifier;                  /* 0Ah */
 501     U8          LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
 502 } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
 503   MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
 504
 505 typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
 506 {
 507     U16                     LogSequence;            /* 00h */
 508     U16                     Reserved1;              /* 02h */
 509     U32                     Reserved2;              /* 04h */
 510     EVENT_DATA_LOG_ENTRY    LogEntry;               /* 08h */
 511 } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
 512   MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
 513
 514 /* SCSI Event data for Port, Bus and Device forms */
 515
 516 typedef struct _EVENT_DATA_SCSI
 517 {
 518     U8                      TargetID;                   /* 00h */
 519     U8                      BusPort;                    /* 01h */
 520     U16                     Reserved;                   /* 02h */
 521 } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
 522   EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
 523
 524 /* SCSI Device Status Change Event data */
 525
 526 typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
 527 {
 528     U8                      TargetID;                   /* 00h */
 529     U8                      Bus;                        /* 01h */
 530     U8                      ReasonCode;                 /* 02h */
 531     U8                      LUN;                        /* 03h */
 532     U8                      ASC;                        /* 04h */
 533     U8                      ASCQ;                       /* 05h */
 534     U16                     Reserved;                   /* 06h */
 535 } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 536   MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 537   MpiEventDataScsiDeviceStatusChange_t,
 538   MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
 539
 540 /* MPI SCSI Device Status Change Event data ReasonCode values */
 541 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED                (0x03)
 542 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING       (0x04)
 543 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA           (0x05)
 544
 545 /* SAS Device Status Change Event data */
 546
 547 typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 548 {
 549     U8                      TargetID;                   /* 00h */
 550     U8                      Bus;                        /* 01h */
 551     U8                      ReasonCode;                 /* 02h */
 552     U8                      Reserved;                   /* 03h */
 553     U8                      ASC;                        /* 04h */
 554     U8                      ASCQ;                       /* 05h */
 555     U16                     DevHandle;                  /* 06h */
 556     U32                     DeviceInfo;                 /* 08h */
 557     U16                     ParentDevHandle;            /* 0Ch */
 558     U8                      PhyNum;                     /* 0Eh */
 559     U8                      Reserved1;                  /* 0Fh */
 560     U64                     SASAddress;                 /* 10h */
 561 } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 562   MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 563   MpiEventDataSasDeviceStatusChange_t,
 564   MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
 565
 566 /* MPI SAS Device Status Change Event data ReasonCode values */
 567 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED                 (0x03)
 568 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING        (0x04)
 569 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA            (0x05)
 570 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED      (0x06)
 571 #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED           (0x07)
 572 #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
 573
 574
 575 /* SCSI Event data for Queue Full event */
 576
 577 typedef struct _EVENT_DATA_QUEUE_FULL
 578 {
 579     U8                      TargetID;                   /* 00h */
 580     U8                      Bus;                        /* 01h */
 581     U16                     CurrentDepth;               /* 02h */
 582 } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
 583   EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
 584
 585 /* MPI Integrated RAID Event data */
 586
 587 typedef struct _EVENT_DATA_RAID
 588 {
 589     U8                      VolumeID;                   /* 00h */
 590     U8                      VolumeBus;                  /* 01h */
 591     U8                      ReasonCode;                 /* 02h */
 592     U8                      PhysDiskNum;                /* 03h */
 593     U8                      ASC;                        /* 04h */
 594     U8                      ASCQ;                       /* 05h */
 595     U16                     Reserved;                   /* 06h */
 596     U32                     SettingsStatus;             /* 08h */
 597 } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
 598   MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
 599
 600 /* MPI Integrated RAID Event data ReasonCode values */
 601 #define MPI_EVENT_RAID_RC_VOLUME_CREATED                (0x00)
 602 #define MPI_EVENT_RAID_RC_VOLUME_DELETED                (0x01)
 603 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED       (0x02)
 604 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED         (0x03)
 605 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED       (0x04)
 606 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED              (0x05)
 607 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED              (0x06)
 608 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED     (0x07)
 609 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED       (0x08)
 610 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED             (0x09)
 611 #define MPI_EVENT_RAID_RC_SMART_DATA                    (0x0A)
 612 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED        (0x0B)
 613
 614
 615 /* MPI Integrated RAID Resync Update Event data */
 616
 617 typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
 618 {
 619     U8                      VolumeID;                   /* 00h */
 620     U8                      VolumeBus;                  /* 01h */
 621     U8                      ResyncComplete;             /* 02h */
 622     U8                      Reserved1;                  /* 03h */
 623     U32                     Reserved2;                  /* 04h */
 624 } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
 625   MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
 626   MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
 627
 628 /* MPI IR2 Event data */
 629
 630 /* MPI_LD_STATE or MPI_PD_STATE */
 631 typedef struct _IR2_STATE_CHANGED
 632 {
 633     U16                 PreviousState;  /* 00h */
 634     U16                 NewState;       /* 02h */
 635 } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
 636
 637 typedef struct _IR2_PD_INFO
 638 {
 639     U16                 DeviceHandle;           /* 00h */
 640     U8                  TruncEnclosureHandle;   /* 02h */
 641     U8                  TruncatedSlot;          /* 03h */
 642 } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
 643
 644 typedef union _MPI_IR2_RC_EVENT_DATA
 645 {
 646     IR2_STATE_CHANGED   StateChanged;
 647     U32                 Lba;
 648     IR2_PD_INFO         PdInfo;
 649 } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
 650
 651 typedef struct _MPI_EVENT_DATA_IR2
 652 {
 653     U8                      TargetID;             /* 00h */
 654     U8                      Bus;                  /* 01h */
 655     U8                      ReasonCode;           /* 02h */
 656     U8                      PhysDiskNum;          /* 03h */
 657     MPI_IR2_RC_EVENT_DATA   IR2EventData;         /* 04h */
 658 } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
 659   MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
 660
 661 /* MPI IR2 Event data ReasonCode values */
 662 #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED           (0x01)
 663 #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED           (0x02)
 664 #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL       (0x03)
 665 #define MPI_EVENT_IR2_RC_PD_INSERTED                (0x04)
 666 #define MPI_EVENT_IR2_RC_PD_REMOVED                 (0x05)
 667 #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED       (0x06)
 668 #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR       (0x07)
 669
 670 /* defines for logical disk states */
 671 #define MPI_LD_STATE_OPTIMAL                        (0x00)
 672 #define MPI_LD_STATE_DEGRADED                       (0x01)
 673 #define MPI_LD_STATE_FAILED                         (0x02)
 674 #define MPI_LD_STATE_MISSING                        (0x03)
 675 #define MPI_LD_STATE_OFFLINE                        (0x04)
 676
 677 /* defines for physical disk states */
 678 #define MPI_PD_STATE_ONLINE                         (0x00)
 679 #define MPI_PD_STATE_MISSING                        (0x01)
 680 #define MPI_PD_STATE_NOT_COMPATIBLE                 (0x02)
 681 #define MPI_PD_STATE_FAILED                         (0x03)
 682 #define MPI_PD_STATE_INITIALIZING                   (0x04)
 683 #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST        (0x05)
 684 #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST         (0x06)
 685 #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON     (0xFF)
 686
 687 /* MPI Link Status Change Event data */
 688
 689 typedef struct _EVENT_DATA_LINK_STATUS
 690 {
 691     U8                      State;                      /* 00h */
 692     U8                      Reserved;                   /* 01h */
 693     U16                     Reserved1;                  /* 02h */
 694     U8                      Reserved2;                  /* 04h */
 695     U8                      Port;                       /* 05h */
 696     U16                     Reserved3;                  /* 06h */
 697 } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
 698   EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
 699
 700 #define MPI_EVENT_LINK_STATUS_FAILURE       (0x00000000)
 701 #define MPI_EVENT_LINK_STATUS_ACTIVE        (0x00000001)
 702
 703 /* MPI Loop State Change Event data */
 704
 705 typedef struct _EVENT_DATA_LOOP_STATE
 706 {
 707     U8                      Character4;                 /* 00h */
 708     U8                      Character3;                 /* 01h */
 709     U8                      Type;                       /* 02h */
 710     U8                      Reserved;                   /* 03h */
 711     U8                      Reserved1;                  /* 04h */
 712     U8                      Port;                       /* 05h */
 713     U16                     Reserved2;                  /* 06h */
 714 } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
 715   EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
 716
 717 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP     (0x0001)
 718 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE     (0x0002)
 719 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB     (0x0003)
 720
 721 /* MPI LOGOUT Event data */
 722
 723 typedef struct _EVENT_DATA_LOGOUT
 724 {
 725     U32                     NPortID;                    /* 00h */
 726     U8                      AliasIndex;                 /* 04h */
 727     U8                      Port;                       /* 05h */
 728     U16                     Reserved1;                  /* 06h */
 729 } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
 730   EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
 731
 732 #define MPI_EVENT_LOGOUT_ALL_ALIASES        (0xFF)
 733
 734 /* SAS SES Event data */
 735
 736 typedef struct _EVENT_DATA_SAS_SES
 737 {
 738     U8                      PhyNum;                     /* 00h */
 739     U8                      Port;                       /* 01h */
 740     U8                      PortWidth;                  /* 02h */
 741     U8                      Reserved1;                  /* 04h */
 742 } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
 743   MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
 744
 745 /* SAS Phy Link Status Event data */
 746
 747 typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
 748 {
 749     U8                      PhyNum;                     /* 00h */
 750     U8                      LinkRates;                  /* 01h */
 751     U16                     DevHandle;                  /* 02h */
 752     U64                     SASAddress;                 /* 04h */
 753 } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
 754   MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
 755
 756 /* defines for the LinkRates field of the SAS PHY Link Status event */
 757 #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK                   (0xF0)
 758 #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT                  (4)
 759 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK                  (0x0F)
 760 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT                 (0)
 761 #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN                   (0x00)
 762 #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED              (0x01)
 763 #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION  (0x02)
 764 #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE         (0x03)
 765 #define MPI_EVENT_SAS_PLS_LR_RATE_1_5                       (0x08)
 766 #define MPI_EVENT_SAS_PLS_LR_RATE_3_0                       (0x09)
 767
 768 /* SAS Discovery Event data */
 769
 770 typedef struct _EVENT_DATA_SAS_DISCOVERY
 771 {
 772     U32                     DiscoveryStatus;            /* 00h */
 773     U32                     Reserved1;                  /* 04h */
 774 } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
 775   EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
 776
 777 #define MPI_EVENT_SAS_DSCVRY_COMPLETE                       (0x00000000)
 778 #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS                    (0x00000001)
 779 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK                  (0xFFFF0000)
 780 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT                 (16)
 781
 782 /* SAS Discovery Errror Event data */
 783
 784 typedef struct _EVENT_DATA_DISCOVERY_ERROR
 785 {
 786     U32                     DiscoveryStatus;            /* 00h */
 787     U8                      Port;                       /* 04h */
 788     U8                      Reserved1;                  /* 05h */
 789     U16                     Reserved2;                  /* 06h */
 790 } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
 791   EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
 792
 793 #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED               (0x00000001)
 794 #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE        (0x00000002)
 795 #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS              (0x00000004)
 796 #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR                (0x00000008)
 797 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT                 (0x00000010)
 798 #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES           (0x00000020)
 799 #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST             (0x00000040)
 800 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED         (0x00000080)
 801 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR               (0x00000100)
 802 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE          (0x00000200)
 803 #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE              (0x00000400)
 804 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS                (0x00000800)
 805 #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS            (0x00001000)
 806
 807
 808 /*****************************************************************************
 809 *
 810 *               F i r m w a r e    L o a d    M e s s a g e s
 811 *
 812 *****************************************************************************/
 813
 814 /****************************************************************************/
 815 /*  Firmware Download message and associated structures                     */
 816 /****************************************************************************/
 817
 818 typedef struct _MSG_FW_DOWNLOAD
 819 {
 820     U8                      ImageType;                  /* 00h */
 821     U8                      Reserved;                   /* 01h */
 822     U8                      ChainOffset;                /* 02h */
 823     U8                      Function;                   /* 03h */
 824     U8                      Reserved1[3];               /* 04h */
 825     U8                      MsgFlags;                   /* 07h */
 826     U32                     MsgContext;                 /* 08h */
 827     SGE_MPI_UNION           SGL;                        /* 0Ch */
 828 } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
 829   FWDownload_t, MPI_POINTER pFWDownload_t;
 830
 831 #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT    (0x01)
 832
 833 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED          (0x00)
 834 #define MPI_FW_DOWNLOAD_ITYPE_FW                (0x01)
 835 #define MPI_FW_DOWNLOAD_ITYPE_BIOS              (0x02)
 836 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA            (0x03)
 837 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER        (0x04)
 838
 839
 840 typedef struct _FWDownloadTCSGE
 841 {
 842     U8                      Reserved;                   /* 00h */
 843     U8                      ContextSize;                /* 01h */
 844     U8                      DetailsLength;              /* 02h */
 845     U8                      Flags;                      /* 03h */
 846     U32                     Reserved_0100_Checksum;     /* 04h */ /* obsolete Checksum */
 847     U32                     ImageOffset;                /* 08h */
 848     U32                     ImageSize;                  /* 0Ch */
 849 } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
 850   FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
 851
 852 /* Firmware Download reply */
 853 typedef struct _MSG_FW_DOWNLOAD_REPLY
 854 {
 855     U8                      ImageType;                  /* 00h */
 856     U8                      Reserved;                   /* 01h */
 857     U8                      MsgLength;                  /* 02h */
 858     U8                      Function;                   /* 03h */
 859     U8                      Reserved1[3];               /* 04h */
 860     U8                      MsgFlags;                   /* 07h */
 861     U32                     MsgContext;                 /* 08h */
 862     U16                     Reserved2;                  /* 0Ch */
 863     U16                     IOCStatus;                  /* 0Eh */
 864     U32                     IOCLogInfo;                 /* 10h */
 865 } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
 866   FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
 867
 868
 869 /****************************************************************************/
 870 /*  Firmware Upload message and associated structures                       */
 871 /****************************************************************************/
 872
 873 typedef struct _MSG_FW_UPLOAD
 874 {
 875     U8                      ImageType;                  /* 00h */
 876     U8                      Reserved;                   /* 01h */
 877     U8                      ChainOffset;                /* 02h */
 878     U8                      Function;                   /* 03h */
 879     U8                      Reserved1[3];               /* 04h */
 880     U8                      MsgFlags;                   /* 07h */
 881     U32                     MsgContext;                 /* 08h */
 882     SGE_MPI_UNION           SGL;                        /* 0Ch */
 883 } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
 884   FWUpload_t, MPI_POINTER pFWUpload_t;
 885
 886 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM      (0x00)
 887 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH        (0x01)
 888 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH      (0x02)
 889 #define MPI_FW_UPLOAD_ITYPE_NVDATA          (0x03)
 890 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER      (0x04)
 891 #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP       (0x05)
 892
 893 typedef struct _FWUploadTCSGE
 894 {
 895     U8                      Reserved;                   /* 00h */
 896     U8                      ContextSize;                /* 01h */
 897     U8                      DetailsLength;              /* 02h */
 898     U8                      Flags;                      /* 03h */
 899     U32                     Reserved1;                  /* 04h */
 900     U32                     ImageOffset;                /* 08h */
 901     U32                     ImageSize;                  /* 0Ch */
 902 } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
 903   FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
 904
 905 /* Firmware Upload reply */
 906 typedef struct _MSG_FW_UPLOAD_REPLY
 907 {
 908     U8                      ImageType;                  /* 00h */
 909     U8                      Reserved;                   /* 01h */
 910     U8                      MsgLength;                  /* 02h */
 911     U8                      Function;                   /* 03h */
 912     U8                      Reserved1[3];               /* 04h */
 913     U8                      MsgFlags;                   /* 07h */
 914     U32                     MsgContext;                 /* 08h */
 915     U16                     Reserved2;                  /* 0Ch */
 916     U16                     IOCStatus;                  /* 0Eh */
 917     U32                     IOCLogInfo;                 /* 10h */
 918     U32                     ActualImageSize;            /* 14h */
 919 } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
 920   FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
 921
 922
 923 typedef struct _MPI_FW_HEADER
 924 {
 925     U32                     ArmBranchInstruction0;      /* 00h */
 926     U32                     Signature0;                 /* 04h */
 927     U32                     Signature1;                 /* 08h */
 928     U32                     Signature2;                 /* 0Ch */
 929     U32                     ArmBranchInstruction1;      /* 10h */
 930     U32                     ArmBranchInstruction2;      /* 14h */
 931     U32                     Reserved;                   /* 18h */
 932     U32                     Checksum;                   /* 1Ch */
 933     U16                     VendorId;                   /* 20h */
 934     U16                     ProductId;                  /* 22h */
 935     MPI_FW_VERSION          FWVersion;                  /* 24h */
 936     U32                     SeqCodeVersion;             /* 28h */
 937     U32                     ImageSize;                  /* 2Ch */
 938     U32                     NextImageHeaderOffset;      /* 30h */
 939     U32                     LoadStartAddress;           /* 34h */
 940     U32                     IopResetVectorValue;        /* 38h */
 941     U32                     IopResetRegAddr;            /* 3Ch */
 942     U32                     VersionNameWhat;            /* 40h */
 943     U8                      VersionName[32];            /* 44h */
 944     U32                     VendorNameWhat;             /* 64h */
 945     U8                      VendorName[32];             /* 68h */
 946 } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
 947   MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
 948
 949 #define MPI_FW_HEADER_WHAT_SIGNATURE        (0x29232840)
 950
 951 /* defines for using the ProductId field */
 952 #define MPI_FW_HEADER_PID_TYPE_MASK             (0xF000)
 953 #define MPI_FW_HEADER_PID_TYPE_SCSI             (0x0000)
 954 #define MPI_FW_HEADER_PID_TYPE_FC               (0x1000)
 955 #define MPI_FW_HEADER_PID_TYPE_SAS              (0x2000)
 956
 957 #define MPI_FW_HEADER_SIGNATURE_0               (0x5AEAA55A)
 958 #define MPI_FW_HEADER_SIGNATURE_1               (0xA55AEAA5)
 959 #define MPI_FW_HEADER_SIGNATURE_2               (0x5AA55AEA)
 960
 961 #define MPI_FW_HEADER_PID_PROD_MASK                     (0x0F00)
 962 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI           (0x0100)
 963 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI    (0x0200)
 964 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI              (0x0300)
 965 #define MPI_FW_HEADER_PID_PROD_IM_SCSI                  (0x0400)
 966 #define MPI_FW_HEADER_PID_PROD_IS_SCSI                  (0x0500)
 967 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI                 (0x0600)
 968 #define MPI_FW_HEADER_PID_PROD_IR_SCSI                  (0x0700)
 969
 970 #define MPI_FW_HEADER_PID_FAMILY_MASK           (0x00FF)
 971 /* SCSI */
 972 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI    (0x0001)
 973 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI    (0x0002)
 974 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI    (0x0003)
 975 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI    (0x0004)
 976 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI    (0x0005)
 977 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI    (0x0006)
 978 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI    (0x0007)
 979 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI    (0x0008)
 980 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI    (0x0009)
 981 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI    (0x000A)
 982 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI   (0x000B)
 983 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI   (0x000C)
 984 /* Fibre Channel */
 985 #define MPI_FW_HEADER_PID_FAMILY_909_FC         (0x0000)
 986 #define MPI_FW_HEADER_PID_FAMILY_919_FC         (0x0001) /* 919 and 929     */
 987 #define MPI_FW_HEADER_PID_FAMILY_919X_FC        (0x0002) /* 919X and 929X   */
 988 #define MPI_FW_HEADER_PID_FAMILY_919XL_FC       (0x0003) /* 919XL and 929XL */
 989 #define MPI_FW_HEADER_PID_FAMILY_939X_FC        (0x0004) /* 939X and 949X   */
 990 #define MPI_FW_HEADER_PID_FAMILY_959_FC         (0x0005)
 991 #define MPI_FW_HEADER_PID_FAMILY_949E_FC        (0x0006)
 992 /* SAS */
 993 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS       (0x0001)
 994 #define MPI_FW_HEADER_PID_FAMILY_1068_SAS       (0x0002)
 995 #define MPI_FW_HEADER_PID_FAMILY_1078_SAS       (0x0003)
 996 #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS      (0x0004) /* 1068E, 1066E, and 1064E */
 997
 998 typedef struct _MPI_EXT_IMAGE_HEADER
 999 {
1000     U8                      ImageType;                  /* 00h */
1001     U8                      Reserved;                   /* 01h */
1002     U16                     Reserved1;                  /* 02h */
1003     U32                     Checksum;                   /* 04h */
1004     U32                     ImageSize;                  /* 08h */
1005     U32                     NextImageHeaderOffset;      /* 0Ch */
1006     U32                     LoadStartAddress;           /* 10h */
1007     U32                     Reserved2;                  /* 14h */
1008 } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1009   MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1010
1011 /* defines for the ImageType field */
1012 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED          (0x00)
1013 #define MPI_EXT_IMAGE_TYPE_FW                   (0x01)
1014 #define MPI_EXT_IMAGE_TYPE_NVDATA               (0x03)
1015 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER           (0x04)
1016
1017 #endif