2 * linux/drivers/mmc/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/device.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/blkdev.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/protocol.h>
34 #include <asm/sizes.h>
36 #include <asm/arch/pxa-regs.h>
37 #include <asm/arch/mmc.h>
41 #ifdef CONFIG_MMC_DEBUG
42 #define DBG(x...) printk(KERN_DEBUG x)
44 #define DBG(x...) do { } while (0)
57 unsigned int power_mode;
58 struct pxamci_platform_data *pdata;
60 struct mmc_request *mrq;
61 struct mmc_command *cmd;
62 struct mmc_data *data;
65 struct pxa_dma_desc *sg_cpu;
68 unsigned int dma_size;
73 * The base MMC clock rate
75 #define CLOCKRATE 20000000
77 static inline unsigned int ns_to_clocks(unsigned int ns)
79 return (ns * (CLOCKRATE / 1000000) + 999) / 1000;
82 static void pxamci_stop_clock(struct pxamci_host *host)
84 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
85 unsigned long timeout = 10000;
88 writel(STOP_CLOCK, host->base + MMC_STRPCL);
91 v = readl(host->base + MMC_STAT);
92 if (!(v & STAT_CLK_EN))
98 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
102 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
106 spin_lock_irqsave(&host->lock, flags);
107 host->imask &= ~mask;
108 writel(host->imask, host->base + MMC_I_MASK);
109 spin_unlock_irqrestore(&host->lock, flags);
112 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
116 spin_lock_irqsave(&host->lock, flags);
118 writel(host->imask, host->base + MMC_I_MASK);
119 spin_unlock_irqrestore(&host->lock, flags);
122 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
124 unsigned int nob = data->blocks;
125 unsigned int timeout, size;
132 if (data->flags & MMC_DATA_STREAM)
135 writel(nob, host->base + MMC_NOB);
136 writel(1 << data->blksz_bits, host->base + MMC_BLKLEN);
138 timeout = ns_to_clocks(data->timeout_ns) + data->timeout_clks;
139 writel((timeout + 255) / 256, host->base + MMC_RDTO);
141 if (data->flags & MMC_DATA_READ) {
142 host->dma_dir = DMA_FROM_DEVICE;
143 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
145 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
147 host->dma_dir = DMA_TO_DEVICE;
148 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
150 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
153 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
155 host->dma_size = data->blocks << data->blksz_bits;
156 host->dma_buf = dma_map_single(mmc_dev(host->mmc), data->req->buffer,
157 host->dma_size, host->dma_dir);
159 for (i = 0, size = host->dma_size, dma = host->dma_buf; size; i++) {
162 if (len > DCMD_LENGTH)
165 if (data->flags & MMC_DATA_READ) {
166 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
167 host->sg_cpu[i].dtadr = dma;
169 host->sg_cpu[i].dsadr = dma;
170 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
172 host->sg_cpu[i].dcmd = dcmd | len;
178 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
179 sizeof(struct pxa_dma_desc);
181 host->sg_cpu[i].ddadr = DDADR_STOP;
186 DDADR(host->dma) = host->sg_dma;
187 DCSR(host->dma) = DCSR_RUN;
190 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
192 WARN_ON(host->cmd != NULL);
195 if (cmd->flags & MMC_RSP_BUSY)
198 switch (cmd->flags & (MMC_RSP_MASK | MMC_RSP_CRC)) {
199 case MMC_RSP_SHORT | MMC_RSP_CRC:
200 cmdat |= CMDAT_RESP_SHORT;
203 cmdat |= CMDAT_RESP_R3;
205 case MMC_RSP_LONG | MMC_RSP_CRC:
206 cmdat |= CMDAT_RESP_R2;
212 writel(cmd->opcode, host->base + MMC_CMD);
213 writel(cmd->arg >> 16, host->base + MMC_ARGH);
214 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
215 writel(cmdat, host->base + MMC_CMDAT);
216 writel(host->clkrt, host->base + MMC_CLKRT);
218 writel(START_CLOCK, host->base + MMC_STRPCL);
220 pxamci_enable_irq(host, END_CMD_RES);
223 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
225 DBG("PXAMCI: request done\n");
229 mmc_request_done(host->mmc, mrq);
232 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
234 struct mmc_command *cmd = host->cmd;
244 * Did I mention this is Sick. We always need to
245 * discard the upper 8 bits of the first 16-bit word.
247 v = readl(host->base + MMC_RES) & 0xffff;
248 for (i = 0; i < 4; i++) {
249 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
250 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
251 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
255 if (stat & STAT_TIME_OUT_RESPONSE) {
256 cmd->error = MMC_ERR_TIMEOUT;
257 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
258 cmd->error = MMC_ERR_BADCRC;
261 pxamci_disable_irq(host, END_CMD_RES);
262 if (host->data && cmd->error == MMC_ERR_NONE) {
263 pxamci_enable_irq(host, DATA_TRAN_DONE);
265 pxamci_finish_request(host, host->mrq);
271 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
273 struct mmc_data *data = host->data;
279 dma_unmap_single(mmc_dev(host->mmc), host->dma_buf, host->dma_size,
282 if (stat & STAT_READ_TIME_OUT)
283 data->error = MMC_ERR_TIMEOUT;
284 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
285 data->error = MMC_ERR_BADCRC;
288 * There appears to be a hardware design bug here. There seems to
289 * be no way to find out how much data was transferred to the card.
290 * This means that if there was an error on any block, we mark all
291 * data blocks as being in error.
293 if (data->error == MMC_ERR_NONE)
294 data->bytes_xfered = data->blocks << data->blksz_bits;
296 data->bytes_xfered = 0;
298 pxamci_disable_irq(host, DATA_TRAN_DONE);
301 if (host->mrq->stop && data->error == MMC_ERR_NONE) {
302 pxamci_stop_clock(host);
303 pxamci_start_cmd(host, host->mrq->stop, 0);
305 pxamci_finish_request(host, host->mrq);
311 static irqreturn_t pxamci_irq(int irq, void *devid, struct pt_regs *regs)
313 struct pxamci_host *host = devid;
317 ireg = readl(host->base + MMC_I_REG);
319 DBG("PXAMCI: irq %08x\n", ireg);
322 unsigned stat = readl(host->base + MMC_STAT);
324 DBG("PXAMCI: stat %08x\n", stat);
326 if (ireg & END_CMD_RES)
327 handled |= pxamci_cmd_done(host, stat);
328 if (ireg & DATA_TRAN_DONE)
329 handled |= pxamci_data_done(host, stat);
332 return IRQ_RETVAL(handled);
335 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
337 struct pxamci_host *host = mmc_priv(mmc);
340 WARN_ON(host->mrq != NULL);
344 pxamci_stop_clock(host);
347 host->cmdat &= ~CMDAT_INIT;
350 pxamci_setup_data(host, mrq->data);
352 cmdat &= ~CMDAT_BUSY;
353 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
354 if (mrq->data->flags & MMC_DATA_WRITE)
355 cmdat |= CMDAT_WRITE;
357 if (mrq->data->flags & MMC_DATA_STREAM)
358 cmdat |= CMDAT_STREAM;
361 pxamci_start_cmd(host, mrq->cmd, cmdat);
364 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
366 struct pxamci_host *host = mmc_priv(mmc);
368 DBG("pxamci_set_ios: clock %u power %u vdd %u.%02u\n",
369 ios->clock, ios->power_mode, ios->vdd / 100,
373 unsigned int clk = CLOCKRATE / ios->clock;
374 if (CLOCKRATE / clk > ios->clock)
376 host->clkrt = fls(clk) - 1;
379 * we write clkrt on the next command
381 } else if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
383 * Ensure that the clock is off.
385 writel(STOP_CLOCK, host->base + MMC_STRPCL);
388 if (host->power_mode != ios->power_mode) {
389 host->power_mode = ios->power_mode;
391 if (host->pdata && host->pdata->setpower)
392 host->pdata->setpower(mmc->dev, ios->vdd);
394 if (ios->power_mode == MMC_POWER_ON)
395 host->cmdat |= CMDAT_INIT;
398 DBG("pxamci_set_ios: clkrt = %x cmdat = %x\n",
399 host->clkrt, host->cmdat);
402 static struct mmc_host_ops pxamci_ops = {
403 .request = pxamci_request,
404 .set_ios = pxamci_set_ios,
407 static void pxamci_dma_irq(int dma, void *devid, struct pt_regs *regs)
409 printk(KERN_ERR "DMA%d: IRQ???\n", dma);
410 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
413 static irqreturn_t pxamci_detect_irq(int irq, void *devid, struct pt_regs *regs)
415 mmc_detect_change(devid);
419 static int pxamci_probe(struct device *dev)
421 struct platform_device *pdev = to_platform_device(dev);
422 struct mmc_host *mmc;
423 struct pxamci_host *host = NULL;
427 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
428 irq = platform_get_irq(pdev, 0);
429 if (!r || irq == NO_IRQ)
432 r = request_mem_region(r->start, SZ_4K, "PXAMCI");
436 mmc = mmc_alloc_host(sizeof(struct pxamci_host), dev);
442 mmc->ops = &pxamci_ops;
444 mmc->f_max = 20000000;
446 host = mmc_priv(mmc);
449 host->pdata = pdev->dev.platform_data;
450 mmc->ocr_avail = host->pdata ?
451 host->pdata->ocr_mask :
452 MMC_VDD_32_33|MMC_VDD_33_34;
454 host->sg_cpu = dma_alloc_coherent(dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
460 spin_lock_init(&host->lock);
463 host->imask = TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
464 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE;
466 host->base = ioremap(r->start, SZ_4K);
473 * Ensure that the host controller is shut down, and setup
476 pxamci_stop_clock(host);
477 writel(0, host->base + MMC_SPI);
478 writel(64, host->base + MMC_RESTO);
479 writel(host->imask, host->base + MMC_I_MASK);
481 pxa_gpio_mode(GPIO6_MMCCLK_MD);
482 pxa_gpio_mode(GPIO8_MMCCS0_MD);
483 pxa_set_cken(CKEN12_MMC, 1);
485 host->dma = pxa_request_dma("PXAMCI", DMA_PRIO_LOW, pxamci_dma_irq, host);
491 ret = request_irq(host->irq, pxamci_irq, 0, "PXAMCI", host);
495 dev_set_drvdata(dev, mmc);
497 if (host->pdata && host->pdata->init)
498 host->pdata->init(dev, pxamci_detect_irq, mmc);
507 pxa_free_dma(host->dma);
511 dma_free_coherent(dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
519 static int pxamci_remove(struct device *dev)
521 struct mmc_host *mmc = dev_get_drvdata(dev);
523 dev_set_drvdata(dev, NULL);
526 struct pxamci_host *host = mmc_priv(mmc);
528 if (host->pdata && host->pdata->exit)
529 host->pdata->exit(dev, mmc);
531 mmc_remove_host(mmc);
533 pxamci_stop_clock(host);
534 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
535 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
536 host->base + MMC_I_MASK);
538 pxa_set_cken(CKEN12_MMC, 0);
540 free_irq(host->irq, host);
541 pxa_free_dma(host->dma);
543 dma_free_coherent(dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
545 pxa_set_cken(CKEN12_MMC, 0);
547 release_resource(host->res);
555 static int pxamci_suspend(struct device *dev, u32 state, u32 level)
557 struct mmc_host *mmc = dev_get_drvdata(dev);
560 if (mmc && level == SUSPEND_DISABLE)
561 ret = mmc_suspend_host(mmc, state);
566 static int pxamci_resume(struct device *dev, u32 level)
568 struct mmc_host *mmc = dev_get_drvdata(dev);
571 if (mmc && level == RESUME_ENABLE)
572 ret = mmc_resume_host(mmc);
577 #define pxamci_suspend NULL
578 #define pxamci_resume NULL
581 static struct device_driver pxamci_driver = {
582 .name = "pxa2xx-mci",
583 .bus = &platform_bus_type,
584 .probe = pxamci_probe,
585 .remove = pxamci_remove,
586 .suspend = pxamci_suspend,
587 .resume = pxamci_resume,
590 static int __init pxamci_init(void)
592 return driver_register(&pxamci_driver);
595 static void __exit pxamci_exit(void)
597 driver_unregister(&pxamci_driver);
600 module_init(pxamci_init);
601 module_exit(pxamci_exit);
603 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
604 MODULE_LICENSE("GPL");