drivers/mmc/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/highmem.h>
  14 #include <linux/pci.h>
  15 #include <linux/dma-mapping.h>
  16
  17 #include <linux/mmc/host.h>
  18 #include <linux/mmc/protocol.h>
  19
  20 #include <asm/scatterlist.h>
  21
  22 #include "sdhci.h"
  23
  24 #define DRIVER_NAME "sdhci"
  25 #define DRIVER_VERSION "0.12"
  26
  27 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
  28
  29 #define DBG(f, x...) \
  30         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  31
  32 static unsigned int debug_nodma = 0;
  33 static unsigned int debug_forcedma = 0;
  34 static unsigned int debug_quirks = 0;
  35
  36 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET                  (1<<0)
  37 #define SDHCI_QUIRK_FORCE_DMA                           (1<<1)
  38 /* Controller doesn't like some resets when there is no card inserted. */
  39 #define SDHCI_QUIRK_NO_CARD_NO_RESET                    (1<<2)
  40 #define SDHCI_QUIRK_SINGLE_POWER_WRITE                  (1<<3)
  41
  42 static const struct pci_device_id pci_ids[] __devinitdata = {
  43         {
  44                 .vendor         = PCI_VENDOR_ID_RICOH,
  45                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  46                 .subvendor      = PCI_VENDOR_ID_IBM,
  47                 .subdevice      = PCI_ANY_ID,
  48                 .driver_data    = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  49                                   SDHCI_QUIRK_FORCE_DMA,
  50         },
  51
  52         {
  53                 .vendor         = PCI_VENDOR_ID_RICOH,
  54                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
  55                 .subvendor      = PCI_ANY_ID,
  56                 .subdevice      = PCI_ANY_ID,
  57                 .driver_data    = SDHCI_QUIRK_FORCE_DMA |
  58                                   SDHCI_QUIRK_NO_CARD_NO_RESET,
  59         },
  60
  61         {
  62                 .vendor         = PCI_VENDOR_ID_TI,
  63                 .device         = PCI_DEVICE_ID_TI_XX21_XX11_SD,
  64                 .subvendor      = PCI_ANY_ID,
  65                 .subdevice      = PCI_ANY_ID,
  66                 .driver_data    = SDHCI_QUIRK_FORCE_DMA,
  67         },
  68
  69         {
  70                 .vendor         = PCI_VENDOR_ID_ENE,
  71                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
  72                 .subvendor      = PCI_ANY_ID,
  73                 .subdevice      = PCI_ANY_ID,
  74                 .driver_data    = SDHCI_QUIRK_SINGLE_POWER_WRITE,
  75         },
  76
  77         {       /* Generic SD host controller */
  78                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  79         },
  80
  81         { /* end: all zeroes */ },
  82 };
  83
  84 MODULE_DEVICE_TABLE(pci, pci_ids);
  85
  86 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  87 static void sdhci_finish_data(struct sdhci_host *);
  88
  89 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  90 static void sdhci_finish_command(struct sdhci_host *);
  91
  92 static void sdhci_dumpregs(struct sdhci_host *host)
  93 {
  94         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  95
  96         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  97                 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
  98                 readw(host->ioaddr + SDHCI_HOST_VERSION));
  99         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
 100                 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
 101                 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
 102         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
 103                 readl(host->ioaddr + SDHCI_ARGUMENT),
 104                 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
 105         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
 106                 readl(host->ioaddr + SDHCI_PRESENT_STATE),
 107                 readb(host->ioaddr + SDHCI_HOST_CONTROL));
 108         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
 109                 readb(host->ioaddr + SDHCI_POWER_CONTROL),
 110                 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
 111         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
 112                 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
 113                 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
 114         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
 115                 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
 116                 readl(host->ioaddr + SDHCI_INT_STATUS));
 117         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
 118                 readl(host->ioaddr + SDHCI_INT_ENABLE),
 119                 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
 120         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
 121                 readw(host->ioaddr + SDHCI_ACMD12_ERR),
 122                 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
 123         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
 124                 readl(host->ioaddr + SDHCI_CAPABILITIES),
 125                 readl(host->ioaddr + SDHCI_MAX_CURRENT));
 126
 127         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
 128 }
 129
 130 /*****************************************************************************\
 131  *                                                                           *
 132  * Low level functions                                                       *
 133  *                                                                           *
 134 \*****************************************************************************/
 135
 136 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 137 {
 138         unsigned long timeout;
 139
 140         if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 141                 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
 142                         SDHCI_CARD_PRESENT))
 143                         return;
 144         }
 145
 146         writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
 147
 148         if (mask & SDHCI_RESET_ALL)
 149                 host->clock = 0;
 150
 151         /* Wait max 100 ms */
 152         timeout = 100;
 153
 154         /* hw clears the bit when it's done */
 155         while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
 156                 if (timeout == 0) {
 157                         printk(KERN_ERR "%s: Reset 0x%x never completed. "
 158                                 "Please report this to " BUGMAIL ".\n",
 159                                 mmc_hostname(host->mmc), (int)mask);
 160                         sdhci_dumpregs(host);
 161                         return;
 162                 }
 163                 timeout--;
 164                 mdelay(1);
 165         }
 166 }
 167
 168 static void sdhci_init(struct sdhci_host *host)
 169 {
 170         u32 intmask;
 171
 172         sdhci_reset(host, SDHCI_RESET_ALL);
 173
 174         intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 175                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 176                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 177                 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
 178                 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
 179                 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
 180
 181         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
 182         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 183 }
 184
 185 static void sdhci_activate_led(struct sdhci_host *host)
 186 {
 187         u8 ctrl;
 188
 189         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 190         ctrl |= SDHCI_CTRL_LED;
 191         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 192 }
 193
 194 static void sdhci_deactivate_led(struct sdhci_host *host)
 195 {
 196         u8 ctrl;
 197
 198         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 199         ctrl &= ~SDHCI_CTRL_LED;
 200         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 201 }
 202
 203 /*****************************************************************************\
 204  *                                                                           *
 205  * Core functions                                                            *
 206  *                                                                           *
 207 \*****************************************************************************/
 208
 209 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
 210 {
 211         host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
 212         return host->mapped_sg + host->cur_sg->offset;
 213 }
 214
 215 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
 216 {
 217         kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
 218 }
 219
 220 static inline int sdhci_next_sg(struct sdhci_host* host)
 221 {
 222         /*
 223          * Skip to next SG entry.
 224          */
 225         host->cur_sg++;
 226         host->num_sg--;
 227
 228         /*
 229          * Any entries left?
 230          */
 231         if (host->num_sg > 0) {
 232                 host->offset = 0;
 233                 host->remain = host->cur_sg->length;
 234         }
 235
 236         return host->num_sg;
 237 }
 238
 239 static void sdhci_read_block_pio(struct sdhci_host *host)
 240 {
 241         int blksize, chunk_remain;
 242         u32 data;
 243         char *buffer;
 244         int size;
 245
 246         DBG("PIO reading\n");
 247
 248         blksize = host->data->blksz;
 249         chunk_remain = 0;
 250         data = 0;
 251
 252         buffer = sdhci_kmap_sg(host) + host->offset;
 253
 254         while (blksize) {
 255                 if (chunk_remain == 0) {
 256                         data = readl(host->ioaddr + SDHCI_BUFFER);
 257                         chunk_remain = min(blksize, 4);
 258                 }
 259
 260                 size = min(host->size, host->remain);
 261                 size = min(size, chunk_remain);
 262
 263                 chunk_remain -= size;
 264                 blksize -= size;
 265                 host->offset += size;
 266                 host->remain -= size;
 267                 host->size -= size;
 268                 while (size) {
 269                         *buffer = data & 0xFF;
 270                         buffer++;
 271                         data >>= 8;
 272                         size--;
 273                 }
 274
 275                 if (host->remain == 0) {
 276                         sdhci_kunmap_sg(host);
 277                         if (sdhci_next_sg(host) == 0) {
 278                                 BUG_ON(blksize != 0);
 279                                 return;
 280                         }
 281                         buffer = sdhci_kmap_sg(host);
 282                 }
 283         }
 284
 285         sdhci_kunmap_sg(host);
 286 }
 287
 288 static void sdhci_write_block_pio(struct sdhci_host *host)
 289 {
 290         int blksize, chunk_remain;
 291         u32 data;
 292         char *buffer;
 293         int bytes, size;
 294
 295         DBG("PIO writing\n");
 296
 297         blksize = host->data->blksz;
 298         chunk_remain = 4;
 299         data = 0;
 300
 301         bytes = 0;
 302         buffer = sdhci_kmap_sg(host) + host->offset;
 303
 304         while (blksize) {
 305                 size = min(host->size, host->remain);
 306                 size = min(size, chunk_remain);
 307
 308                 chunk_remain -= size;
 309                 blksize -= size;
 310                 host->offset += size;
 311                 host->remain -= size;
 312                 host->size -= size;
 313                 while (size) {
 314                         data >>= 8;
 315                         data |= (u32)*buffer << 24;
 316                         buffer++;
 317                         size--;
 318                 }
 319
 320                 if (chunk_remain == 0) {
 321                         writel(data, host->ioaddr + SDHCI_BUFFER);
 322                         chunk_remain = min(blksize, 4);
 323                 }
 324
 325                 if (host->remain == 0) {
 326                         sdhci_kunmap_sg(host);
 327                         if (sdhci_next_sg(host) == 0) {
 328                                 BUG_ON(blksize != 0);
 329                                 return;
 330                         }
 331                         buffer = sdhci_kmap_sg(host);
 332                 }
 333         }
 334
 335         sdhci_kunmap_sg(host);
 336 }
 337
 338 static void sdhci_transfer_pio(struct sdhci_host *host)
 339 {
 340         u32 mask;
 341
 342         BUG_ON(!host->data);
 343
 344         if (host->size == 0)
 345                 return;
 346
 347         if (host->data->flags & MMC_DATA_READ)
 348                 mask = SDHCI_DATA_AVAILABLE;
 349         else
 350                 mask = SDHCI_SPACE_AVAILABLE;
 351
 352         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 353                 if (host->data->flags & MMC_DATA_READ)
 354                         sdhci_read_block_pio(host);
 355                 else
 356                         sdhci_write_block_pio(host);
 357
 358                 if (host->size == 0)
 359                         break;
 360
 361                 BUG_ON(host->num_sg == 0);
 362         }
 363
 364         DBG("PIO transfer complete.\n");
 365 }
 366
 367 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 368 {
 369         u8 count;
 370         unsigned target_timeout, current_timeout;
 371
 372         WARN_ON(host->data);
 373
 374         if (data == NULL)
 375                 return;
 376
 377         DBG("blksz %04x blks %04x flags %08x\n",
 378                 data->blksz, data->blocks, data->flags);
 379         DBG("tsac %d ms nsac %d clk\n",
 380                 data->timeout_ns / 1000000, data->timeout_clks);
 381
 382         /* Sanity checks */
 383         BUG_ON(data->blksz * data->blocks > 524288);
 384         BUG_ON(data->blksz > host->max_block);
 385         BUG_ON(data->blocks > 65535);
 386
 387         /* timeout in us */
 388         target_timeout = data->timeout_ns / 1000 +
 389                 data->timeout_clks / host->clock;
 390
 391         /*
 392          * Figure out needed cycles.
 393          * We do this in steps in order to fit inside a 32 bit int.
 394          * The first step is the minimum timeout, which will have a
 395          * minimum resolution of 6 bits:
 396          * (1) 2^13*1000 > 2^22,
 397          * (2) host->timeout_clk < 2^16
 398          *     =>
 399          *     (1) / (2) > 2^6
 400          */
 401         count = 0;
 402         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 403         while (current_timeout < target_timeout) {
 404                 count++;
 405                 current_timeout <<= 1;
 406                 if (count >= 0xF)
 407                         break;
 408         }
 409
 410         if (count >= 0xF) {
 411                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 412                         mmc_hostname(host->mmc));
 413                 count = 0xE;
 414         }
 415
 416         writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
 417
 418         if (host->flags & SDHCI_USE_DMA) {
 419                 int count;
 420
 421                 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
 422                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 423                 BUG_ON(count != 1);
 424
 425                 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
 426         } else {
 427                 host->size = data->blksz * data->blocks;
 428
 429                 host->cur_sg = data->sg;
 430                 host->num_sg = data->sg_len;
 431
 432                 host->offset = 0;
 433                 host->remain = host->cur_sg->length;
 434         }
 435
 436         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 437         writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
 438                 host->ioaddr + SDHCI_BLOCK_SIZE);
 439         writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
 440 }
 441
 442 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 443         struct mmc_data *data)
 444 {
 445         u16 mode;
 446
 447         WARN_ON(host->data);
 448
 449         if (data == NULL)
 450                 return;
 451
 452         mode = SDHCI_TRNS_BLK_CNT_EN;
 453         if (data->blocks > 1)
 454                 mode |= SDHCI_TRNS_MULTI;
 455         if (data->flags & MMC_DATA_READ)
 456                 mode |= SDHCI_TRNS_READ;
 457         if (host->flags & SDHCI_USE_DMA)
 458                 mode |= SDHCI_TRNS_DMA;
 459
 460         writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
 461 }
 462
 463 static void sdhci_finish_data(struct sdhci_host *host)
 464 {
 465         struct mmc_data *data;
 466         u16 blocks;
 467
 468         BUG_ON(!host->data);
 469
 470         data = host->data;
 471         host->data = NULL;
 472
 473         if (host->flags & SDHCI_USE_DMA) {
 474                 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
 475                         (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
 476         }
 477
 478         /*
 479          * Controller doesn't count down when in single block mode.
 480          */
 481         if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
 482                 blocks = 0;
 483         else
 484                 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
 485         data->bytes_xfered = data->blksz * (data->blocks - blocks);
 486
 487         if ((data->error == MMC_ERR_NONE) && blocks) {
 488                 printk(KERN_ERR "%s: Controller signalled completion even "
 489                         "though there were blocks left. Please report this "
 490                         "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
 491                 data->error = MMC_ERR_FAILED;
 492         } else if (host->size != 0) {
 493                 printk(KERN_ERR "%s: %d bytes were left untransferred. "
 494                         "Please report this to " BUGMAIL ".\n",
 495                         mmc_hostname(host->mmc), host->size);
 496                 data->error = MMC_ERR_FAILED;
 497         }
 498
 499         DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
 500
 501         if (data->stop) {
 502                 /*
 503                  * The controller needs a reset of internal state machines
 504                  * upon error conditions.
 505                  */
 506                 if (data->error != MMC_ERR_NONE) {
 507                         sdhci_reset(host, SDHCI_RESET_CMD);
 508                         sdhci_reset(host, SDHCI_RESET_DATA);
 509                 }
 510
 511                 sdhci_send_command(host, data->stop);
 512         } else
 513                 tasklet_schedule(&host->finish_tasklet);
 514 }
 515
 516 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 517 {
 518         int flags;
 519         u32 mask;
 520         unsigned long timeout;
 521
 522         WARN_ON(host->cmd);
 523
 524         DBG("Sending cmd (%x)\n", cmd->opcode);
 525
 526         /* Wait max 10 ms */
 527         timeout = 10;
 528
 529         mask = SDHCI_CMD_INHIBIT;
 530         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 531                 mask |= SDHCI_DATA_INHIBIT;
 532
 533         /* We shouldn't wait for data inihibit for stop commands, even
 534            though they might use busy signaling */
 535         if (host->mrq->data && (cmd == host->mrq->data->stop))
 536                 mask &= ~SDHCI_DATA_INHIBIT;
 537
 538         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
 539                 if (timeout == 0) {
 540                         printk(KERN_ERR "%s: Controller never released "
 541                                 "inhibit bit(s). Please report this to "
 542                                 BUGMAIL ".\n", mmc_hostname(host->mmc));
 543                         sdhci_dumpregs(host);
 544                         cmd->error = MMC_ERR_FAILED;
 545                         tasklet_schedule(&host->finish_tasklet);
 546                         return;
 547                 }
 548                 timeout--;
 549                 mdelay(1);
 550         }
 551
 552         mod_timer(&host->timer, jiffies + 10 * HZ);
 553
 554         host->cmd = cmd;
 555
 556         sdhci_prepare_data(host, cmd->data);
 557
 558         writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
 559
 560         sdhci_set_transfer_mode(host, cmd->data);
 561
 562         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 563                 printk(KERN_ERR "%s: Unsupported response type! "
 564                         "Please report this to " BUGMAIL ".\n",
 565                         mmc_hostname(host->mmc));
 566                 cmd->error = MMC_ERR_INVALID;
 567                 tasklet_schedule(&host->finish_tasklet);
 568                 return;
 569         }
 570
 571         if (!(cmd->flags & MMC_RSP_PRESENT))
 572                 flags = SDHCI_CMD_RESP_NONE;
 573         else if (cmd->flags & MMC_RSP_136)
 574                 flags = SDHCI_CMD_RESP_LONG;
 575         else if (cmd->flags & MMC_RSP_BUSY)
 576                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 577         else
 578                 flags = SDHCI_CMD_RESP_SHORT;
 579
 580         if (cmd->flags & MMC_RSP_CRC)
 581                 flags |= SDHCI_CMD_CRC;
 582         if (cmd->flags & MMC_RSP_OPCODE)
 583                 flags |= SDHCI_CMD_INDEX;
 584         if (cmd->data)
 585                 flags |= SDHCI_CMD_DATA;
 586
 587         writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
 588                 host->ioaddr + SDHCI_COMMAND);
 589 }
 590
 591 static void sdhci_finish_command(struct sdhci_host *host)
 592 {
 593         int i;
 594
 595         BUG_ON(host->cmd == NULL);
 596
 597         if (host->cmd->flags & MMC_RSP_PRESENT) {
 598                 if (host->cmd->flags & MMC_RSP_136) {
 599                         /* CRC is stripped so we need to do some shifting. */
 600                         for (i = 0;i < 4;i++) {
 601                                 host->cmd->resp[i] = readl(host->ioaddr +
 602                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 603                                 if (i != 3)
 604                                         host->cmd->resp[i] |=
 605                                                 readb(host->ioaddr +
 606                                                 SDHCI_RESPONSE + (3-i)*4-1);
 607                         }
 608                 } else {
 609                         host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
 610                 }
 611         }
 612
 613         host->cmd->error = MMC_ERR_NONE;
 614
 615         DBG("Ending cmd (%x)\n", host->cmd->opcode);
 616
 617         if (host->cmd->data)
 618                 host->data = host->cmd->data;
 619         else
 620                 tasklet_schedule(&host->finish_tasklet);
 621
 622         host->cmd = NULL;
 623 }
 624
 625 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 626 {
 627         int div;
 628         u8 ctrl;
 629         u16 clk;
 630         unsigned long timeout;
 631
 632         if (clock == host->clock)
 633                 return;
 634
 635         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 636
 637         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 638         if (clock > 25000000)
 639                 ctrl |= SDHCI_CTRL_HISPD;
 640         else
 641                 ctrl &= ~SDHCI_CTRL_HISPD;
 642         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 643
 644         if (clock == 0)
 645                 goto out;
 646
 647         for (div = 1;div < 256;div *= 2) {
 648                 if ((host->max_clk / div) <= clock)
 649                         break;
 650         }
 651         div >>= 1;
 652
 653         clk = div << SDHCI_DIVIDER_SHIFT;
 654         clk |= SDHCI_CLOCK_INT_EN;
 655         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 656
 657         /* Wait max 10 ms */
 658         timeout = 10;
 659         while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
 660                 & SDHCI_CLOCK_INT_STABLE)) {
 661                 if (timeout == 0) {
 662                         printk(KERN_ERR "%s: Internal clock never stabilised. "
 663                                 "Please report this to " BUGMAIL ".\n",
 664                                 mmc_hostname(host->mmc));
 665                         sdhci_dumpregs(host);
 666                         return;
 667                 }
 668                 timeout--;
 669                 mdelay(1);
 670         }
 671
 672         clk |= SDHCI_CLOCK_CARD_EN;
 673         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
 674
 675 out:
 676         host->clock = clock;
 677 }
 678
 679 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 680 {
 681         u8 pwr;
 682
 683         if (host->power == power)
 684                 return;
 685
 686         if (power == (unsigned short)-1) {
 687                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 688                 goto out;
 689         }
 690
 691         /*
 692          * Spec says that we should clear the power reg before setting
 693          * a new value. Some controllers don't seem to like this though.
 694          */
 695         if (!(host->chip->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
 696                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
 697
 698         pwr = SDHCI_POWER_ON;
 699
 700         switch (power) {
 701         case MMC_VDD_170:
 702         case MMC_VDD_180:
 703         case MMC_VDD_190:
 704                 pwr |= SDHCI_POWER_180;
 705                 break;
 706         case MMC_VDD_290:
 707         case MMC_VDD_300:
 708         case MMC_VDD_310:
 709                 pwr |= SDHCI_POWER_300;
 710                 break;
 711         case MMC_VDD_320:
 712         case MMC_VDD_330:
 713         case MMC_VDD_340:
 714                 pwr |= SDHCI_POWER_330;
 715                 break;
 716         default:
 717                 BUG();
 718         }
 719
 720         writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
 721
 722 out:
 723         host->power = power;
 724 }
 725
 726 /*****************************************************************************\
 727  *                                                                           *
 728  * MMC callbacks                                                             *
 729  *                                                                           *
 730 \*****************************************************************************/
 731
 732 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 733 {
 734         struct sdhci_host *host;
 735         unsigned long flags;
 736
 737         host = mmc_priv(mmc);
 738
 739         spin_lock_irqsave(&host->lock, flags);
 740
 741         WARN_ON(host->mrq != NULL);
 742
 743         sdhci_activate_led(host);
 744
 745         host->mrq = mrq;
 746
 747         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 748                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 749                 tasklet_schedule(&host->finish_tasklet);
 750         } else
 751                 sdhci_send_command(host, mrq->cmd);
 752
 753         mmiowb();
 754         spin_unlock_irqrestore(&host->lock, flags);
 755 }
 756
 757 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 758 {
 759         struct sdhci_host *host;
 760         unsigned long flags;
 761         u8 ctrl;
 762
 763         host = mmc_priv(mmc);
 764
 765         spin_lock_irqsave(&host->lock, flags);
 766
 767         /*
 768          * Reset the chip on each power off.
 769          * Should clear out any weird states.
 770          */
 771         if (ios->power_mode == MMC_POWER_OFF) {
 772                 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
 773                 sdhci_init(host);
 774         }
 775
 776         sdhci_set_clock(host, ios->clock);
 777
 778         if (ios->power_mode == MMC_POWER_OFF)
 779                 sdhci_set_power(host, -1);
 780         else
 781                 sdhci_set_power(host, ios->vdd);
 782
 783         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
 784         if (ios->bus_width == MMC_BUS_WIDTH_4)
 785                 ctrl |= SDHCI_CTRL_4BITBUS;
 786         else
 787                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 788         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
 789
 790         mmiowb();
 791         spin_unlock_irqrestore(&host->lock, flags);
 792 }
 793
 794 static int sdhci_get_ro(struct mmc_host *mmc)
 795 {
 796         struct sdhci_host *host;
 797         unsigned long flags;
 798         int present;
 799
 800         host = mmc_priv(mmc);
 801
 802         spin_lock_irqsave(&host->lock, flags);
 803
 804         present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
 805
 806         spin_unlock_irqrestore(&host->lock, flags);
 807
 808         return !(present & SDHCI_WRITE_PROTECT);
 809 }
 810
 811 static const struct mmc_host_ops sdhci_ops = {
 812         .request        = sdhci_request,
 813         .set_ios        = sdhci_set_ios,
 814         .get_ro         = sdhci_get_ro,
 815 };
 816
 817 /*****************************************************************************\
 818  *                                                                           *
 819  * Tasklets                                                                  *
 820  *                                                                           *
 821 \*****************************************************************************/
 822
 823 static void sdhci_tasklet_card(unsigned long param)
 824 {
 825         struct sdhci_host *host;
 826         unsigned long flags;
 827
 828         host = (struct sdhci_host*)param;
 829
 830         spin_lock_irqsave(&host->lock, flags);
 831
 832         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
 833                 if (host->mrq) {
 834                         printk(KERN_ERR "%s: Card removed during transfer!\n",
 835                                 mmc_hostname(host->mmc));
 836                         printk(KERN_ERR "%s: Resetting controller.\n",
 837                                 mmc_hostname(host->mmc));
 838
 839                         sdhci_reset(host, SDHCI_RESET_CMD);
 840                         sdhci_reset(host, SDHCI_RESET_DATA);
 841
 842                         host->mrq->cmd->error = MMC_ERR_FAILED;
 843                         tasklet_schedule(&host->finish_tasklet);
 844                 }
 845         }
 846
 847         spin_unlock_irqrestore(&host->lock, flags);
 848
 849         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
 850 }
 851
 852 static void sdhci_tasklet_finish(unsigned long param)
 853 {
 854         struct sdhci_host *host;
 855         unsigned long flags;
 856         struct mmc_request *mrq;
 857
 858         host = (struct sdhci_host*)param;
 859
 860         spin_lock_irqsave(&host->lock, flags);
 861
 862         del_timer(&host->timer);
 863
 864         mrq = host->mrq;
 865
 866         DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
 867
 868         /*
 869          * The controller needs a reset of internal state machines
 870          * upon error conditions.
 871          */
 872         if ((mrq->cmd->error != MMC_ERR_NONE) ||
 873                 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
 874                 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
 875
 876                 /* Some controllers need this kick or reset won't work here */
 877                 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
 878                         unsigned int clock;
 879
 880                         /* This is to force an update */
 881                         clock = host->clock;
 882                         host->clock = 0;
 883                         sdhci_set_clock(host, clock);
 884                 }
 885
 886                 /* Spec says we should do both at the same time, but Ricoh
 887                    controllers do not like that. */
 888                 sdhci_reset(host, SDHCI_RESET_CMD);
 889                 sdhci_reset(host, SDHCI_RESET_DATA);
 890         }
 891
 892         host->mrq = NULL;
 893         host->cmd = NULL;
 894         host->data = NULL;
 895
 896         sdhci_deactivate_led(host);
 897
 898         mmiowb();
 899         spin_unlock_irqrestore(&host->lock, flags);
 900
 901         mmc_request_done(host->mmc, mrq);
 902 }
 903
 904 static void sdhci_timeout_timer(unsigned long data)
 905 {
 906         struct sdhci_host *host;
 907         unsigned long flags;
 908
 909         host = (struct sdhci_host*)data;
 910
 911         spin_lock_irqsave(&host->lock, flags);
 912
 913         if (host->mrq) {
 914                 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
 915                         "Please report this to " BUGMAIL ".\n",
 916                         mmc_hostname(host->mmc));
 917                 sdhci_dumpregs(host);
 918
 919                 if (host->data) {
 920                         host->data->error = MMC_ERR_TIMEOUT;
 921                         sdhci_finish_data(host);
 922                 } else {
 923                         if (host->cmd)
 924                                 host->cmd->error = MMC_ERR_TIMEOUT;
 925                         else
 926                                 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
 927
 928                         tasklet_schedule(&host->finish_tasklet);
 929                 }
 930         }
 931
 932         mmiowb();
 933         spin_unlock_irqrestore(&host->lock, flags);
 934 }
 935
 936 /*****************************************************************************\
 937  *                                                                           *
 938  * Interrupt handling                                                        *
 939  *                                                                           *
 940 \*****************************************************************************/
 941
 942 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
 943 {
 944         BUG_ON(intmask == 0);
 945
 946         if (!host->cmd) {
 947                 printk(KERN_ERR "%s: Got command interrupt even though no "
 948                         "command operation was in progress.\n",
 949                         mmc_hostname(host->mmc));
 950                 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
 951                         mmc_hostname(host->mmc));
 952                 sdhci_dumpregs(host);
 953                 return;
 954         }
 955
 956         if (intmask & SDHCI_INT_RESPONSE)
 957                 sdhci_finish_command(host);
 958         else {
 959                 if (intmask & SDHCI_INT_TIMEOUT)
 960                         host->cmd->error = MMC_ERR_TIMEOUT;
 961                 else if (intmask & SDHCI_INT_CRC)
 962                         host->cmd->error = MMC_ERR_BADCRC;
 963                 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
 964                         host->cmd->error = MMC_ERR_FAILED;
 965                 else
 966                         host->cmd->error = MMC_ERR_INVALID;
 967
 968                 tasklet_schedule(&host->finish_tasklet);
 969         }
 970 }
 971
 972 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
 973 {
 974         BUG_ON(intmask == 0);
 975
 976         if (!host->data) {
 977                 /*
 978                  * A data end interrupt is sent together with the response
 979                  * for the stop command.
 980                  */
 981                 if (intmask & SDHCI_INT_DATA_END)
 982                         return;
 983
 984                 printk(KERN_ERR "%s: Got data interrupt even though no "
 985                         "data operation was in progress.\n",
 986                         mmc_hostname(host->mmc));
 987                 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
 988                         mmc_hostname(host->mmc));
 989                 sdhci_dumpregs(host);
 990
 991                 return;
 992         }
 993
 994         if (intmask & SDHCI_INT_DATA_TIMEOUT)
 995                 host->data->error = MMC_ERR_TIMEOUT;
 996         else if (intmask & SDHCI_INT_DATA_CRC)
 997                 host->data->error = MMC_ERR_BADCRC;
 998         else if (intmask & SDHCI_INT_DATA_END_BIT)
 999                 host->data->error = MMC_ERR_FAILED;
1000
1001         if (host->data->error != MMC_ERR_NONE)
1002                 sdhci_finish_data(host);
1003         else {
1004                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1005                         sdhci_transfer_pio(host);
1006
1007                 if (intmask & SDHCI_INT_DATA_END)
1008                         sdhci_finish_data(host);
1009         }
1010 }
1011
1012 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1013 {
1014         irqreturn_t result;
1015         struct sdhci_host* host = dev_id;
1016         u32 intmask;
1017
1018         spin_lock(&host->lock);
1019
1020         intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
1021
1022         if (!intmask) {
1023                 result = IRQ_NONE;
1024                 goto out;
1025         }
1026
1027         DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
1028
1029         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1030                 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
1031                         host->ioaddr + SDHCI_INT_STATUS);
1032                 tasklet_schedule(&host->card_tasklet);
1033         }
1034
1035         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1036
1037         if (intmask & SDHCI_INT_CMD_MASK) {
1038                 writel(intmask & SDHCI_INT_CMD_MASK,
1039                         host->ioaddr + SDHCI_INT_STATUS);
1040                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1041         }
1042
1043         if (intmask & SDHCI_INT_DATA_MASK) {
1044                 writel(intmask & SDHCI_INT_DATA_MASK,
1045                         host->ioaddr + SDHCI_INT_STATUS);
1046                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1047         }
1048
1049         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1050
1051         if (intmask & SDHCI_INT_BUS_POWER) {
1052                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1053                         mmc_hostname(host->mmc));
1054                 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1055         }
1056
1057         intmask &= SDHCI_INT_BUS_POWER;
1058
1059         if (intmask) {
1060                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
1061                         "report this to " BUGMAIL ".\n",
1062                         mmc_hostname(host->mmc), intmask);
1063                 sdhci_dumpregs(host);
1064
1065                 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1066         }
1067
1068         result = IRQ_HANDLED;
1069
1070         mmiowb();
1071 out:
1072         spin_unlock(&host->lock);
1073
1074         return result;
1075 }
1076
1077 /*****************************************************************************\
1078  *                                                                           *
1079  * Suspend/resume                                                            *
1080  *                                                                           *
1081 \*****************************************************************************/
1082
1083 #ifdef CONFIG_PM
1084
1085 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1086 {
1087         struct sdhci_chip *chip;
1088         int i, ret;
1089
1090         chip = pci_get_drvdata(pdev);
1091         if (!chip)
1092                 return 0;
1093
1094         DBG("Suspending...\n");
1095
1096         for (i = 0;i < chip->num_slots;i++) {
1097                 if (!chip->hosts[i])
1098                         continue;
1099                 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1100                 if (ret) {
1101                         for (i--;i >= 0;i--)
1102                                 mmc_resume_host(chip->hosts[i]->mmc);
1103                         return ret;
1104                 }
1105         }
1106
1107         pci_save_state(pdev);
1108         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1109         pci_disable_device(pdev);
1110         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1111
1112         return 0;
1113 }
1114
1115 static int sdhci_resume (struct pci_dev *pdev)
1116 {
1117         struct sdhci_chip *chip;
1118         int i, ret;
1119
1120         chip = pci_get_drvdata(pdev);
1121         if (!chip)
1122                 return 0;
1123
1124         DBG("Resuming...\n");
1125
1126         pci_set_power_state(pdev, PCI_D0);
1127         pci_restore_state(pdev);
1128         pci_enable_device(pdev);
1129
1130         for (i = 0;i < chip->num_slots;i++) {
1131                 if (!chip->hosts[i])
1132                         continue;
1133                 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1134                         pci_set_master(pdev);
1135                 sdhci_init(chip->hosts[i]);
1136                 mmiowb();
1137                 ret = mmc_resume_host(chip->hosts[i]->mmc);
1138                 if (ret)
1139                         return ret;
1140         }
1141
1142         return 0;
1143 }
1144
1145 #else /* CONFIG_PM */
1146
1147 #define sdhci_suspend NULL
1148 #define sdhci_resume NULL
1149
1150 #endif /* CONFIG_PM */
1151
1152 /*****************************************************************************\
1153  *                                                                           *
1154  * Device probing/removal                                                    *
1155  *                                                                           *
1156 \*****************************************************************************/
1157
1158 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1159 {
1160         int ret;
1161         unsigned int version;
1162         struct sdhci_chip *chip;
1163         struct mmc_host *mmc;
1164         struct sdhci_host *host;
1165
1166         u8 first_bar;
1167         unsigned int caps;
1168
1169         chip = pci_get_drvdata(pdev);
1170         BUG_ON(!chip);
1171
1172         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1173         if (ret)
1174                 return ret;
1175
1176         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1177
1178         if (first_bar > 5) {
1179                 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1180                 return -ENODEV;
1181         }
1182
1183         if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1184                 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1185                 return -ENODEV;
1186         }
1187
1188         if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1189                 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. "
1190                         "You may experience problems.\n");
1191         }
1192
1193         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1194                 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1195                 return -ENODEV;
1196         }
1197
1198         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1199                 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1200                 return -ENODEV;
1201         }
1202
1203         mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1204         if (!mmc)
1205                 return -ENOMEM;
1206
1207         host = mmc_priv(mmc);
1208         host->mmc = mmc;
1209
1210         host->chip = chip;
1211         chip->hosts[slot] = host;
1212
1213         host->bar = first_bar + slot;
1214
1215         host->addr = pci_resource_start(pdev, host->bar);
1216         host->irq = pdev->irq;
1217
1218         DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1219
1220         snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1221
1222         ret = pci_request_region(pdev, host->bar, host->slot_descr);
1223         if (ret)
1224                 goto free;
1225
1226         host->ioaddr = ioremap_nocache(host->addr,
1227                 pci_resource_len(pdev, host->bar));
1228         if (!host->ioaddr) {
1229                 ret = -ENOMEM;
1230                 goto release;
1231         }
1232
1233         sdhci_reset(host, SDHCI_RESET_ALL);
1234
1235         version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1236         version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1237         if (version != 0) {
1238                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1239                         "You may experience problems.\n", host->slot_descr,
1240                         version);
1241         }
1242
1243         caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1244
1245         if (debug_nodma)
1246                 DBG("DMA forced off\n");
1247         else if (debug_forcedma) {
1248                 DBG("DMA forced on\n");
1249                 host->flags |= SDHCI_USE_DMA;
1250         } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1251                 host->flags |= SDHCI_USE_DMA;
1252         else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1253                 DBG("Controller doesn't have DMA interface\n");
1254         else if (!(caps & SDHCI_CAN_DO_DMA))
1255                 DBG("Controller doesn't have DMA capability\n");
1256         else
1257                 host->flags |= SDHCI_USE_DMA;
1258
1259         if (host->flags & SDHCI_USE_DMA) {
1260                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1261                         printk(KERN_WARNING "%s: No suitable DMA available. "
1262                                 "Falling back to PIO.\n", host->slot_descr);
1263                         host->flags &= ~SDHCI_USE_DMA;
1264                 }
1265         }
1266
1267         if (host->flags & SDHCI_USE_DMA)
1268                 pci_set_master(pdev);
1269         else /* XXX: Hack to get MMC layer to avoid highmem */
1270                 pdev->dma_mask = 0;
1271
1272         host->max_clk =
1273                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1274         if (host->max_clk == 0) {
1275                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1276                         "frequency.\n", host->slot_descr);
1277                 ret = -ENODEV;
1278                 goto unmap;
1279         }
1280         host->max_clk *= 1000000;
1281
1282         host->timeout_clk =
1283                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1284         if (host->timeout_clk == 0) {
1285                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1286                         "frequency.\n", host->slot_descr);
1287                 ret = -ENODEV;
1288                 goto unmap;
1289         }
1290         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1291                 host->timeout_clk *= 1000;
1292
1293         host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1294         if (host->max_block >= 3) {
1295                 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1296                         host->slot_descr);
1297                 ret = -ENODEV;
1298                 goto unmap;
1299         }
1300         host->max_block = 512 << host->max_block;
1301
1302         /*
1303          * Set host parameters.
1304          */
1305         mmc->ops = &sdhci_ops;
1306         mmc->f_min = host->max_clk / 256;
1307         mmc->f_max = host->max_clk;
1308         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1309
1310         mmc->ocr_avail = 0;
1311         if (caps & SDHCI_CAN_VDD_330)
1312                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1313         else if (caps & SDHCI_CAN_VDD_300)
1314                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1315         else if (caps & SDHCI_CAN_VDD_180)
1316                 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1317
1318         if ((host->max_clk > 25000000) && !(caps & SDHCI_CAN_DO_HISPD)) {
1319                 printk(KERN_ERR "%s: Controller reports > 25 MHz base clock,"
1320                         " but no high speed support.\n",
1321                         host->slot_descr);
1322                 mmc->f_max = 25000000;
1323         }
1324
1325         if (mmc->ocr_avail == 0) {
1326                 printk(KERN_ERR "%s: Hardware doesn't report any "
1327                         "support voltages.\n", host->slot_descr);
1328                 ret = -ENODEV;
1329                 goto unmap;
1330         }
1331
1332         spin_lock_init(&host->lock);
1333
1334         /*
1335          * Maximum number of segments. Hardware cannot do scatter lists.
1336          */
1337         if (host->flags & SDHCI_USE_DMA)
1338                 mmc->max_hw_segs = 1;
1339         else
1340                 mmc->max_hw_segs = 16;
1341         mmc->max_phys_segs = 16;
1342
1343         /*
1344          * Maximum number of sectors in one transfer. Limited by DMA boundary
1345          * size (512KiB), which means (512 KiB/512=) 1024 entries.
1346          */
1347         mmc->max_sectors = 1024;
1348
1349         /*
1350          * Maximum segment size. Could be one segment with the maximum number
1351          * of sectors.
1352          */
1353         mmc->max_seg_size = mmc->max_sectors * 512;
1354
1355         /*
1356          * Init tasklets.
1357          */
1358         tasklet_init(&host->card_tasklet,
1359                 sdhci_tasklet_card, (unsigned long)host);
1360         tasklet_init(&host->finish_tasklet,
1361                 sdhci_tasklet_finish, (unsigned long)host);
1362
1363         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1364
1365         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1366                 host->slot_descr, host);
1367         if (ret)
1368                 goto untasklet;
1369
1370         sdhci_init(host);
1371
1372 #ifdef CONFIG_MMC_DEBUG
1373         sdhci_dumpregs(host);
1374 #endif
1375
1376         mmiowb();
1377
1378         mmc_add_host(mmc);
1379
1380         printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1381                 host->addr, host->irq,
1382                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1383
1384         return 0;
1385
1386 untasklet:
1387         tasklet_kill(&host->card_tasklet);
1388         tasklet_kill(&host->finish_tasklet);
1389 unmap:
1390         iounmap(host->ioaddr);
1391 release:
1392         pci_release_region(pdev, host->bar);
1393 free:
1394         mmc_free_host(mmc);
1395
1396         return ret;
1397 }
1398
1399 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1400 {
1401         struct sdhci_chip *chip;
1402         struct mmc_host *mmc;
1403         struct sdhci_host *host;
1404
1405         chip = pci_get_drvdata(pdev);
1406         host = chip->hosts[slot];
1407         mmc = host->mmc;
1408
1409         chip->hosts[slot] = NULL;
1410
1411         mmc_remove_host(mmc);
1412
1413         sdhci_reset(host, SDHCI_RESET_ALL);
1414
1415         free_irq(host->irq, host);
1416
1417         del_timer_sync(&host->timer);
1418
1419         tasklet_kill(&host->card_tasklet);
1420         tasklet_kill(&host->finish_tasklet);
1421
1422         iounmap(host->ioaddr);
1423
1424         pci_release_region(pdev, host->bar);
1425
1426         mmc_free_host(mmc);
1427 }
1428
1429 static int __devinit sdhci_probe(struct pci_dev *pdev,
1430         const struct pci_device_id *ent)
1431 {
1432         int ret, i;
1433         u8 slots, rev;
1434         struct sdhci_chip *chip;
1435
1436         BUG_ON(pdev == NULL);
1437         BUG_ON(ent == NULL);
1438
1439         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1440
1441         printk(KERN_INFO DRIVER_NAME
1442                 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1443                 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1444                 (int)rev);
1445
1446         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1447         if (ret)
1448                 return ret;
1449
1450         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1451         DBG("found %d slot(s)\n", slots);
1452         if (slots == 0)
1453                 return -ENODEV;
1454
1455         ret = pci_enable_device(pdev);
1456         if (ret)
1457                 return ret;
1458
1459         chip = kzalloc(sizeof(struct sdhci_chip) +
1460                 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1461         if (!chip) {
1462                 ret = -ENOMEM;
1463                 goto err;
1464         }
1465
1466         chip->pdev = pdev;
1467         chip->quirks = ent->driver_data;
1468
1469         if (debug_quirks)
1470                 chip->quirks = debug_quirks;
1471
1472         chip->num_slots = slots;
1473         pci_set_drvdata(pdev, chip);
1474
1475         for (i = 0;i < slots;i++) {
1476                 ret = sdhci_probe_slot(pdev, i);
1477                 if (ret) {
1478                         for (i--;i >= 0;i--)
1479                                 sdhci_remove_slot(pdev, i);
1480                         goto free;
1481                 }
1482         }
1483
1484         return 0;
1485
1486 free:
1487         pci_set_drvdata(pdev, NULL);
1488         kfree(chip);
1489
1490 err:
1491         pci_disable_device(pdev);
1492         return ret;
1493 }
1494
1495 static void __devexit sdhci_remove(struct pci_dev *pdev)
1496 {
1497         int i;
1498         struct sdhci_chip *chip;
1499
1500         chip = pci_get_drvdata(pdev);
1501
1502         if (chip) {
1503                 for (i = 0;i < chip->num_slots;i++)
1504                         sdhci_remove_slot(pdev, i);
1505
1506                 pci_set_drvdata(pdev, NULL);
1507
1508                 kfree(chip);
1509         }
1510
1511         pci_disable_device(pdev);
1512 }
1513
1514 static struct pci_driver sdhci_driver = {
1515         .name =         DRIVER_NAME,
1516         .id_table =     pci_ids,
1517         .probe =        sdhci_probe,
1518         .remove =       __devexit_p(sdhci_remove),
1519         .suspend =      sdhci_suspend,
1520         .resume =       sdhci_resume,
1521 };
1522
1523 /*****************************************************************************\
1524  *                                                                           *
1525  * Driver init/exit                                                          *
1526  *                                                                           *
1527 \*****************************************************************************/
1528
1529 static int __init sdhci_drv_init(void)
1530 {
1531         printk(KERN_INFO DRIVER_NAME
1532                 ": Secure Digital Host Controller Interface driver, "
1533                 DRIVER_VERSION "\n");
1534         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1535
1536         return pci_register_driver(&sdhci_driver);
1537 }
1538
1539 static void __exit sdhci_drv_exit(void)
1540 {
1541         DBG("Exiting\n");
1542
1543         pci_unregister_driver(&sdhci_driver);
1544 }
1545
1546 module_init(sdhci_drv_init);
1547 module_exit(sdhci_drv_exit);
1548
1549 module_param(debug_nodma, uint, 0444);
1550 module_param(debug_forcedma, uint, 0444);
1551 module_param(debug_quirks, uint, 0444);
1552
1553 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1554 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1555 MODULE_VERSION(DRIVER_VERSION);
1556 MODULE_LICENSE("GPL");
1557
1558 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1559 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1560 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");