drivers/mtd/chips/jedec_probe.c

   1 /*
   2    Common Flash Interface probe code.
   3    (C) 2000 Red Hat. GPL'd.
   4    $Id: jedec_probe.c,v 1.51 2004/07/14 14:44:30 thayne Exp $
   5    See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
   6    for the standard this probe goes back to.
   7
   8    Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
   9 */
  10
  11 #include <linux/config.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/types.h>
  15 #include <linux/kernel.h>
  16 #include <asm/io.h>
  17 #include <asm/byteorder.h>
  18 #include <linux/errno.h>
  19 #include <linux/slab.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/init.h>
  22
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/map.h>
  25 #include <linux/mtd/cfi.h>
  26 #include <linux/mtd/gen_probe.h>
  27
  28 /* Manufacturers */
  29 #define MANUFACTURER_AMD        0x0001
  30 #define MANUFACTURER_ATMEL      0x001f
  31 #define MANUFACTURER_FUJITSU    0x0004
  32 #define MANUFACTURER_HYUNDAI    0x00AD
  33 #define MANUFACTURER_INTEL      0x0089
  34 #define MANUFACTURER_MACRONIX   0x00C2
  35 #define MANUFACTURER_PMC        0x009D
  36 #define MANUFACTURER_SST        0x00BF
  37 #define MANUFACTURER_ST         0x0020
  38 #define MANUFACTURER_TOSHIBA    0x0098
  39 #define MANUFACTURER_WINBOND    0x00da
  40
  41
  42 /* AMD */
  43 #define AM29DL800BB     0x22C8
  44 #define AM29DL800BT     0x224A
  45
  46 #define AM29F800BB      0x2258
  47 #define AM29F800BT      0x22D6
  48 #define AM29LV400BB     0x22BA
  49 #define AM29LV400BT     0x22B9
  50 #define AM29LV800BB     0x225B
  51 #define AM29LV800BT     0x22DA
  52 #define AM29LV160DT     0x22C4
  53 #define AM29LV160DB     0x2249
  54 #define AM29F017D       0x003D
  55 #define AM29F016D       0x00AD
  56 #define AM29F080        0x00D5
  57 #define AM29F040        0x00A4
  58 #define AM29LV040B      0x004F
  59 #define AM29F032B       0x0041
  60 #define AM29F002T       0x00B0
  61
  62 /* Atmel */
  63 #define AT49BV512       0x0003
  64 #define AT29LV512       0x003d
  65 #define AT49BV16X       0x00C0
  66 #define AT49BV16XT      0x00C2
  67 #define AT49BV32X       0x00C8
  68 #define AT49BV32XT      0x00C9
  69
  70 /* Fujitsu */
  71 #define MBM29F040C      0x00A4
  72 #define MBM29LV650UE    0x22D7
  73 #define MBM29LV320TE    0x22F6
  74 #define MBM29LV320BE    0x22F9
  75 #define MBM29LV160TE    0x22C4
  76 #define MBM29LV160BE    0x2249
  77 #define MBM29LV800BA    0x225B
  78 #define MBM29LV800TA    0x22DA
  79 #define MBM29LV400TC    0x22B9
  80 #define MBM29LV400BC    0x22BA
  81
  82 /* Hyundai */
  83 #define HY29F002T       0x00B0
  84
  85 /* Intel */
  86 #define I28F004B3T      0x00d4
  87 #define I28F004B3B      0x00d5
  88 #define I28F400B3T      0x8894
  89 #define I28F400B3B      0x8895
  90 #define I28F008S5       0x00a6
  91 #define I28F016S5       0x00a0
  92 #define I28F008SA       0x00a2
  93 #define I28F008B3T      0x00d2
  94 #define I28F008B3B      0x00d3
  95 #define I28F800B3T      0x8892
  96 #define I28F800B3B      0x8893
  97 #define I28F016S3       0x00aa
  98 #define I28F016B3T      0x00d0
  99 #define I28F016B3B      0x00d1
 100 #define I28F160B3T      0x8890
 101 #define I28F160B3B      0x8891
 102 #define I28F320B3T      0x8896
 103 #define I28F320B3B      0x8897
 104 #define I28F640B3T      0x8898
 105 #define I28F640B3B      0x8899
 106 #define I82802AB        0x00ad
 107 #define I82802AC        0x00ac
 108
 109 /* Macronix */
 110 #define MX29LV160T      0x22C4
 111 #define MX29LV160B      0x2249
 112 #define MX29F016        0x00AD
 113 #define MX29F002T       0x00B0
 114 #define MX29F004T       0x0045
 115 #define MX29F004B       0x0046
 116
 117 /* PMC */
 118 #define PM49FL002       0x006D
 119 #define PM49FL004       0x006E
 120 #define PM49FL008       0x006A
 121
 122 /* ST - www.st.com */
 123 #define M29W800DT       0x00D7
 124 #define M29W800DB       0x005B
 125 #define M29W160DT       0x22C4
 126 #define M29W160DB       0x2249
 127 #define M29W040B        0x00E3
 128 #define M50FW040        0x002C
 129 #define M50FW080        0x002D
 130 #define M50FW016        0x002E
 131
 132 /* SST */
 133 #define SST29EE020      0x0010
 134 #define SST29LE020      0x0012
 135 #define SST29EE512      0x005d
 136 #define SST29LE512      0x003d
 137 #define SST39LF800      0x2781
 138 #define SST39LF160      0x2782
 139 #define SST39LF512      0x00D4
 140 #define SST39LF010      0x00D5
 141 #define SST39LF020      0x00D6
 142 #define SST39LF040      0x00D7
 143 #define SST39SF010A     0x00B5
 144 #define SST39SF020A     0x00B6
 145 #define SST49LF004B     0x0060
 146 #define SST49LF008A     0x005a
 147 #define SST49LF030A     0x001C
 148 #define SST49LF040A     0x0051
 149 #define SST49LF080A     0x005B
 150
 151 /* Toshiba */
 152 #define TC58FVT160      0x00C2
 153 #define TC58FVB160      0x0043
 154 #define TC58FVT321      0x009A
 155 #define TC58FVB321      0x009C
 156 #define TC58FVT641      0x0093
 157 #define TC58FVB641      0x0095
 158
 159 /* Winbond */
 160 #define W49V002A        0x00b0
 161
 162
 163 /*
 164  * Unlock address sets for AMD command sets.
 165  * Intel command sets use the MTD_UADDR_UNNECESSARY.
 166  * Each identifier, except MTD_UADDR_UNNECESSARY, and
 167  * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
 168  * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
 169  * initialization need not require initializing all of the
 170  * unlock addresses for all bit widths.
 171  */
 172 enum uaddr {
 173         MTD_UADDR_NOT_SUPPORTED = 0,    /* data width not supported */
 174         MTD_UADDR_0x0555_0x02AA,
 175         MTD_UADDR_0x0555_0x0AAA,
 176         MTD_UADDR_0x5555_0x2AAA,
 177         MTD_UADDR_0x0AAA_0x0555,
 178         MTD_UADDR_DONT_CARE,            /* Requires an arbitrary address */
 179         MTD_UADDR_UNNECESSARY,          /* Does not require any address */
 180 };
 181
 182
 183 struct unlock_addr {
 184         int addr1;
 185         int addr2;
 186 };
 187
 188
 189 /*
 190  * I don't like the fact that the first entry in unlock_addrs[]
 191  * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
 192  * should not be used.  The  problem is that structures with
 193  * initializers have extra fields initialized to 0.  It is _very_
 194  * desireable to have the unlock address entries for unsupported
 195  * data widths automatically initialized - that means that
 196  * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
 197  * must go unused.
 198  */
 199 static const struct unlock_addr  unlock_addrs[] = {
 200         [MTD_UADDR_NOT_SUPPORTED] = {
 201                 .addr1 = 0xffff,
 202                 .addr2 = 0xffff
 203         },
 204
 205         [MTD_UADDR_0x0555_0x02AA] = {
 206                 .addr1 = 0x0555,
 207                 .addr2 = 0x02aa
 208         },
 209
 210         [MTD_UADDR_0x0555_0x0AAA] = {
 211                 .addr1 = 0x0555,
 212                 .addr2 = 0x0aaa
 213         },
 214
 215         [MTD_UADDR_0x5555_0x2AAA] = {
 216                 .addr1 = 0x5555,
 217                 .addr2 = 0x2aaa
 218         },
 219
 220         [MTD_UADDR_0x0AAA_0x0555] = {
 221                 .addr1 = 0x0AAA,
 222                 .addr2 = 0x0555
 223         },
 224
 225         [MTD_UADDR_DONT_CARE] = {
 226                 .addr1 = 0x0000,      /* Doesn't matter which address */
 227                 .addr2 = 0x0000       /* is used - must be last entry */
 228         }
 229 };
 230
 231
 232 struct amd_flash_info {
 233         const __u16 mfr_id;
 234         const __u16 dev_id;
 235         const char *name;
 236         const int DevSize;
 237         const int NumEraseRegions;
 238         const int CmdSet;
 239         const __u8 uaddr[4];            /* unlock addrs for 8, 16, 32, 64 */
 240         const ulong regions[6];
 241 };
 242
 243 #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
 244
 245 #define SIZE_64KiB  16
 246 #define SIZE_128KiB 17
 247 #define SIZE_256KiB 18
 248 #define SIZE_512KiB 19
 249 #define SIZE_1MiB   20
 250 #define SIZE_2MiB   21
 251 #define SIZE_4MiB   22
 252 #define SIZE_8MiB   23
 253
 254
 255 /*
 256  * Please keep this list ordered by manufacturer!
 257  * Fortunately, the list isn't searched often and so a
 258  * slow, linear search isn't so bad.
 259  */
 260 static const struct amd_flash_info jedec_table[] = {
 261         {
 262                 .mfr_id         = MANUFACTURER_AMD,
 263                 .dev_id         = AM29F032B,
 264                 .name           = "AMD AM29F032B",
 265                 .uaddr          = {
 266                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 267                 },
 268                 .DevSize        = SIZE_4MiB,
 269                 .CmdSet         = P_ID_AMD_STD,
 270                 .NumEraseRegions= 1,
 271                 .regions        = {
 272                         ERASEINFO(0x10000,64)
 273                 }
 274         }, {
 275                 .mfr_id         = MANUFACTURER_AMD,
 276                 .dev_id         = AM29LV160DT,
 277                 .name           = "AMD AM29LV160DT",
 278                 .uaddr          = {
 279                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 280                         [1] = MTD_UADDR_0x0555_0x02AA   /* x16 */
 281                 },
 282                 .DevSize        = SIZE_2MiB,
 283                 .CmdSet         = P_ID_AMD_STD,
 284                 .NumEraseRegions= 4,
 285                 .regions        = {
 286                         ERASEINFO(0x10000,31),
 287                         ERASEINFO(0x08000,1),
 288                         ERASEINFO(0x02000,2),
 289                         ERASEINFO(0x04000,1)
 290                 }
 291         }, {
 292                 .mfr_id         = MANUFACTURER_AMD,
 293                 .dev_id         = AM29LV160DB,
 294                 .name           = "AMD AM29LV160DB",
 295                 .uaddr          = {
 296                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 297                         [1] = MTD_UADDR_0x0555_0x02AA   /* x16 */
 298                 },
 299                 .DevSize        = SIZE_2MiB,
 300                 .CmdSet         = P_ID_AMD_STD,
 301                 .NumEraseRegions= 4,
 302                 .regions        = {
 303                         ERASEINFO(0x04000,1),
 304                         ERASEINFO(0x02000,2),
 305                         ERASEINFO(0x08000,1),
 306                         ERASEINFO(0x10000,31)
 307                 }
 308         }, {
 309                 .mfr_id         = MANUFACTURER_AMD,
 310                 .dev_id         = AM29LV400BB,
 311                 .name           = "AMD AM29LV400BB",
 312                 .uaddr          = {
 313                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 314                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 315                 },
 316                 .DevSize        = SIZE_512KiB,
 317                 .CmdSet         = P_ID_AMD_STD,
 318                 .NumEraseRegions= 4,
 319                 .regions        = {
 320                         ERASEINFO(0x04000,1),
 321                         ERASEINFO(0x02000,2),
 322                         ERASEINFO(0x08000,1),
 323                         ERASEINFO(0x10000,7)
 324                 }
 325         }, {
 326                 .mfr_id         = MANUFACTURER_AMD,
 327                 .dev_id         = AM29LV400BT,
 328                 .name           = "AMD AM29LV400BT",
 329                 .uaddr          = {
 330                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 331                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 332                 },
 333                 .DevSize        = SIZE_512KiB,
 334                 .CmdSet         = P_ID_AMD_STD,
 335                 .NumEraseRegions= 4,
 336                 .regions        = {
 337                         ERASEINFO(0x10000,7),
 338                         ERASEINFO(0x08000,1),
 339                         ERASEINFO(0x02000,2),
 340                         ERASEINFO(0x04000,1)
 341                 }
 342         }, {
 343                 .mfr_id         = MANUFACTURER_AMD,
 344                 .dev_id         = AM29LV800BB,
 345                 .name           = "AMD AM29LV800BB",
 346                 .uaddr          = {
 347                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 348                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 349                 },
 350                 .DevSize        = SIZE_1MiB,
 351                 .CmdSet         = P_ID_AMD_STD,
 352                 .NumEraseRegions= 4,
 353                 .regions        = {
 354                         ERASEINFO(0x04000,1),
 355                         ERASEINFO(0x02000,2),
 356                         ERASEINFO(0x08000,1),
 357                         ERASEINFO(0x10000,15),
 358                 }
 359         }, {
 360 /* add DL */
 361                 .mfr_id         = MANUFACTURER_AMD,
 362                 .dev_id         = AM29DL800BB,
 363                 .name           = "AMD AM29DL800BB",
 364                 .uaddr          = {
 365                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 366                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 367                 },
 368                 .DevSize        = SIZE_1MiB,
 369                 .CmdSet         = P_ID_AMD_STD,
 370                 .NumEraseRegions= 6,
 371                 .regions        = {
 372                         ERASEINFO(0x04000,1),
 373                         ERASEINFO(0x08000,1),
 374                         ERASEINFO(0x02000,4),
 375                         ERASEINFO(0x08000,1),
 376                         ERASEINFO(0x04000,1),
 377                         ERASEINFO(0x10000,14)
 378                 }
 379         }, {
 380                 .mfr_id         = MANUFACTURER_AMD,
 381                 .dev_id         = AM29DL800BT,
 382                 .name           = "AMD AM29DL800BT",
 383                 .uaddr          = {
 384                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 385                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 386                 },
 387                 .DevSize        = SIZE_1MiB,
 388                 .CmdSet         = P_ID_AMD_STD,
 389                 .NumEraseRegions= 6,
 390                 .regions        = {
 391                         ERASEINFO(0x10000,14),
 392                         ERASEINFO(0x04000,1),
 393                         ERASEINFO(0x08000,1),
 394                         ERASEINFO(0x02000,4),
 395                         ERASEINFO(0x08000,1),
 396                         ERASEINFO(0x04000,1)
 397                 }
 398         }, {
 399                 .mfr_id         = MANUFACTURER_AMD,
 400                 .dev_id         = AM29F800BB,
 401                 .name           = "AMD AM29F800BB",
 402                 .uaddr          = {
 403                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 404                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 405                 },
 406                 .DevSize        = SIZE_1MiB,
 407                 .CmdSet         = P_ID_AMD_STD,
 408                 .NumEraseRegions= 4,
 409                 .regions        = {
 410                         ERASEINFO(0x04000,1),
 411                         ERASEINFO(0x02000,2),
 412                         ERASEINFO(0x08000,1),
 413                         ERASEINFO(0x10000,15),
 414                 }
 415         }, {
 416                 .mfr_id         = MANUFACTURER_AMD,
 417                 .dev_id         = AM29LV800BT,
 418                 .name           = "AMD AM29LV800BT",
 419                 .uaddr          = {
 420                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 421                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 422                 },
 423                 .DevSize        = SIZE_1MiB,
 424                 .CmdSet         = P_ID_AMD_STD,
 425                 .NumEraseRegions= 4,
 426                 .regions        = {
 427                         ERASEINFO(0x10000,15),
 428                         ERASEINFO(0x08000,1),
 429                         ERASEINFO(0x02000,2),
 430                         ERASEINFO(0x04000,1)
 431                 }
 432         }, {
 433                 .mfr_id         = MANUFACTURER_AMD,
 434                 .dev_id         = AM29F800BT,
 435                 .name           = "AMD AM29F800BT",
 436                 .uaddr          = {
 437                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 438                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 439                 },
 440                 .DevSize        = SIZE_1MiB,
 441                 .CmdSet         = P_ID_AMD_STD,
 442                 .NumEraseRegions= 4,
 443                 .regions        = {
 444                         ERASEINFO(0x10000,15),
 445                         ERASEINFO(0x08000,1),
 446                         ERASEINFO(0x02000,2),
 447                         ERASEINFO(0x04000,1)
 448                 }
 449         }, {
 450                 .mfr_id         = MANUFACTURER_AMD,
 451                 .dev_id         = AM29F017D,
 452                 .name           = "AMD AM29F017D",
 453                 .uaddr          = {
 454                         [0] = MTD_UADDR_DONT_CARE     /* x8 */
 455                 },
 456                 .DevSize        = SIZE_2MiB,
 457                 .CmdSet         = P_ID_AMD_STD,
 458                 .NumEraseRegions= 1,
 459                 .regions        = {
 460                         ERASEINFO(0x10000,32),
 461                 }
 462         }, {
 463                 .mfr_id         = MANUFACTURER_AMD,
 464                 .dev_id         = AM29F016D,
 465                 .name           = "AMD AM29F016D",
 466                 .uaddr          = {
 467                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 468                 },
 469                 .DevSize        = SIZE_2MiB,
 470                 .CmdSet         = P_ID_AMD_STD,
 471                 .NumEraseRegions= 1,
 472                 .regions        = {
 473                         ERASEINFO(0x10000,32),
 474                 }
 475         }, {
 476                 .mfr_id         = MANUFACTURER_AMD,
 477                 .dev_id         = AM29F080,
 478                 .name           = "AMD AM29F080",
 479                 .uaddr          = {
 480                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 481                 },
 482                 .DevSize        = SIZE_1MiB,
 483                 .CmdSet         = P_ID_AMD_STD,
 484                 .NumEraseRegions= 1,
 485                 .regions        = {
 486                         ERASEINFO(0x10000,16),
 487                 }
 488         }, {
 489                 .mfr_id         = MANUFACTURER_AMD,
 490                 .dev_id         = AM29F040,
 491                 .name           = "AMD AM29F040",
 492                 .uaddr          = {
 493                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 494                 },
 495                 .DevSize        = SIZE_512KiB,
 496                 .CmdSet         = P_ID_AMD_STD,
 497                 .NumEraseRegions= 1,
 498                 .regions        = {
 499                         ERASEINFO(0x10000,8),
 500                 }
 501         }, {
 502                 .mfr_id         = MANUFACTURER_AMD,
 503                 .dev_id         = AM29LV040B,
 504                 .name           = "AMD AM29LV040B",
 505                 .uaddr          = {
 506                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
 507                 },
 508                 .DevSize        = SIZE_512KiB,
 509                 .CmdSet         = P_ID_AMD_STD,
 510                 .NumEraseRegions= 1,
 511                 .regions        = {
 512                         ERASEINFO(0x10000,8),
 513                 }
 514         }, {
 515                 .mfr_id = MANUFACTURER_AMD,
 516                 .dev_id = AM29F002T,
 517                 .name = "AMD AM29F002T",
 518                 .DevSize = SIZE_256KiB,
 519                 .NumEraseRegions = 4,
 520                 .regions = {ERASEINFO(0x10000,3),
 521                           ERASEINFO(0x08000,1),
 522                           ERASEINFO(0x02000,2),
 523                           ERASEINFO(0x04000,1)
 524                 }
 525         }, {
 526                 .mfr_id         = MANUFACTURER_ATMEL,
 527                 .dev_id         = AT49BV512,
 528                 .name           = "Atmel AT49BV512",
 529                 .uaddr          = {
 530                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
 531                 },
 532                 .DevSize        = SIZE_64KiB,
 533                 .CmdSet         = P_ID_AMD_STD,
 534                 .NumEraseRegions= 1,
 535                 .regions        = {
 536                         ERASEINFO(0x10000,1)
 537                 }
 538         }, {
 539                 .mfr_id         = MANUFACTURER_ATMEL,
 540                 .dev_id         = AT29LV512,
 541                 .name           = "Atmel AT29LV512",
 542                 .uaddr          = {
 543                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
 544                 },
 545                 .DevSize        = SIZE_64KiB,
 546                 .CmdSet         = P_ID_AMD_STD,
 547                 .NumEraseRegions= 1,
 548                 .regions        = {
 549                         ERASEINFO(0x80,256),
 550                         ERASEINFO(0x80,256)
 551                 }
 552         }, {
 553                 .mfr_id         = MANUFACTURER_ATMEL,
 554                 .dev_id         = AT49BV16X,
 555                 .name           = "Atmel AT49BV16X",
 556                 .uaddr          = {
 557                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 558                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 559                 },
 560                 .DevSize        = SIZE_2MiB,
 561                 .CmdSet         = P_ID_AMD_STD,
 562                 .NumEraseRegions= 2,
 563                 .regions        = {
 564                         ERASEINFO(0x02000,8),
 565                         ERASEINFO(0x10000,31)
 566                 }
 567         }, {
 568                 .mfr_id         = MANUFACTURER_ATMEL,
 569                 .dev_id         = AT49BV16XT,
 570                 .name           = "Atmel AT49BV16XT",
 571                 .uaddr          = {
 572                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 573                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 574                 },
 575                 .DevSize        = SIZE_2MiB,
 576                 .CmdSet         = P_ID_AMD_STD,
 577                 .NumEraseRegions= 2,
 578                 .regions        = {
 579                         ERASEINFO(0x10000,31),
 580                         ERASEINFO(0x02000,8)
 581                 }
 582         }, {
 583                 .mfr_id         = MANUFACTURER_ATMEL,
 584                 .dev_id         = AT49BV32X,
 585                 .name           = "Atmel AT49BV32X",
 586                 .uaddr          = {
 587                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 588                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 589                 },
 590                 .DevSize        = SIZE_4MiB,
 591                 .CmdSet         = P_ID_AMD_STD,
 592                 .NumEraseRegions= 2,
 593                 .regions        = {
 594                         ERASEINFO(0x02000,8),
 595                         ERASEINFO(0x10000,63)
 596                 }
 597         }, {
 598                 .mfr_id         = MANUFACTURER_ATMEL,
 599                 .dev_id         = AT49BV32XT,
 600                 .name           = "Atmel AT49BV32XT",
 601                 .uaddr          = {
 602                         [0] = MTD_UADDR_0x0555_0x0AAA,  /* x8 */
 603                         [1] = MTD_UADDR_0x0555_0x0AAA   /* x16 */
 604                 },
 605                 .DevSize        = SIZE_4MiB,
 606                 .CmdSet         = P_ID_AMD_STD,
 607                 .NumEraseRegions= 2,
 608                 .regions        = {
 609                         ERASEINFO(0x10000,63),
 610                         ERASEINFO(0x02000,8)
 611                 }
 612         }, {
 613                 .mfr_id         = MANUFACTURER_FUJITSU,
 614                 .dev_id         = MBM29F040C,
 615                 .name           = "Fujitsu MBM29F040C",
 616                 .uaddr          = {
 617                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
 618                 },
 619                 .DevSize        = SIZE_512KiB,
 620                 .CmdSet         = P_ID_AMD_STD,
 621                 .NumEraseRegions= 1,
 622                 .regions        = {
 623                         ERASEINFO(0x10000,8)
 624                 }
 625         }, {
 626                 .mfr_id         = MANUFACTURER_FUJITSU,
 627                 .dev_id         = MBM29LV650UE,
 628                 .name           = "Fujitsu MBM29LV650UE",
 629                 .uaddr          = {
 630                         [0] = MTD_UADDR_DONT_CARE     /* x16 */
 631                 },
 632                 .DevSize        = SIZE_8MiB,
 633                 .CmdSet         = P_ID_AMD_STD,
 634                 .NumEraseRegions= 1,
 635                 .regions        = {
 636                         ERASEINFO(0x10000,128)
 637                 }
 638         }, {
 639                 .mfr_id         = MANUFACTURER_FUJITSU,
 640                 .dev_id         = MBM29LV320TE,
 641                 .name           = "Fujitsu MBM29LV320TE",
 642                 .uaddr          = {
 643                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 644                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 645                 },
 646                 .DevSize        = SIZE_4MiB,
 647                 .CmdSet         = P_ID_AMD_STD,
 648                 .NumEraseRegions= 2,
 649                 .regions        = {
 650                         ERASEINFO(0x10000,63),
 651                         ERASEINFO(0x02000,8)
 652                 }
 653         }, {
 654                 .mfr_id         = MANUFACTURER_FUJITSU,
 655                 .dev_id         = MBM29LV320BE,
 656                 .name           = "Fujitsu MBM29LV320BE",
 657                 .uaddr          = {
 658                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 659                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 660                 },
 661                 .DevSize        = SIZE_4MiB,
 662                 .CmdSet         = P_ID_AMD_STD,
 663                 .NumEraseRegions= 2,
 664                 .regions        = {
 665                         ERASEINFO(0x02000,8),
 666                         ERASEINFO(0x10000,63)
 667                 }
 668         }, {
 669                 .mfr_id         = MANUFACTURER_FUJITSU,
 670                 .dev_id         = MBM29LV160TE,
 671                 .name           = "Fujitsu MBM29LV160TE",
 672                 .uaddr          = {
 673                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 674                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 675                 },
 676                 .DevSize        = SIZE_2MiB,
 677                 .CmdSet         = P_ID_AMD_STD,
 678                 .NumEraseRegions= 4,
 679                 .regions        = {
 680                         ERASEINFO(0x10000,31),
 681                         ERASEINFO(0x08000,1),
 682                         ERASEINFO(0x02000,2),
 683                         ERASEINFO(0x04000,1)
 684                 }
 685         }, {
 686                 .mfr_id         = MANUFACTURER_FUJITSU,
 687                 .dev_id         = MBM29LV160BE,
 688                 .name           = "Fujitsu MBM29LV160BE",
 689                 .uaddr          = {
 690                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 691                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 692                 },
 693                 .DevSize        = SIZE_2MiB,
 694                 .CmdSet         = P_ID_AMD_STD,
 695                 .NumEraseRegions= 4,
 696                 .regions        = {
 697                         ERASEINFO(0x04000,1),
 698                         ERASEINFO(0x02000,2),
 699                         ERASEINFO(0x08000,1),
 700                         ERASEINFO(0x10000,31)
 701                 }
 702         }, {
 703                 .mfr_id         = MANUFACTURER_FUJITSU,
 704                 .dev_id         = MBM29LV800BA,
 705                 .name           = "Fujitsu MBM29LV800BA",
 706                 .uaddr          = {
 707                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 708                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 709                 },
 710                 .DevSize        = SIZE_1MiB,
 711                 .CmdSet         = P_ID_AMD_STD,
 712                 .NumEraseRegions= 4,
 713                 .regions        = {
 714                         ERASEINFO(0x04000,1),
 715                         ERASEINFO(0x02000,2),
 716                         ERASEINFO(0x08000,1),
 717                         ERASEINFO(0x10000,15)
 718                 }
 719         }, {
 720                 .mfr_id         = MANUFACTURER_FUJITSU,
 721                 .dev_id         = MBM29LV800TA,
 722                 .name           = "Fujitsu MBM29LV800TA",
 723                 .uaddr          = {
 724                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 725                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 726                 },
 727                 .DevSize        = SIZE_1MiB,
 728                 .CmdSet         = P_ID_AMD_STD,
 729                 .NumEraseRegions= 4,
 730                 .regions        = {
 731                         ERASEINFO(0x10000,15),
 732                         ERASEINFO(0x08000,1),
 733                         ERASEINFO(0x02000,2),
 734                         ERASEINFO(0x04000,1)
 735                 }
 736         }, {
 737                 .mfr_id         = MANUFACTURER_FUJITSU,
 738                 .dev_id         = MBM29LV400BC,
 739                 .name           = "Fujitsu MBM29LV400BC",
 740                 .uaddr          = {
 741                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 742                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 743                 },
 744                 .DevSize        = SIZE_512KiB,
 745                 .CmdSet         = P_ID_AMD_STD,
 746                 .NumEraseRegions= 4,
 747                 .regions        = {
 748                         ERASEINFO(0x04000,1),
 749                         ERASEINFO(0x02000,2),
 750                         ERASEINFO(0x08000,1),
 751                         ERASEINFO(0x10000,7)
 752                 }
 753         }, {
 754                 .mfr_id         = MANUFACTURER_FUJITSU,
 755                 .dev_id         = MBM29LV400TC,
 756                 .name           = "Fujitsu MBM29LV400TC",
 757                 .uaddr          = {
 758                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
 759                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
 760                 },
 761                 .DevSize        = SIZE_512KiB,
 762                 .CmdSet         = P_ID_AMD_STD,
 763                 .NumEraseRegions= 4,
 764                 .regions        = {
 765                         ERASEINFO(0x10000,7),
 766                         ERASEINFO(0x08000,1),
 767                         ERASEINFO(0x02000,2),
 768                         ERASEINFO(0x04000,1)
 769                 }
 770         }, {
 771                 .mfr_id = MANUFACTURER_HYUNDAI,
 772                 .dev_id = HY29F002T,
 773                 .name = "Hyundai HY29F002T",
 774                 .DevSize = SIZE_256KiB,
 775                 .NumEraseRegions = 4,
 776                 .regions = {ERASEINFO(0x10000,3),
 777                           ERASEINFO(0x08000,1),
 778                           ERASEINFO(0x02000,2),
 779                           ERASEINFO(0x04000,1)
 780                 }
 781         }, {
 782                 .mfr_id         = MANUFACTURER_INTEL,
 783                 .dev_id         = I28F004B3B,
 784                 .name           = "Intel 28F004B3B",
 785                 .uaddr          = {
 786                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 787                 },
 788                 .DevSize        = SIZE_512KiB,
 789                 .CmdSet         = P_ID_INTEL_STD,
 790                 .NumEraseRegions= 2,
 791                 .regions        = {
 792                         ERASEINFO(0x02000, 8),
 793                         ERASEINFO(0x10000, 7),
 794                 }
 795         }, {
 796                 .mfr_id         = MANUFACTURER_INTEL,
 797                 .dev_id         = I28F004B3T,
 798                 .name           = "Intel 28F004B3T",
 799                 .uaddr          = {
 800                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 801                 },
 802                 .DevSize        = SIZE_512KiB,
 803                 .CmdSet         = P_ID_INTEL_STD,
 804                 .NumEraseRegions= 2,
 805                 .regions        = {
 806                         ERASEINFO(0x10000, 7),
 807                         ERASEINFO(0x02000, 8),
 808                 }
 809         }, {
 810                 .mfr_id         = MANUFACTURER_INTEL,
 811                 .dev_id         = I28F400B3B,
 812                 .name           = "Intel 28F400B3B",
 813                 .uaddr          = {
 814                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 815                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 816                 },
 817                 .DevSize        = SIZE_512KiB,
 818                 .CmdSet         = P_ID_INTEL_STD,
 819                 .NumEraseRegions= 2,
 820                 .regions        = {
 821                         ERASEINFO(0x02000, 8),
 822                         ERASEINFO(0x10000, 7),
 823                 }
 824         }, {
 825                 .mfr_id         = MANUFACTURER_INTEL,
 826                 .dev_id         = I28F400B3T,
 827                 .name           = "Intel 28F400B3T",
 828                 .uaddr          = {
 829                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 830                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 831                 },
 832                 .DevSize        = SIZE_512KiB,
 833                 .CmdSet         = P_ID_INTEL_STD,
 834                 .NumEraseRegions= 2,
 835                 .regions        = {
 836                         ERASEINFO(0x10000, 7),
 837                         ERASEINFO(0x02000, 8),
 838                 }
 839         }, {
 840                 .mfr_id         = MANUFACTURER_INTEL,
 841                 .dev_id         = I28F008B3B,
 842                 .name           = "Intel 28F008B3B",
 843                 .uaddr          = {
 844                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 845                 },
 846                 .DevSize        = SIZE_1MiB,
 847                 .CmdSet         = P_ID_INTEL_STD,
 848                 .NumEraseRegions= 2,
 849                 .regions        = {
 850                         ERASEINFO(0x02000, 8),
 851                         ERASEINFO(0x10000, 15),
 852                 }
 853         }, {
 854                 .mfr_id         = MANUFACTURER_INTEL,
 855                 .dev_id         = I28F008B3T,
 856                 .name           = "Intel 28F008B3T",
 857                 .uaddr          = {
 858                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 859                 },
 860                 .DevSize        = SIZE_1MiB,
 861                 .CmdSet         = P_ID_INTEL_STD,
 862                 .NumEraseRegions= 2,
 863                 .regions        = {
 864                         ERASEINFO(0x10000, 15),
 865                         ERASEINFO(0x02000, 8),
 866                 }
 867         }, {
 868                 .mfr_id         = MANUFACTURER_INTEL,
 869                 .dev_id         = I28F008S5,
 870                 .name           = "Intel 28F008S5",
 871                 .uaddr          = {
 872                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 873                 },
 874                 .DevSize        = SIZE_1MiB,
 875                 .CmdSet         = P_ID_INTEL_EXT,
 876                 .NumEraseRegions= 1,
 877                 .regions        = {
 878                         ERASEINFO(0x10000,16),
 879                 }
 880         }, {
 881                 .mfr_id         = MANUFACTURER_INTEL,
 882                 .dev_id         = I28F016S5,
 883                 .name           = "Intel 28F016S5",
 884                 .uaddr          = {
 885                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 886                 },
 887                 .DevSize        = SIZE_2MiB,
 888                 .CmdSet         = P_ID_INTEL_EXT,
 889                 .NumEraseRegions= 1,
 890                 .regions        = {
 891                         ERASEINFO(0x10000,32),
 892                 }
 893         }, {
 894                 .mfr_id         = MANUFACTURER_INTEL,
 895                 .dev_id         = I28F008SA,
 896                 .name           = "Intel 28F008SA",
 897                 .uaddr          = {
 898                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 899                 },
 900                 .DevSize        = SIZE_1MiB,
 901                 .CmdSet         = P_ID_INTEL_STD,
 902                 .NumEraseRegions= 1,
 903                 .regions        = {
 904                         ERASEINFO(0x10000, 16),
 905                 }
 906         }, {
 907                 .mfr_id         = MANUFACTURER_INTEL,
 908                 .dev_id         = I28F800B3B,
 909                 .name           = "Intel 28F800B3B",
 910                 .uaddr          = {
 911                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 912                 },
 913                 .DevSize        = SIZE_1MiB,
 914                 .CmdSet         = P_ID_INTEL_STD,
 915                 .NumEraseRegions= 2,
 916                 .regions        = {
 917                         ERASEINFO(0x02000, 8),
 918                         ERASEINFO(0x10000, 15),
 919                 }
 920         }, {
 921                 .mfr_id         = MANUFACTURER_INTEL,
 922                 .dev_id         = I28F800B3T,
 923                 .name           = "Intel 28F800B3T",
 924                 .uaddr          = {
 925                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 926                 },
 927                 .DevSize        = SIZE_1MiB,
 928                 .CmdSet         = P_ID_INTEL_STD,
 929                 .NumEraseRegions= 2,
 930                 .regions        = {
 931                         ERASEINFO(0x10000, 15),
 932                         ERASEINFO(0x02000, 8),
 933                 }
 934         }, {
 935                 .mfr_id         = MANUFACTURER_INTEL,
 936                 .dev_id         = I28F016B3B,
 937                 .name           = "Intel 28F016B3B",
 938                 .uaddr          = {
 939                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 940                 },
 941                 .DevSize        = SIZE_2MiB,
 942                 .CmdSet         = P_ID_INTEL_STD,
 943                 .NumEraseRegions= 2,
 944                 .regions        = {
 945                         ERASEINFO(0x02000, 8),
 946                         ERASEINFO(0x10000, 31),
 947                 }
 948         }, {
 949                 .mfr_id         = MANUFACTURER_INTEL,
 950                 .dev_id         = I28F016S3,
 951                 .name           = "Intel I28F016S3",
 952                 .uaddr          = {
 953                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 954                 },
 955                 .DevSize        = SIZE_2MiB,
 956                 .CmdSet         = P_ID_INTEL_STD,
 957                 .NumEraseRegions= 1,
 958                 .regions        = {
 959                         ERASEINFO(0x10000, 32),
 960                 }
 961         }, {
 962                 .mfr_id         = MANUFACTURER_INTEL,
 963                 .dev_id         = I28F016B3T,
 964                 .name           = "Intel 28F016B3T",
 965                 .uaddr          = {
 966                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
 967                 },
 968                 .DevSize        = SIZE_2MiB,
 969                 .CmdSet         = P_ID_INTEL_STD,
 970                 .NumEraseRegions= 2,
 971                 .regions        = {
 972                         ERASEINFO(0x10000, 31),
 973                         ERASEINFO(0x02000, 8),
 974                 }
 975         }, {
 976                 .mfr_id         = MANUFACTURER_INTEL,
 977                 .dev_id         = I28F160B3B,
 978                 .name           = "Intel 28F160B3B",
 979                 .uaddr          = {
 980                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 981                 },
 982                 .DevSize        = SIZE_2MiB,
 983                 .CmdSet         = P_ID_INTEL_STD,
 984                 .NumEraseRegions= 2,
 985                 .regions        = {
 986                         ERASEINFO(0x02000, 8),
 987                         ERASEINFO(0x10000, 31),
 988                 }
 989         }, {
 990                 .mfr_id         = MANUFACTURER_INTEL,
 991                 .dev_id         = I28F160B3T,
 992                 .name           = "Intel 28F160B3T",
 993                 .uaddr          = {
 994                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
 995                 },
 996                 .DevSize        = SIZE_2MiB,
 997                 .CmdSet         = P_ID_INTEL_STD,
 998                 .NumEraseRegions= 2,
 999                 .regions        = {
1000                         ERASEINFO(0x10000, 31),
1001                         ERASEINFO(0x02000, 8),
1002                 }
1003         }, {
1004                 .mfr_id         = MANUFACTURER_INTEL,
1005                 .dev_id         = I28F320B3B,
1006                 .name           = "Intel 28F320B3B",
1007                 .uaddr          = {
1008                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1009                 },
1010                 .DevSize        = SIZE_4MiB,
1011                 .CmdSet         = P_ID_INTEL_STD,
1012                 .NumEraseRegions= 2,
1013                 .regions        = {
1014                         ERASEINFO(0x02000, 8),
1015                         ERASEINFO(0x10000, 63),
1016                 }
1017         }, {
1018                 .mfr_id         = MANUFACTURER_INTEL,
1019                 .dev_id         = I28F320B3T,
1020                 .name           = "Intel 28F320B3T",
1021                 .uaddr          = {
1022                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1023                 },
1024                 .DevSize        = SIZE_4MiB,
1025                 .CmdSet         = P_ID_INTEL_STD,
1026                 .NumEraseRegions= 2,
1027                 .regions        = {
1028                         ERASEINFO(0x10000, 63),
1029                         ERASEINFO(0x02000, 8),
1030                 }
1031         }, {
1032                 .mfr_id         = MANUFACTURER_INTEL,
1033                 .dev_id         = I28F640B3B,
1034                 .name           = "Intel 28F640B3B",
1035                 .uaddr          = {
1036                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1037                 },
1038                 .DevSize        = SIZE_8MiB,
1039                 .CmdSet         = P_ID_INTEL_STD,
1040                 .NumEraseRegions= 2,
1041                 .regions        = {
1042                         ERASEINFO(0x02000, 8),
1043                         ERASEINFO(0x10000, 127),
1044                 }
1045         }, {
1046                 .mfr_id         = MANUFACTURER_INTEL,
1047                 .dev_id         = I28F640B3T,
1048                 .name           = "Intel 28F640B3T",
1049                 .uaddr          = {
1050                         [1] = MTD_UADDR_UNNECESSARY,    /* x16 */
1051                 },
1052                 .DevSize        = SIZE_8MiB,
1053                 .CmdSet         = P_ID_INTEL_STD,
1054                 .NumEraseRegions= 2,
1055                 .regions        = {
1056                         ERASEINFO(0x10000, 127),
1057                         ERASEINFO(0x02000, 8),
1058                 }
1059         }, {
1060                 .mfr_id         = MANUFACTURER_INTEL,
1061                 .dev_id         = I82802AB,
1062                 .name           = "Intel 82802AB",
1063                 .uaddr          = {
1064                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1065                 },
1066                 .DevSize        = SIZE_512KiB,
1067                 .CmdSet         = P_ID_INTEL_EXT,
1068                 .NumEraseRegions= 1,
1069                 .regions        = {
1070                         ERASEINFO(0x10000,8),
1071                 }
1072         }, {
1073                 .mfr_id         = MANUFACTURER_INTEL,
1074                 .dev_id         = I82802AC,
1075                 .name           = "Intel 82802AC",
1076                 .uaddr          = {
1077                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1078                 },
1079                 .DevSize        = SIZE_1MiB,
1080                 .CmdSet         = P_ID_INTEL_EXT,
1081                 .NumEraseRegions= 1,
1082                 .regions        = {
1083                         ERASEINFO(0x10000,16),
1084                 }
1085         }, {
1086                 .mfr_id         = MANUFACTURER_MACRONIX,
1087                 .dev_id         = MX29LV160T,
1088                 .name           = "MXIC MX29LV160T",
1089                 .uaddr          = {
1090                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
1091                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1092                 },
1093                 .DevSize        = SIZE_2MiB,
1094                 .CmdSet         = P_ID_AMD_STD,
1095                 .NumEraseRegions= 4,
1096                 .regions        = {
1097                         ERASEINFO(0x10000,31),
1098                         ERASEINFO(0x08000,1),
1099                         ERASEINFO(0x02000,2),
1100                         ERASEINFO(0x04000,1)
1101                 }
1102         }, {
1103                 .mfr_id         = MANUFACTURER_MACRONIX,
1104                 .dev_id         = MX29LV160B,
1105                 .name           = "MXIC MX29LV160B",
1106                 .uaddr          = {
1107                         [0] = MTD_UADDR_0x0AAA_0x0555,  /* x8 */
1108                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1109                 },
1110                 .DevSize        = SIZE_2MiB,
1111                 .CmdSet         = P_ID_AMD_STD,
1112                 .NumEraseRegions= 4,
1113                 .regions        = {
1114                         ERASEINFO(0x04000,1),
1115                         ERASEINFO(0x02000,2),
1116                         ERASEINFO(0x08000,1),
1117                         ERASEINFO(0x10000,31)
1118                 }
1119         }, {
1120                 .mfr_id         = MANUFACTURER_MACRONIX,
1121                 .dev_id         = MX29F016,
1122                 .name           = "Macronix MX29F016",
1123                 .uaddr          = {
1124                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1125                 },
1126                 .DevSize        = SIZE_2MiB,
1127                 .CmdSet         = P_ID_AMD_STD,
1128                 .NumEraseRegions= 1,
1129                 .regions        = {
1130                         ERASEINFO(0x10000,32),
1131                 }
1132         }, {
1133                 .mfr_id         = MANUFACTURER_MACRONIX,
1134                 .dev_id         = MX29F004T,
1135                 .name           = "Macronix MX29F004T",
1136                 .uaddr          = {
1137                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1138                 },
1139                 .DevSize        = SIZE_512KiB,
1140                 .CmdSet         = P_ID_AMD_STD,
1141                 .NumEraseRegions= 4,
1142                 .regions        = {
1143                         ERASEINFO(0x10000,7),
1144                         ERASEINFO(0x08000,1),
1145                         ERASEINFO(0x02000,2),
1146                         ERASEINFO(0x04000,1),
1147                 }
1148         }, {
1149                 .mfr_id         = MANUFACTURER_MACRONIX,
1150                 .dev_id         = MX29F004B,
1151                 .name           = "Macronix MX29F004B",
1152                 .uaddr          = {
1153                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1154                 },
1155                 .DevSize        = SIZE_512KiB,
1156                 .CmdSet         = P_ID_AMD_STD,
1157                 .NumEraseRegions= 4,
1158                 .regions        = {
1159                         ERASEINFO(0x04000,1),
1160                         ERASEINFO(0x02000,2),
1161                         ERASEINFO(0x08000,1),
1162                         ERASEINFO(0x10000,7),
1163                 }
1164         }, {
1165                 .mfr_id = MANUFACTURER_MACRONIX,
1166                 .dev_id = MX29F002T,
1167                 .name = "Macronix MX29F002T",
1168                 .DevSize = SIZE_256KiB,
1169                 .NumEraseRegions = 4,
1170                 .regions = {ERASEINFO(0x10000,3),
1171                           ERASEINFO(0x08000,1),
1172                           ERASEINFO(0x02000,2),
1173                           ERASEINFO(0x04000,1)
1174                 }
1175         }, {
1176                 .mfr_id         = MANUFACTURER_PMC,
1177                 .dev_id         = PM49FL002,
1178                 .name           = "PMC Pm49FL002",
1179                 .uaddr          = {
1180                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1181                 },
1182                 .DevSize        = SIZE_256KiB,
1183                 .CmdSet         = P_ID_AMD_STD,
1184                 .NumEraseRegions= 1,
1185                 .regions        = {
1186                         ERASEINFO( 0x01000, 64 )
1187                 }
1188         }, {
1189                 .mfr_id         = MANUFACTURER_PMC,
1190                 .dev_id         = PM49FL004,
1191                 .name           = "PMC Pm49FL004",
1192                 .uaddr          = {
1193                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1194                 },
1195                 .DevSize        = SIZE_512KiB,
1196                 .CmdSet         = P_ID_AMD_STD,
1197                 .NumEraseRegions= 1,
1198                 .regions        = {
1199                         ERASEINFO( 0x01000, 128 )
1200                 }
1201         }, {
1202                 .mfr_id         = MANUFACTURER_PMC,
1203                 .dev_id         = PM49FL008,
1204                 .name           = "PMC Pm49FL008",
1205                 .uaddr          = {
1206                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1207                 },
1208                 .DevSize        = SIZE_1MiB,
1209                 .CmdSet         = P_ID_AMD_STD,
1210                 .NumEraseRegions= 1,
1211                 .regions        = {
1212                         ERASEINFO( 0x01000, 256 )
1213                 }
1214         }, {
1215                 .mfr_id         = MANUFACTURER_SST,
1216                 .dev_id         = SST39LF512,
1217                 .name           = "SST 39LF512",
1218                 .uaddr          = {
1219                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1220                 },
1221                 .DevSize        = SIZE_64KiB,
1222                 .CmdSet         = P_ID_AMD_STD,
1223                 .NumEraseRegions= 1,
1224                 .regions        = {
1225                         ERASEINFO(0x01000,16),
1226                 }
1227         }, {
1228                 .mfr_id         = MANUFACTURER_SST,
1229                 .dev_id         = SST39LF010,
1230                 .name           = "SST 39LF010",
1231                 .uaddr          = {
1232                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1233                 },
1234                 .DevSize        = SIZE_128KiB,
1235                 .CmdSet         = P_ID_AMD_STD,
1236                 .NumEraseRegions= 1,
1237                 .regions        = {
1238                         ERASEINFO(0x01000,32),
1239                 }
1240         }, {
1241                 .mfr_id         = MANUFACTURER_SST,
1242                 .dev_id         = SST29EE020,
1243                 .name           = "SST 29EE020",
1244                 .uaddr          = {
1245                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1246                 },
1247                 .DevSize        = SIZE_256KiB,
1248                 .CmdSet         = P_ID_SST_PAGE,
1249                 .NumEraseRegions= 1,
1250                 .regions = {ERASEINFO(0x01000,64),
1251                 }
1252          }, {
1253                 .mfr_id         = MANUFACTURER_SST,
1254                 .dev_id         = SST29LE020,
1255                 .name           = "SST 29LE020",
1256                 .uaddr          = {
1257                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1258                 },
1259                 .DevSize        = SIZE_256KiB,
1260                 .CmdSet         = P_ID_SST_PAGE,
1261                 .NumEraseRegions= 1,
1262                 .regions = {ERASEINFO(0x01000,64),
1263                 }
1264         }, {
1265                 .mfr_id         = MANUFACTURER_SST,
1266                 .dev_id         = SST39LF020,
1267                 .name           = "SST 39LF020",
1268                 .uaddr          = {
1269                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1270                 },
1271                 .DevSize        = SIZE_256KiB,
1272                 .CmdSet         = P_ID_AMD_STD,
1273                 .NumEraseRegions= 1,
1274                 .regions        = {
1275                         ERASEINFO(0x01000,64),
1276                 }
1277         }, {
1278                 .mfr_id         = MANUFACTURER_SST,
1279                 .dev_id         = SST39LF040,
1280                 .name           = "SST 39LF040",
1281                 .uaddr          = {
1282                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1283                 },
1284                 .DevSize        = SIZE_512KiB,
1285                 .CmdSet         = P_ID_AMD_STD,
1286                 .NumEraseRegions= 1,
1287                 .regions        = {
1288                         ERASEINFO(0x01000,128),
1289                 }
1290         }, {
1291                 .mfr_id         = MANUFACTURER_SST,
1292                 .dev_id         = SST39SF010A,
1293                 .name           = "SST 39SF010A",
1294                 .uaddr          = {
1295                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1296                 },
1297                 .DevSize        = SIZE_128KiB,
1298                 .CmdSet         = P_ID_AMD_STD,
1299                 .NumEraseRegions= 1,
1300                 .regions        = {
1301                         ERASEINFO(0x01000,32),
1302                 }
1303         }, {
1304                 .mfr_id         = MANUFACTURER_SST,
1305                 .dev_id         = SST39SF020A,
1306                 .name           = "SST 39SF020A",
1307                 .uaddr          = {
1308                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1309                 },
1310                 .DevSize        = SIZE_256KiB,
1311                 .CmdSet         = P_ID_AMD_STD,
1312                 .NumEraseRegions= 1,
1313                 .regions        = {
1314                         ERASEINFO(0x01000,64),
1315                 }
1316         }, {
1317                 .mfr_id         = MANUFACTURER_SST,
1318                 .dev_id         = SST49LF004B,
1319                 .name           = "SST 49LF004B",
1320                 .uaddr          = {
1321                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1322                 },
1323                 .DevSize        = SIZE_512KiB,
1324                 .CmdSet         = P_ID_AMD_STD,
1325                 .NumEraseRegions= 1,
1326                 .regions        = {
1327                         ERASEINFO(0x01000,128),
1328                 }
1329         }, {
1330                 .mfr_id         = MANUFACTURER_SST,
1331                 .dev_id         = SST49LF008A,
1332                 .name           = "SST 49LF008A",
1333                 .uaddr          = {
1334                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1335                 },
1336                 .DevSize        = SIZE_1MiB,
1337                 .CmdSet         = P_ID_AMD_STD,
1338                 .NumEraseRegions= 1,
1339                 .regions        = {
1340                         ERASEINFO(0x01000,256),
1341                 }
1342         }, {
1343                 .mfr_id         = MANUFACTURER_SST,
1344                 .dev_id         = SST49LF030A,
1345                 .name           = "SST 49LF030A",
1346                 .uaddr          = {
1347                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1348                 },
1349                 .DevSize        = SIZE_512KiB,
1350                 .CmdSet         = P_ID_AMD_STD,
1351                 .NumEraseRegions= 1,
1352                 .regions        = {
1353                         ERASEINFO(0x01000,96),
1354                 }
1355         }, {
1356                 .mfr_id         = MANUFACTURER_SST,
1357                 .dev_id         = SST49LF040A,
1358                 .name           = "SST 49LF040A",
1359                 .uaddr          = {
1360                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1361                 },
1362                 .DevSize        = SIZE_512KiB,
1363                 .CmdSet         = P_ID_AMD_STD,
1364                 .NumEraseRegions= 1,
1365                 .regions        = {
1366                         ERASEINFO(0x01000,128),
1367                 }
1368         }, {
1369                 .mfr_id         = MANUFACTURER_SST,
1370                 .dev_id         = SST49LF080A,
1371                 .name           = "SST 49LF080A",
1372                 .uaddr          = {
1373                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1374                 },
1375                 .DevSize        = SIZE_1MiB,
1376                 .CmdSet         = P_ID_AMD_STD,
1377                 .NumEraseRegions= 1,
1378                 .regions        = {
1379                         ERASEINFO(0x01000,256),
1380                 }
1381         }, {
1382                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1383                 .dev_id         = M29W800DT,
1384                 .name           = "ST M29W800DT",
1385                 .uaddr          = {
1386                         [0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
1387                         [1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
1388                 },
1389                 .DevSize        = SIZE_1MiB,
1390                 .CmdSet         = P_ID_AMD_STD,
1391                 .NumEraseRegions= 4,
1392                 .regions        = {
1393                         ERASEINFO(0x10000,15),
1394                         ERASEINFO(0x08000,1),
1395                         ERASEINFO(0x02000,2),
1396                         ERASEINFO(0x04000,1)
1397                 }
1398         }, {
1399                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1400                 .dev_id         = M29W800DB,
1401                 .name           = "ST M29W800DB",
1402                 .uaddr          = {
1403                         [0] = MTD_UADDR_0x5555_0x2AAA,  /* x8 */
1404                         [1] = MTD_UADDR_0x5555_0x2AAA   /* x16 */
1405                 },
1406                 .DevSize        = SIZE_1MiB,
1407                 .CmdSet         = P_ID_AMD_STD,
1408                 .NumEraseRegions= 4,
1409                 .regions        = {
1410                         ERASEINFO(0x04000,1),
1411                         ERASEINFO(0x02000,2),
1412                         ERASEINFO(0x08000,1),
1413                         ERASEINFO(0x10000,15)
1414                 }
1415         }, {
1416                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1417                 .dev_id         = M29W160DT,
1418                 .name           = "ST M29W160DT",
1419                 .uaddr          = {
1420                         [0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
1421                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1422                 },
1423                 .DevSize        = SIZE_2MiB,
1424                 .CmdSet         = P_ID_AMD_STD,
1425                 .NumEraseRegions= 4,
1426                 .regions        = {
1427                         ERASEINFO(0x10000,31),
1428                         ERASEINFO(0x08000,1),
1429                         ERASEINFO(0x02000,2),
1430                         ERASEINFO(0x04000,1)
1431                 }
1432         }, {
1433                 .mfr_id         = MANUFACTURER_ST,      /* FIXME - CFI device? */
1434                 .dev_id         = M29W160DB,
1435                 .name           = "ST M29W160DB",
1436                 .uaddr          = {
1437                         [0] = MTD_UADDR_0x0555_0x02AA,  /* x8 */
1438                         [1] = MTD_UADDR_0x0555_0x02AA,  /* x16 */
1439                 },
1440                 .DevSize        = SIZE_2MiB,
1441                 .CmdSet         = P_ID_AMD_STD,
1442                 .NumEraseRegions= 4,
1443                 .regions        = {
1444                         ERASEINFO(0x04000,1),
1445                         ERASEINFO(0x02000,2),
1446                         ERASEINFO(0x08000,1),
1447                         ERASEINFO(0x10000,31)
1448                 }
1449         }, {
1450                 .mfr_id         = MANUFACTURER_ST,
1451                 .dev_id         = M29W040B,
1452                 .name           = "ST M29W040B",
1453                 .uaddr          = {
1454                         [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
1455                 },
1456                 .DevSize        = SIZE_512KiB,
1457                 .CmdSet         = P_ID_AMD_STD,
1458                 .NumEraseRegions= 1,
1459                 .regions        = {
1460                         ERASEINFO(0x10000,8),
1461                 }
1462         }, {
1463                 .mfr_id         = MANUFACTURER_ST,
1464                 .dev_id         = M50FW040,
1465                 .name           = "ST M50FW040",
1466                 .uaddr          = {
1467                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1468                 },
1469                 .DevSize        = SIZE_512KiB,
1470                 .CmdSet         = P_ID_INTEL_EXT,
1471                 .NumEraseRegions= 1,
1472                 .regions        = {
1473                         ERASEINFO(0x10000,8),
1474                 }
1475         }, {
1476                 .mfr_id         = MANUFACTURER_ST,
1477                 .dev_id         = M50FW080,
1478                 .name           = "ST M50FW080",
1479                 .uaddr          = {
1480                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1481                 },
1482                 .DevSize        = SIZE_1MiB,
1483                 .CmdSet         = P_ID_INTEL_EXT,
1484                 .NumEraseRegions= 1,
1485                 .regions        = {
1486                         ERASEINFO(0x10000,16),
1487                 }
1488         }, {
1489                 .mfr_id         = MANUFACTURER_ST,
1490                 .dev_id         = M50FW016,
1491                 .name           = "ST M50FW016",
1492                 .uaddr          = {
1493                         [0] = MTD_UADDR_UNNECESSARY,    /* x8 */
1494                 },
1495                 .DevSize        = SIZE_2MiB,
1496                 .CmdSet         = P_ID_INTEL_EXT,
1497                 .NumEraseRegions= 1,
1498                 .regions        = {
1499                         ERASEINFO(0x10000,32),
1500                 }
1501         }, {
1502                 .mfr_id         = MANUFACTURER_TOSHIBA,
1503                 .dev_id         = TC58FVT160,
1504                 .name           = "Toshiba TC58FVT160",
1505                 .uaddr          = {
1506                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1507                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1508                 },
1509                 .DevSize        = SIZE_2MiB,
1510                 .CmdSet         = P_ID_AMD_STD,
1511                 .NumEraseRegions= 4,
1512                 .regions        = {
1513                         ERASEINFO(0x10000,31),
1514                         ERASEINFO(0x08000,1),
1515                         ERASEINFO(0x02000,2),
1516                         ERASEINFO(0x04000,1)
1517                 }
1518         }, {
1519                 .mfr_id         = MANUFACTURER_TOSHIBA,
1520                 .dev_id         = TC58FVB160,
1521                 .name           = "Toshiba TC58FVB160",
1522                 .uaddr          = {
1523                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1524                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1525                 },
1526                 .DevSize        = SIZE_2MiB,
1527                 .CmdSet         = P_ID_AMD_STD,
1528                 .NumEraseRegions= 4,
1529                 .regions        = {
1530                         ERASEINFO(0x04000,1),
1531                         ERASEINFO(0x02000,2),
1532                         ERASEINFO(0x08000,1),
1533                         ERASEINFO(0x10000,31)
1534                 }
1535         }, {
1536                 .mfr_id         = MANUFACTURER_TOSHIBA,
1537                 .dev_id         = TC58FVB321,
1538                 .name           = "Toshiba TC58FVB321",
1539                 .uaddr          = {
1540                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1541                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1542                 },
1543                 .DevSize        = SIZE_4MiB,
1544                 .CmdSet         = P_ID_AMD_STD,
1545                 .NumEraseRegions= 2,
1546                 .regions        = {
1547                         ERASEINFO(0x02000,8),
1548                         ERASEINFO(0x10000,63)
1549                 }
1550         }, {
1551                 .mfr_id         = MANUFACTURER_TOSHIBA,
1552                 .dev_id         = TC58FVT321,
1553                 .name           = "Toshiba TC58FVT321",
1554                 .uaddr          = {
1555                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1556                         [1] = MTD_UADDR_0x0555_0x02AA  /* x16 */
1557                 },
1558                 .DevSize        = SIZE_4MiB,
1559                 .CmdSet         = P_ID_AMD_STD,
1560                 .NumEraseRegions= 2,
1561                 .regions        = {
1562                         ERASEINFO(0x10000,63),
1563                         ERASEINFO(0x02000,8)
1564                 }
1565         }, {
1566                 .mfr_id         = MANUFACTURER_TOSHIBA,
1567                 .dev_id         = TC58FVB641,
1568                 .name           = "Toshiba TC58FVB641",
1569                 .uaddr          = {
1570                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1571                         [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
1572                 },
1573                 .DevSize        = SIZE_8MiB,
1574                 .CmdSet         = P_ID_AMD_STD,
1575                 .NumEraseRegions= 2,
1576                 .regions        = {
1577                         ERASEINFO(0x02000,8),
1578                         ERASEINFO(0x10000,127)
1579                 }
1580         }, {
1581                 .mfr_id         = MANUFACTURER_TOSHIBA,
1582                 .dev_id         = TC58FVT641,
1583                 .name           = "Toshiba TC58FVT641",
1584                 .uaddr          = {
1585                         [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */
1586                         [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */
1587                 },
1588                 .DevSize        = SIZE_8MiB,
1589                 .CmdSet         = P_ID_AMD_STD,
1590                 .NumEraseRegions= 2,
1591                 .regions        = {
1592                         ERASEINFO(0x10000,127),
1593                         ERASEINFO(0x02000,8)
1594                 }
1595         }, {
1596                 .mfr_id         = MANUFACTURER_WINBOND,
1597                 .dev_id         = W49V002A,
1598                 .name           = "Winbond W49V002A",
1599                 .uaddr          = {
1600                         [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
1601                 },
1602                 .DevSize        = SIZE_256KiB,
1603                 .CmdSet         = P_ID_AMD_STD,
1604                 .NumEraseRegions= 4,
1605                 .regions        = {
1606                         ERASEINFO(0x10000, 3),
1607                         ERASEINFO(0x08000, 1),
1608                         ERASEINFO(0x02000, 2),
1609                         ERASEINFO(0x04000, 1),
1610                 }
1611         }
1612 };
1613
1614
1615 static int cfi_jedec_setup(struct cfi_private *p_cfi, int index);
1616
1617 static int jedec_probe_chip(struct map_info *map, __u32 base,
1618                             unsigned long *chip_map, struct cfi_private *cfi);
1619
1620 struct mtd_info *jedec_probe(struct map_info *map);
1621
1622 static inline u32 jedec_read_mfr(struct map_info *map, __u32 base,
1623         struct cfi_private *cfi)
1624 {
1625         map_word result;
1626         unsigned long mask;
1627         mask = (1 << (cfi->device_type * 8)) -1;
1628         result = map_read(map, base);
1629         return result.x[0] & mask;
1630 }
1631
1632 static inline u32 jedec_read_id(struct map_info *map, __u32 base,
1633         struct cfi_private *cfi)
1634 {
1635         int osf;
1636         map_word result;
1637         unsigned long mask;
1638         osf = cfi->interleave *cfi->device_type;
1639         mask = (1 << (cfi->device_type * 8)) -1;
1640         result = map_read(map, base + osf);
1641         return result.x[0] & mask;
1642 }
1643
1644 static inline void jedec_reset(u32 base, struct map_info *map,
1645         struct cfi_private *cfi)
1646 {
1647         /* Reset */
1648
1649         /* after checking the datasheets for SST, MACRONIX and ATMEL
1650          * (oh and incidentaly the jedec spec - 3.5.3.3) the reset
1651          * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
1652          * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
1653          * as they will ignore the writes and dont care what address
1654          * the F0 is written to */
1655         if(cfi->addr_unlock1) {
1656                 /*printk("reset unlock called %x %x \n",cfi->addr_unlock1,cfi->addr_unlock2);*/
1657                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1658                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1659         }
1660
1661         cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1662         /* Some misdesigned intel chips do not respond for 0xF0 for a reset,
1663          * so ensure we're in read mode.  Send both the Intel and the AMD command
1664          * for this.  Intel uses 0xff for this, AMD uses 0xff for NOP, so
1665          * this should be safe.
1666          */
1667         cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
1668         /* FIXME - should have reset delay before continuing */
1669 }
1670
1671
1672 static inline __u8 finfo_uaddr(const struct amd_flash_info *finfo, int device_type)
1673 {
1674         int uaddr_idx;
1675         __u8 uaddr = MTD_UADDR_NOT_SUPPORTED;
1676
1677         switch ( device_type ) {
1678         case CFI_DEVICETYPE_X8:  uaddr_idx = 0; break;
1679         case CFI_DEVICETYPE_X16: uaddr_idx = 1; break;
1680         case CFI_DEVICETYPE_X32: uaddr_idx = 2; break;
1681         default:
1682                 printk(KERN_NOTICE "MTD: %s(): unknown device_type %d\n",
1683                        __func__, device_type);
1684                 goto uaddr_done;
1685         }
1686
1687         uaddr = finfo->uaddr[uaddr_idx];
1688
1689         if (uaddr != MTD_UADDR_NOT_SUPPORTED ) {
1690                 /* ASSERT("The unlock addresses for non-8-bit mode
1691                    are bollocks. We don't really need an array."); */
1692                 uaddr = finfo->uaddr[0];
1693         }
1694
1695  uaddr_done:
1696         return uaddr;
1697 }
1698
1699
1700 static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1701 {
1702         int i,num_erase_regions;
1703         unsigned long mask;
1704         __u8 uaddr;
1705
1706         printk("Found: %s\n",jedec_table[index].name);
1707
1708         num_erase_regions = jedec_table[index].NumEraseRegions;
1709
1710         p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
1711         if (!p_cfi->cfiq) {
1712                 //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
1713                 return 0;
1714         }
1715
1716         memset(p_cfi->cfiq,0,sizeof(struct cfi_ident));
1717
1718         p_cfi->cfiq->P_ID = jedec_table[index].CmdSet;
1719         p_cfi->cfiq->NumEraseRegions = jedec_table[index].NumEraseRegions;
1720         p_cfi->cfiq->DevSize = jedec_table[index].DevSize;
1721         p_cfi->cfi_mode = CFI_MODE_JEDEC;
1722
1723         for (i=0; i<num_erase_regions; i++){
1724                 p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i];
1725         }
1726         p_cfi->cmdset_priv = NULL;
1727
1728         /* This may be redundant for some cases, but it doesn't hurt */
1729         p_cfi->mfr = jedec_table[index].mfr_id;
1730         p_cfi->id = jedec_table[index].dev_id;
1731
1732         uaddr = finfo_uaddr(&jedec_table[index], p_cfi->device_type);
1733         if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
1734                 kfree( p_cfi->cfiq );
1735                 return 0;
1736         }
1737
1738         /* Mask out address bits which are smaller than the device type */
1739         mask = ~(p_cfi->device_type-1);
1740         p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 & mask;
1741         p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 & mask;
1742
1743         return 1;       /* ok */
1744 }
1745
1746
1747 /*
1748  * There is a BIG problem properly ID'ing the JEDEC devic and guaranteeing
1749  * the mapped address, unlock addresses, and proper chip ID.  This function
1750  * attempts to minimize errors.  It is doubtfull that this probe will ever
1751  * be perfect - consequently there should be some module parameters that
1752  * could be manually specified to force the chip info.
1753  */
1754 static inline int jedec_match( __u32 base,
1755                                struct map_info *map,
1756                                struct cfi_private *cfi,
1757                                const struct amd_flash_info *finfo )
1758 {
1759         int rc = 0;           /* failure until all tests pass */
1760         u32 mfr, id;
1761         __u8 uaddr;
1762         unsigned long mask;
1763
1764         /*
1765          * The IDs must match.  For X16 and X32 devices operating in
1766          * a lower width ( X8 or X16 ), the device ID's are usually just
1767          * the lower byte(s) of the larger device ID for wider mode.  If
1768          * a part is found that doesn't fit this assumption (device id for
1769          * smaller width mode is completely unrealated to full-width mode)
1770          * then the jedec_table[] will have to be augmented with the IDs
1771          * for different widths.
1772          */
1773         switch (cfi->device_type) {
1774         case CFI_DEVICETYPE_X8:
1775                 mfr = (__u8)finfo->mfr_id;
1776                 id = (__u8)finfo->dev_id;
1777                 break;
1778         case CFI_DEVICETYPE_X16:
1779                 mfr = (__u16)finfo->mfr_id;
1780                 id = (__u16)finfo->dev_id;
1781                 break;
1782         case CFI_DEVICETYPE_X32:
1783                 mfr = (__u16)finfo->mfr_id;
1784                 id = (__u32)finfo->dev_id;
1785                 break;
1786         default:
1787                 printk(KERN_WARNING
1788                        "MTD %s(): Unsupported device type %d\n",
1789                        __func__, cfi->device_type);
1790                 goto match_done;
1791         }
1792         if ( cfi->mfr != mfr || cfi->id != id ) {
1793                 goto match_done;
1794         }
1795
1796         /* the part size must fit in the memory window */
1797         DEBUG( MTD_DEBUG_LEVEL3,
1798                "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
1799                __func__, base, 1 << finfo->DevSize, base + (1 << finfo->DevSize) );
1800         if ( base + cfi->interleave * ( 1 << finfo->DevSize ) > map->size ) {
1801                 DEBUG( MTD_DEBUG_LEVEL3,
1802                        "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
1803                        __func__, finfo->mfr_id, finfo->dev_id,
1804                        1 << finfo->DevSize );
1805                 goto match_done;
1806         }
1807
1808         uaddr = finfo_uaddr(finfo, cfi->device_type);
1809         if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
1810                 goto match_done;
1811         }
1812
1813         mask = ~(cfi->device_type-1);
1814
1815         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
1816                __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
1817         if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
1818              && ( (unlock_addrs[uaddr].addr1 & mask) != cfi->addr_unlock1 ||
1819                   (unlock_addrs[uaddr].addr2 & mask) != cfi->addr_unlock2 ) ) {
1820                 DEBUG( MTD_DEBUG_LEVEL3,
1821                        "MTD %s(): 0x%.4lx 0x%.4lx did not match\n",
1822                        __func__,
1823                        unlock_addrs[uaddr].addr1 & mask,
1824                        unlock_addrs[uaddr].addr2 & mask);
1825                 goto match_done;
1826         }
1827
1828         /*
1829          * Make sure the ID's dissappear when the device is taken out of
1830          * ID mode.  The only time this should fail when it should succeed
1831          * is when the ID's are written as data to the same
1832          * addresses.  For this rare and unfortunate case the chip
1833          * cannot be probed correctly.
1834          * FIXME - write a driver that takes all of the chip info as
1835          * module parameters, doesn't probe but forces a load.
1836          */
1837         DEBUG( MTD_DEBUG_LEVEL3,
1838                "MTD %s(): check ID's disappear when not in ID mode\n",
1839                __func__ );
1840         jedec_reset( base, map, cfi );
1841         mfr = jedec_read_mfr( map, base, cfi );
1842         id = jedec_read_id( map, base, cfi );
1843         if ( mfr == cfi->mfr && id == cfi->id ) {
1844                 DEBUG( MTD_DEBUG_LEVEL3,
1845                        "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
1846                        "You might need to manually specify JEDEC parameters.\n",
1847                         __func__, cfi->mfr, cfi->id );
1848                 goto match_done;
1849         }
1850
1851         /* all tests passed - mark  as success */
1852         rc = 1;
1853
1854         /*
1855          * Put the device back in ID mode - only need to do this if we
1856          * were truly frobbing a real device.
1857          */
1858         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
1859         if(cfi->addr_unlock1) {
1860                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1861                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1862         }
1863         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1864         /* FIXME - should have a delay before continuing */
1865
1866  match_done:
1867         return rc;
1868 }
1869
1870
1871 static int jedec_probe_chip(struct map_info *map, __u32 base,
1872                             unsigned long *chip_map, struct cfi_private *cfi)
1873 {
1874         int i;
1875         enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
1876
1877  retry:
1878         if (!cfi->numchips) {
1879                 unsigned long mask = ~(cfi->device_type-1);
1880
1881                 uaddr_idx++;
1882
1883                 if (MTD_UADDR_UNNECESSARY == uaddr_idx)
1884                         return 0;
1885
1886                 /* Mask out address bits which are smaller than the device type */
1887                 cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 & mask;
1888                 cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 & mask;
1889         }
1890
1891         /* Make certain we aren't probing past the end of map */
1892         if (base >= map->size) {
1893                 printk(KERN_NOTICE
1894                         "Probe at base(0x%08x) past the end of the map(0x%08lx)\n",
1895                         base, map->size -1);
1896                 return 0;
1897
1898         }
1899         if ((base + cfi->addr_unlock1) >= map->size) {
1900                 printk(KERN_NOTICE
1901                         "Probe at addr_unlock1(0x%08x + 0x%08x) past the end of the map(0x%08lx)\n",
1902                         base, cfi->addr_unlock1, map->size -1);
1903
1904                 return 0;
1905         }
1906         if ((base + cfi->addr_unlock2) >= map->size) {
1907                 printk(KERN_NOTICE
1908                         "Probe at addr_unlock2(0x%08x + 0x%08x) past the end of the map(0x%08lx)\n",
1909                         base, cfi->addr_unlock2, map->size -1);
1910                 return 0;
1911
1912         }
1913
1914         /* Reset */
1915         jedec_reset(base, map, cfi);
1916
1917         /* Autoselect Mode */
1918         if(cfi->addr_unlock1) {
1919                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1920                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1921         }
1922         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
1923         /* FIXME - should have a delay before continuing */
1924
1925         if (!cfi->numchips) {
1926                 /* This is the first time we're called. Set up the CFI
1927                    stuff accordingly and return */
1928
1929                 cfi->mfr = jedec_read_mfr(map, base, cfi);
1930                 cfi->id = jedec_read_id(map, base, cfi);
1931                 DEBUG(MTD_DEBUG_LEVEL3,
1932                       "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
1933                         cfi->mfr, cfi->id, cfi->interleave, cfi->device_type);
1934                 for (i=0; i<sizeof(jedec_table)/sizeof(jedec_table[0]); i++) {
1935                         if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
1936                                 DEBUG( MTD_DEBUG_LEVEL3,
1937                                        "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
1938                                        __func__, cfi->mfr, cfi->id,
1939                                        cfi->addr_unlock1, cfi->addr_unlock2 );
1940                                 if (!cfi_jedec_setup(cfi, i))
1941                                         return 0;
1942                                 goto ok_out;
1943                         }
1944                 }
1945                 goto retry;
1946         } else {
1947                 __u16 mfr;
1948                 __u16 id;
1949
1950                 /* Make sure it is a chip of the same manufacturer and id */
1951                 mfr = jedec_read_mfr(map, base, cfi);
1952                 id = jedec_read_id(map, base, cfi);
1953
1954                 if ((mfr != cfi->mfr) || (id != cfi->id)) {
1955                         printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n",
1956                                map->name, mfr, id, base);
1957                         jedec_reset(base, map, cfi);
1958                         return 0;
1959                 }
1960         }
1961
1962         /* Check each previous chip locations to see if it's an alias */
1963         for (i=0; i < (base >> cfi->chipshift); i++) {
1964                 unsigned long start;
1965                 if(!test_bit(i, chip_map)) {
1966                         continue; /* Skip location; no valid chip at this address */
1967                 }
1968                 start = i << cfi->chipshift;
1969                 if (jedec_read_mfr(map, start, cfi) == cfi->mfr &&
1970                     jedec_read_id(map, start, cfi) == cfi->id) {
1971                         /* Eep. This chip also looks like it's in autoselect mode.
1972                            Is it an alias for the new one? */
1973                         jedec_reset(start, map, cfi);
1974
1975                         /* If the device IDs go away, it's an alias */
1976                         if (jedec_read_mfr(map, base, cfi) != cfi->mfr ||
1977                             jedec_read_id(map, base, cfi) != cfi->id) {
1978                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
1979                                        map->name, base, start);
1980                                 return 0;
1981                         }
1982
1983                         /* Yes, it's actually got the device IDs as data. Most
1984                          * unfortunate. Stick the new chip in read mode
1985                          * too and if it's the same, assume it's an alias. */
1986                         /* FIXME: Use other modes to do a proper check */
1987                         jedec_reset(base, map, cfi);
1988                         if (jedec_read_mfr(map, base, cfi) == cfi->mfr &&
1989                             jedec_read_id(map, base, cfi) == cfi->id) {
1990                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
1991                                        map->name, base, start);
1992                                 return 0;
1993                         }
1994                 }
1995         }
1996
1997         /* OK, if we got to here, then none of the previous chips appear to
1998            be aliases for the current one. */
1999         set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
2000         cfi->numchips++;
2001
2002 ok_out:
2003         /* Put it back into Read Mode */
2004         jedec_reset(base, map, cfi);
2005
2006         printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
2007                map->name, cfi->interleave, cfi->device_type*8, base,
2008                map->bankwidth*8);
2009
2010         return 1;
2011 }
2012
2013 static struct chip_probe jedec_chip_probe = {
2014         .name = "JEDEC",
2015         .probe_chip = jedec_probe_chip
2016 };
2017
2018 struct mtd_info *jedec_probe(struct map_info *map)
2019 {
2020         /*
2021          * Just use the generic probe stuff to call our CFI-specific
2022          * chip_probe routine in all the possible permutations, etc.
2023          */
2024         return mtd_do_chip_probe(map, &jedec_chip_probe);
2025 }
2026
2027 static struct mtd_chip_driver jedec_chipdrv = {
2028         .probe  = jedec_probe,
2029         .name   = "jedec_probe",
2030         .module = THIS_MODULE
2031 };
2032
2033 int __init jedec_probe_init(void)
2034 {
2035         register_mtd_chip_driver(&jedec_chipdrv);
2036         return 0;
2037 }
2038
2039 static void __exit jedec_probe_exit(void)
2040 {
2041         unregister_mtd_chip_driver(&jedec_chipdrv);
2042 }
2043
2044 module_init(jedec_probe_init);
2045 module_exit(jedec_probe_exit);
2046
2047 MODULE_LICENSE("GPL");
2048 MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");
2049 MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");