drivers/mtd/maps/dc21285.c

   1 /*
   2  * MTD map driver for flash on the DC21285 (the StrongARM-110 companion chip)
   3  *
   4  * (C) 2000  Nicolas Pitre <nico@cam.org>
   5  *
   6  * This code is GPL
   7  *
   8  * $Id: dc21285.c,v 1.15 2003/05/21 12:45:18 dwmw2 Exp $
   9  */
  10 #include <linux/config.h>
  11 #include <linux/module.h>
  12 #include <linux/types.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15
  16 #include <linux/mtd/mtd.h>
  17 #include <linux/mtd/map.h>
  18 #include <linux/mtd/partitions.h>
  19
  20 #include <asm/io.h>
  21 #include <asm/hardware/dec21285.h>
  22
  23
  24 static struct mtd_info *mymtd;
  25
  26 __u8 dc21285_read8(struct map_info *map, unsigned long ofs)
  27 {
  28         return *(__u8*)(map->map_priv_1 + ofs);
  29 }
  30
  31 __u16 dc21285_read16(struct map_info *map, unsigned long ofs)
  32 {
  33         return *(__u16*)(map->map_priv_1 + ofs);
  34 }
  35
  36 __u32 dc21285_read32(struct map_info *map, unsigned long ofs)
  37 {
  38         return *(__u32*)(map->map_priv_1 + ofs);
  39 }
  40
  41 void dc21285_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
  42 {
  43         memcpy(to, (void*)(map->map_priv_1 + from), len);
  44 }
  45
  46 void dc21285_write8(struct map_info *map, __u8 d, unsigned long adr)
  47 {
  48         *CSR_ROMWRITEREG = adr & 3;
  49         adr &= ~3;
  50         *(__u8*)(map->map_priv_1 + adr) = d;
  51 }
  52
  53 void dc21285_write16(struct map_info *map, __u16 d, unsigned long adr)
  54 {
  55         *CSR_ROMWRITEREG = adr & 3;
  56         adr &= ~3;
  57         *(__u16*)(map->map_priv_1 + adr) = d;
  58 }
  59
  60 void dc21285_write32(struct map_info *map, __u32 d, unsigned long adr)
  61 {
  62         *(__u32*)(map->map_priv_1 + adr) = d;
  63 }
  64
  65 void dc21285_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
  66 {
  67         switch (map->buswidth) {
  68                 case 4:
  69                         while (len > 0) {
  70                                 __u32 d = *((__u32*)from)++;
  71                                 dc21285_write32(map, d, to);
  72                                 to += 4;
  73                                 len -= 4;
  74                         }
  75                         break;
  76                 case 2:
  77                         while (len > 0) {
  78                                 __u16 d = *((__u16*)from)++;
  79                                 dc21285_write16(map, d, to);
  80                                 to += 2;
  81                                 len -= 2;
  82                         }
  83                         break;
  84                 case 1:
  85                         while (len > 0) {
  86                                 __u8 d = *((__u8*)from)++;
  87                                 dc21285_write8(map, d, to);
  88                                 to++;
  89                                 len--;
  90                         }
  91                         break;
  92         }
  93 }
  94
  95 struct map_info dc21285_map = {
  96         .name = "DC21285 flash",
  97         .phys = NO_XIP,
  98         .size = 16*1024*1024,
  99         .read8 = dc21285_read8,
 100         .read16 = dc21285_read16,
 101         .read32 = dc21285_read32,
 102         .copy_from = dc21285_copy_from,
 103         .write8 = dc21285_write8,
 104         .write16 = dc21285_write16,
 105         .write32 = dc21285_write32,
 106         .copy_to = dc21285_copy_to
 107 };
 108
 109
 110 /* Partition stuff */
 111 static struct mtd_partition *dc21285_parts;
 112 #ifdef CONFIG_MTD_PARTITIONS
 113 static const char *probes[] = { "RedBoot", "cmdlinepart", NULL };
 114 #endif
 115
 116 int __init init_dc21285(void)
 117 {
 118
 119         /*
 120          * Flash timing is determined with bits 19-16 of the
 121          * CSR_SA110_CNTL.  The value is the number of wait cycles, or
 122          * 0 for 16 cycles (the default).  Cycles are 20 ns.
 123          * Here we use 7 for 140 ns flash chips.
 124          */
 125         /* access time */
 126         *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x000f0000) | (7 << 16));
 127         /* burst time */
 128         *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x00f00000) | (7 << 20));
 129         /* tristate time */
 130         *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x0f000000) | (7 << 24));
 131
 132         /* Determine buswidth */
 133         switch (*CSR_SA110_CNTL & (3<<14)) {
 134                 case SA110_CNTL_ROMWIDTH_8:
 135                         dc21285_map.buswidth = 1;
 136                         break;
 137                 case SA110_CNTL_ROMWIDTH_16:
 138                         dc21285_map.buswidth = 2;
 139                         break;
 140                 case SA110_CNTL_ROMWIDTH_32:
 141                         dc21285_map.buswidth = 4;
 142                         break;
 143                 default:
 144                         printk (KERN_ERR "DC21285 flash: undefined buswidth\n");
 145                         return -ENXIO;
 146         }
 147         printk (KERN_NOTICE "DC21285 flash support (%d-bit buswidth)\n",
 148                 dc21285_map.buswidth*8);
 149
 150         /* Let's map the flash area */
 151         dc21285_map.map_priv_1 = (unsigned long)ioremap(DC21285_FLASH, 16*1024*1024);
 152         if (!dc21285_map.map_priv_1) {
 153                 printk("Failed to ioremap\n");
 154                 return -EIO;
 155         }
 156
 157         mymtd = do_map_probe("cfi_probe", &dc21285_map);
 158         if (mymtd) {
 159                 int nrparts = 0;
 160
 161                 mymtd->owner = THIS_MODULE;
 162
 163                 /* partition fixup */
 164
 165 #ifdef CONFIG_MTD_PARTITIONS
 166                 nrparts = parse_mtd_partitions(mymtd, probes, &dc21285_parts, (void *)0);
 167                 if (nrparts > 0) {
 168                         add_mtd_partitions(mymtd, dc21285_parts, nrparts);
 169                         return 0;
 170                 }
 171 #endif
 172                 add_mtd_device(mymtd);
 173                 return 0;
 174         }
 175
 176         iounmap((void *)dc21285_map.map_priv_1);
 177         return -ENXIO;
 178 }
 179
 180 static void __exit cleanup_dc21285(void)
 181 {
 182 #ifdef CONFIG_MTD_PARTITIONS
 183         if (dc21285_parts) {
 184                 del_mtd_partitions(mymtd);
 185                 kfree(dc21285_parts);
 186         } else
 187 #endif
 188                 del_mtd_device(mymtd);
 189
 190         map_destroy(mymtd);
 191         iounmap((void *)dc21285_map.map_priv_1);
 192 }
 193
 194 module_init(init_dc21285);
 195 module_exit(cleanup_dc21285);
 196
 197
 198 MODULE_LICENSE("GPL");
 199 MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>");
 200 MODULE_DESCRIPTION("MTD map driver for DC21285 boards");