5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
8 * Additional technical information is available on
9 * http://www.linux-mtd.infradead.org/tech/nand.html
11 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
12 * 2002 Thomas Gleixner (tglx@linutronix.de)
14 * 10-29-2001 Thomas Gleixner (tglx@linutronix.de)
15 * - Changed nand_chip structure for controlline function to
16 * support different hardware structures (Access to
17 * controllines ALE,CLE,NCE via hardware specific function.
18 * - exit out of "failed erase block" changed, to avoid
20 * - init_waitqueue_head added in function nand_scan !!
22 * 01-30-2002 Thomas Gleixner (tglx@linutronix.de)
23 * change in nand_writev to block invalid vecs entries
25 * 02-11-2002 Thomas Gleixner (tglx@linutronix.de)
26 * - major rewrite to avoid duplicated code
27 * common nand_write_page function
28 * common get_chip function
29 * - added oob_config structure for out of band layouts
30 * - write_oob changed for partial programming
31 * - read cache for faster access for subsequent reads
33 * - support for different read/write address
34 * - support for device ready/busy line
35 * - read oob for more than one page enabled
37 * 02-27-2002 Thomas Gleixner (tglx@linutronix.de)
38 * - command-delay can be programmed
39 * - fixed exit from erase with callback-function enabled
41 * 03-21-2002 Thomas Gleixner (tglx@linutronix.de)
42 * - DEBUG improvements provided by Elizabeth Clarke
43 * (eclarke@aminocom.com)
44 * - added zero check for this->chip_delay
46 * 04-03-2002 Thomas Gleixner (tglx@linutronix.de)
47 * - added added hw-driver supplied command and wait functions
48 * - changed blocking for erase (erase suspend enabled)
49 * - check pointers before accessing flash provided by
50 * John Hall (john.hall@optionexist.co.uk)
52 * 04-09-2002 Thomas Gleixner (tglx@linutronix.de)
53 * - nand_wait repaired
55 * 04-28-2002 Thomas Gleixner (tglx@linutronix.de)
56 * - OOB config defines moved to nand.h
58 * 08-01-2002 Thomas Gleixner (tglx@linutronix.de)
59 * - changed my mailaddress, added pointer to tech/nand.html
61 * 08-07-2002 Thomas Gleixner (tglx@linutronix.de)
62 * forced bad block location to byte 5 of OOB, even if
63 * CONFIG_MTD_NAND_ECC_JFFS2 is not set, to prevent
64 * erase /dev/mtdX from erasing bad blocks and destroying
67 * 08-10-2002 Thomas Gleixner (tglx@linutronix.de)
68 * Fixed writing tail of data. Thanks to Alice Hennessy
69 * <ahennessy@mvista.com>.
71 * 08-10-2002 Thomas Gleixner (tglx@linutronix.de)
72 * nand_read_ecc and nand_write_page restructured to support
73 * hardware ECC. Thanks to Steven Hein (ssh@sgi.com)
74 * for basic implementation and suggestions.
75 * 3 new pointers in nand_chip structure:
76 * calculate_ecc, correct_data, enabled_hwecc
77 * forcing all hw-drivers to support page cache
78 * eccvalid_pos is now mandatory
80 * 08-17-2002 tglx: fixed signed/unsigned missmatch in write.c
81 * Thanks to Ken Offer <koffer@arlut.utexas.edu>
83 * 08-29-2002 tglx: use buffered read/write only for non pagealigned
84 * access, speed up the aligned path by using the fs-buffer
85 * reset chip removed from nand_select(), implicit done
86 * only, when erase is interrupted
87 * waitfuntion use yield, instead of schedule_timeout
88 * support for 6byte/512byte hardware ECC
89 * read_ecc, write_ecc extended for different oob-layout
90 * selections: Implemented NAND_NONE_OOB, NAND_JFFS2_OOB,
91 * NAND_YAFFS_OOB. fs-driver gives one of these constants
92 * to select the oob-layout fitting the filesystem.
93 * oobdata can be read together with the raw data, when
94 * the fs-driver supplies a big enough buffer.
95 * size = 12 * number of pages to read (256B pagesize)
96 * 24 * number of pages to read (512B pagesize)
97 * the buffer contains 8/16 byte oobdata and 4/8 byte
98 * returncode from calculate_ecc
99 * oobdata can be given from filesystem to program them
100 * in one go together with the raw data. ECC codes are
101 * filled in at the place selected by oobsel.
103 * 09-04-2002 tglx: fixed write_verify (John Hall (john.hall@optionexist.co.uk))
105 * 11-11-2002 tglx: fixed debug output in nand_write_page
106 * (John Hall (john.hall@optionexist.co.uk))
108 * 11-25-2002 tglx: Moved device ID/ manufacturer ID from nand_ids.h
109 * Splitted device ID and manufacturer ID table.
110 * Removed CONFIG_MTD_NAND_ECC, as it defaults to ECC_NONE for
111 * mtd->read / mtd->write and is controllable by the fs driver
112 * for mtd->read_ecc / mtd->write_ecc
113 * some minor cleanups
115 * 12-05-2002 tglx: Dave Ellis (DGE@sixnetio) provided the fix for
116 * WRITE_VERIFY long time ago. Thanks for remembering me.
118 * 02-14-2003 tglx: Reject non page aligned writes
119 * Fixed ecc select in nand_write_page to match semantics.
121 * 02-18-2003 tglx: Changed oobsel to pointer. Added a default oob-selector
123 * 02-18-2003 tglx: Implemented oobsel again. Now it uses a pointer to
124 + a structure, which will be supplied by a filesystem driver
125 * If NULL is given, then the defaults (none or defaults
126 * supplied by ioctl (MEMSETOOBSEL) are used.
127 * For partitions the partition defaults are used (mtdpart.c)
129 * 06-04-2003 tglx: fix compile errors and fix write verify problem for
130 * some chips, which need either a delay between the readback
131 * and the next write command or have the CE removed. The
132 * CE disable/enable is much faster than a 20us delay and
133 * it should work on all available chips.
135 * $Id: nand.c,v 1.46 2003/06/04 17:10:36 gleixner Exp $
137 * This program is free software; you can redistribute it and/or modify
138 * it under the terms of the GNU General Public License version 2 as
139 * published by the Free Software Foundation.
143 #include <linux/delay.h>
144 #include <linux/errno.h>
145 #include <linux/sched.h>
146 #include <linux/types.h>
147 #include <linux/mtd/mtd.h>
148 #include <linux/mtd/nand.h>
149 #include <linux/mtd/nand_ecc.h>
150 #include <linux/mtd/compatmac.h>
151 #include <linux/interrupt.h>
155 * Macros for low-level register control
157 #define nand_select() this->hwcontrol(NAND_CTL_SETNCE);
158 #define nand_deselect() this->hwcontrol(NAND_CTL_CLRNCE);
161 * NAND low-level MTD interface functions
163 static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
164 static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
165 size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
166 static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
167 static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
168 static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
169 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
170 static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
171 static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs,
172 unsigned long count, loff_t to, size_t * retlen);
173 static int nand_writev_ecc (struct mtd_info *mtd, const struct iovec *vecs,
174 unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
175 static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
176 static void nand_sync (struct mtd_info *mtd);
177 static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf, struct nand_oobinfo *oobsel);
181 * Send command to NAND device
183 static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
185 register struct nand_chip *this = mtd->priv;
186 register unsigned long NAND_IO_ADDR = this->IO_ADDR_W;
188 /* Begin command latch cycle */
189 this->hwcontrol (NAND_CTL_SETCLE);
191 * Write out the command to the device.
193 if (command != NAND_CMD_SEQIN)
194 writeb (command, NAND_IO_ADDR);
196 if (mtd->oobblock == 256 && column >= 256) {
198 writeb (NAND_CMD_READOOB, NAND_IO_ADDR);
199 writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
200 } else if (mtd->oobblock == 512 && column >= 256) {
203 writeb (NAND_CMD_READ1, NAND_IO_ADDR);
204 writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
207 writeb (NAND_CMD_READOOB, NAND_IO_ADDR);
208 writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
211 writeb (NAND_CMD_READ0, NAND_IO_ADDR);
212 writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
216 /* Set ALE and clear CLE to start address cycle */
217 this->hwcontrol (NAND_CTL_CLRCLE);
219 if (column != -1 || page_addr != -1) {
220 this->hwcontrol (NAND_CTL_SETALE);
222 /* Serially input address */
224 writeb (column, NAND_IO_ADDR);
225 if (page_addr != -1) {
226 writeb ((unsigned char) (page_addr & 0xff), NAND_IO_ADDR);
227 writeb ((unsigned char) ((page_addr >> 8) & 0xff), NAND_IO_ADDR);
228 /* One more address cycle for higher density devices */
229 if (mtd->size & 0x0c000000)
230 writeb ((unsigned char) ((page_addr >> 16) & 0x0f), NAND_IO_ADDR);
232 /* Latch in address */
233 this->hwcontrol (NAND_CTL_CLRALE);
237 * program and erase have their own busy handlers
238 * status and sequential in needs no delay
242 case NAND_CMD_PAGEPROG:
243 case NAND_CMD_ERASE1:
244 case NAND_CMD_ERASE2:
246 case NAND_CMD_STATUS:
252 this->hwcontrol (NAND_CTL_SETCLE);
253 writeb (NAND_CMD_STATUS, NAND_IO_ADDR);
254 this->hwcontrol (NAND_CTL_CLRCLE);
255 while ( !(readb (this->IO_ADDR_R) & 0x40));
258 /* This applies to read commands */
261 * If we don't have access to the busy pin, we apply the given
264 if (!this->dev_ready) {
265 udelay (this->chip_delay);
270 /* wait until command is processed */
271 while (!this->dev_ready());
275 * Get chip for selected access
277 static inline void nand_get_chip (struct nand_chip *this, struct mtd_info *mtd, int new_state, int *erase_state)
280 DECLARE_WAITQUEUE (wait, current);
283 * Grab the lock and see if the device is available
284 * For erasing, we keep the spinlock until the
285 * erase command is written.
288 spin_lock_bh (&this->chip_lock);
290 if (this->state == FL_READY) {
291 this->state = new_state;
292 if (new_state != FL_ERASING)
293 spin_unlock_bh (&this->chip_lock);
297 if (this->state == FL_ERASING) {
298 if (new_state != FL_ERASING) {
299 this->state = new_state;
300 spin_unlock_bh (&this->chip_lock);
301 nand_select (); /* select in any case */
302 this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
307 set_current_state (TASK_UNINTERRUPTIBLE);
308 add_wait_queue (&this->wq, &wait);
309 spin_unlock_bh (&this->chip_lock);
311 remove_wait_queue (&this->wq, &wait);
316 * Wait for command done. This applies to erase and program only
317 * Erase can take up to 400ms and program up to 20ms according to
318 * general NAND and SmartMedia specs
321 static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
324 unsigned long timeo = jiffies;
327 if (state == FL_ERASING)
328 timeo += (HZ * 400) / 1000;
330 timeo += (HZ * 20) / 1000;
332 spin_lock_bh (&this->chip_lock);
333 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
335 while (time_before(jiffies, timeo)) {
336 /* Check, if we were interrupted */
337 if (this->state != state) {
338 spin_unlock_bh (&this->chip_lock);
341 if (this->dev_ready) {
342 if (this->dev_ready ())
345 if (readb (this->IO_ADDR_R) & 0x40)
348 spin_unlock_bh (&this->chip_lock);
350 spin_lock_bh (&this->chip_lock);
352 status = (int) readb (this->IO_ADDR_R);
353 spin_unlock_bh (&this->chip_lock);
359 * Nand_page_program function is used for write and writev !
360 * This function will always program a full page of data
361 * If you call it with a non page aligned buffer, you're lost :)
363 static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf, struct nand_oobinfo *oobsel)
366 u_char ecc_code[6], *oob_data;
367 int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
368 int *oob_config = oobsel->eccpos;
370 /* pad oob area, if we have no oob buffer from fs-driver */
372 oob_data = &this->data_buf[mtd->oobblock];
373 for (i = 0; i < mtd->oobsize; i++)
378 /* Send command to begin auto page programming */
379 this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
381 /* Write out complete page of data, take care of eccmode */
383 /* No ecc and software ecc 3/256, write all */
385 printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
386 for (i = 0; i < mtd->oobblock; i++)
387 writeb ( this->data_poi[i] , this->IO_ADDR_W);
390 this->calculate_ecc (&this->data_poi[0], &(ecc_code[0]));
391 for (i = 0; i < 3; i++)
392 oob_data[oob_config[i]] = ecc_code[i];
393 /* Calculate and write the second ECC for 512 Byte page size */
394 if (mtd->oobblock == 512) {
395 this->calculate_ecc (&this->data_poi[256], &(ecc_code[3]));
396 for (i = 3; i < 6; i++)
397 oob_data[oob_config[i]] = ecc_code[i];
399 for (i = 0; i < mtd->oobblock; i++)
400 writeb ( this->data_poi[i] , this->IO_ADDR_W);
403 /* Hardware ecc 3 byte / 256 data, write first half, get ecc, then second, if 512 byte pagesize */
404 case NAND_ECC_HW3_256:
405 this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic for write */
406 for (i = 0; i < mtd->eccsize; i++)
407 writeb ( this->data_poi[i] , this->IO_ADDR_W);
409 this->calculate_ecc (NULL, &(ecc_code[0]));
410 for (i = 0; i < 3; i++)
411 oob_data[oob_config[i]] = ecc_code[i];
413 if (mtd->oobblock == 512) {
414 this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic for write*/
415 for (i = mtd->eccsize; i < mtd->oobblock; i++)
416 writeb ( this->data_poi[i] , this->IO_ADDR_W);
417 this->calculate_ecc (NULL, &(ecc_code[3]));
418 for (i = 3; i < 6; i++)
419 oob_data[oob_config[i]] = ecc_code[i];
423 /* Hardware ecc 3 byte / 512 byte data, write full page */
424 case NAND_ECC_HW3_512:
425 this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic */
426 for (i = 0; i < mtd->oobblock; i++)
427 writeb ( this->data_poi[i] , this->IO_ADDR_W);
428 this->calculate_ecc (NULL, &(ecc_code[0]));
429 for (i = 0; i < 3; i++)
430 oob_data[oob_config[i]] = ecc_code[i];
433 /* Hardware ecc 6 byte / 512 byte data, write full page */
434 case NAND_ECC_HW6_512:
435 this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic */
436 for (i = 0; i < mtd->oobblock; i++)
437 writeb ( this->data_poi[i] , this->IO_ADDR_W);
438 this->calculate_ecc (NULL, &(ecc_code[0]));
439 for (i = 0; i < 6; i++)
440 oob_data[oob_config[i]] = ecc_code[i];
444 printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
448 /* Write out OOB data */
449 for (i = 0; i < mtd->oobsize; i++)
450 writeb ( oob_data[i] , this->IO_ADDR_W);
452 /* Send command to actually program the data */
453 this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
455 /* call wait ready function */
456 status = this->waitfunc (mtd, this, FL_WRITING);
458 /* See if device thinks it succeeded */
460 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
464 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
466 * The NAND device assumes that it is always writing to
467 * a cleanly erased page. Hence, it performs its internal
468 * write verification only on bits that transitioned from
469 * 1 to 0. The device does NOT verify the whole page on a
470 * byte by byte basis. It is possible that the page was
471 * not completely erased or the page is becoming unusable
472 * due to wear. The read with ECC would catch the error
473 * later when the ECC page check fails, but we would rather
474 * catch it early in the page write stage. Better to write
475 * no data than invalid data.
478 /* Send command to read back the page */
479 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
480 /* Loop through and verify the data */
481 for (i = 0; i < mtd->oobblock; i++) {
482 if (this->data_poi[i] != readb (this->IO_ADDR_R)) {
483 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
488 /* check, if we have a fs-supplied oob-buffer */
490 for (i = 0; i < mtd->oobsize; i++) {
491 if (oob_data[i] != readb (this->IO_ADDR_R)) {
492 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
497 if (eccmode != NAND_ECC_NONE) {
500 switch (this->eccmode) {
502 case NAND_ECC_HW3_256: ecc_bytes = (mtd->oobblock == 512) ? 6 : 3; break;
503 case NAND_ECC_HW3_512: ecc_bytes = 3; break;
504 case NAND_ECC_HW6_512: ecc_bytes = 6; break;
507 for (i = 0; i < mtd->oobsize; i++)
508 oob_data[i] = readb (this->IO_ADDR_R);
510 for (i = 0; i < ecc_bytes; i++) {
511 if (oob_data[oob_config[i]] != ecc_code[i]) {
512 DEBUG (MTD_DEBUG_LEVEL0,
513 "%s: Failed ECC write "
514 "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
521 * Terminate the read command. This is faster than sending a reset command or
522 * applying a 20us delay before issuing the next programm sequence.
523 * This is not a problem for all chips, but I have found a bunch of them.
534 static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
536 return (nand_read_ecc (mtd, from, len, retlen, buf, NULL, NULL));
543 static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
544 size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
546 int j, col, page, end, ecc;
548 int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
549 struct nand_chip *this = mtd->priv;
550 u_char *data_poi, *oob_data = oob_buf;
556 // use chip default if zero
558 oobsel = &mtd->oobinfo;
560 eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
561 oob_config = oobsel->eccpos;
563 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
565 /* Do not allow reads past end of device */
566 if ((from + len) > mtd->size) {
567 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
572 /* Grab the lock and see if the device is available */
573 nand_get_chip (this, mtd ,FL_READING, &erase_state);
575 /* Select the NAND device */
578 /* First we calculate the starting page */
579 page = from >> this->page_shift;
581 /* Get raw starting column */
582 col = from & (mtd->oobblock - 1);
587 /* Send the read command */
588 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
590 /* Loop until all data read */
593 /* If we have consequent page reads, apply delay or wait for ready/busy pin */
595 if (!this->dev_ready)
596 udelay (this->chip_delay);
598 while (!this->dev_ready());
602 * If the read is not page aligned, we have to read into data buffer
603 * due to ecc, else we read into return buffer direct
605 if (!col && (len - read) >= end)
606 data_poi = &buf[read];
608 data_poi = this->data_buf;
610 /* get oob area, if we have no oob buffer from fs-driver */
612 oob_data = &this->data_buf[end];
618 case NAND_ECC_NONE: /* No ECC, Read in a page */
619 printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n");
621 data_poi[j++] = readb (this->IO_ADDR_R);
624 case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
626 data_poi[j++] = readb (this->IO_ADDR_R);
627 this->calculate_ecc (&data_poi[0], &ecc_calc[0]);
628 if (mtd->oobblock == 512)
629 this->calculate_ecc (&data_poi[256], &ecc_calc[3]);
632 case NAND_ECC_HW3_256: /* Hardware ECC 3 byte /256 byte data: Read in first 256 byte, get ecc, */
633 this->enable_hwecc (NAND_ECC_READ);
635 data_poi[j++] = readb (this->IO_ADDR_R);
636 this->calculate_ecc (&data_poi[0], &ecc_calc[0]); /* read from hardware */
638 if (mtd->oobblock == 512) { /* read second, if pagesize = 512 */
639 this->enable_hwecc (NAND_ECC_READ);
641 data_poi[j++] = readb (this->IO_ADDR_R);
642 this->calculate_ecc (&data_poi[256], &ecc_calc[3]); /* read from hardware */
646 case NAND_ECC_HW3_512:
647 case NAND_ECC_HW6_512: /* Hardware ECC 3/6 byte / 512 byte data : Read in a page */
648 this->enable_hwecc (NAND_ECC_READ);
650 data_poi[j++] = readb (this->IO_ADDR_R);
651 this->calculate_ecc (&data_poi[0], &ecc_calc[0]); /* read from hardware */
655 printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
660 for (j = 0; j < mtd->oobsize; j++)
661 oob_data[oob + j] = readb (this->IO_ADDR_R);
663 /* Skip ECC, if not active */
664 if (eccmode == NAND_ECC_NONE)
667 /* Pick the ECC bytes out of the oob data */
668 for (j = 0; j < 6; j++)
669 ecc_code[j] = oob_data[oob + oob_config[j]];
671 /* correct data, if neccecary */
672 ecc_status = this->correct_data (&data_poi[0], &ecc_code[0], &ecc_calc[0]);
673 /* check, if we have a fs supplied oob-buffer */
676 *((int *)&oob_data[oob]) = ecc_status;
679 if (ecc_status == -1) {
680 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
684 if (mtd->oobblock == 512 && eccmode != NAND_ECC_HW3_512) {
685 ecc_status = this->correct_data (&data_poi[256], &ecc_code[3], &ecc_calc[3]);
687 *((int *)&oob_data[oob]) = ecc_status;
690 if (ecc_status == -1) {
691 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
696 if (col || (len - read) < end) {
697 for (j = col; j < end && read < len; j++)
698 buf[read++] = data_poi[j];
700 read += mtd->oobblock;
701 /* For subsequent reads align to page boundary. */
703 /* Increment page address */
707 /* De-select the NAND device */
710 /* Wake up anyone waiting on the device */
711 spin_lock_bh (&this->chip_lock);
712 this->state = FL_READY;
714 spin_unlock_bh (&this->chip_lock);
717 * Return success, if no ECC failures, else -EIO
718 * fs driver will take care of that, because
719 * retlen == desired len and result == -EIO
722 return ecc_failed ? -EIO : 0;
726 * NAND read out-of-band
728 static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
732 struct nand_chip *this = mtd->priv;
734 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
736 /* Shift to get page */
737 page = ((int) from) >> this->page_shift;
739 /* Mask to get column */
742 /* Initialize return length value */
745 /* Do not allow reads past end of device */
746 if ((from + len) > mtd->size) {
747 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
752 /* Grab the lock and see if the device is available */
753 nand_get_chip (this, mtd , FL_READING, &erase_state);
755 /* Select the NAND device */
758 /* Send the read command */
759 this->cmdfunc (mtd, NAND_CMD_READOOB, col, page);
761 * Read the data, if we read more than one page
762 * oob data, let the device transfer the data !
764 for (i = 0; i < len; i++) {
765 buf[i] = readb (this->IO_ADDR_R);
766 if ((col++ & (mtd->oobsize - 1)) == (mtd->oobsize - 1))
767 udelay (this->chip_delay);
769 /* De-select the NAND device */
772 /* Wake up anyone waiting on the device */
773 spin_lock_bh (&this->chip_lock);
774 this->state = FL_READY;
776 spin_unlock_bh (&this->chip_lock);
783 #define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
788 static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
790 return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
793 * NAND write with ECC
795 static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
796 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
798 int page, ret = 0, oob = 0, written = 0;
799 struct nand_chip *this = mtd->priv;
801 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
803 /* Do not allow write past end of device */
804 if ((to + len) > mtd->size) {
805 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
809 /* reject writes, which are not page aligned */
810 if (NOTALIGNED (to) || NOTALIGNED(len)) {
811 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
815 // if oobsel is NULL, use chip defaults
817 oobsel = &mtd->oobinfo;
819 /* Shift to get page */
820 page = ((int) to) >> this->page_shift;
822 /* Grab the lock and see if the device is available */
823 nand_get_chip (this, mtd, FL_WRITING, NULL);
825 /* Select the NAND device */
828 /* Check the WP bit */
829 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
830 if (!(readb (this->IO_ADDR_R) & 0x80)) {
831 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Device is write protected!!!\n");
836 /* Loop until all data is written */
837 while (written < len) {
838 int cnt = mtd->oobblock;
839 this->data_poi = (u_char*) &buf[written];
840 /* We use the same function for write and writev */
842 ret = nand_write_page (mtd, this, page, &eccbuf[oob], oobsel);
845 ret = nand_write_page (mtd, this, page, NULL, oobsel);
850 /* Update written bytes count */
852 /* Increment page address */
857 /* De-select the NAND device */
860 /* Wake up anyone waiting on the device */
861 spin_lock_bh (&this->chip_lock);
862 this->state = FL_READY;
864 spin_unlock_bh (&this->chip_lock);
871 * NAND write out-of-band
873 static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
875 int i, column, page, status, ret = 0;
876 struct nand_chip *this = mtd->priv;
878 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
880 /* Shift to get page */
881 page = ((int) to) >> this->page_shift;
883 /* Mask to get column */
886 /* Initialize return length value */
889 /* Do not allow write past end of page */
890 if ((column + len) > mtd->oobsize) {
891 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
895 /* Grab the lock and see if the device is available */
896 nand_get_chip (this, mtd, FL_WRITING, NULL);
898 /* Select the NAND device */
901 /* Check the WP bit */
902 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
903 if (!(readb (this->IO_ADDR_R) & 0x80)) {
904 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Device is write protected!!!\n");
909 /* Write out desired data */
910 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page);
911 /* prepad 0xff for partial programming */
912 for (i = 0; i < column; i++)
913 writeb (0xff, this->IO_ADDR_W);
915 for (i = 0; i < len; i++)
916 writeb (buf[i], this->IO_ADDR_W);
917 /* postpad 0xff for partial programming */
918 for (i = len + column; i < mtd->oobsize; i++)
919 writeb (0xff, this->IO_ADDR_W);
921 /* Send command to program the OOB data */
922 this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
924 status = this->waitfunc (mtd, this, FL_WRITING);
926 /* See if device thinks it succeeded */
928 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
935 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
936 /* Send command to read back the data */
937 this->cmdfunc (mtd, NAND_CMD_READOOB, column, page);
939 /* Loop through and verify the data */
940 for (i = 0; i < len; i++) {
941 if (buf[i] != readb (this->IO_ADDR_R)) {
942 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
950 /* De-select the NAND device */
953 /* Wake up anyone waiting on the device */
954 spin_lock_bh (&this->chip_lock);
955 this->state = FL_READY;
957 spin_unlock_bh (&this->chip_lock);
964 * NAND write with iovec
966 static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count,
967 loff_t to, size_t * retlen)
969 return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, 0));
972 static int nand_writev_ecc (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count,
973 loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
975 int i, page, len, total_len, ret = 0, written = 0;
976 struct nand_chip *this = mtd->priv;
978 /* Calculate total length of data */
980 for (i = 0; i < count; i++)
981 total_len += (int) vecs[i].iov_len;
983 DEBUG (MTD_DEBUG_LEVEL3,
984 "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
986 /* Do not allow write past end of page */
987 if ((to + total_len) > mtd->size) {
988 DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
992 /* reject writes, which are not page aligned */
993 if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
994 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
998 // if oobsel is NULL, use chip defaults
1000 oobsel = &mtd->oobinfo;
1002 /* Shift to get page */
1003 page = ((int) to) >> this->page_shift;
1005 /* Grab the lock and see if the device is available */
1006 nand_get_chip (this, mtd, FL_WRITING, NULL);
1008 /* Select the NAND device */
1011 /* Check the WP bit */
1012 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
1013 if (!(readb (this->IO_ADDR_R) & 0x80)) {
1014 DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Device is write protected!!!\n");
1019 /* Loop until all iovecs' data has been written */
1023 * Check, if the tuple gives us not enough data for a
1024 * full page write. Then we can use the iov direct,
1025 * else we have to copy into data_buf.
1027 if ((vecs->iov_len - len) >= mtd->oobblock) {
1028 this->data_poi = (u_char *) vecs->iov_base;
1029 this->data_poi += len;
1030 len += mtd->oobblock;
1031 /* Check, if we have to switch to the next tuple */
1032 if (len >= (int) vecs->iov_len) {
1039 * Read data out of each tuple until we have a full page
1040 * to write or we've read all the tuples.
1043 while ((cnt < mtd->oobblock) && count) {
1044 if (vecs->iov_base != NULL && vecs->iov_len) {
1045 this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
1047 /* Check, if we have to switch to the next tuple */
1048 if (len >= (int) vecs->iov_len) {
1054 this->data_poi = this->data_buf;
1057 /* We use the same function for write and writev !) */
1058 ret = nand_write_page (mtd, this, page, NULL, oobsel);
1062 /* Update written bytes count */
1063 written += mtd->oobblock;
1065 /* Increment page address */
1070 /* De-select the NAND device */
1073 /* Wake up anyone waiting on the device */
1074 spin_lock_bh (&this->chip_lock);
1075 this->state = FL_READY;
1076 wake_up (&this->wq);
1077 spin_unlock_bh (&this->chip_lock);
1084 * NAND erase a block
1086 static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
1088 int page, len, status, pages_per_block, ret;
1089 struct nand_chip *this = mtd->priv;
1090 DECLARE_WAITQUEUE (wait, current);
1092 DEBUG (MTD_DEBUG_LEVEL3,
1093 "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1095 /* Start address must align on block boundary */
1096 if (instr->addr & (mtd->erasesize - 1)) {
1097 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
1101 /* Length must align on block boundary */
1102 if (instr->len & (mtd->erasesize - 1)) {
1103 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
1107 /* Do not allow erase past end of device */
1108 if ((instr->len + instr->addr) > mtd->size) {
1109 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
1113 /* Grab the lock and see if the device is available */
1114 nand_get_chip (this, mtd, FL_ERASING, NULL);
1116 /* Shift to get first page */
1117 page = (int) (instr->addr >> this->page_shift);
1119 /* Calculate pages in each block */
1120 pages_per_block = mtd->erasesize / mtd->oobblock;
1122 /* Select the NAND device */
1125 /* Check the WP bit */
1126 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
1127 if (!(readb (this->IO_ADDR_R) & 0x80)) {
1128 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
1129 instr->state = MTD_ERASE_FAILED;
1133 /* Loop through the pages */
1136 instr->state = MTD_ERASING;
1139 /* Check if we have a bad block, we do not erase bad blocks ! */
1140 this->cmdfunc (mtd, NAND_CMD_READOOB, NAND_BADBLOCK_POS, page);
1141 if (readb (this->IO_ADDR_R) != 0xff) {
1142 printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
1143 instr->state = MTD_ERASE_FAILED;
1147 /* Send commands to erase a page */
1148 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
1149 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
1151 spin_unlock_bh (&this->chip_lock);
1152 status = this->waitfunc (mtd, this, FL_ERASING);
1154 /* Get spinlock, in case we exit */
1155 spin_lock_bh (&this->chip_lock);
1156 /* See if block erase succeeded */
1157 if (status & 0x01) {
1158 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
1159 instr->state = MTD_ERASE_FAILED;
1163 /* Check, if we were interupted */
1164 if (this->state == FL_ERASING) {
1165 /* Increment page address and decrement length */
1166 len -= mtd->erasesize;
1167 page += pages_per_block;
1169 /* Release the spin lock */
1170 spin_unlock_bh (&this->chip_lock);
1172 spin_lock_bh (&this->chip_lock);
1173 /* Check the state and sleep if it changed */
1174 if (this->state == FL_ERASING || this->state == FL_READY) {
1175 /* Select the NAND device again, if we were interrupted */
1176 this->state = FL_ERASING;
1180 set_current_state (TASK_UNINTERRUPTIBLE);
1181 add_wait_queue (&this->wq, &wait);
1182 spin_unlock_bh (&this->chip_lock);
1184 remove_wait_queue (&this->wq, &wait);
1188 instr->state = MTD_ERASE_DONE;
1191 /* De-select the NAND device */
1193 spin_unlock_bh (&this->chip_lock);
1195 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1196 /* Do call back function */
1197 if (!ret && instr->callback)
1198 instr->callback (instr);
1200 /* The device is ready */
1201 spin_lock_bh (&this->chip_lock);
1202 this->state = FL_READY;
1203 spin_unlock_bh (&this->chip_lock);
1205 /* Return more or less happy */
1212 static void nand_sync (struct mtd_info *mtd)
1214 struct nand_chip *this = mtd->priv;
1215 DECLARE_WAITQUEUE (wait, current);
1217 DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
1220 /* Grab the spinlock */
1221 spin_lock_bh (&this->chip_lock);
1223 /* See what's going on */
1224 switch (this->state) {
1227 this->state = FL_SYNCING;
1228 spin_unlock_bh (&this->chip_lock);
1232 /* Not an idle state */
1233 add_wait_queue (&this->wq, &wait);
1234 spin_unlock_bh (&this->chip_lock);
1237 remove_wait_queue (&this->wq, &wait);
1241 /* Lock the device */
1242 spin_lock_bh (&this->chip_lock);
1244 /* Set the device to be ready again */
1245 if (this->state == FL_SYNCING) {
1246 this->state = FL_READY;
1247 wake_up (&this->wq);
1250 /* Unlock the device */
1251 spin_unlock_bh (&this->chip_lock);
1255 * Scan for the NAND device
1257 int nand_scan (struct mtd_info *mtd)
1259 int i, nand_maf_id, nand_dev_id;
1260 struct nand_chip *this = mtd->priv;
1262 /* check for proper chip_delay setup, set 20us if not */
1263 if (!this->chip_delay)
1264 this->chip_delay = 20;
1266 /* check, if a user supplied command function given */
1267 if (this->cmdfunc == NULL)
1268 this->cmdfunc = nand_command;
1270 /* check, if a user supplied wait function given */
1271 if (this->waitfunc == NULL)
1272 this->waitfunc = nand_wait;
1274 /* Select the device */
1277 /* Send the command for reading device ID */
1278 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
1280 /* Read manufacturer and device IDs */
1281 nand_maf_id = readb (this->IO_ADDR_R);
1282 nand_dev_id = readb (this->IO_ADDR_R);
1284 /* Print and store flash device information */
1285 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
1286 if (nand_dev_id == nand_flash_ids[i].id && !mtd->size) {
1287 mtd->name = nand_flash_ids[i].name;
1288 mtd->erasesize = nand_flash_ids[i].erasesize;
1289 mtd->size = (1 << nand_flash_ids[i].chipshift);
1291 if (nand_flash_ids[i].page256) {
1292 mtd->oobblock = 256;
1294 this->page_shift = 8;
1296 mtd->oobblock = 512;
1298 this->page_shift = 9;
1300 /* Try to identify manufacturer */
1301 for (i = 0; nand_manuf_ids[i].id != 0x0; i++) {
1302 if (nand_manuf_ids[i].id == nand_maf_id)
1305 printk (KERN_INFO "NAND device: Manufacture ID:"
1306 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
1307 nand_manuf_ids[i].name , mtd->name);
1313 * check ECC mode, default to software
1314 * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
1315 * fallback to software ECC
1317 this->eccsize = 256; /* set default eccsize */
1319 switch (this->eccmode) {
1321 case NAND_ECC_HW3_512:
1322 if (mtd->oobblock == 256) {
1323 printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
1324 this->eccmode = NAND_ECC_SOFT;
1325 this->calculate_ecc = nand_calculate_ecc;
1326 this->correct_data = nand_correct_data;
1329 this->eccsize = 512; /* set eccsize to 512 and fall through for function check */
1331 case NAND_ECC_HW3_256:
1332 if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
1334 printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
1338 printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
1339 this->eccmode = NAND_ECC_NONE;
1343 this->calculate_ecc = nand_calculate_ecc;
1344 this->correct_data = nand_correct_data;
1348 printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
1352 /* Initialize state, waitqueue and spinlock */
1353 this->state = FL_READY;
1354 init_waitqueue_head (&this->wq);
1355 spin_lock_init (&this->chip_lock);
1357 /* De-select the device */
1360 /* Print warning message for no device */
1362 printk (KERN_WARNING "No NAND device found!!!\n");
1366 /* Fill in remaining MTD driver data */
1367 mtd->type = MTD_NANDFLASH;
1368 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
1369 mtd->ecctype = MTD_ECC_SW;
1370 mtd->erase = nand_erase;
1372 mtd->unpoint = NULL;
1373 mtd->read = nand_read;
1374 mtd->write = nand_write;
1375 mtd->read_ecc = nand_read_ecc;
1376 mtd->write_ecc = nand_write_ecc;
1377 mtd->read_oob = nand_read_oob;
1378 mtd->write_oob = nand_write_oob;
1380 mtd->writev = nand_writev;
1381 mtd->writev_ecc = nand_writev_ecc;
1382 mtd->sync = nand_sync;
1385 mtd->suspend = NULL;
1387 mtd->owner = THIS_MODULE;
1393 EXPORT_SYMBOL (nand_scan);
1395 MODULE_LICENSE ("GPL");
1396 MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
1397 MODULE_DESCRIPTION ("Generic NAND flash driver code");