2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/config.h>
54 #include <linux/module.h>
55 #include <linux/version.h>
56 #include <linux/types.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/pci.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
67 #include <linux/highmem.h>
68 #include <linux/sockios.h>
70 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
71 #include <linux/if_vlan.h>
75 #include <linux/ethtool.h>
81 #include <asm/system.h>
84 #include <asm/byteorder.h>
85 #include <asm/uaccess.h>
88 #define DRV_NAME "acenic"
92 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
93 #define ACE_IS_TIGON_I(ap) 0
94 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
96 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
97 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
100 #ifndef PCI_VENDOR_ID_ALTEON
101 #define PCI_VENDOR_ID_ALTEON 0x12ae
103 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
104 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
105 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
107 #ifndef PCI_DEVICE_ID_3COM_3C985
108 #define PCI_DEVICE_ID_3COM_3C985 0x0001
110 #ifndef PCI_VENDOR_ID_NETGEAR
111 #define PCI_VENDOR_ID_NETGEAR 0x1385
112 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
114 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
115 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
120 * Farallon used the DEC vendor ID by mistake and they seem not
123 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
124 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
126 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
127 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
129 #ifndef PCI_VENDOR_ID_SGI
130 #define PCI_VENDOR_ID_SGI 0x10a9
132 #ifndef PCI_DEVICE_ID_SGI_ACENIC
133 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
136 static struct pci_device_id acenic_pci_tbl[] = {
137 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
138 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
139 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
140 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
141 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
142 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
143 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
144 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
145 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
146 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
148 * Farallon used the DEC vendor ID on their cards incorrectly,
149 * then later Alteon's ID.
151 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
152 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
153 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
154 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
155 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
156 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
159 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
161 #ifndef SET_NETDEV_DEV
162 #define SET_NETDEV_DEV(net, pdev) do{} while(0)
165 #if LINUX_VERSION_CODE >= 0x2051c
166 #define ace_sync_irq(irq) synchronize_irq(irq)
168 #define ace_sync_irq(irq) synchronize_irq()
171 #ifndef offset_in_page
172 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
175 #define ACE_MAX_MOD_PARMS 8
176 #define BOARD_IDX_STATIC 0
177 #define BOARD_IDX_OVERFLOW -1
179 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
180 defined(NETIF_F_HW_VLAN_RX)
181 #define ACENIC_DO_VLAN 1
182 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
184 #define ACENIC_DO_VLAN 0
185 #define ACE_RCB_VLAN_FLAG 0
191 * These must be defined before the firmware is included.
193 #define MAX_TEXT_LEN 96*1024
194 #define MAX_RODATA_LEN 8*1024
195 #define MAX_DATA_LEN 2*1024
197 #include "acenic_firmware.h"
199 #ifndef tigon2FwReleaseLocal
200 #define tigon2FwReleaseLocal 0
204 * This driver currently supports Tigon I and Tigon II based cards
205 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
206 * GA620. The driver should also work on the SGI, DEC and Farallon
207 * versions of the card, however I have not been able to test that
210 * This card is really neat, it supports receive hardware checksumming
211 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
212 * firmware. Also the programming interface is quite neat, except for
213 * the parts dealing with the i2c eeprom on the card ;-)
215 * Using jumbo frames:
217 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
218 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
219 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
220 * interface number and <MTU> being the MTU value.
224 * When compiled as a loadable module, the driver allows for a number
225 * of module parameters to be specified. The driver supports the
226 * following module parameters:
228 * trace=<val> - Firmware trace level. This requires special traced
229 * firmware to replace the firmware supplied with
230 * the driver - for debugging purposes only.
232 * link=<val> - Link state. Normally you want to use the default link
233 * parameters set by the driver. This can be used to
234 * override these in case your switch doesn't negotiate
235 * the link properly. Valid values are:
236 * 0x0001 - Force half duplex link.
237 * 0x0002 - Do not negotiate line speed with the other end.
238 * 0x0010 - 10Mbit/sec link.
239 * 0x0020 - 100Mbit/sec link.
240 * 0x0040 - 1000Mbit/sec link.
241 * 0x0100 - Do not negotiate flow control.
242 * 0x0200 - Enable RX flow control Y
243 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
244 * Default value is 0x0270, ie. enable link+flow
245 * control negotiation. Negotiating the highest
246 * possible link speed with RX flow control enabled.
248 * When disabling link speed negotiation, only one link
249 * speed is allowed to be specified!
251 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
252 * to wait for more packets to arive before
253 * interrupting the host, from the time the first
256 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
257 * to wait for more packets to arive in the transmit ring,
258 * before interrupting the host, after transmitting the
259 * first packet in the ring.
261 * max_tx_desc=<val> - maximum number of transmit descriptors
262 * (packets) transmitted before interrupting the host.
264 * max_rx_desc=<val> - maximum number of receive descriptors
265 * (packets) received before interrupting the host.
267 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
268 * increments of the NIC's on board memory to be used for
269 * transmit and receive buffers. For the 1MB NIC app. 800KB
270 * is available, on the 1/2MB NIC app. 300KB is available.
271 * 68KB will always be available as a minimum for both
272 * directions. The default value is a 50/50 split.
273 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
274 * operations, default (1) is to always disable this as
275 * that is what Alteon does on NT. I have not been able
276 * to measure any real performance differences with
277 * this on my systems. Set <val>=0 if you want to
278 * enable these operations.
280 * If you use more than one NIC, specify the parameters for the
281 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
282 * run tracing on NIC #2 but not on NIC #1 and #3.
286 * - Proper multicast support.
287 * - NIC dump support.
288 * - More tuning parameters.
290 * The mini ring is not used under Linux and I am not sure it makes sense
291 * to actually use it.
293 * New interrupt handler strategy:
295 * The old interrupt handler worked using the traditional method of
296 * replacing an skbuff with a new one when a packet arrives. However
297 * the rx rings do not need to contain a static number of buffer
298 * descriptors, thus it makes sense to move the memory allocation out
299 * of the main interrupt handler and do it in a bottom half handler
300 * and only allocate new buffers when the number of buffers in the
301 * ring is below a certain threshold. In order to avoid starving the
302 * NIC under heavy load it is however necessary to force allocation
303 * when hitting a minimum threshold. The strategy for alloction is as
306 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
307 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
308 * the buffers in the interrupt handler
309 * RX_RING_THRES - maximum number of buffers in the rx ring
310 * RX_MINI_THRES - maximum number of buffers in the mini ring
311 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
313 * One advantagous side effect of this allocation approach is that the
314 * entire rx processing can be done without holding any spin lock
315 * since the rx rings and registers are totally independent of the tx
316 * ring and its registers. This of course includes the kmalloc's of
317 * new skb's. Thus start_xmit can run in parallel with rx processing
318 * and the memory allocation on SMP systems.
320 * Note that running the skb reallocation in a bottom half opens up
321 * another can of races which needs to be handled properly. In
322 * particular it can happen that the interrupt handler tries to run
323 * the reallocation while the bottom half is either running on another
324 * CPU or was interrupted on the same CPU. To get around this the
325 * driver uses bitops to prevent the reallocation routines from being
328 * TX handling can also be done without holding any spin lock, wheee
329 * this is fun! since tx_ret_csm is only written to by the interrupt
330 * handler. The case to be aware of is when shutting down the device
331 * and cleaning up where it is necessary to make sure that
332 * start_xmit() is not running while this is happening. Well DaveM
333 * informs me that this case is already protected against ... bye bye
334 * Mr. Spin Lock, it was nice to know you.
336 * TX interrupts are now partly disabled so the NIC will only generate
337 * TX interrupts for the number of coal ticks, not for the number of
338 * TX packets in the queue. This should reduce the number of TX only,
339 * ie. when no RX processing is done, interrupts seen.
343 * Threshold values for RX buffer allocation - the low water marks for
344 * when to start refilling the rings are set to 75% of the ring
345 * sizes. It seems to make sense to refill the rings entirely from the
346 * intrrupt handler once it gets below the panic threshold, that way
347 * we don't risk that the refilling is moved to another CPU when the
348 * one running the interrupt handler just got the slab code hot in its
351 #define RX_RING_SIZE 72
352 #define RX_MINI_SIZE 64
353 #define RX_JUMBO_SIZE 48
355 #define RX_PANIC_STD_THRES 16
356 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
357 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
358 #define RX_PANIC_MINI_THRES 12
359 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
360 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
361 #define RX_PANIC_JUMBO_THRES 6
362 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
363 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
367 * Size of the mini ring entries, basically these just should be big
368 * enough to take TCP ACKs
370 #define ACE_MINI_SIZE 100
372 #define ACE_MINI_BUFSIZE (ACE_MINI_SIZE + 2 + 16)
373 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 2+4+16)
374 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 2+4+16)
377 * There seems to be a magic difference in the effect between 995 and 996
378 * but little difference between 900 and 995 ... no idea why.
380 * There is now a default set of tuning parameters which is set, depending
381 * on whether or not the user enables Jumbo frames. It's assumed that if
382 * Jumbo frames are enabled, the user wants optimal tuning for that case.
384 #define DEF_TX_COAL 400 /* 996 */
385 #define DEF_TX_MAX_DESC 60 /* was 40 */
386 #define DEF_RX_COAL 120 /* 1000 */
387 #define DEF_RX_MAX_DESC 25
388 #define DEF_TX_RATIO 21 /* 24 */
390 #define DEF_JUMBO_TX_COAL 20
391 #define DEF_JUMBO_TX_MAX_DESC 60
392 #define DEF_JUMBO_RX_COAL 30
393 #define DEF_JUMBO_RX_MAX_DESC 6
394 #define DEF_JUMBO_TX_RATIO 21
396 #if tigon2FwReleaseLocal < 20001118
398 * Standard firmware and early modifications duplicate
399 * IRQ load without this flag (coal timer is never reset).
400 * Note that with this flag tx_coal should be less than
401 * time to xmit full tx ring.
402 * 400usec is not so bad for tx ring size of 128.
404 #define TX_COAL_INTS_ONLY 1 /* worth it */
407 * With modified firmware, this is not necessary, but still useful.
409 #define TX_COAL_INTS_ONLY 1
413 #define DEF_STAT (2 * TICKS_PER_SEC)
416 static int link[ACE_MAX_MOD_PARMS];
417 static int trace[ACE_MAX_MOD_PARMS];
418 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
419 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
420 static int max_tx_desc[ACE_MAX_MOD_PARMS];
421 static int max_rx_desc[ACE_MAX_MOD_PARMS];
422 static int tx_ratio[ACE_MAX_MOD_PARMS];
423 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
425 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
426 MODULE_LICENSE("GPL");
427 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
428 MODULE_PARM(link, "1-" __MODULE_STRING(8) "i");
429 MODULE_PARM(trace, "1-" __MODULE_STRING(8) "i");
430 MODULE_PARM(tx_coal_tick, "1-" __MODULE_STRING(8) "i");
431 MODULE_PARM(max_tx_desc, "1-" __MODULE_STRING(8) "i");
432 MODULE_PARM(rx_coal_tick, "1-" __MODULE_STRING(8) "i");
433 MODULE_PARM(max_rx_desc, "1-" __MODULE_STRING(8) "i");
434 MODULE_PARM(tx_ratio, "1-" __MODULE_STRING(8) "i");
435 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
436 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
437 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
438 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
439 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
440 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
441 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
444 static char version[] =
445 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
446 " http://home.cern.ch/~jes/gige/acenic.html\n";
448 static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
449 static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
450 static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
452 static struct ethtool_ops ace_ethtool_ops = {
453 .get_settings = ace_get_settings,
454 .set_settings = ace_set_settings,
455 .get_drvinfo = ace_get_drvinfo,
458 static int __devinit acenic_probe_one(struct pci_dev *pdev,
459 const struct pci_device_id *id)
461 struct net_device *dev;
462 struct ace_private *ap;
463 static int boards_found;
465 dev = alloc_etherdev(sizeof(struct ace_private));
467 printk(KERN_ERR "acenic: Unable to allocate "
468 "net_device structure!\n");
472 SET_MODULE_OWNER(dev);
473 SET_NETDEV_DEV(dev, &pdev->dev);
478 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
480 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
481 dev->vlan_rx_register = ace_vlan_rx_register;
482 dev->vlan_rx_kill_vid = ace_vlan_rx_kill_vid;
485 static void ace_watchdog(struct net_device *dev);
486 dev->tx_timeout = &ace_watchdog;
487 dev->watchdog_timeo = 5*HZ;
490 dev->open = &ace_open;
491 dev->stop = &ace_close;
492 dev->hard_start_xmit = &ace_start_xmit;
493 dev->get_stats = &ace_get_stats;
494 dev->set_multicast_list = &ace_set_multicast_list;
495 SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
496 dev->set_mac_address = &ace_set_mac_addr;
497 dev->change_mtu = &ace_change_mtu;
499 /* we only display this string ONCE */
503 if (pci_enable_device(pdev))
504 goto fail_free_netdev;
507 * Enable master mode before we start playing with the
508 * pci_command word since pci_set_master() will modify
511 pci_set_master(pdev);
513 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
515 /* OpenFirmware on Mac's does not set this - DOH.. */
516 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
517 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
518 "access - was not enabled by BIOS/Firmware\n",
520 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
521 pci_write_config_word(ap->pdev, PCI_COMMAND,
526 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
527 if (ap->pci_latency <= 0x40) {
528 ap->pci_latency = 0x40;
529 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
533 * Remap the regs into kernel space - this is abuse of
534 * dev->base_addr since it was means for I/O port
535 * addresses but who gives a damn.
537 dev->base_addr = pci_resource_start(pdev, 0);
538 ap->regs = (struct ace_regs *)ioremap(dev->base_addr, 0x4000);
540 printk(KERN_ERR "%s: Unable to map I/O register, "
541 "AceNIC %i will be disabled.\n",
542 dev->name, boards_found);
543 goto fail_free_netdev;
546 switch(pdev->vendor) {
547 case PCI_VENDOR_ID_ALTEON:
548 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
549 strncpy(ap->name, "Farallon PN9100-T "
550 "Gigabit Ethernet", sizeof (ap->name));
551 printk(KERN_INFO "%s: Farallon PN9100-T ",
554 strncpy(ap->name, "AceNIC Gigabit Ethernet",
556 printk(KERN_INFO "%s: Alteon AceNIC ",
560 case PCI_VENDOR_ID_3COM:
561 strncpy(ap->name, "3Com 3C985 Gigabit Ethernet",
563 printk(KERN_INFO "%s: 3Com 3C985 ", dev->name);
565 case PCI_VENDOR_ID_NETGEAR:
566 strncpy(ap->name, "NetGear GA620 Gigabit Ethernet",
568 printk(KERN_INFO "%s: NetGear GA620 ", dev->name);
570 case PCI_VENDOR_ID_DEC:
571 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
572 strncpy(ap->name, "Farallon PN9000-SX "
573 "Gigabit Ethernet", sizeof (ap->name));
574 printk(KERN_INFO "%s: Farallon PN9000-SX ",
578 case PCI_VENDOR_ID_SGI:
579 strncpy(ap->name, "SGI AceNIC Gigabit Ethernet",
581 printk(KERN_INFO "%s: SGI AceNIC ", dev->name);
584 strncpy(ap->name, "Unknown AceNIC based Gigabit "
585 "Ethernet", sizeof (ap->name));
586 printk(KERN_INFO "%s: Unknown AceNIC ", dev->name);
590 ap->name [sizeof (ap->name) - 1] = '\0';
591 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
593 printk("irq %s\n", __irq_itoa(pdev->irq));
595 printk("irq %i\n", pdev->irq);
598 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
599 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
600 printk(KERN_ERR "%s: Driver compiled without Tigon I"
601 " support - NIC disabled\n", dev->name);
606 if (ace_allocate_descriptors(dev))
607 goto fail_free_netdev;
610 if (boards_found >= ACE_MAX_MOD_PARMS)
611 ap->board_idx = BOARD_IDX_OVERFLOW;
613 ap->board_idx = boards_found;
615 ap->board_idx = BOARD_IDX_STATIC;
619 goto fail_free_netdev;
621 if (register_netdev(dev)) {
622 printk(KERN_ERR "acenic: device registration failed\n");
626 if (ap->pci_using_dac)
627 dev->features |= NETIF_F_HIGHDMA;
629 pci_set_drvdata(pdev, dev);
635 ace_init_cleanup(dev);
641 static void __devexit acenic_remove_one(struct pci_dev *pdev)
643 struct net_device *dev = pci_get_drvdata(pdev);
644 struct ace_private *ap = dev->priv;
645 struct ace_regs *regs = ap->regs;
648 unregister_netdev(dev);
650 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
651 if (ap->version >= 2)
652 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
655 * This clears any pending interrupts
657 writel(1, ®s->Mb0Lo);
658 readl(®s->CpuCtrl); /* flush */
661 * Make sure no other CPUs are processing interrupts
662 * on the card before the buffers are being released.
663 * Otherwise one might experience some `interesting'
666 * Then release the RX buffers - jumbo buffers were
667 * already released in ace_close().
669 ace_sync_irq(dev->irq);
671 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
672 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
675 struct ring_info *ringp;
678 ringp = &ap->skb->rx_std_skbuff[i];
679 mapping = pci_unmap_addr(ringp, mapping);
680 pci_unmap_page(ap->pdev, mapping,
681 ACE_STD_BUFSIZE - (2 + 16),
684 ap->rx_std_ring[i].size = 0;
685 ap->skb->rx_std_skbuff[i].skb = NULL;
690 if (ap->version >= 2) {
691 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
692 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
695 struct ring_info *ringp;
698 ringp = &ap->skb->rx_mini_skbuff[i];
699 mapping = pci_unmap_addr(ringp,mapping);
700 pci_unmap_page(ap->pdev, mapping,
701 ACE_MINI_BUFSIZE - (2 + 16),
704 ap->rx_mini_ring[i].size = 0;
705 ap->skb->rx_mini_skbuff[i].skb = NULL;
711 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
712 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
714 struct ring_info *ringp;
717 ringp = &ap->skb->rx_jumbo_skbuff[i];
718 mapping = pci_unmap_addr(ringp, mapping);
719 pci_unmap_page(ap->pdev, mapping,
720 ACE_JUMBO_BUFSIZE - (2 + 16),
723 ap->rx_jumbo_ring[i].size = 0;
724 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
729 ace_init_cleanup(dev);
733 static struct pci_driver acenic_pci_driver = {
735 .id_table = acenic_pci_tbl,
736 .probe = acenic_probe_one,
737 .remove = __devexit_p(acenic_remove_one),
740 static int __init acenic_init(void)
742 return pci_module_init(&acenic_pci_driver);
745 static void __exit acenic_exit(void)
747 pci_unregister_driver(&acenic_pci_driver);
750 module_init(acenic_init);
751 module_exit(acenic_exit);
753 static void ace_free_descriptors(struct net_device *dev)
755 struct ace_private *ap = dev->priv;
758 if (ap->rx_std_ring != NULL) {
759 size = (sizeof(struct rx_desc) *
760 (RX_STD_RING_ENTRIES +
761 RX_JUMBO_RING_ENTRIES +
762 RX_MINI_RING_ENTRIES +
763 RX_RETURN_RING_ENTRIES));
764 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
765 ap->rx_ring_base_dma);
766 ap->rx_std_ring = NULL;
767 ap->rx_jumbo_ring = NULL;
768 ap->rx_mini_ring = NULL;
769 ap->rx_return_ring = NULL;
771 if (ap->evt_ring != NULL) {
772 size = (sizeof(struct event) * EVT_RING_ENTRIES);
773 pci_free_consistent(ap->pdev, size, ap->evt_ring,
777 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
778 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
779 pci_free_consistent(ap->pdev, size, ap->tx_ring,
784 if (ap->evt_prd != NULL) {
785 pci_free_consistent(ap->pdev, sizeof(u32),
786 (void *)ap->evt_prd, ap->evt_prd_dma);
789 if (ap->rx_ret_prd != NULL) {
790 pci_free_consistent(ap->pdev, sizeof(u32),
791 (void *)ap->rx_ret_prd,
793 ap->rx_ret_prd = NULL;
795 if (ap->tx_csm != NULL) {
796 pci_free_consistent(ap->pdev, sizeof(u32),
797 (void *)ap->tx_csm, ap->tx_csm_dma);
803 static int ace_allocate_descriptors(struct net_device *dev)
805 struct ace_private *ap = dev->priv;
808 size = (sizeof(struct rx_desc) *
809 (RX_STD_RING_ENTRIES +
810 RX_JUMBO_RING_ENTRIES +
811 RX_MINI_RING_ENTRIES +
812 RX_RETURN_RING_ENTRIES));
814 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
815 &ap->rx_ring_base_dma);
816 if (ap->rx_std_ring == NULL)
819 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
820 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
821 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
823 size = (sizeof(struct event) * EVT_RING_ENTRIES);
825 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
827 if (ap->evt_ring == NULL)
831 * Only allocate a host TX ring for the Tigon II, the Tigon I
832 * has to use PCI registers for this ;-(
834 if (!ACE_IS_TIGON_I(ap)) {
835 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
837 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
840 if (ap->tx_ring == NULL)
844 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
846 if (ap->evt_prd == NULL)
849 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
850 &ap->rx_ret_prd_dma);
851 if (ap->rx_ret_prd == NULL)
854 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
856 if (ap->tx_csm == NULL)
863 ace_init_cleanup(dev);
869 * Generic cleanup handling data allocated during init. Used when the
870 * module is unloaded or if an error occurs during initialization
872 static void ace_init_cleanup(struct net_device *dev)
874 struct ace_private *ap;
878 ace_free_descriptors(dev);
881 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
882 ap->info, ap->info_dma);
886 kfree(ap->trace_buf);
889 free_irq(dev->irq, dev);
896 * Commands are considered to be slow.
898 static inline void ace_issue_cmd(struct ace_regs *regs, struct cmd *cmd)
902 idx = readl(®s->CmdPrd);
904 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
905 idx = (idx + 1) % CMD_RING_ENTRIES;
907 writel(idx, ®s->CmdPrd);
911 static int __init ace_init(struct net_device *dev)
913 struct ace_private *ap;
914 struct ace_regs *regs;
915 struct ace_info *info = NULL;
916 struct pci_dev *pdev;
919 u32 tig_ver, mac1, mac2, tmp, pci_state;
920 int board_idx, ecode = 0;
922 unsigned char cache_size;
927 board_idx = ap->board_idx;
930 * aman@sgi.com - its useful to do a NIC reset here to
931 * address the `Firmware not running' problem subsequent
932 * to any crashes involving the NIC
934 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
935 readl(®s->HostCtrl); /* PCI write posting */
939 * Don't access any other registers before this point!
943 * This will most likely need BYTE_SWAP once we switch
944 * to using __raw_writel()
946 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
949 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
952 readl(®s->HostCtrl); /* PCI write posting */
955 * Stop the NIC CPU and clear pending interrupts
957 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
958 readl(®s->CpuCtrl); /* PCI write posting */
959 writel(0, ®s->Mb0Lo);
961 tig_ver = readl(®s->HostCtrl) >> 28;
964 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
967 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
968 tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
970 writel(0, ®s->LocalCtrl);
972 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
976 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
977 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
979 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
980 readl(®s->CpuBCtrl); /* PCI write posting */
982 * The SRAM bank size does _not_ indicate the amount
983 * of memory on the card, it controls the _bank_ size!
984 * Ie. a 1MB AceNIC will have two banks of 512KB.
986 writel(SRAM_BANK_512K, ®s->LocalCtrl);
987 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
989 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
992 printk(KERN_WARNING " Unsupported Tigon version detected "
999 * ModeStat _must_ be set after the SRAM settings as this change
1000 * seems to corrupt the ModeStat and possible other registers.
1001 * The SRAM settings survive resets and setting it to the same
1002 * value a second time works as well. This is what caused the
1003 * `Firmware not running' problem on the Tigon II.
1006 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
1007 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
1009 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
1010 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
1012 readl(®s->ModeStat); /* PCI write posting */
1015 for(i = 0; i < 4; i++) {
1017 tmp = read_eeprom_byte(dev, 0x8c+i);
1022 mac1 |= (tmp & 0xff);
1025 for(i = 4; i < 8; i++) {
1027 tmp = read_eeprom_byte(dev, 0x8c+i);
1032 mac2 |= (tmp & 0xff);
1035 writel(mac1, ®s->MacAddrHi);
1036 writel(mac2, ®s->MacAddrLo);
1038 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1039 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1040 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1042 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1043 dev->dev_addr[1] = mac1 & 0xff;
1044 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1045 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1046 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1047 dev->dev_addr[5] = mac2 & 0xff;
1050 * Looks like this is necessary to deal with on all architectures,
1051 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1052 * Ie. having two NICs in the machine, one will have the cache
1053 * line set at boot time, the other will not.
1056 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1058 if (cache_size != SMP_CACHE_BYTES) {
1059 printk(KERN_INFO " PCI cache line size set incorrectly "
1060 "(%i bytes) by BIOS/FW, ", cache_size);
1061 if (cache_size > SMP_CACHE_BYTES)
1062 printk("expecting %i\n", SMP_CACHE_BYTES);
1064 printk("correcting to %i\n", SMP_CACHE_BYTES);
1065 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1066 SMP_CACHE_BYTES >> 2);
1070 pci_state = readl(®s->PciState);
1071 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1072 "latency: %i clks\n",
1073 (pci_state & PCI_32BIT) ? 32 : 64,
1074 (pci_state & PCI_66MHZ) ? 66 : 33,
1078 * Set the max DMA transfer size. Seems that for most systems
1079 * the performance is better when no MAX parameter is
1080 * set. However for systems enabling PCI write and invalidate,
1081 * DMA writes must be set to the L1 cache line size to get
1082 * optimal performance.
1084 * The default is now to turn the PCI write and invalidate off
1085 * - that is what Alteon does for NT.
1087 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1088 if (ap->version >= 2) {
1089 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1091 * Tuning parameters only supported for 8 cards
1093 if (board_idx == BOARD_IDX_OVERFLOW ||
1094 dis_pci_mem_inval[board_idx]) {
1095 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1096 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1097 pci_write_config_word(pdev, PCI_COMMAND,
1099 printk(KERN_INFO " Disabling PCI memory "
1100 "write and invalidate\n");
1102 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1103 printk(KERN_INFO " PCI memory write & invalidate "
1104 "enabled by BIOS, enabling counter measures\n");
1106 switch(SMP_CACHE_BYTES) {
1108 tmp |= DMA_WRITE_MAX_16;
1111 tmp |= DMA_WRITE_MAX_32;
1114 tmp |= DMA_WRITE_MAX_64;
1117 tmp |= DMA_WRITE_MAX_128;
1120 printk(KERN_INFO " Cache line size %i not "
1121 "supported, PCI write and invalidate "
1122 "disabled\n", SMP_CACHE_BYTES);
1123 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1124 pci_write_config_word(pdev, PCI_COMMAND,
1132 * On this platform, we know what the best dma settings
1133 * are. We use 64-byte maximum bursts, because if we
1134 * burst larger than the cache line size (or even cross
1135 * a 64byte boundary in a single burst) the UltraSparc
1136 * PCI controller will disconnect at 64-byte multiples.
1138 * Read-multiple will be properly enabled above, and when
1139 * set will give the PCI controller proper hints about
1142 tmp &= ~DMA_READ_WRITE_MASK;
1143 tmp |= DMA_READ_MAX_64;
1144 tmp |= DMA_WRITE_MAX_64;
1147 tmp &= ~DMA_READ_WRITE_MASK;
1148 tmp |= DMA_READ_MAX_128;
1150 * All the docs say MUST NOT. Well, I did.
1151 * Nothing terrible happens, if we load wrong size.
1152 * Bit w&i still works better!
1154 tmp |= DMA_WRITE_MAX_128;
1156 writel(tmp, ®s->PciState);
1160 * The Host PCI bus controller driver has to set FBB.
1161 * If all devices on that PCI bus support FBB, then the controller
1162 * can enable FBB support in the Host PCI Bus controller (or on
1163 * the PCI-PCI bridge if that applies).
1167 * I have received reports from people having problems when this
1170 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1171 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1172 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1173 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1178 * Configure DMA attributes.
1180 if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
1181 ap->pci_using_dac = 1;
1182 } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) {
1183 ap->pci_using_dac = 0;
1190 * Initialize the generic info block and the command+event rings
1191 * and the control blocks for the transmit and receive rings
1192 * as they need to be setup once and for all.
1194 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1202 * Get the memory for the skb rings.
1204 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1209 ecode = request_irq(pdev->irq, ace_interrupt, SA_SHIRQ,
1212 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1213 DRV_NAME, pdev->irq);
1216 dev->irq = pdev->irq;
1219 spin_lock_init(&ap->debug_lock);
1220 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1221 ap->last_std_rx = 0;
1222 ap->last_mini_rx = 0;
1225 memset(ap->info, 0, sizeof(struct ace_info));
1226 memset(ap->skb, 0, sizeof(struct ace_skb));
1228 ace_load_firmware(dev);
1231 tmp_ptr = ap->info_dma;
1232 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1233 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1235 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1237 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1238 info->evt_ctrl.flags = 0;
1242 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1243 writel(0, ®s->EvtCsm);
1245 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1246 info->cmd_ctrl.flags = 0;
1247 info->cmd_ctrl.max_len = 0;
1249 for (i = 0; i < CMD_RING_ENTRIES; i++)
1250 writel(0, ®s->CmdRng[i]);
1252 writel(0, ®s->CmdPrd);
1253 writel(0, ®s->CmdCsm);
1255 tmp_ptr = ap->info_dma;
1256 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1257 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1259 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1260 info->rx_std_ctrl.max_len = ACE_STD_MTU + ETH_HLEN + 4;
1261 info->rx_std_ctrl.flags =
1262 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1264 memset(ap->rx_std_ring, 0,
1265 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1267 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1268 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1270 ap->rx_std_skbprd = 0;
1271 atomic_set(&ap->cur_rx_bufs, 0);
1273 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1274 (ap->rx_ring_base_dma +
1275 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1276 info->rx_jumbo_ctrl.max_len = 0;
1277 info->rx_jumbo_ctrl.flags =
1278 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1280 memset(ap->rx_jumbo_ring, 0,
1281 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1283 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1284 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1286 ap->rx_jumbo_skbprd = 0;
1287 atomic_set(&ap->cur_jumbo_bufs, 0);
1289 memset(ap->rx_mini_ring, 0,
1290 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1292 if (ap->version >= 2) {
1293 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1294 (ap->rx_ring_base_dma +
1295 (sizeof(struct rx_desc) *
1296 (RX_STD_RING_ENTRIES +
1297 RX_JUMBO_RING_ENTRIES))));
1298 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1299 info->rx_mini_ctrl.flags =
1300 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1302 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1303 ap->rx_mini_ring[i].flags =
1304 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1306 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1307 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1308 info->rx_mini_ctrl.max_len = 0;
1311 ap->rx_mini_skbprd = 0;
1312 atomic_set(&ap->cur_mini_bufs, 0);
1314 set_aceaddr(&info->rx_return_ctrl.rngptr,
1315 (ap->rx_ring_base_dma +
1316 (sizeof(struct rx_desc) *
1317 (RX_STD_RING_ENTRIES +
1318 RX_JUMBO_RING_ENTRIES +
1319 RX_MINI_RING_ENTRIES))));
1320 info->rx_return_ctrl.flags = 0;
1321 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1323 memset(ap->rx_return_ring, 0,
1324 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1326 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1327 *(ap->rx_ret_prd) = 0;
1329 writel(TX_RING_BASE, ®s->WinBase);
1331 if (ACE_IS_TIGON_I(ap)) {
1332 ap->tx_ring = (struct tx_desc *)regs->Window;
1333 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES *
1334 sizeof(struct tx_desc) / 4); i++) {
1335 writel(0, (unsigned long)ap->tx_ring + i * 4);
1338 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1340 memset(ap->tx_ring, 0,
1341 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1343 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1346 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1347 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1350 * The Tigon I does not like having the TX ring in host memory ;-(
1352 if (!ACE_IS_TIGON_I(ap))
1353 tmp |= RCB_FLG_TX_HOST_RING;
1354 #if TX_COAL_INTS_ONLY
1355 tmp |= RCB_FLG_COAL_INT_ONLY;
1357 info->tx_ctrl.flags = tmp;
1359 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1362 * Potential item for tuning parameter
1365 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1366 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1368 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1369 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1372 writel(0, ®s->MaskInt);
1373 writel(1, ®s->IfIdx);
1376 * McKinley boxes do not like us fiddling with AssistState
1379 writel(1, ®s->AssistState);
1382 writel(DEF_STAT, ®s->TuneStatTicks);
1383 writel(DEF_TRACE, ®s->TuneTrace);
1385 ace_set_rxtx_parms(dev, 0);
1387 if (board_idx == BOARD_IDX_OVERFLOW) {
1388 printk(KERN_WARNING "%s: more than %i NICs detected, "
1389 "ignoring module parameters!\n",
1390 dev->name, ACE_MAX_MOD_PARMS);
1391 } else if (board_idx >= 0) {
1392 if (tx_coal_tick[board_idx])
1393 writel(tx_coal_tick[board_idx],
1394 ®s->TuneTxCoalTicks);
1395 if (max_tx_desc[board_idx])
1396 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1398 if (rx_coal_tick[board_idx])
1399 writel(rx_coal_tick[board_idx],
1400 ®s->TuneRxCoalTicks);
1401 if (max_rx_desc[board_idx])
1402 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1404 if (trace[board_idx])
1405 writel(trace[board_idx], ®s->TuneTrace);
1407 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1408 writel(tx_ratio[board_idx], ®s->TxBufRat);
1412 * Default link parameters
1414 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1415 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1416 if(ap->version >= 2)
1417 tmp |= LNK_TX_FLOW_CTL_Y;
1420 * Override link default parameters
1422 if ((board_idx >= 0) && link[board_idx]) {
1423 int option = link[board_idx];
1427 if (option & 0x01) {
1428 printk(KERN_INFO "%s: Setting half duplex link\n",
1430 tmp &= ~LNK_FULL_DUPLEX;
1433 tmp &= ~LNK_NEGOTIATE;
1440 if ((option & 0x70) == 0) {
1441 printk(KERN_WARNING "%s: No media speed specified, "
1442 "forcing auto negotiation\n", dev->name);
1443 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1444 LNK_100MB | LNK_10MB;
1446 if ((option & 0x100) == 0)
1447 tmp |= LNK_NEG_FCTL;
1449 printk(KERN_INFO "%s: Disabling flow control "
1450 "negotiation\n", dev->name);
1452 tmp |= LNK_RX_FLOW_CTL_Y;
1453 if ((option & 0x400) && (ap->version >= 2)) {
1454 printk(KERN_INFO "%s: Enabling TX flow control\n",
1456 tmp |= LNK_TX_FLOW_CTL_Y;
1461 writel(tmp, ®s->TuneLink);
1462 if (ap->version >= 2)
1463 writel(tmp, ®s->TuneFastLink);
1465 if (ACE_IS_TIGON_I(ap))
1466 writel(tigonFwStartAddr, ®s->Pc);
1467 if (ap->version == 2)
1468 writel(tigon2FwStartAddr, ®s->Pc);
1470 writel(0, ®s->Mb0Lo);
1473 * Set tx_csm before we start receiving interrupts, otherwise
1474 * the interrupt handler might think it is supposed to process
1475 * tx ints before we are up and running, which may cause a null
1476 * pointer access in the int handler.
1479 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1482 ace_set_txprd(regs, ap, 0);
1483 writel(0, ®s->RxRetCsm);
1486 * Zero the stats before starting the interface
1488 memset(&ap->stats, 0, sizeof(ap->stats));
1491 * Enable DMA engine now.
1492 * If we do this sooner, Mckinley box pukes.
1493 * I assume it's because Tigon II DMA engine wants to check
1494 * *something* even before the CPU is started.
1496 writel(1, ®s->AssistState); /* enable DMA */
1501 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1502 readl(®s->CpuCtrl);
1505 * Wait for the firmware to spin up - max 3 seconds.
1507 myjif = jiffies + 3 * HZ;
1508 while (time_before(jiffies, myjif) && !ap->fw_running)
1511 if (!ap->fw_running) {
1512 printk(KERN_ERR "%s: Firmware NOT running!\n", dev->name);
1515 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1516 readl(®s->CpuCtrl);
1518 /* aman@sgi.com - account for badly behaving firmware/NIC:
1519 * - have observed that the NIC may continue to generate
1520 * interrupts for some reason; attempt to stop it - halt
1521 * second CPU for Tigon II cards, and also clear Mb0
1522 * - if we're a module, we'll fail to load if this was
1523 * the only GbE card in the system => if the kernel does
1524 * see an interrupt from the NIC, code to handle it is
1525 * gone and OOps! - so free_irq also
1527 if (ap->version >= 2)
1528 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1530 writel(0, ®s->Mb0Lo);
1531 readl(®s->Mb0Lo);
1538 * We load the ring here as there seem to be no way to tell the
1539 * firmware to wipe the ring without re-initializing it.
1541 if (!test_and_set_bit(0, &ap->std_refill_busy))
1542 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1544 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1546 if (ap->version >= 2) {
1547 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1548 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1550 printk(KERN_ERR "%s: Someone is busy refilling "
1551 "the RX mini ring\n", dev->name);
1556 ace_init_cleanup(dev);
1561 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1563 struct ace_private *ap;
1564 struct ace_regs *regs;
1570 board_idx = ap->board_idx;
1572 if (board_idx >= 0) {
1574 if (!tx_coal_tick[board_idx])
1575 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1576 if (!max_tx_desc[board_idx])
1577 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1578 if (!rx_coal_tick[board_idx])
1579 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1580 if (!max_rx_desc[board_idx])
1581 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1582 if (!tx_ratio[board_idx])
1583 writel(DEF_TX_RATIO, ®s->TxBufRat);
1585 if (!tx_coal_tick[board_idx])
1586 writel(DEF_JUMBO_TX_COAL,
1587 ®s->TuneTxCoalTicks);
1588 if (!max_tx_desc[board_idx])
1589 writel(DEF_JUMBO_TX_MAX_DESC,
1590 ®s->TuneMaxTxDesc);
1591 if (!rx_coal_tick[board_idx])
1592 writel(DEF_JUMBO_RX_COAL,
1593 ®s->TuneRxCoalTicks);
1594 if (!max_rx_desc[board_idx])
1595 writel(DEF_JUMBO_RX_MAX_DESC,
1596 ®s->TuneMaxRxDesc);
1597 if (!tx_ratio[board_idx])
1598 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1604 static void ace_watchdog(struct net_device *data)
1606 struct net_device *dev = data;
1607 struct ace_private *ap = dev->priv;
1608 struct ace_regs *regs = ap->regs;
1611 * We haven't received a stats update event for more than 2.5
1612 * seconds and there is data in the transmit queue, thus we
1613 * asume the card is stuck.
1615 if (*ap->tx_csm != ap->tx_ret_csm) {
1616 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1617 dev->name, (unsigned int)readl(®s->HostCtrl));
1618 /* This can happen due to ieee flow control. */
1620 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1623 netif_wake_queue(dev);
1629 static void ace_tasklet(unsigned long dev)
1631 struct ace_private *ap = ((struct net_device *)dev)->priv;
1634 cur_size = atomic_read(&ap->cur_rx_bufs);
1635 if ((cur_size < RX_LOW_STD_THRES) &&
1636 !test_and_set_bit(0, &ap->std_refill_busy)) {
1638 printk("refilling buffers (current %i)\n", cur_size);
1640 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1643 if (ap->version >= 2) {
1644 cur_size = atomic_read(&ap->cur_mini_bufs);
1645 if ((cur_size < RX_LOW_MINI_THRES) &&
1646 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1648 printk("refilling mini buffers (current %i)\n",
1651 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1655 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1656 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1657 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1659 printk("refilling jumbo buffers (current %i)\n", cur_size);
1661 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1663 ap->tasklet_pending = 0;
1668 * Copy the contents of the NIC's trace buffer to kernel memory.
1670 static void ace_dump_trace(struct ace_private *ap)
1674 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1681 * Load the standard rx ring.
1683 * Loading rings is safe without holding the spin lock since this is
1684 * done only before the device is enabled, thus no interrupts are
1685 * generated and by the interrupt handler/tasklet handler.
1687 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1689 struct ace_regs *regs;
1694 prefetchw(&ap->cur_rx_bufs);
1696 idx = ap->rx_std_skbprd;
1698 for (i = 0; i < nr_bufs; i++) {
1699 struct sk_buff *skb;
1703 skb = alloc_skb(ACE_STD_BUFSIZE, GFP_ATOMIC);
1708 * Make sure IP header starts on a fresh cache line.
1710 skb_reserve(skb, 2 + 16);
1711 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1712 offset_in_page(skb->data),
1713 ACE_STD_BUFSIZE - (2 + 16),
1714 PCI_DMA_FROMDEVICE);
1715 ap->skb->rx_std_skbuff[idx].skb = skb;
1716 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1719 rd = &ap->rx_std_ring[idx];
1720 set_aceaddr(&rd->addr, mapping);
1721 rd->size = ACE_STD_MTU + ETH_HLEN + 4;
1723 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1729 atomic_add(i, &ap->cur_rx_bufs);
1730 ap->rx_std_skbprd = idx;
1732 if (ACE_IS_TIGON_I(ap)) {
1734 cmd.evt = C_SET_RX_PRD_IDX;
1736 cmd.idx = ap->rx_std_skbprd;
1737 ace_issue_cmd(regs, &cmd);
1739 writel(idx, ®s->RxStdPrd);
1744 clear_bit(0, &ap->std_refill_busy);
1748 printk(KERN_INFO "Out of memory when allocating "
1749 "standard receive buffers\n");
1754 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1756 struct ace_regs *regs;
1761 prefetchw(&ap->cur_mini_bufs);
1763 idx = ap->rx_mini_skbprd;
1764 for (i = 0; i < nr_bufs; i++) {
1765 struct sk_buff *skb;
1769 skb = alloc_skb(ACE_MINI_BUFSIZE, GFP_ATOMIC);
1774 * Make sure the IP header ends up on a fresh cache line
1776 skb_reserve(skb, 2 + 16);
1777 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1778 offset_in_page(skb->data),
1779 ACE_MINI_BUFSIZE - (2 + 16),
1780 PCI_DMA_FROMDEVICE);
1781 ap->skb->rx_mini_skbuff[idx].skb = skb;
1782 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1785 rd = &ap->rx_mini_ring[idx];
1786 set_aceaddr(&rd->addr, mapping);
1787 rd->size = ACE_MINI_SIZE;
1789 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1795 atomic_add(i, &ap->cur_mini_bufs);
1797 ap->rx_mini_skbprd = idx;
1799 writel(idx, ®s->RxMiniPrd);
1803 clear_bit(0, &ap->mini_refill_busy);
1806 printk(KERN_INFO "Out of memory when allocating "
1807 "mini receive buffers\n");
1813 * Load the jumbo rx ring, this may happen at any time if the MTU
1814 * is changed to a value > 1500.
1816 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1818 struct ace_regs *regs;
1823 idx = ap->rx_jumbo_skbprd;
1825 for (i = 0; i < nr_bufs; i++) {
1826 struct sk_buff *skb;
1830 skb = alloc_skb(ACE_JUMBO_BUFSIZE, GFP_ATOMIC);
1835 * Make sure the IP header ends up on a fresh cache line
1837 skb_reserve(skb, 2 + 16);
1838 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1839 offset_in_page(skb->data),
1840 ACE_JUMBO_BUFSIZE - (2 + 16),
1841 PCI_DMA_FROMDEVICE);
1842 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1843 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1846 rd = &ap->rx_jumbo_ring[idx];
1847 set_aceaddr(&rd->addr, mapping);
1848 rd->size = ACE_JUMBO_MTU + ETH_HLEN + 4;
1850 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1856 atomic_add(i, &ap->cur_jumbo_bufs);
1857 ap->rx_jumbo_skbprd = idx;
1859 if (ACE_IS_TIGON_I(ap)) {
1861 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1863 cmd.idx = ap->rx_jumbo_skbprd;
1864 ace_issue_cmd(regs, &cmd);
1866 writel(idx, ®s->RxJumboPrd);
1871 clear_bit(0, &ap->jumbo_refill_busy);
1874 if (net_ratelimit())
1875 printk(KERN_INFO "Out of memory when allocating "
1876 "jumbo receive buffers\n");
1882 * All events are considered to be slow (RX/TX ints do not generate
1883 * events) and are handled here, outside the main interrupt handler,
1884 * to reduce the size of the handler.
1886 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1888 struct ace_private *ap;
1892 while (evtcsm != evtprd) {
1893 switch (ap->evt_ring[evtcsm].evt) {
1895 printk(KERN_INFO "%s: Firmware up and running\n",
1900 case E_STATS_UPDATED:
1904 u16 code = ap->evt_ring[evtcsm].code;
1908 u32 state = readl(&ap->regs->GigLnkState);
1909 printk(KERN_WARNING "%s: Optical link UP "
1910 "(%s Duplex, Flow Control: %s%s)\n",
1912 state & LNK_FULL_DUPLEX ? "Full":"Half",
1913 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1914 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1918 printk(KERN_WARNING "%s: Optical link DOWN\n",
1921 case E_C_LINK_10_100:
1922 printk(KERN_WARNING "%s: 10/100BaseT link "
1926 printk(KERN_ERR "%s: Unknown optical link "
1927 "state %02x\n", dev->name, code);
1932 switch(ap->evt_ring[evtcsm].code) {
1933 case E_C_ERR_INVAL_CMD:
1934 printk(KERN_ERR "%s: invalid command error\n",
1937 case E_C_ERR_UNIMP_CMD:
1938 printk(KERN_ERR "%s: unimplemented command "
1939 "error\n", dev->name);
1941 case E_C_ERR_BAD_CFG:
1942 printk(KERN_ERR "%s: bad config error\n",
1946 printk(KERN_ERR "%s: unknown error %02x\n",
1947 dev->name, ap->evt_ring[evtcsm].code);
1950 case E_RESET_JUMBO_RNG:
1953 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1954 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1955 ap->rx_jumbo_ring[i].size = 0;
1956 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1957 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1958 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1962 if (ACE_IS_TIGON_I(ap)) {
1964 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1967 ace_issue_cmd(ap->regs, &cmd);
1969 writel(0, &((ap->regs)->RxJumboPrd));
1974 ap->rx_jumbo_skbprd = 0;
1975 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1977 clear_bit(0, &ap->jumbo_refill_busy);
1981 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1982 dev->name, ap->evt_ring[evtcsm].evt);
1984 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1991 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1993 struct ace_private *ap = dev->priv;
1995 int mini_count = 0, std_count = 0;
1999 prefetchw(&ap->cur_rx_bufs);
2000 prefetchw(&ap->cur_mini_bufs);
2002 while (idx != rxretprd) {
2003 struct ring_info *rip;
2004 struct sk_buff *skb;
2005 struct rx_desc *rxdesc, *retdesc;
2007 int bd_flags, desc_type, mapsize;
2011 /* make sure the rx descriptor isn't read before rxretprd */
2012 if (idx == rxretcsm)
2015 retdesc = &ap->rx_return_ring[idx];
2016 skbidx = retdesc->idx;
2017 bd_flags = retdesc->flags;
2018 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
2022 * Normal frames do not have any flags set
2024 * Mini and normal frames arrive frequently,
2025 * so use a local counter to avoid doing
2026 * atomic operations for each packet arriving.
2029 rip = &ap->skb->rx_std_skbuff[skbidx];
2030 mapsize = ACE_STD_BUFSIZE - (2 + 16);
2031 rxdesc = &ap->rx_std_ring[skbidx];
2035 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
2036 mapsize = ACE_JUMBO_BUFSIZE - (2 + 16);
2037 rxdesc = &ap->rx_jumbo_ring[skbidx];
2038 atomic_dec(&ap->cur_jumbo_bufs);
2041 rip = &ap->skb->rx_mini_skbuff[skbidx];
2042 mapsize = ACE_MINI_BUFSIZE - (2 + 16);
2043 rxdesc = &ap->rx_mini_ring[skbidx];
2047 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2048 "returned by NIC\n", dev->name,
2055 pci_unmap_page(ap->pdev,
2056 pci_unmap_addr(rip, mapping),
2058 PCI_DMA_FROMDEVICE);
2059 skb_put(skb, retdesc->size);
2064 csum = retdesc->tcp_udp_csum;
2067 skb->protocol = eth_type_trans(skb, dev);
2070 * Instead of forcing the poor tigon mips cpu to calculate
2071 * pseudo hdr checksum, we do this ourselves.
2073 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2074 skb->csum = htons(csum);
2075 skb->ip_summed = CHECKSUM_HW;
2077 skb->ip_summed = CHECKSUM_NONE;
2082 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2083 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2088 dev->last_rx = jiffies;
2089 ap->stats.rx_packets++;
2090 ap->stats.rx_bytes += retdesc->size;
2092 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2095 atomic_sub(std_count, &ap->cur_rx_bufs);
2096 if (!ACE_IS_TIGON_I(ap))
2097 atomic_sub(mini_count, &ap->cur_mini_bufs);
2101 * According to the documentation RxRetCsm is obsolete with
2102 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2104 if (ACE_IS_TIGON_I(ap)) {
2105 struct ace_regs *regs = ap->regs;
2106 writel(idx, ®s->RxRetCsm);
2117 static inline void ace_tx_int(struct net_device *dev,
2120 struct ace_private *ap = dev->priv;
2123 struct sk_buff *skb;
2125 struct tx_ring_info *info;
2127 info = ap->skb->tx_skbuff + idx;
2129 mapping = pci_unmap_addr(info, mapping);
2132 pci_unmap_page(ap->pdev, mapping,
2133 pci_unmap_len(info, maplen),
2135 pci_unmap_addr_set(info, mapping, 0);
2139 ap->stats.tx_packets++;
2140 ap->stats.tx_bytes += skb->len;
2141 dev_kfree_skb_irq(skb);
2145 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2146 } while (idx != txcsm);
2148 if (netif_queue_stopped(dev))
2149 netif_wake_queue(dev);
2152 ap->tx_ret_csm = txcsm;
2154 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2156 * We could try to make it before. In this case we would get
2157 * the following race condition: hard_start_xmit on other cpu
2158 * enters after we advanced tx_ret_csm and fills space,
2159 * which we have just freed, so that we make illegal device wakeup.
2160 * There is no good way to workaround this (at entry
2161 * to ace_start_xmit detects this condition and prevents
2162 * ring corruption, but it is not a good workaround.)
2164 * When tx_ret_csm is advanced after, we wake up device _only_
2165 * if we really have some space in ring (though the core doing
2166 * hard_start_xmit can see full ring for some period and has to
2167 * synchronize.) Superb.
2168 * BUT! We get another subtle race condition. hard_start_xmit
2169 * may think that ring is full between wakeup and advancing
2170 * tx_ret_csm and will stop device instantly! It is not so bad.
2171 * We are guaranteed that there is something in ring, so that
2172 * the next irq will resume transmission. To speedup this we could
2173 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2174 * (see ace_start_xmit).
2176 * Well, this dilemma exists in all lock-free devices.
2177 * We, following scheme used in drivers by Donald Becker,
2178 * select the least dangerous.
2184 static irqreturn_t ace_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2186 struct ace_private *ap;
2187 struct ace_regs *regs;
2188 struct net_device *dev = (struct net_device *)dev_id;
2190 u32 txcsm, rxretcsm, rxretprd;
2197 * In case of PCI shared interrupts or spurious interrupts,
2198 * we want to make sure it is actually our interrupt before
2199 * spending any time in here.
2201 if (!(readl(®s->HostCtrl) & IN_INT))
2205 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2206 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2207 * writel(0, ®s->Mb0Lo).
2209 * "IRQ avoidance" recommended in docs applies to IRQs served
2210 * threads and it is wrong even for that case.
2212 writel(0, ®s->Mb0Lo);
2213 readl(®s->Mb0Lo);
2216 * There is no conflict between transmit handling in
2217 * start_xmit and receive processing, thus there is no reason
2218 * to take a spin lock for RX handling. Wait until we start
2219 * working on the other stuff - hey we don't need a spin lock
2222 rxretprd = *ap->rx_ret_prd;
2223 rxretcsm = ap->cur_rx;
2225 if (rxretprd != rxretcsm)
2226 ace_rx_int(dev, rxretprd, rxretcsm);
2228 txcsm = *ap->tx_csm;
2229 idx = ap->tx_ret_csm;
2233 * If each skb takes only one descriptor this check degenerates
2234 * to identity, because new space has just been opened.
2235 * But if skbs are fragmented we must check that this index
2236 * update releases enough of space, otherwise we just
2237 * wait for device to make more work.
2239 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2240 ace_tx_int(dev, txcsm, idx);
2243 evtcsm = readl(®s->EvtCsm);
2244 evtprd = *ap->evt_prd;
2246 if (evtcsm != evtprd) {
2247 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2248 writel(evtcsm, ®s->EvtCsm);
2252 * This has to go last in the interrupt handler and run with
2253 * the spin lock released ... what lock?
2255 if (netif_running(dev)) {
2257 int run_tasklet = 0;
2259 cur_size = atomic_read(&ap->cur_rx_bufs);
2260 if (cur_size < RX_LOW_STD_THRES) {
2261 if ((cur_size < RX_PANIC_STD_THRES) &&
2262 !test_and_set_bit(0, &ap->std_refill_busy)) {
2264 printk("low on std buffers %i\n", cur_size);
2266 ace_load_std_rx_ring(ap,
2267 RX_RING_SIZE - cur_size);
2272 if (!ACE_IS_TIGON_I(ap)) {
2273 cur_size = atomic_read(&ap->cur_mini_bufs);
2274 if (cur_size < RX_LOW_MINI_THRES) {
2275 if ((cur_size < RX_PANIC_MINI_THRES) &&
2276 !test_and_set_bit(0,
2277 &ap->mini_refill_busy)) {
2279 printk("low on mini buffers %i\n",
2282 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2289 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2290 if (cur_size < RX_LOW_JUMBO_THRES) {
2291 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2292 !test_and_set_bit(0,
2293 &ap->jumbo_refill_busy)){
2295 printk("low on jumbo buffers %i\n",
2298 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2303 if (run_tasklet && !ap->tasklet_pending) {
2304 ap->tasklet_pending = 1;
2305 tasklet_schedule(&ap->ace_tasklet);
2314 static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2316 struct ace_private *ap = dev->priv;
2317 unsigned long flags;
2319 local_irq_save(flags);
2324 ace_unmask_irq(dev);
2325 local_irq_restore(flags);
2329 static void ace_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
2331 struct ace_private *ap = dev->priv;
2332 unsigned long flags;
2334 local_irq_save(flags);
2338 ap->vlgrp->vlan_devices[vid] = NULL;
2340 ace_unmask_irq(dev);
2341 local_irq_restore(flags);
2343 #endif /* ACENIC_DO_VLAN */
2346 static int ace_open(struct net_device *dev)
2348 struct ace_private *ap;
2349 struct ace_regs *regs;
2355 if (!(ap->fw_running)) {
2356 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2360 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2362 cmd.evt = C_CLEAR_STATS;
2365 ace_issue_cmd(regs, &cmd);
2367 cmd.evt = C_HOST_STATE;
2368 cmd.code = C_C_STACK_UP;
2370 ace_issue_cmd(regs, &cmd);
2373 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2374 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2376 if (dev->flags & IFF_PROMISC) {
2377 cmd.evt = C_SET_PROMISC_MODE;
2378 cmd.code = C_C_PROMISC_ENABLE;
2380 ace_issue_cmd(regs, &cmd);
2388 cmd.evt = C_LNK_NEGOTIATION;
2391 ace_issue_cmd(regs, &cmd);
2394 netif_start_queue(dev);
2397 * Setup the bottom half rx ring refill handler
2399 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2404 static int ace_close(struct net_device *dev)
2406 struct ace_private *ap;
2407 struct ace_regs *regs;
2409 unsigned long flags;
2413 * Without (or before) releasing irq and stopping hardware, this
2414 * is an absolute non-sense, by the way. It will be reset instantly
2417 netif_stop_queue(dev);
2423 cmd.evt = C_SET_PROMISC_MODE;
2424 cmd.code = C_C_PROMISC_DISABLE;
2426 ace_issue_cmd(regs, &cmd);
2430 cmd.evt = C_HOST_STATE;
2431 cmd.code = C_C_STACK_DOWN;
2433 ace_issue_cmd(regs, &cmd);
2435 tasklet_kill(&ap->ace_tasklet);
2438 * Make sure one CPU is not processing packets while
2439 * buffers are being released by another.
2442 local_irq_save(flags);
2445 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2446 struct sk_buff *skb;
2448 struct tx_ring_info *info;
2450 info = ap->skb->tx_skbuff + i;
2452 mapping = pci_unmap_addr(info, mapping);
2455 if (ACE_IS_TIGON_I(ap)) {
2456 writel(0, &ap->tx_ring[i].addr.addrhi);
2457 writel(0, &ap->tx_ring[i].addr.addrlo);
2458 writel(0, &ap->tx_ring[i].flagsize);
2460 memset(ap->tx_ring + i, 0,
2461 sizeof(struct tx_desc));
2462 pci_unmap_page(ap->pdev, mapping,
2463 pci_unmap_len(info, maplen),
2465 pci_unmap_addr_set(info, mapping, 0);
2474 cmd.evt = C_RESET_JUMBO_RNG;
2477 ace_issue_cmd(regs, &cmd);
2480 ace_unmask_irq(dev);
2481 local_irq_restore(flags);
2487 static inline dma_addr_t
2488 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2489 struct sk_buff *tail, u32 idx)
2492 struct tx_ring_info *info;
2494 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2495 offset_in_page(skb->data),
2496 skb->len, PCI_DMA_TODEVICE);
2498 info = ap->skb->tx_skbuff + idx;
2500 pci_unmap_addr_set(info, mapping, mapping);
2501 pci_unmap_len_set(info, maplen, skb->len);
2507 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2508 u32 flagsize, u32 vlan_tag)
2510 #if !USE_TX_COAL_NOW
2511 flagsize &= ~BD_FLG_COAL_NOW;
2514 if (ACE_IS_TIGON_I(ap)) {
2515 writel(addr >> 32, &desc->addr.addrhi);
2516 writel(addr & 0xffffffff, &desc->addr.addrlo);
2517 writel(flagsize, &desc->flagsize);
2519 writel(vlan_tag, &desc->vlanres);
2522 desc->addr.addrhi = addr >> 32;
2523 desc->addr.addrlo = addr;
2524 desc->flagsize = flagsize;
2526 desc->vlanres = vlan_tag;
2532 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2534 struct ace_private *ap = dev->priv;
2535 struct ace_regs *regs = ap->regs;
2536 struct tx_desc *desc;
2542 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2546 if (!skb_shinfo(skb)->nr_frags)
2552 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2553 flagsize = (skb->len << 16) | (BD_FLG_END);
2554 if (skb->ip_summed == CHECKSUM_HW)
2555 flagsize |= BD_FLG_TCP_UDP_SUM;
2557 if (vlan_tx_tag_present(skb)) {
2558 flagsize |= BD_FLG_VLAN_TAG;
2559 vlan_tag = vlan_tx_tag_get(skb);
2562 desc = ap->tx_ring + idx;
2563 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2565 /* Look at ace_tx_int for explanations. */
2566 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2567 flagsize |= BD_FLG_COAL_NOW;
2569 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2577 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2578 flagsize = (skb_headlen(skb) << 16);
2579 if (skb->ip_summed == CHECKSUM_HW)
2580 flagsize |= BD_FLG_TCP_UDP_SUM;
2582 if (vlan_tx_tag_present(skb)) {
2583 flagsize |= BD_FLG_VLAN_TAG;
2584 vlan_tag = vlan_tx_tag_get(skb);
2588 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2590 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2592 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2593 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2594 struct tx_ring_info *info;
2597 info = ap->skb->tx_skbuff + idx;
2598 desc = ap->tx_ring + idx;
2600 mapping = pci_map_page(ap->pdev, frag->page,
2601 frag->page_offset, frag->size,
2604 flagsize = (frag->size << 16);
2605 if (skb->ip_summed == CHECKSUM_HW)
2606 flagsize |= BD_FLG_TCP_UDP_SUM;
2607 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2609 if (i == skb_shinfo(skb)->nr_frags - 1) {
2610 flagsize |= BD_FLG_END;
2611 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2612 flagsize |= BD_FLG_COAL_NOW;
2615 * Only the last fragment frees
2622 pci_unmap_addr_set(info, mapping, mapping);
2623 pci_unmap_len_set(info, maplen, frag->size);
2624 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2631 ace_set_txprd(regs, ap, idx);
2633 if (flagsize & BD_FLG_COAL_NOW) {
2634 netif_stop_queue(dev);
2637 * A TX-descriptor producer (an IRQ) might have gotten
2638 * inbetween, making the ring free again. Since xmit is
2639 * serialized, this is the only situation we have to
2642 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2643 netif_wake_queue(dev);
2646 dev->trans_start = jiffies;
2651 * This race condition is unavoidable with lock-free drivers.
2652 * We wake up the queue _before_ tx_prd is advanced, so that we can
2653 * enter hard_start_xmit too early, while tx ring still looks closed.
2654 * This happens ~1-4 times per 100000 packets, so that we can allow
2655 * to loop syncing to other CPU. Probably, we need an additional
2656 * wmb() in ace_tx_intr as well.
2658 * Note that this race is relieved by reserving one more entry
2659 * in tx ring than it is necessary (see original non-SG driver).
2660 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2661 * is already overkill.
2663 * Alternative is to return with 1 not throttling queue. In this
2664 * case loop becomes longer, no more useful effects.
2671 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2673 struct ace_private *ap = dev->priv;
2674 struct ace_regs *regs = ap->regs;
2676 if (new_mtu > ACE_JUMBO_MTU)
2679 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2682 if (new_mtu > ACE_STD_MTU) {
2684 printk(KERN_INFO "%s: Enabling Jumbo frame "
2685 "support\n", dev->name);
2687 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2688 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2689 ace_set_rxtx_parms(dev, 1);
2692 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2693 ace_sync_irq(dev->irq);
2694 ace_set_rxtx_parms(dev, 0);
2698 cmd.evt = C_RESET_JUMBO_RNG;
2701 ace_issue_cmd(regs, &cmd);
2708 static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2710 struct ace_private *ap = dev->priv;
2711 struct ace_regs *regs = ap->regs;
2714 memset(ecmd, 0, sizeof(struct ethtool_cmd));
2716 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2717 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2718 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2719 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2721 ecmd->port = PORT_FIBRE;
2722 ecmd->transceiver = XCVR_INTERNAL;
2724 link = readl(®s->GigLnkState);
2725 if (link & LNK_1000MB)
2726 ecmd->speed = SPEED_1000;
2728 link = readl(®s->FastLnkState);
2729 if (link & LNK_100MB)
2730 ecmd->speed = SPEED_100;
2731 else if (link & LNK_10MB)
2732 ecmd->speed = SPEED_10;
2736 if (link & LNK_FULL_DUPLEX)
2737 ecmd->duplex = DUPLEX_FULL;
2739 ecmd->duplex = DUPLEX_HALF;
2741 if (link & LNK_NEGOTIATE)
2742 ecmd->autoneg = AUTONEG_ENABLE;
2744 ecmd->autoneg = AUTONEG_DISABLE;
2748 * Current struct ethtool_cmd is insufficient
2750 ecmd->trace = readl(®s->TuneTrace);
2752 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2753 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2755 ecmd->maxtxpkt = readl(®s->TuneMaxTxDesc);
2756 ecmd->maxrxpkt = readl(®s->TuneMaxRxDesc);
2761 static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2763 struct ace_private *ap = dev->priv;
2764 struct ace_regs *regs = ap->regs;
2767 link = readl(®s->GigLnkState);
2768 if (link & LNK_1000MB)
2771 link = readl(®s->FastLnkState);
2772 if (link & LNK_100MB)
2774 else if (link & LNK_10MB)
2780 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2781 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2782 if (!ACE_IS_TIGON_I(ap))
2783 link |= LNK_TX_FLOW_CTL_Y;
2784 if (ecmd->autoneg == AUTONEG_ENABLE)
2785 link |= LNK_NEGOTIATE;
2786 if (ecmd->speed != speed) {
2787 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2801 if (ecmd->duplex == DUPLEX_FULL)
2802 link |= LNK_FULL_DUPLEX;
2804 if (link != ap->link) {
2806 printk(KERN_INFO "%s: Renegotiating link state\n",
2810 writel(link, ®s->TuneLink);
2811 if (!ACE_IS_TIGON_I(ap))
2812 writel(link, ®s->TuneFastLink);
2815 cmd.evt = C_LNK_NEGOTIATION;
2818 ace_issue_cmd(regs, &cmd);
2823 static void ace_get_drvinfo(struct net_device *dev,
2824 struct ethtool_drvinfo *info)
2826 struct ace_private *ap = dev->priv;
2828 strlcpy(info->driver, "acenic", sizeof(info->driver));
2829 snprintf(info->version, sizeof(info->version), "%i.%i.%i",
2830 tigonFwReleaseMajor, tigonFwReleaseMinor,
2834 strlcpy(info->bus_info, pci_name(ap->pdev),
2835 sizeof(info->bus_info));
2840 * Set the hardware MAC address.
2842 static int ace_set_mac_addr(struct net_device *dev, void *p)
2844 struct sockaddr *addr=p;
2845 struct ace_regs *regs;
2849 if(netif_running(dev))
2852 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2854 da = (u8 *)dev->dev_addr;
2856 regs = ((struct ace_private *)dev->priv)->regs;
2857 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2858 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2861 cmd.evt = C_SET_MAC_ADDR;
2864 ace_issue_cmd(regs, &cmd);
2870 static void ace_set_multicast_list(struct net_device *dev)
2872 struct ace_private *ap = dev->priv;
2873 struct ace_regs *regs = ap->regs;
2876 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2877 cmd.evt = C_SET_MULTICAST_MODE;
2878 cmd.code = C_C_MCAST_ENABLE;
2880 ace_issue_cmd(regs, &cmd);
2882 } else if (ap->mcast_all) {
2883 cmd.evt = C_SET_MULTICAST_MODE;
2884 cmd.code = C_C_MCAST_DISABLE;
2886 ace_issue_cmd(regs, &cmd);
2890 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2891 cmd.evt = C_SET_PROMISC_MODE;
2892 cmd.code = C_C_PROMISC_ENABLE;
2894 ace_issue_cmd(regs, &cmd);
2896 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2897 cmd.evt = C_SET_PROMISC_MODE;
2898 cmd.code = C_C_PROMISC_DISABLE;
2900 ace_issue_cmd(regs, &cmd);
2905 * For the time being multicast relies on the upper layers
2906 * filtering it properly. The Firmware does not allow one to
2907 * set the entire multicast list at a time and keeping track of
2908 * it here is going to be messy.
2910 if ((dev->mc_count) && !(ap->mcast_all)) {
2911 cmd.evt = C_SET_MULTICAST_MODE;
2912 cmd.code = C_C_MCAST_ENABLE;
2914 ace_issue_cmd(regs, &cmd);
2915 }else if (!ap->mcast_all) {
2916 cmd.evt = C_SET_MULTICAST_MODE;
2917 cmd.code = C_C_MCAST_DISABLE;
2919 ace_issue_cmd(regs, &cmd);
2924 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2926 struct ace_private *ap = dev->priv;
2927 struct ace_mac_stats *mac_stats =
2928 (struct ace_mac_stats *)ap->regs->Stats;
2930 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2931 ap->stats.multicast = readl(&mac_stats->kept_mc);
2932 ap->stats.collisions = readl(&mac_stats->coll);
2938 static void __init ace_copy(struct ace_regs *regs, void *src,
2941 unsigned long tdest;
2949 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2950 min_t(u32, size, ACE_WINDOW_SIZE));
2951 tdest = (unsigned long)®s->Window +
2952 (dest & (ACE_WINDOW_SIZE - 1));
2953 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2955 * This requires byte swapping on big endian, however
2956 * writel does that for us
2959 for (i = 0; i < (tsize / 4); i++) {
2960 writel(wsrc[i], tdest + i*4);
2971 static void __init ace_clear(struct ace_regs *regs, u32 dest, int size)
2973 unsigned long tdest;
2980 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2981 min_t(u32, size, ACE_WINDOW_SIZE));
2982 tdest = (unsigned long)®s->Window +
2983 (dest & (ACE_WINDOW_SIZE - 1));
2984 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2986 for (i = 0; i < (tsize / 4); i++) {
2987 writel(0, tdest + i*4);
2999 * Download the firmware into the SRAM on the NIC
3001 * This operation requires the NIC to be halted and is performed with
3002 * interrupts disabled and with the spinlock hold.
3004 int __init ace_load_firmware(struct net_device *dev)
3006 struct ace_private *ap;
3007 struct ace_regs *regs;
3012 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
3013 printk(KERN_ERR "%s: trying to download firmware while the "
3014 "CPU is running!\n", dev->name);
3019 * Do not try to clear more than 512KB or we end up seeing
3020 * funny things on NICs with only 512KB SRAM
3022 ace_clear(regs, 0x2000, 0x80000-0x2000);
3023 if (ACE_IS_TIGON_I(ap)) {
3024 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
3025 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
3026 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
3028 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
3029 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
3030 }else if (ap->version == 2) {
3031 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
3032 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
3033 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
3034 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
3036 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
3044 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3046 * Accessing the EEPROM is `interesting' to say the least - don't read
3047 * this code right after dinner.
3049 * This is all about black magic and bit-banging the device .... I
3050 * wonder in what hospital they have put the guy who designed the i2c
3053 * Oh yes, this is only the beginning!
3055 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3056 * code i2c readout code by beta testing all my hacks.
3058 static void __init eeprom_start(struct ace_regs *regs)
3062 readl(®s->LocalCtrl);
3063 udelay(ACE_SHORT_DELAY);
3064 local = readl(®s->LocalCtrl);
3065 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3066 writel(local, ®s->LocalCtrl);
3067 readl(®s->LocalCtrl);
3069 udelay(ACE_SHORT_DELAY);
3070 local |= EEPROM_CLK_OUT;
3071 writel(local, ®s->LocalCtrl);
3072 readl(®s->LocalCtrl);
3074 udelay(ACE_SHORT_DELAY);
3075 local &= ~EEPROM_DATA_OUT;
3076 writel(local, ®s->LocalCtrl);
3077 readl(®s->LocalCtrl);
3079 udelay(ACE_SHORT_DELAY);
3080 local &= ~EEPROM_CLK_OUT;
3081 writel(local, ®s->LocalCtrl);
3082 readl(®s->LocalCtrl);
3087 static void __init eeprom_prep(struct ace_regs *regs, u8 magic)
3092 udelay(ACE_SHORT_DELAY);
3093 local = readl(®s->LocalCtrl);
3094 local &= ~EEPROM_DATA_OUT;
3095 local |= EEPROM_WRITE_ENABLE;
3096 writel(local, ®s->LocalCtrl);
3097 readl(®s->LocalCtrl);
3100 for (i = 0; i < 8; i++, magic <<= 1) {
3101 udelay(ACE_SHORT_DELAY);
3103 local |= EEPROM_DATA_OUT;
3105 local &= ~EEPROM_DATA_OUT;
3106 writel(local, ®s->LocalCtrl);
3107 readl(®s->LocalCtrl);
3110 udelay(ACE_SHORT_DELAY);
3111 local |= EEPROM_CLK_OUT;
3112 writel(local, ®s->LocalCtrl);
3113 readl(®s->LocalCtrl);
3115 udelay(ACE_SHORT_DELAY);
3116 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3117 writel(local, ®s->LocalCtrl);
3118 readl(®s->LocalCtrl);
3124 static int __init eeprom_check_ack(struct ace_regs *regs)
3129 local = readl(®s->LocalCtrl);
3130 local &= ~EEPROM_WRITE_ENABLE;
3131 writel(local, ®s->LocalCtrl);
3132 readl(®s->LocalCtrl);
3134 udelay(ACE_LONG_DELAY);
3135 local |= EEPROM_CLK_OUT;
3136 writel(local, ®s->LocalCtrl);
3137 readl(®s->LocalCtrl);
3139 udelay(ACE_SHORT_DELAY);
3140 /* sample data in middle of high clk */
3141 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3142 udelay(ACE_SHORT_DELAY);
3144 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3145 readl(®s->LocalCtrl);
3152 static void __init eeprom_stop(struct ace_regs *regs)
3156 udelay(ACE_SHORT_DELAY);
3157 local = readl(®s->LocalCtrl);
3158 local |= EEPROM_WRITE_ENABLE;
3159 writel(local, ®s->LocalCtrl);
3160 readl(®s->LocalCtrl);
3162 udelay(ACE_SHORT_DELAY);
3163 local &= ~EEPROM_DATA_OUT;
3164 writel(local, ®s->LocalCtrl);
3165 readl(®s->LocalCtrl);
3167 udelay(ACE_SHORT_DELAY);
3168 local |= EEPROM_CLK_OUT;
3169 writel(local, ®s->LocalCtrl);
3170 readl(®s->LocalCtrl);
3172 udelay(ACE_SHORT_DELAY);
3173 local |= EEPROM_DATA_OUT;
3174 writel(local, ®s->LocalCtrl);
3175 readl(®s->LocalCtrl);
3177 udelay(ACE_LONG_DELAY);
3178 local &= ~EEPROM_CLK_OUT;
3179 writel(local, ®s->LocalCtrl);
3185 * Read a whole byte from the EEPROM.
3187 static int __init read_eeprom_byte(struct net_device *dev,
3188 unsigned long offset)
3190 struct ace_regs *regs;
3191 unsigned long flags;
3197 printk(KERN_ERR "No device!\n");
3199 goto eeprom_read_error;
3202 regs = ((struct ace_private *)dev->priv)->regs;
3205 * Don't take interrupts on this CPU will bit banging
3206 * the %#%#@$ I2C device
3208 local_irq_save(flags);
3212 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3213 if (eeprom_check_ack(regs)) {
3214 local_irq_restore(flags);
3215 printk(KERN_ERR "%s: Unable to sync eeprom\n", dev->name);
3217 goto eeprom_read_error;
3220 eeprom_prep(regs, (offset >> 8) & 0xff);
3221 if (eeprom_check_ack(regs)) {
3222 local_irq_restore(flags);
3223 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3226 goto eeprom_read_error;
3229 eeprom_prep(regs, offset & 0xff);
3230 if (eeprom_check_ack(regs)) {
3231 local_irq_restore(flags);
3232 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3235 goto eeprom_read_error;
3239 eeprom_prep(regs, EEPROM_READ_SELECT);
3240 if (eeprom_check_ack(regs)) {
3241 local_irq_restore(flags);
3242 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3245 goto eeprom_read_error;
3248 for (i = 0; i < 8; i++) {
3249 local = readl(®s->LocalCtrl);
3250 local &= ~EEPROM_WRITE_ENABLE;
3251 writel(local, ®s->LocalCtrl);
3252 readl(®s->LocalCtrl);
3253 udelay(ACE_LONG_DELAY);
3255 local |= EEPROM_CLK_OUT;
3256 writel(local, ®s->LocalCtrl);
3257 readl(®s->LocalCtrl);
3259 udelay(ACE_SHORT_DELAY);
3260 /* sample data mid high clk */
3261 result = (result << 1) |
3262 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3263 udelay(ACE_SHORT_DELAY);
3265 local = readl(®s->LocalCtrl);
3266 local &= ~EEPROM_CLK_OUT;
3267 writel(local, ®s->LocalCtrl);
3268 readl(®s->LocalCtrl);
3269 udelay(ACE_SHORT_DELAY);
3272 local |= EEPROM_WRITE_ENABLE;
3273 writel(local, ®s->LocalCtrl);
3274 readl(®s->LocalCtrl);
3276 udelay(ACE_SHORT_DELAY);
3280 local |= EEPROM_DATA_OUT;
3281 writel(local, ®s->LocalCtrl);
3282 readl(®s->LocalCtrl);
3284 udelay(ACE_SHORT_DELAY);
3285 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3286 readl(®s->LocalCtrl);
3287 udelay(ACE_LONG_DELAY);
3288 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3289 readl(®s->LocalCtrl);
3291 udelay(ACE_SHORT_DELAY);
3294 local_irq_restore(flags);
3299 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3307 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"