3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * io = for the base address
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
59 static const char version[] =
60 "smc91x.c: v1.0, mar 07 2003 by Nicolas Pitre <nico@cam.org>\n";
68 #include <linux/config.h>
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/timer.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
84 #include <linux/netdevice.h>
85 #include <linux/etherdevice.h>
86 #include <linux/skbuff.h>
89 #include <asm/hardware.h>
96 * the LAN91C111 can be at any of the following port addresses. To change,
97 * for a slightly different card, you can add it to the array. Keep in
98 * mind that the array must end in zero.
100 static unsigned int smc_portlist[] __initdata = {
101 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
102 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
106 # define SMC_IOADDR -1
108 static unsigned long io = SMC_IOADDR;
109 module_param(io, ulong, 0400);
110 MODULE_PARM_DESC(io, "I/O base address");
115 static int irq = SMC_IRQ;
116 module_param(irq, int, 0400);
117 MODULE_PARM_DESC(irq, "IRQ number");
119 #endif /* CONFIG_ISA */
122 # define SMC_NOWAIT 0
124 static int nowait = SMC_NOWAIT;
125 module_param(nowait, int, 0400);
126 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
129 * Transmit timeout, default 5 seconds.
131 static int watchdog = 5000;
132 module_param(watchdog, int, 0400);
133 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
135 MODULE_LICENSE("GPL");
138 * The internal workings of the driver. If you are changing anything
139 * here with the SMC stuff, you should have the datasheet and know
140 * what you are doing.
142 #define CARDNAME "smc91x"
145 * Use power-down feature of the chip
150 * Wait time for memory to be free. This probably shouldn't be
151 * tuned that much, as waiting for this means nothing else happens
154 #define MEMORY_WAIT_TIME 16
157 * This selects whether TX packets are sent one by one to the SMC91x internal
158 * memory and throttled until transmission completes. This may prevent
159 * RX overruns a litle by keeping much of the memory free for RX packets
160 * but to the expense of reduced TX throughput and increased IRQ overhead.
161 * Note this is not a cure for a too slow data bus or too high IRQ latency.
163 #define THROTTLE_TX_PKTS 0
166 * The MII clock high/low times. 2x this number gives the MII clock period
167 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
171 /* store this information for the driver.. */
174 * If I have to wait until memory is available to send a
175 * packet, I will store the skbuff here, until I get the
176 * desired memory. Then, I'll send it out and free it.
178 struct sk_buff *saved_skb;
181 * these are things that the kernel wants me to keep, so users
182 * can find out semi-useless statistics of how well the card is
185 struct net_device_stats stats;
187 /* version/revision of the SMC91x chip */
190 /* Contains the current active transmission mode */
193 /* Contains the current active receive mode */
196 /* Contains the current active receive/phy mode */
203 struct mii_if_info mii;
206 #ifdef SMC_USE_PXA_DMA
207 /* DMA needs the physical address of the chip */
213 #define DBG(n, args...) \
215 if (SMC_DEBUG >= (n)) \
216 printk(KERN_DEBUG args); \
219 #define PRINTK(args...) printk(args)
221 #define DBG(n, args...) do { } while(0)
222 #define PRINTK(args...) printk(KERN_DEBUG args)
226 static void PRINT_PKT(u_char *buf, int length)
233 remainder = length % 16;
235 for (i = 0; i < lines ; i ++) {
237 for (cur = 0; cur < 8; cur++) {
241 printk("%02x%02x ", a, b);
245 for (i = 0; i < remainder/2 ; i++) {
249 printk("%02x%02x ", a, b);
254 #define PRINT_PKT(x...) do { } while(0)
258 /* this enables an interrupt in the interrupt mask register */
259 #define SMC_ENABLE_INT(x) do { \
260 unsigned long flags; \
261 unsigned char mask; \
262 spin_lock_irqsave(&lp->lock, flags); \
263 mask = SMC_GET_INT_MASK(); \
265 SMC_SET_INT_MASK(mask); \
266 spin_unlock_irqrestore(&lp->lock, flags); \
269 /* this disables an interrupt from the interrupt mask register */
270 #define SMC_DISABLE_INT(x) do { \
271 unsigned long flags; \
272 unsigned char mask; \
273 spin_lock_irqsave(&lp->lock, flags); \
274 mask = SMC_GET_INT_MASK(); \
276 SMC_SET_INT_MASK(mask); \
277 spin_unlock_irqrestore(&lp->lock, flags); \
281 * Wait while MMU is busy. This is usually in the order of a few nanosecs
282 * if at all, but let's avoid deadlocking the system if the hardware
283 * decides to go south.
285 #define SMC_WAIT_MMU_BUSY() do { \
286 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
287 unsigned long timeout = jiffies + 2; \
288 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
289 if (time_after(jiffies, timeout)) { \
290 printk("%s: timeout %s line %d\n", \
291 dev->name, __FILE__, __LINE__); \
301 * this does a soft reset on the device
303 static void smc_reset(struct net_device *dev)
305 unsigned long ioaddr = dev->base_addr;
306 unsigned int ctl, cfg;
308 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
311 * This resets the registers mostly to defaults, but doesn't
312 * affect EEPROM. That seems unnecessary
315 SMC_SET_RCR(RCR_SOFTRST);
318 * Setup the Configuration Register
319 * This is necessary because the CONFIG_REG is not affected
324 cfg = CONFIG_DEFAULT;
327 * Setup for fast accesses if requested. If the card/system
328 * can't handle it then there will be no recovery except for
329 * a hard reset or power cycle
332 cfg |= CONFIG_NO_WAIT;
335 * Release from possible power-down state
336 * Configuration register is not affected by Soft Reset
338 cfg |= CONFIG_EPH_POWER_EN;
342 /* this should pause enough for the chip to be happy */
344 * elaborate? What does the chip _need_? --jgarzik
346 * This seems to be undocumented, but something the original
347 * driver(s) have always done. Suspect undocumented timing
348 * info/determined empirically. --rmk
352 /* Disable transmit and receive functionality */
354 SMC_SET_RCR(RCR_CLEAR);
355 SMC_SET_TCR(TCR_CLEAR);
358 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
361 * Set the control register to automatically release successfully
362 * transmitted packets, to make the best use out of our limited
365 #if ! THROTTLE_TX_PKTS
366 ctl |= CTL_AUTO_RELEASE;
368 ctl &= ~CTL_AUTO_RELEASE;
372 /* Disable all interrupts */
377 SMC_SET_MMU_CMD(MC_RESET);
382 * Enable Interrupts, Receive, and Transmit
384 static void smc_enable(struct net_device *dev)
386 unsigned long ioaddr = dev->base_addr;
387 struct smc_local *lp = netdev_priv(dev);
390 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
392 /* see the header file for options in TCR/RCR DEFAULT */
394 SMC_SET_TCR(lp->tcr_cur_mode);
395 SMC_SET_RCR(lp->rcr_cur_mode);
397 /* now, enable interrupts */
398 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
399 if (lp->version >= (CHIP_91100 << 4))
402 SMC_SET_INT_MASK(mask);
406 * this puts the device in an inactive state
408 static void smc_shutdown(unsigned long ioaddr)
410 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
412 /* no more interrupts for me */
416 /* and tell the card to stay away from that nasty outside world */
418 SMC_SET_RCR(RCR_CLEAR);
419 SMC_SET_TCR(TCR_CLEAR);
422 /* finally, shut the chip down */
424 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
429 * This is the procedure to handle the receipt of a packet.
431 static inline void smc_rcv(struct net_device *dev)
433 struct smc_local *lp = netdev_priv(dev);
434 unsigned long ioaddr = dev->base_addr;
435 unsigned int packet_number, status, packet_len;
437 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
439 packet_number = SMC_GET_RXFIFO();
440 if (unlikely(packet_number & RXFIFO_REMPTY)) {
441 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
445 /* read from start of packet */
446 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
448 /* First two words are status and packet length */
449 SMC_GET_PKT_HDR(status, packet_len);
450 packet_len &= 0x07ff; /* mask off top bits */
451 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
452 dev->name, packet_number, status,
453 packet_len, packet_len);
455 if (unlikely(status & RS_ERRORS)) {
456 lp->stats.rx_errors++;
457 if (status & RS_ALGNERR)
458 lp->stats.rx_frame_errors++;
459 if (status & (RS_TOOSHORT | RS_TOOLONG))
460 lp->stats.rx_length_errors++;
461 if (status & RS_BADCRC)
462 lp->stats.rx_crc_errors++;
466 unsigned int data_len;
468 /* set multicast stats */
469 if (status & RS_MULTICAST)
470 lp->stats.multicast++;
473 * Actual payload is packet_len - 4 (or 3 if odd byte).
474 * We want skb_reserve(2) and the final ctrl word
475 * (2 bytes, possibly containing the payload odd byte).
476 * Ence packet_len - 4 + 2 + 2.
478 skb = dev_alloc_skb(packet_len);
479 if (unlikely(skb == NULL)) {
480 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
482 lp->stats.rx_dropped++;
486 /* Align IP header to 32 bits */
489 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
490 if (lp->version == 0x90)
491 status |= RS_ODDFRAME;
494 * If odd length: packet_len - 3,
495 * otherwise packet_len - 4.
497 data_len = packet_len - ((status & RS_ODDFRAME) ? 3 : 4);
498 data = skb_put(skb, data_len);
499 SMC_PULL_DATA(data, packet_len - 2);
501 PRINT_PKT(data, packet_len - 2);
503 dev->last_rx = jiffies;
505 skb->protocol = eth_type_trans(skb, dev);
507 lp->stats.rx_packets++;
508 lp->stats.rx_bytes += data_len;
513 SMC_SET_MMU_CMD(MC_RELEASE);
517 * This is called to actually send a packet to the chip.
518 * Returns non-zero when successful.
520 static void smc_hardware_send_packet(struct net_device *dev)
522 struct smc_local *lp = netdev_priv(dev);
523 unsigned long ioaddr = dev->base_addr;
524 struct sk_buff *skb = lp->saved_skb;
525 unsigned int packet_no, len;
528 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
530 packet_no = SMC_GET_AR();
531 if (unlikely(packet_no & AR_FAILED)) {
532 printk("%s: Memory allocation failed.\n", dev->name);
533 lp->saved_skb = NULL;
534 lp->stats.tx_errors++;
535 lp->stats.tx_fifo_errors++;
536 dev_kfree_skb_any(skb);
540 /* point to the beginning of the packet */
541 SMC_SET_PN(packet_no);
542 SMC_SET_PTR(PTR_AUTOINC);
546 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
547 dev->name, packet_no, len, len, buf);
551 * Send the packet length (+6 for status words, length, and ctl.
552 * The card will pad to 64 bytes with zeroes if packet is too small.
554 SMC_PUT_PKT_HDR(0, len + 6);
556 /* send the actual data */
557 SMC_PUSH_DATA(buf, len & ~1);
559 /* Send final ctl word with the last byte if there is one */
560 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
562 /* and let the chipset deal with it */
563 SMC_SET_MMU_CMD(MC_ENQUEUE);
564 SMC_ACK_INT(IM_TX_EMPTY_INT);
566 dev->trans_start = jiffies;
567 dev_kfree_skb_any(skb);
568 lp->saved_skb = NULL;
569 lp->stats.tx_packets++;
570 lp->stats.tx_bytes += len;
574 * Since I am not sure if I will have enough room in the chip's ram
575 * to store the packet, I call this routine which either sends it
576 * now, or set the card to generates an interrupt when ready
579 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
581 struct smc_local *lp = netdev_priv(dev);
582 unsigned long ioaddr = dev->base_addr;
583 unsigned int numPages, poll_count, status, saved_bank;
585 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
587 BUG_ON(lp->saved_skb != NULL);
591 * The MMU wants the number of pages to be the number of 256 bytes
592 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
594 * The 91C111 ignores the size bits, but earlier models don't.
596 * Pkt size for allocating is data length +6 (for additional status
597 * words, length and ctl)
599 * If odd size then last byte is included in ctl word.
601 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
602 if (unlikely(numPages > 7)) {
603 printk("%s: Far too big packet error.\n", dev->name);
604 lp->saved_skb = NULL;
605 lp->stats.tx_errors++;
606 lp->stats.tx_dropped++;
611 /* now, try to allocate the memory */
612 saved_bank = SMC_CURRENT_BANK();
614 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
617 * Poll the chip for a short amount of time in case the
618 * allocation succeeds quickly.
620 poll_count = MEMORY_WAIT_TIME;
622 status = SMC_GET_INT();
623 if (status & IM_ALLOC_INT) {
624 SMC_ACK_INT(IM_ALLOC_INT);
627 } while (--poll_count);
630 /* oh well, wait until the chip finds memory later */
631 netif_stop_queue(dev);
632 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
633 SMC_ENABLE_INT(IM_ALLOC_INT);
636 * Allocation succeeded: push packet to the chip's own memory
639 * If THROTTLE_TX_PKTS is selected that means we don't want
640 * more than a single TX packet taking up space in the chip's
641 * internal memory at all time, in which case we stop the
642 * queue right here until we're notified of TX completion.
644 * Otherwise we're quite happy to feed more TX packets right
645 * away for better TX throughput, in which case the queue is
649 netif_stop_queue(dev);
651 smc_hardware_send_packet(dev);
652 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
655 SMC_SELECT_BANK(saved_bank);
660 * This handles a TX interrupt, which is only called when:
661 * - a TX error occurred, or
662 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
664 static void smc_tx(struct net_device *dev)
666 unsigned long ioaddr = dev->base_addr;
667 struct smc_local *lp = netdev_priv(dev);
668 unsigned int saved_packet, packet_no, tx_status, pkt_len;
670 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
672 /* If the TX FIFO is empty then nothing to do */
673 packet_no = SMC_GET_TXFIFO();
674 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
675 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
679 /* select packet to read from */
680 saved_packet = SMC_GET_PN();
681 SMC_SET_PN(packet_no);
683 /* read the first word (status word) from this packet */
684 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
685 SMC_GET_PKT_HDR(tx_status, pkt_len);
686 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
687 dev->name, tx_status, packet_no);
689 if (!(tx_status & TS_SUCCESS))
690 lp->stats.tx_errors++;
691 if (tx_status & TS_LOSTCAR)
692 lp->stats.tx_carrier_errors++;
696 if (tx_status & TS_LATCOL) {
697 PRINTK("%s: late collision occurred on last xmit\n", dev->name);
698 lp->stats.tx_window_errors++;
699 /* It's really cheap to requeue the pkt here */
700 SMC_SET_MMU_CMD( MC_ENQUEUE );
702 /* kill the packet */
703 SMC_SET_MMU_CMD(MC_FREEPKT);
706 /* Don't restore Packet Number Reg until busy bit is cleared */
708 SMC_SET_PN(saved_packet);
710 /* re-enable transmit */
712 SMC_SET_TCR(lp->tcr_cur_mode);
717 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
719 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
721 unsigned long ioaddr = dev->base_addr;
722 unsigned int mii_reg, mask;
724 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
727 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
733 SMC_SET_MII(mii_reg);
735 SMC_SET_MII(mii_reg | MII_MCLK);
740 static unsigned int smc_mii_in(struct net_device *dev, int bits)
742 unsigned long ioaddr = dev->base_addr;
743 unsigned int mii_reg, mask, val;
745 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
746 SMC_SET_MII(mii_reg);
748 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
749 if (SMC_GET_MII() & MII_MDI)
752 SMC_SET_MII(mii_reg);
754 SMC_SET_MII(mii_reg | MII_MCLK);
762 * Reads a register from the MII Management serial interface
764 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
766 unsigned long ioaddr = dev->base_addr;
767 unsigned int phydata, old_bank;
769 /* Save the current bank, and select bank 3 */
770 old_bank = SMC_CURRENT_BANK();
774 smc_mii_out(dev, 0xffffffff, 32);
776 /* Start code (01) + read (10) + phyaddr + phyreg */
777 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
779 /* Turnaround (2bits) + phydata */
780 phydata = smc_mii_in(dev, 18);
782 /* Return to idle state */
783 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
785 /* And select original bank */
786 SMC_SELECT_BANK(old_bank);
788 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
789 __FUNCTION__, phyaddr, phyreg, phydata);
795 * Writes a register to the MII Management serial interface
797 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
800 unsigned long ioaddr = dev->base_addr;
801 unsigned int old_bank;
803 /* Save the current bank, and select bank 3 */
804 old_bank = SMC_CURRENT_BANK();
808 smc_mii_out(dev, 0xffffffff, 32);
810 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
811 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
813 /* Return to idle state */
814 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
816 /* And select original bank */
817 SMC_SELECT_BANK(old_bank);
819 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
820 __FUNCTION__, phyaddr, phyreg, phydata);
824 * Finds and reports the PHY address
826 static void smc_detect_phy(struct net_device *dev)
828 struct smc_local *lp = netdev_priv(dev);
831 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
836 * Scan all 32 PHY addresses if necessary, starting at
837 * PHY#1 to PHY#31, and then PHY#0 last.
839 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
840 unsigned int id1, id2;
842 /* Read the PHY identifiers */
843 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
844 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
846 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
847 dev->name, id1, id2);
849 /* Make sure it is a valid identifier */
850 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
851 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
852 /* Save the PHY's address */
853 lp->mii.phy_id = phyaddr & 31;
854 lp->phy_type = id1 << 16 | id2;
861 * Sets the PHY to a configuration as determined by the user
863 static int smc_phy_fixed(struct net_device *dev)
865 struct smc_local *lp = netdev_priv(dev);
866 unsigned long ioaddr = dev->base_addr;
867 int phyaddr = lp->mii.phy_id;
870 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
872 /* Enter Link Disable state */
873 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
874 cfg1 |= PHY_CFG1_LNKDIS;
875 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
878 * Set our fixed capabilities
879 * Disable auto-negotiation
884 bmcr |= BMCR_FULLDPLX;
886 if (lp->ctl_rspeed == 100)
887 bmcr |= BMCR_SPEED100;
889 /* Write our capabilities to the phy control register */
890 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
892 /* Re-Configure the Receive/Phy Control register */
893 SMC_SET_RPC(lp->rpc_cur_mode);
899 * smc_phy_reset - reset the phy
903 * Issue a software reset for the specified PHY and
904 * wait up to 100ms for the reset to complete. We should
905 * not access the PHY for 50ms after issuing the reset.
907 * The time to wait appears to be dependent on the PHY.
909 * Must be called with lp->lock locked.
911 static int smc_phy_reset(struct net_device *dev, int phy)
913 struct smc_local *lp = netdev_priv(dev);
917 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
919 for (timeout = 2; timeout; timeout--) {
920 spin_unlock_irq(&lp->lock);
922 spin_lock_irq(&lp->lock);
924 bmcr = smc_phy_read(dev, phy, MII_BMCR);
925 if (!(bmcr & BMCR_RESET))
929 return bmcr & BMCR_RESET;
933 * smc_phy_powerdown - powerdown phy
937 * Power down the specified PHY
939 static void smc_phy_powerdown(struct net_device *dev, int phy)
941 struct smc_local *lp = netdev_priv(dev);
944 spin_lock_irq(&lp->lock);
945 bmcr = smc_phy_read(dev, phy, MII_BMCR);
946 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
947 spin_unlock_irq(&lp->lock);
951 * smc_phy_check_media - check the media status and adjust TCR
953 * @init: set true for initialisation
955 * Select duplex mode depending on negotiation state. This
956 * also updates our carrier state.
958 static void smc_phy_check_media(struct net_device *dev, int init)
960 struct smc_local *lp = netdev_priv(dev);
961 unsigned long ioaddr = dev->base_addr;
963 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
964 unsigned int old_bank;
966 /* duplex state has changed */
967 if (lp->mii.full_duplex) {
968 lp->tcr_cur_mode |= TCR_SWFDUP;
970 lp->tcr_cur_mode &= ~TCR_SWFDUP;
973 old_bank = SMC_CURRENT_BANK();
975 SMC_SET_TCR(lp->tcr_cur_mode);
976 SMC_SELECT_BANK(old_bank);
981 * Configures the specified PHY through the MII management interface
982 * using Autonegotiation.
983 * Calls smc_phy_fixed() if the user has requested a certain config.
984 * If RPC ANEG bit is set, the media selection is dependent purely on
985 * the selection by the MII (either in the MII BMCR reg or the result
986 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
987 * is controlled by the RPC SPEED and RPC DPLX bits.
989 static void smc_phy_configure(struct net_device *dev)
991 struct smc_local *lp = netdev_priv(dev);
992 unsigned long ioaddr = dev->base_addr;
993 int phyaddr = lp->mii.phy_id;
994 int my_phy_caps; /* My PHY capabilities */
995 int my_ad_caps; /* My Advertised capabilities */
998 DBG(3, "%s:smc_program_phy()\n", dev->name);
1000 spin_lock_irq(&lp->lock);
1003 * We should not be called if phy_type is zero.
1005 if (lp->phy_type == 0)
1006 goto smc_phy_configure_exit;
1008 if (smc_phy_reset(dev, phyaddr)) {
1009 printk("%s: PHY reset timed out\n", dev->name);
1010 goto smc_phy_configure_exit;
1014 * Enable PHY Interrupts (for register 18)
1015 * Interrupts listed here are disabled
1017 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1018 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1019 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1020 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1022 /* Configure the Receive/Phy Control register */
1024 SMC_SET_RPC(lp->rpc_cur_mode);
1026 /* If the user requested no auto neg, then go set his request */
1027 if (lp->mii.force_media) {
1029 goto smc_phy_configure_exit;
1032 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1033 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1035 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1036 printk(KERN_INFO "Auto negotiation NOT supported\n");
1038 goto smc_phy_configure_exit;
1041 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1043 if (my_phy_caps & BMSR_100BASE4)
1044 my_ad_caps |= ADVERTISE_100BASE4;
1045 if (my_phy_caps & BMSR_100FULL)
1046 my_ad_caps |= ADVERTISE_100FULL;
1047 if (my_phy_caps & BMSR_100HALF)
1048 my_ad_caps |= ADVERTISE_100HALF;
1049 if (my_phy_caps & BMSR_10FULL)
1050 my_ad_caps |= ADVERTISE_10FULL;
1051 if (my_phy_caps & BMSR_10HALF)
1052 my_ad_caps |= ADVERTISE_10HALF;
1054 /* Disable capabilities not selected by our user */
1055 if (lp->ctl_rspeed != 100)
1056 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1058 if (!lp->ctl_rfduplx)
1059 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1061 /* Update our Auto-Neg Advertisement Register */
1062 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1063 lp->mii.advertising = my_ad_caps;
1066 * Read the register back. Without this, it appears that when
1067 * auto-negotiation is restarted, sometimes it isn't ready and
1068 * the link does not come up.
1070 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1072 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1073 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1075 /* Restart auto-negotiation process in order to advertise my caps */
1076 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1078 smc_phy_check_media(dev, 1);
1080 smc_phy_configure_exit:
1081 spin_unlock_irq(&lp->lock);
1087 * Purpose: Handle interrupts relating to PHY register 18. This is
1088 * called from the "hard" interrupt handler under our private spinlock.
1090 static void smc_phy_interrupt(struct net_device *dev)
1092 struct smc_local *lp = netdev_priv(dev);
1093 int phyaddr = lp->mii.phy_id;
1096 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1098 if (lp->phy_type == 0)
1102 smc_phy_check_media(dev, 0);
1104 /* Read PHY Register 18, Status Output */
1105 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1106 if ((phy18 & PHY_INT_INT) == 0)
1111 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1113 static void smc_10bt_check_media(struct net_device *dev, int init)
1115 struct smc_local *lp = netdev_priv(dev);
1116 unsigned long ioaddr = dev->base_addr;
1117 unsigned int old_carrier, new_carrier, old_bank;
1119 old_bank = SMC_CURRENT_BANK();
1121 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1122 new_carrier = SMC_inw(ioaddr, EPH_STATUS_REG) & ES_LINK_OK ? 1 : 0;
1124 if (init || (old_carrier != new_carrier)) {
1126 netif_carrier_off(dev);
1128 netif_carrier_on(dev);
1130 if (netif_msg_link(lp))
1131 printk(KERN_INFO "%s: link %s\n", dev->name,
1132 new_carrier ? "up" : "down");
1134 SMC_SELECT_BANK(old_bank);
1137 static void smc_eph_interrupt(struct net_device *dev)
1139 unsigned long ioaddr = dev->base_addr;
1140 unsigned int old_bank, ctl;
1142 smc_10bt_check_media(dev, 0);
1144 old_bank = SMC_CURRENT_BANK();
1147 ctl = SMC_GET_CTL();
1148 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1151 SMC_SELECT_BANK(old_bank);
1155 * This is the main routine of the driver, to handle the device when
1156 * it needs some attention.
1158 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1160 struct net_device *dev = dev_id;
1161 unsigned long ioaddr = dev->base_addr;
1162 struct smc_local *lp = netdev_priv(dev);
1163 int status, mask, timeout, card_stats;
1164 int saved_bank, saved_pointer;
1166 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1168 saved_bank = SMC_CURRENT_BANK();
1170 saved_pointer = SMC_GET_PTR();
1171 mask = SMC_GET_INT_MASK();
1172 SMC_SET_INT_MASK(0);
1174 /* set a timeout value, so I don't stay here forever */
1178 status = SMC_GET_INT();
1180 DBG(2, "%s: IRQ 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1181 dev->name, status, mask,
1182 ({ int meminfo; SMC_SELECT_BANK(0);
1183 meminfo = SMC_GET_MIR();
1184 SMC_SELECT_BANK(2); meminfo; }),
1191 spin_lock(&lp->lock);
1193 if (status & IM_RCV_INT) {
1194 DBG(3, "%s: RX irq\n", dev->name);
1196 } else if (status & IM_TX_INT) {
1197 DBG(3, "%s: TX int\n", dev->name);
1199 SMC_ACK_INT(IM_TX_INT);
1200 #if THROTTLE_TX_PKTS
1201 netif_wake_queue(dev);
1203 } else if (status & IM_ALLOC_INT) {
1204 DBG(3, "%s: Allocation irq\n", dev->name);
1205 smc_hardware_send_packet(dev);
1206 mask |= (IM_TX_INT | IM_TX_EMPTY_INT);
1207 mask &= ~IM_ALLOC_INT;
1208 #if ! THROTTLE_TX_PKTS
1209 netif_wake_queue(dev);
1211 } else if (status & IM_TX_EMPTY_INT) {
1212 DBG(3, "%s: TX empty\n", dev->name);
1213 mask &= ~IM_TX_EMPTY_INT;
1217 card_stats = SMC_GET_COUNTER();
1220 /* single collisions */
1221 lp->stats.collisions += card_stats & 0xF;
1224 /* multiple collisions */
1225 lp->stats.collisions += card_stats & 0xF;
1226 } else if (status & IM_RX_OVRN_INT) {
1227 DBG(1, "%s: RX overrun\n", dev->name);
1228 SMC_ACK_INT(IM_RX_OVRN_INT);
1229 lp->stats.rx_errors++;
1230 lp->stats.rx_fifo_errors++;
1231 } else if (status & IM_EPH_INT) {
1232 smc_eph_interrupt(dev);
1233 } else if (status & IM_MDINT) {
1234 SMC_ACK_INT(IM_MDINT);
1235 smc_phy_interrupt(dev);
1236 } else if (status & IM_ERCV_INT) {
1237 SMC_ACK_INT(IM_ERCV_INT);
1238 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1241 spin_unlock(&lp->lock);
1242 } while (--timeout);
1244 /* restore register states */
1245 SMC_SET_INT_MASK(mask);
1246 SMC_SET_PTR(saved_pointer);
1247 SMC_SELECT_BANK(saved_bank);
1249 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1252 * We return IRQ_HANDLED unconditionally here even if there was
1253 * nothing to do. There is a possibility that a packet might
1254 * get enqueued into the chip right after TX_EMPTY_INT is raised
1255 * but just before the CPU acknowledges the IRQ.
1256 * Better take an unneeded IRQ in some occasions than complexifying
1257 * the code for all cases.
1262 /* Our watchdog timed out. Called by the networking layer */
1263 static void smc_timeout(struct net_device *dev)
1265 struct smc_local *lp = netdev_priv(dev);
1267 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1274 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1275 * it introduced a problem. Now that this is a timeout routine,
1276 * we are getting called from within an interrupt context.
1277 * smc_phy_configure() calls msleep() which calls
1278 * schedule_timeout() which calls schedule(). When schedule()
1279 * is called from an interrupt context, it prints out
1280 * "Scheduling in interrupt" and then calls BUG(). This is
1281 * obviously not desirable. This was worked around by removing
1282 * the call to smc_phy_configure() here because it didn't seem
1283 * absolutely necessary. Ultimately, if msleep() is
1284 * supposed to be usable from an interrupt context (which it
1285 * looks like it thinks it should handle), it should be fixed.
1287 if (lp->phy_type != 0)
1288 smc_phy_configure(dev);
1291 /* clear anything saved */
1292 if (lp->saved_skb != NULL) {
1293 dev_kfree_skb (lp->saved_skb);
1294 lp->saved_skb = NULL;
1295 lp->stats.tx_errors++;
1296 lp->stats.tx_aborted_errors++;
1298 /* We can accept TX packets again */
1299 dev->trans_start = jiffies;
1300 netif_wake_queue(dev);
1304 * This sets the internal hardware table to filter out unwanted multicast
1305 * packets before they take up memory.
1307 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1308 * address are the offset into the table. If that bit is 1, then the
1309 * multicast packet is accepted. Otherwise, it's dropped silently.
1311 * To use the 6 bits as an offset into the table, the high 3 bits are the
1312 * number of the 8 bit register, while the low 3 bits are the bit within
1315 * This routine is based very heavily on the one provided by Peter Cammaert.
1318 smc_setmulticast(unsigned long ioaddr, int count, struct dev_mc_list *addrs)
1321 unsigned char multicast_table[8];
1322 struct dev_mc_list *cur_addr;
1324 /* table for flipping the order of 3 bits */
1325 static unsigned char invert3[] = { 0, 4, 2, 6, 1, 5, 3, 7 };
1327 /* start with a table of all zeros: reject all */
1328 memset(multicast_table, 0, sizeof(multicast_table));
1331 for (i = 0; i < count; i++, cur_addr = cur_addr->next) {
1334 /* do we have a pointer here? */
1337 /* make sure this is a multicast address - shouldn't this
1338 be a given if we have it here ? */
1339 if (!(*cur_addr->dmi_addr & 1))
1342 /* only use the low order bits */
1343 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1345 /* do some messy swapping to put the bit in the right spot */
1346 multicast_table[invert3[position&7]] |=
1347 (1<<invert3[(position>>3)&7]);
1350 /* now, the table can be loaded into the chipset */
1352 SMC_SET_MCAST(multicast_table);
1356 * This routine will, depending on the values passed to it,
1357 * either make it accept multicast packets, go into
1358 * promiscuous mode (for TCPDUMP and cousins) or accept
1359 * a select set of multicast packets
1361 static void smc_set_multicast_list(struct net_device *dev)
1363 struct smc_local *lp = netdev_priv(dev);
1364 unsigned long ioaddr = dev->base_addr;
1366 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1369 if (dev->flags & IFF_PROMISC) {
1370 DBG(2, "%s: RCR_PRMS\n", dev->name);
1371 lp->rcr_cur_mode |= RCR_PRMS;
1372 SMC_SET_RCR(lp->rcr_cur_mode);
1375 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1376 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1377 when promiscuous mode is turned on.
1381 * Here, I am setting this to accept all multicast packets.
1382 * I don't need to zero the multicast table, because the flag is
1383 * checked before the table is
1385 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1386 lp->rcr_cur_mode |= RCR_ALMUL;
1387 SMC_SET_RCR(lp->rcr_cur_mode);
1388 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1392 * We just get all multicast packets even if we only want them
1393 * from one source. This will be changed at some future point.
1395 else if (dev->mc_count) {
1396 /* support hardware multicasting */
1398 /* be sure I get rid of flags I might have set */
1399 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1400 SMC_SET_RCR(lp->rcr_cur_mode);
1402 * NOTE: this has to set the bank, so make sure it is the
1403 * last thing called. The bank is set to zero at the top
1405 smc_setmulticast(ioaddr, dev->mc_count, dev->mc_list);
1407 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1408 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1409 SMC_SET_RCR(lp->rcr_cur_mode);
1412 * since I'm disabling all multicast entirely, I need to
1413 * clear the multicast list
1422 * Open and Initialize the board
1424 * Set up everything, reset the card, etc..
1427 smc_open(struct net_device *dev)
1429 struct smc_local *lp = netdev_priv(dev);
1430 unsigned long ioaddr = dev->base_addr;
1432 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1435 * Check that the address is valid. If its not, refuse
1436 * to bring the device up. The user must specify an
1437 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1439 if (!is_valid_ether_addr(dev->dev_addr)) {
1440 DBG(2, (KERN_DEBUG "smc_open: no valid ethernet hw addr\n"));
1444 /* clear out all the junk that was put here before... */
1445 lp->saved_skb = NULL;
1447 /* Setup the default Register Modes */
1448 lp->tcr_cur_mode = TCR_DEFAULT;
1449 lp->rcr_cur_mode = RCR_DEFAULT;
1450 lp->rpc_cur_mode = RPC_DEFAULT;
1453 * If we are not using a MII interface, we need to
1454 * monitor our own carrier signal to detect faults.
1456 if (lp->phy_type == 0)
1457 lp->tcr_cur_mode |= TCR_MON_CSN;
1459 /* reset the hardware */
1464 SMC_SET_MAC_ADDR(dev->dev_addr);
1466 /* Configure the PHY */
1467 if (lp->phy_type != 0)
1468 smc_phy_configure(dev);
1470 spin_lock_irq(&lp->lock);
1471 smc_10bt_check_media(dev, 1);
1472 spin_unlock_irq(&lp->lock);
1476 * make sure to initialize the link state with netif_carrier_off()
1477 * somewhere, too --jgarzik
1479 * smc_phy_configure() and smc_10bt_check_media() does that. --rmk
1481 netif_start_queue(dev);
1488 * this makes the board clean up everything that it can
1489 * and not talk to the outside world. Caused by
1490 * an 'ifconfig ethX down'
1492 static int smc_close(struct net_device *dev)
1494 struct smc_local *lp = netdev_priv(dev);
1496 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1498 netif_stop_queue(dev);
1499 netif_carrier_off(dev);
1501 /* clear everything */
1502 smc_shutdown(dev->base_addr);
1504 if (lp->phy_type != 0)
1505 smc_phy_powerdown(dev, lp->mii.phy_id);
1511 * Get the current statistics.
1512 * This may be called with the card open or closed.
1514 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1516 struct smc_local *lp = netdev_priv(dev);
1518 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1527 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1529 struct smc_local *lp = netdev_priv(dev);
1535 if (lp->phy_type != 0) {
1536 spin_lock_irq(&lp->lock);
1537 ret = mii_ethtool_gset(&lp->mii, cmd);
1538 spin_unlock_irq(&lp->lock);
1540 cmd->supported = SUPPORTED_10baseT_Half |
1541 SUPPORTED_10baseT_Full |
1542 SUPPORTED_TP | SUPPORTED_AUI;
1544 if (lp->ctl_rspeed == 10)
1545 cmd->speed = SPEED_10;
1546 else if (lp->ctl_rspeed == 100)
1547 cmd->speed = SPEED_100;
1549 cmd->autoneg = AUTONEG_DISABLE;
1550 cmd->transceiver = XCVR_INTERNAL;
1552 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1561 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1563 struct smc_local *lp = netdev_priv(dev);
1566 if (lp->phy_type != 0) {
1567 spin_lock_irq(&lp->lock);
1568 ret = mii_ethtool_sset(&lp->mii, cmd);
1569 spin_unlock_irq(&lp->lock);
1571 if (cmd->autoneg != AUTONEG_DISABLE ||
1572 cmd->speed != SPEED_10 ||
1573 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1574 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1577 // lp->port = cmd->port;
1578 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1580 // if (netif_running(dev))
1581 // smc_set_port(dev);
1590 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1592 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1593 strncpy(info->version, version, sizeof(info->version));
1594 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1597 static int smc_ethtool_nwayreset(struct net_device *dev)
1599 struct smc_local *lp = netdev_priv(dev);
1602 if (lp->phy_type != 0) {
1603 spin_lock_irq(&lp->lock);
1604 ret = mii_nway_restart(&lp->mii);
1605 spin_unlock_irq(&lp->lock);
1611 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1613 struct smc_local *lp = netdev_priv(dev);
1614 return lp->msg_enable;
1617 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1619 struct smc_local *lp = netdev_priv(dev);
1620 lp->msg_enable = level;
1623 static struct ethtool_ops smc_ethtool_ops = {
1624 .get_settings = smc_ethtool_getsettings,
1625 .set_settings = smc_ethtool_setsettings,
1626 .get_drvinfo = smc_ethtool_getdrvinfo,
1628 .get_msglevel = smc_ethtool_getmsglevel,
1629 .set_msglevel = smc_ethtool_setmsglevel,
1630 .nway_reset = smc_ethtool_nwayreset,
1631 .get_link = ethtool_op_get_link,
1632 // .get_eeprom = smc_ethtool_geteeprom,
1633 // .set_eeprom = smc_ethtool_seteeprom,
1639 * This routine has a simple purpose -- make the SMC chip generate an
1640 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1643 * does this still work?
1645 * I just deleted auto_irq.c, since it was never built...
1648 static int __init smc_findirq(unsigned long ioaddr)
1651 unsigned long cookie;
1653 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1655 cookie = probe_irq_on();
1658 * What I try to do here is trigger an ALLOC_INT. This is done
1659 * by allocating a small chunk of memory, which will give an interrupt
1662 /* enable ALLOCation interrupts ONLY */
1664 SMC_SET_INT_MASK(IM_ALLOC_INT);
1667 * Allocate 512 bytes of memory. Note that the chip was just
1668 * reset so all the memory is available
1670 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1673 * Wait until positive that the interrupt has been generated
1678 int_status = SMC_GET_INT();
1679 if (int_status & IM_ALLOC_INT)
1680 break; /* got the interrupt */
1681 } while (--timeout);
1684 * there is really nothing that I can do here if timeout fails,
1685 * as autoirq_report will return a 0 anyway, which is what I
1686 * want in this case. Plus, the clean up is needed in both
1690 /* and disable all interrupts again */
1691 SMC_SET_INT_MASK(0);
1693 /* and return what I found */
1694 return probe_irq_off(cookie);
1698 * Function: smc_probe(unsigned long ioaddr)
1701 * Tests to see if a given ioaddr points to an SMC91x chip.
1702 * Returns a 0 on success
1705 * (1) see if the high byte of BANK_SELECT is 0x33
1706 * (2) compare the ioaddr with the base register's address
1707 * (3) see if I recognize the chip ID in the appropriate register
1709 * Here I do typical initialization tasks.
1711 * o Initialize the structure if needed
1712 * o print out my vanity message if not done so already
1713 * o print out what type of hardware is detected
1714 * o print out the ethernet address
1716 * o set up my private data
1717 * o configure the dev structure with my subroutines
1718 * o actually GRAB the irq.
1721 static int __init smc_probe(struct net_device *dev, unsigned long ioaddr)
1723 struct smc_local *lp = netdev_priv(dev);
1724 static int version_printed = 0;
1726 unsigned int val, revision_register;
1727 const char *version_string;
1729 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1731 /* First, see if the high byte is 0x33 */
1732 val = SMC_CURRENT_BANK();
1733 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1734 if ((val & 0xFF00) != 0x3300) {
1735 if ((val & 0xFF) == 0x33) {
1737 "%s: Detected possible byte-swapped interface"
1738 " at IOADDR 0x%lx\n", CARDNAME, ioaddr);
1745 * The above MIGHT indicate a device, but I need to write to
1746 * further test this.
1749 val = SMC_CURRENT_BANK();
1750 if ((val & 0xFF00) != 0x3300) {
1756 * well, we've already written once, so hopefully another
1757 * time won't hurt. This time, I need to switch the bank
1758 * register to bank 1, so I can access the base address
1762 val = SMC_GET_BASE();
1763 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1764 if ((ioaddr & ((PAGE_SIZE-1)<<SMC_IO_SHIFT)) != val) {
1765 printk("%s: IOADDR %lx doesn't match configuration (%x).\n",
1766 CARDNAME, ioaddr, val);
1770 * check if the revision register is something that I
1771 * recognize. These might need to be added to later,
1772 * as future revisions could be added.
1775 revision_register = SMC_GET_REV();
1776 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1777 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1778 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1779 /* I don't recognize this chip, so... */
1780 printk("%s: IO 0x%lx: Unrecognized revision register 0x%04x"
1781 ", Contact author.\n", CARDNAME,
1782 ioaddr, revision_register);
1788 /* At this point I'll assume that the chip is an SMC91x. */
1789 if (version_printed++ == 0)
1790 printk("%s", version);
1792 /* fill in some of the fields */
1793 dev->base_addr = ioaddr;
1794 lp->version = revision_register & 0xff;
1796 /* Get the MAC address */
1798 SMC_GET_MAC_ADDR(dev->dev_addr);
1800 /* now, reset the chip, and put it into a known state */
1804 * If dev->irq is 0, then the device has to be banged on to see
1807 * This banging doesn't always detect the IRQ, for unknown reasons.
1808 * a workaround is to reset the chip and try again.
1810 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1811 * be what is requested on the command line. I don't do that, mostly
1812 * because the card that I have uses a non-standard method of accessing
1813 * the IRQs, and because this _should_ work in most configurations.
1815 * Specifying an IRQ is done with the assumption that the user knows
1816 * what (s)he is doing. No checking is done!!!!
1823 dev->irq = smc_findirq(ioaddr);
1826 /* kick the card and try again */
1830 if (dev->irq == 0) {
1831 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1836 dev->irq = irq_canonicalize(dev->irq);
1838 /* Fill in the fields of the device structure with ethernet values. */
1841 dev->open = smc_open;
1842 dev->stop = smc_close;
1843 dev->hard_start_xmit = smc_hard_start_xmit;
1844 dev->tx_timeout = smc_timeout;
1845 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1846 dev->get_stats = smc_query_statistics;
1847 dev->set_multicast_list = smc_set_multicast_list;
1848 dev->ethtool_ops = &smc_ethtool_ops;
1850 spin_lock_init(&lp->lock);
1851 lp->mii.phy_id_mask = 0x1f;
1852 lp->mii.reg_num_mask = 0x1f;
1853 lp->mii.force_media = 0;
1854 lp->mii.full_duplex = 0;
1856 lp->mii.mdio_read = smc_phy_read;
1857 lp->mii.mdio_write = smc_phy_write;
1860 * Locate the phy, if any.
1862 if (lp->version >= (CHIP_91100 << 4))
1863 smc_detect_phy(dev);
1865 /* Set default parameters */
1866 lp->msg_enable = NETIF_MSG_LINK;
1867 lp->ctl_rfduplx = 0;
1868 lp->ctl_rspeed = 10;
1870 if (lp->version >= (CHIP_91100 << 4)) {
1871 lp->ctl_rfduplx = 1;
1872 lp->ctl_rspeed = 100;
1876 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
1880 set_irq_type(dev->irq, IRQT_RISING);
1881 #ifdef SMC_USE_PXA_DMA
1883 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1884 smc_pxa_dma_irq, NULL);
1890 retval = register_netdev(dev);
1892 /* now, print out the card info, in a short format.. */
1893 printk("%s: %s (rev %d) at %#lx IRQ %d",
1894 dev->name, version_string, revision_register & 0x0f,
1895 dev->base_addr, dev->irq);
1897 if (dev->dma != (unsigned char)-1)
1898 printk(" DMA %d", dev->dma);
1900 printk("%s%s\n", nowait ? " [nowait]" : "",
1901 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1903 if (!is_valid_ether_addr(dev->dev_addr)) {
1904 printk("%s: Invalid ethernet MAC address. Please "
1905 "set using ifconfig\n", dev->name);
1907 /* Print the Ethernet address */
1908 printk("%s: Ethernet addr: ", dev->name);
1909 for (i = 0; i < 5; i++)
1910 printk("%2.2x:", dev->dev_addr[i]);
1911 printk("%2.2x\n", dev->dev_addr[5]);
1914 if (lp->phy_type == 0) {
1915 PRINTK("%s: No PHY found\n", dev->name);
1916 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1917 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1918 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1919 PRINTK("%s: PHY LAN83C180\n", dev->name);
1924 #ifdef SMC_USE_PXA_DMA
1925 if (retval && dev->dma != (unsigned char)-1)
1926 pxa_free_dma(dev->dma);
1931 static int smc_enable_device(unsigned long attrib_phys)
1933 unsigned long flags;
1934 unsigned char ecor, ecsr;
1938 * Map the attribute space. This is overkill, but clean.
1940 addr = ioremap(attrib_phys, ATTRIB_SIZE);
1945 * Reset the device. We must disable IRQs around this
1946 * since a reset causes the IRQ line become active.
1948 local_irq_save(flags);
1949 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
1950 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
1951 readb(addr + (ECOR << SMC_IO_SHIFT));
1954 * Wait 100us for the chip to reset.
1959 * The device will ignore all writes to the enable bit while
1960 * reset is asserted, even if the reset bit is cleared in the
1961 * same write. Must clear reset first, then enable the device.
1963 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
1964 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
1967 * Set the appropriate byte/word mode.
1969 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
1970 #ifndef SMC_CAN_USE_16BIT
1973 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
1974 local_irq_restore(flags);
1979 * Wait for the chip to wake up. We could poll the control
1980 * register in the main register space, but that isn't mapped
1981 * yet. We know this is going to take 750us.
1991 * dev->base_addr == 0, try to find all possible locations
1992 * dev->base_addr > 0x1ff, this is the address to check
1993 * dev->base_addr == <anything else>, return failure code
1996 * 0 --> there is a device
1997 * anything else, error
1999 static int smc_drv_probe(struct device *dev)
2001 struct platform_device *pdev = to_platform_device(dev);
2002 struct net_device *ndev;
2003 struct resource *res, *ext = NULL;
2007 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2014 * Request the regions.
2016 if (!request_mem_region(res->start, SMC_IO_EXTENT, "smc91x")) {
2021 ndev = alloc_etherdev(sizeof(struct smc_local));
2023 printk("%s: could not allocate device.\n", CARDNAME);
2027 SET_MODULE_OWNER(ndev);
2028 SET_NETDEV_DEV(ndev, dev);
2030 ndev->dma = (unsigned char)-1;
2031 ndev->irq = platform_get_irq(pdev, 0);
2033 ext = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2035 if (!request_mem_region(ext->start, ATTRIB_SIZE, ndev->name)) {
2040 #if defined(CONFIG_SA1100_ASSABET)
2041 NCR_0 |= NCR_ENET_OSC_EN;
2044 ret = smc_enable_device(ext->start);
2049 addr = ioremap(res->start, SMC_IO_EXTENT);
2055 dev_set_drvdata(dev, ndev);
2056 ret = smc_probe(ndev, (unsigned long)addr);
2058 dev_set_drvdata(dev, NULL);
2062 release_mem_region(ext->start, ATTRIB_SIZE);
2065 release_mem_region(res->start, SMC_IO_EXTENT);
2067 printk("%s: not found (%d).\n", CARDNAME, ret);
2069 #ifdef SMC_USE_PXA_DMA
2071 struct smc_local *lp = netdev_priv(ndev);
2072 lp->physaddr = res->start;
2079 static int smc_drv_remove(struct device *dev)
2081 struct platform_device *pdev = to_platform_device(dev);
2082 struct net_device *ndev = dev_get_drvdata(dev);
2083 struct resource *res;
2085 dev_set_drvdata(dev, NULL);
2087 unregister_netdev(ndev);
2089 free_irq(ndev->irq, ndev);
2091 #ifdef SMC_USE_PXA_DMA
2092 if (ndev->dma != (unsigned char)-1)
2093 pxa_free_dma(ndev->dma);
2095 iounmap((void *)ndev->base_addr);
2096 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2098 release_mem_region(res->start, ATTRIB_SIZE);
2099 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2100 release_mem_region(res->start, SMC_IO_EXTENT);
2107 static int smc_drv_suspend(struct device *dev, u32 state, u32 level)
2109 struct net_device *ndev = dev_get_drvdata(dev);
2111 if (ndev && level == SUSPEND_DISABLE) {
2112 if (netif_running(ndev)) {
2113 netif_device_detach(ndev);
2114 smc_shutdown(ndev->base_addr);
2120 static int smc_drv_resume(struct device *dev, u32 level)
2122 struct platform_device *pdev = to_platform_device(dev);
2123 struct net_device *ndev = dev_get_drvdata(dev);
2125 if (ndev && level == RESUME_ENABLE) {
2126 struct smc_local *lp = netdev_priv(ndev);
2127 unsigned long ioaddr = ndev->base_addr;
2129 if (pdev->num_resources == 3)
2130 smc_enable_device(pdev->resource[2].start);
2131 if (netif_running(ndev)) {
2135 SMC_SET_MAC_ADDR(ndev->dev_addr);
2136 if (lp->phy_type != 0)
2137 smc_phy_configure(ndev);
2138 netif_device_attach(ndev);
2144 static struct device_driver smc_driver = {
2146 .bus = &platform_bus_type,
2147 .probe = smc_drv_probe,
2148 .remove = smc_drv_remove,
2149 .suspend = smc_drv_suspend,
2150 .resume = smc_drv_resume,
2153 static int __init smc_init(void)
2158 "%s: You shouldn't use auto-probing with insmod!\n",
2162 return driver_register(&smc_driver);
2165 static void __exit smc_cleanup(void)
2167 driver_unregister(&smc_driver);
2170 module_init(smc_init);
2171 module_exit(smc_cleanup);