drivers/net/ibm_emac/ibm_emac_core.c

   1 /*
   2  * ibm_emac_core.c
   3  *
   4  * Ethernet driver for the built in ethernet on the IBM 4xx PowerPC
   5  * processors.
   6  *
   7  * (c) 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
   8  *
   9  * Based on original work by
  10  *
  11  *      Armin Kuster <akuster@mvista.com>
  12  *      Johnnie Peters <jpeters@mvista.com>
  13  *
  14  * This program is free software; you can redistribute  it and/or modify it
  15  * under  the terms of  the GNU General  Public License as published by the
  16  * Free Software Foundation;  either version 2 of the  License, or (at your
  17  * option) any later version.
  18  * TODO
  19  *       - Check for races in the "remove" code path
  20  *       - Add some Power Management to the MAC and the PHY
  21  *       - Audit remaining of non-rewritten code (--BenH)
  22  *       - Cleanup message display using msglevel mecanism
  23  *       - Address all errata
  24  *       - Audit all register update paths to ensure they
  25  *         are being written post soft reset if required.
  26  */
  27 #include <linux/module.h>
  28 #include <linux/kernel.h>
  29 #include <linux/sched.h>
  30 #include <linux/string.h>
  31 #include <linux/timer.h>
  32 #include <linux/ptrace.h>
  33 #include <linux/errno.h>
  34 #include <linux/ioport.h>
  35 #include <linux/slab.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/delay.h>
  38 #include <linux/init.h>
  39 #include <linux/types.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/mii.h>
  43
  44 #include <asm/processor.h>
  45 #include <asm/bitops.h>
  46 #include <asm/io.h>
  47 #include <asm/dma.h>
  48 #include <asm/irq.h>
  49 #include <asm/uaccess.h>
  50 #include <asm/ocp.h>
  51
  52 #include <linux/netdevice.h>
  53 #include <linux/etherdevice.h>
  54 #include <linux/skbuff.h>
  55 #include <linux/crc32.h>
  56
  57 #include "ibm_emac_core.h"
  58
  59 //#define MDIO_DEBUG(fmt) printk fmt
  60 #define MDIO_DEBUG(fmt)
  61
  62 //#define LINK_DEBUG(fmt) printk fmt
  63 #define LINK_DEBUG(fmt)
  64
  65 //#define PKT_DEBUG(fmt) printk fmt
  66 #define PKT_DEBUG(fmt)
  67
  68 #define DRV_NAME        "emac"
  69 #define DRV_VERSION     "2.0"
  70 #define DRV_AUTHOR      "Benjamin Herrenschmidt <benh@kernel.crashing.org>"
  71 #define DRV_DESC        "IBM EMAC Ethernet driver"
  72
  73 /*
  74  * When mdio_idx >= 0, contains a list of emac ocp_devs
  75  * that have had their initialization deferred until the
  76  * common MDIO controller has been initialized.
  77  */
  78 LIST_HEAD(emac_init_list);
  79
  80 MODULE_AUTHOR(DRV_AUTHOR);
  81 MODULE_DESCRIPTION(DRV_DESC);
  82 MODULE_LICENSE("GPL");
  83
  84 static int skb_res = SKB_RES;
  85 module_param(skb_res, int, 0444);
  86 MODULE_PARM_DESC(skb_res, "Amount of data to reserve on skb buffs\n"
  87                  "The 405 handles a misaligned IP header fine but\n"
  88                  "this can help if you are routing to a tunnel or a\n"
  89                  "device that needs aligned data. 0..2");
  90
  91 #define RGMII_PRIV(ocpdev) ((struct ibm_ocp_rgmii*)ocp_get_drvdata(ocpdev))
  92
  93 static unsigned int rgmii_enable[] =
  94     { RGMII_RTBI, RGMII_RGMII, RGMII_TBI, RGMII_GMII };
  95
  96 static unsigned int rgmii_speed_mask[] = { 0,
  97         0,
  98         RGMII_MII2_SPDMASK,
  99         RGMII_MII3_SPDMASK
 100 };
 101
 102 static unsigned int rgmii_speed100[] = { 0,
 103         0,
 104         RGMII_MII2_100MB,
 105         RGMII_MII3_100MB
 106 };
 107
 108 static unsigned int rgmii_speed1000[] = { 0,
 109         0,
 110         RGMII_MII2_1000MB,
 111         RGMII_MII3_1000MB
 112 };
 113
 114 #define ZMII_PRIV(ocpdev) ((struct ibm_ocp_zmii*)ocp_get_drvdata(ocpdev))
 115
 116 static unsigned int zmii_enable[][4] = {
 117         {ZMII_SMII0, ZMII_RMII0, ZMII_MII0,
 118          ~(ZMII_MDI1 | ZMII_MDI2 | ZMII_MDI3)},
 119         {ZMII_SMII1, ZMII_RMII1, ZMII_MII1,
 120          ~(ZMII_MDI0 | ZMII_MDI2 | ZMII_MDI3)},
 121         {ZMII_SMII2, ZMII_RMII2, ZMII_MII2,
 122          ~(ZMII_MDI0 | ZMII_MDI1 | ZMII_MDI3)},
 123         {ZMII_SMII3, ZMII_RMII3, ZMII_MII3, ~(ZMII_MDI0 | ZMII_MDI1 | ZMII_MDI2)}
 124 };
 125 static unsigned int mdi_enable[] =
 126     { ZMII_MDI0, ZMII_MDI1, ZMII_MDI2, ZMII_MDI3 };
 127
 128 static unsigned int zmii_speed = 0x0;
 129 static unsigned int zmii_speed100[] = { ZMII_MII0_100MB, ZMII_MII1_100MB };
 130
 131 /* Since multiple EMACs share MDIO lines in various ways, we need
 132  * to avoid re-using the same PHY ID in cases where the arch didn't
 133  * setup precise phy_map entries
 134  */
 135 static u32 busy_phy_map = 0;
 136
 137 /* If EMACs share a common MDIO device, this points to it */
 138 static struct net_device *mdio_ndev = NULL;
 139
 140 struct emac_def_dev {
 141         struct list_head link;
 142         struct ocp_device *ocpdev;
 143         struct ibm_ocp_mal *mal;
 144 };
 145
 146 static struct net_device_stats *emac_stats(struct net_device *dev)
 147 {
 148         struct ocp_enet_private *fep = dev->priv;
 149         return &fep->stats;
 150 };
 151
 152 static int
 153 emac_init_rgmii(struct ocp_device *rgmii_dev, int input, int phy_mode)
 154 {
 155         struct ibm_ocp_rgmii *rgmii = RGMII_PRIV(rgmii_dev);
 156         const char *mode_name[] = { "RTBI", "RGMII", "TBI", "GMII" };
 157         int mode = -1;
 158
 159         if (!rgmii) {
 160                 rgmii = kmalloc(sizeof(struct ibm_ocp_rgmii), GFP_KERNEL);
 161
 162                 if (rgmii == NULL) {
 163                         printk(KERN_ERR
 164                                "rgmii%d: Out of memory allocating RGMII structure!\n",
 165                                rgmii_dev->def->index);
 166                         return -ENOMEM;
 167                 }
 168
 169                 memset(rgmii, 0, sizeof(*rgmii));
 170
 171                 rgmii->base =
 172                     (struct rgmii_regs *)ioremap(rgmii_dev->def->paddr,
 173                                                  sizeof(*rgmii->base));
 174                 if (rgmii->base == NULL) {
 175                         printk(KERN_ERR
 176                                "rgmii%d: Cannot ioremap bridge registers!\n",
 177                                rgmii_dev->def->index);
 178
 179                         kfree(rgmii);
 180                         return -ENOMEM;
 181                 }
 182                 ocp_set_drvdata(rgmii_dev, rgmii);
 183         }
 184
 185         if (phy_mode) {
 186                 switch (phy_mode) {
 187                 case PHY_MODE_GMII:
 188                         mode = GMII;
 189                         break;
 190                 case PHY_MODE_TBI:
 191                         mode = TBI;
 192                         break;
 193                 case PHY_MODE_RTBI:
 194                         mode = RTBI;
 195                         break;
 196                 case PHY_MODE_RGMII:
 197                 default:
 198                         mode = RGMII;
 199                 }
 200                 rgmii->base->fer &= ~RGMII_FER_MASK(input);
 201                 rgmii->base->fer |= rgmii_enable[mode] << (4 * input);
 202         } else {
 203                 switch ((rgmii->base->fer & RGMII_FER_MASK(input)) >> (4 *
 204                                                                        input)) {
 205                 case RGMII_RTBI:
 206                         mode = RTBI;
 207                         break;
 208                 case RGMII_RGMII:
 209                         mode = RGMII;
 210                         break;
 211                 case RGMII_TBI:
 212                         mode = TBI;
 213                         break;
 214                 case RGMII_GMII:
 215                         mode = GMII;
 216                 }
 217         }
 218
 219         /* Set mode to RGMII if nothing valid is detected */
 220         if (mode < 0)
 221                 mode = RGMII;
 222
 223         printk(KERN_NOTICE "rgmii%d: input %d in %s mode\n",
 224                rgmii_dev->def->index, input, mode_name[mode]);
 225
 226         rgmii->mode[input] = mode;
 227         rgmii->users++;
 228
 229         return 0;
 230 }
 231
 232 static void
 233 emac_rgmii_port_speed(struct ocp_device *ocpdev, int input, int speed)
 234 {
 235         struct ibm_ocp_rgmii *rgmii = RGMII_PRIV(ocpdev);
 236         unsigned int rgmii_speed;
 237
 238         rgmii_speed = in_be32(&rgmii->base->ssr);
 239
 240         rgmii_speed &= ~rgmii_speed_mask[input];
 241
 242         if (speed == 1000)
 243                 rgmii_speed |= rgmii_speed1000[input];
 244         else if (speed == 100)
 245                 rgmii_speed |= rgmii_speed100[input];
 246
 247         out_be32(&rgmii->base->ssr, rgmii_speed);
 248 }
 249
 250 static void emac_close_rgmii(struct ocp_device *ocpdev)
 251 {
 252         struct ibm_ocp_rgmii *rgmii = RGMII_PRIV(ocpdev);
 253         BUG_ON(!rgmii || rgmii->users == 0);
 254
 255         if (!--rgmii->users) {
 256                 ocp_set_drvdata(ocpdev, NULL);
 257                 iounmap((void *)rgmii->base);
 258                 kfree(rgmii);
 259         }
 260 }
 261
 262 static int emac_init_zmii(struct ocp_device *zmii_dev, int input, int phy_mode)
 263 {
 264         struct ibm_ocp_zmii *zmii = ZMII_PRIV(zmii_dev);
 265         const char *mode_name[] = { "SMII", "RMII", "MII" };
 266         int mode = -1;
 267
 268         if (!zmii) {
 269                 zmii = kmalloc(sizeof(struct ibm_ocp_zmii), GFP_KERNEL);
 270                 if (zmii == NULL) {
 271                         printk(KERN_ERR
 272                                "zmii%d: Out of memory allocating ZMII structure!\n",
 273                                zmii_dev->def->index);
 274                         return -ENOMEM;
 275                 }
 276                 memset(zmii, 0, sizeof(*zmii));
 277
 278                 zmii->base =
 279                     (struct zmii_regs *)ioremap(zmii_dev->def->paddr,
 280                                                 sizeof(*zmii->base));
 281                 if (zmii->base == NULL) {
 282                         printk(KERN_ERR
 283                                "zmii%d: Cannot ioremap bridge registers!\n",
 284                                zmii_dev->def->index);
 285
 286                         kfree(zmii);
 287                         return -ENOMEM;
 288                 }
 289                 ocp_set_drvdata(zmii_dev, zmii);
 290         }
 291
 292         if (phy_mode) {
 293                 switch (phy_mode) {
 294                 case PHY_MODE_MII:
 295                         mode = MII;
 296                         break;
 297                 case PHY_MODE_RMII:
 298                         mode = RMII;
 299                         break;
 300                 case PHY_MODE_SMII:
 301                 default:
 302                         mode = SMII;
 303                 }
 304                 zmii->base->fer &= ~ZMII_FER_MASK(input);
 305                 zmii->base->fer |= zmii_enable[input][mode];
 306         } else {
 307                 switch ((zmii->base->fer & ZMII_FER_MASK(input)) << (4 * input)) {
 308                 case ZMII_MII0:
 309                         mode = MII;
 310                         break;
 311                 case ZMII_RMII0:
 312                         mode = RMII;
 313                         break;
 314                 case ZMII_SMII0:
 315                         mode = SMII;
 316                 }
 317         }
 318
 319         /* Set mode to SMII if nothing valid is detected */
 320         if (mode < 0)
 321                 mode = SMII;
 322
 323         printk(KERN_NOTICE "zmii%d: input %d in %s mode\n",
 324                zmii_dev->def->index, input, mode_name[mode]);
 325
 326         zmii->mode[input] = mode;
 327         zmii->users++;
 328
 329         return 0;
 330 }
 331
 332 static void emac_enable_zmii_port(struct ocp_device *ocpdev, int input)
 333 {
 334         u32 mask;
 335         struct ibm_ocp_zmii *zmii = ZMII_PRIV(ocpdev);
 336
 337         mask = in_be32(&zmii->base->fer);
 338         mask &= zmii_enable[input][MDI];        /* turn all non enabled MDI's off */
 339         mask |= zmii_enable[input][zmii->mode[input]] | mdi_enable[input];
 340         out_be32(&zmii->base->fer, mask);
 341 }
 342
 343 static void
 344 emac_zmii_port_speed(struct ocp_device *ocpdev, int input, int speed)
 345 {
 346         struct ibm_ocp_zmii *zmii = ZMII_PRIV(ocpdev);
 347
 348         if (speed == 100)
 349                 zmii_speed |= zmii_speed100[input];
 350         else
 351                 zmii_speed &= ~zmii_speed100[input];
 352
 353         out_be32(&zmii->base->ssr, zmii_speed);
 354 }
 355
 356 static void emac_close_zmii(struct ocp_device *ocpdev)
 357 {
 358         struct ibm_ocp_zmii *zmii = ZMII_PRIV(ocpdev);
 359         BUG_ON(!zmii || zmii->users == 0);
 360
 361         if (!--zmii->users) {
 362                 ocp_set_drvdata(ocpdev, NULL);
 363                 iounmap((void *)zmii->base);
 364                 kfree(zmii);
 365         }
 366 }
 367
 368 int emac_phy_read(struct net_device *dev, int mii_id, int reg)
 369 {
 370         uint32_t stacr;
 371         struct ocp_enet_private *fep = dev->priv;
 372         emac_t *emacp = fep->emacp;
 373
 374         MDIO_DEBUG(("%s: phy_read, id: 0x%x, reg: 0x%x\n", dev->name, mii_id,
 375                     reg));
 376
 377         /* Enable proper ZMII port */
 378         if (fep->zmii_dev)
 379                 emac_enable_zmii_port(fep->zmii_dev, fep->zmii_input);
 380
 381         /* Use the EMAC that has the MDIO port */
 382         if (fep->mdio_dev) {
 383                 dev = fep->mdio_dev;
 384                 fep = dev->priv;
 385                 emacp = fep->emacp;
 386         }
 387
 388         udelay(MDIO_DELAY);
 389
 390         if ((in_be32(&emacp->em0stacr) & EMAC_STACR_OC) == 0) {
 391                 printk(KERN_WARNING "%s: PHY read timeout #1!\n", dev->name);
 392                 return -1;
 393         }
 394
 395         /* Clear the speed bits and make a read request to the PHY */
 396         stacr = ((EMAC_STACR_READ | (reg & 0x1f)) & ~EMAC_STACR_CLK_100MHZ);
 397         stacr |= ((mii_id & 0x1F) << 5);
 398
 399         out_be32(&emacp->em0stacr, stacr);
 400
 401         udelay(MDIO_DELAY);
 402         stacr = in_be32(&emacp->em0stacr);
 403
 404         if ((stacr & EMAC_STACR_OC) == 0) {
 405                 printk(KERN_WARNING "%s: PHY read timeout #2!\n", dev->name);
 406                 return -1;
 407         }
 408
 409         /* Check for a read error */
 410         if (stacr & EMAC_STACR_PHYE) {
 411                 MDIO_DEBUG(("EMAC MDIO PHY error !\n"));
 412                 return -1;
 413         }
 414
 415         MDIO_DEBUG((" -> 0x%x\n", stacr >> 16));
 416
 417         return (stacr >> 16);
 418 }
 419
 420 void emac_phy_write(struct net_device *dev, int mii_id, int reg, int data)
 421 {
 422         uint32_t stacr;
 423         struct ocp_enet_private *fep = dev->priv;
 424         emac_t *emacp = fep->emacp;
 425
 426         MDIO_DEBUG(("%s phy_write, id: 0x%x, reg: 0x%x, data: 0x%x\n",
 427                     dev->name, mii_id, reg, data));
 428
 429         /* Enable proper ZMII port */
 430         if (fep->zmii_dev)
 431                 emac_enable_zmii_port(fep->zmii_dev, fep->zmii_input);
 432
 433         /* Use the EMAC that has the MDIO port */
 434         if (fep->mdio_dev) {
 435                 dev = fep->mdio_dev;
 436                 fep = dev->priv;
 437                 emacp = fep->emacp;
 438         }
 439
 440         udelay(MDIO_DELAY);
 441
 442         if ((in_be32(&emacp->em0stacr) & EMAC_STACR_OC) == 0) {
 443                 printk(KERN_WARNING "%s: PHY write timeout #2!\n", dev->name);
 444                 return;
 445         }
 446
 447         /* Clear the speed bits and make a read request to the PHY */
 448
 449         stacr = ((EMAC_STACR_WRITE | (reg & 0x1f)) & ~EMAC_STACR_CLK_100MHZ);
 450         stacr |= ((mii_id & 0x1f) << 5) | ((data & 0xffff) << 16);
 451
 452         out_be32(&emacp->em0stacr, stacr);
 453
 454         udelay(MDIO_DELAY);
 455
 456         if ((in_be32(&emacp->em0stacr) & EMAC_STACR_OC) == 0)
 457                 printk(KERN_WARNING "%s: PHY write timeout #2!\n", dev->name);
 458
 459         /* Check for a write error */
 460         if ((stacr & EMAC_STACR_PHYE) != 0) {
 461                 MDIO_DEBUG(("EMAC MDIO PHY error !\n"));
 462         }
 463 }
 464
 465 static void emac_txeob_dev(void *param, u32 chanmask)
 466 {
 467         struct net_device *dev = param;
 468         struct ocp_enet_private *fep = dev->priv;
 469         unsigned long flags;
 470
 471         spin_lock_irqsave(&fep->lock, flags);
 472
 473         PKT_DEBUG(("emac_txeob_dev() entry, tx_cnt: %d\n", fep->tx_cnt));
 474
 475         while (fep->tx_cnt &&
 476                !(fep->tx_desc[fep->ack_slot].ctrl & MAL_TX_CTRL_READY)) {
 477
 478                 if (fep->tx_desc[fep->ack_slot].ctrl & MAL_TX_CTRL_LAST) {
 479                         /* Tell the system the transmit completed. */
 480                         dma_unmap_single(&fep->ocpdev->dev,
 481                                          fep->tx_desc[fep->ack_slot].data_ptr,
 482                                          fep->tx_desc[fep->ack_slot].data_len,
 483                                          DMA_TO_DEVICE);
 484                         dev_kfree_skb_irq(fep->tx_skb[fep->ack_slot]);
 485
 486                         if (fep->tx_desc[fep->ack_slot].ctrl &
 487                             (EMAC_TX_ST_EC | EMAC_TX_ST_MC | EMAC_TX_ST_SC))
 488                                 fep->stats.collisions++;
 489                 }
 490
 491                 fep->tx_skb[fep->ack_slot] = (struct sk_buff *)NULL;
 492                 if (++fep->ack_slot == NUM_TX_BUFF)
 493                         fep->ack_slot = 0;
 494
 495                 fep->tx_cnt--;
 496         }
 497         if (fep->tx_cnt < NUM_TX_BUFF)
 498                 netif_wake_queue(dev);
 499
 500         PKT_DEBUG(("emac_txeob_dev() exit, tx_cnt: %d\n", fep->tx_cnt));
 501
 502         spin_unlock_irqrestore(&fep->lock, flags);
 503 }
 504
 505 /*
 506   Fill/Re-fill the rx chain with valid ctrl/ptrs.
 507   This function will fill from rx_slot up to the parm end.
 508   So to completely fill the chain pre-set rx_slot to 0 and
 509   pass in an end of 0.
 510  */
 511 static void emac_rx_fill(struct net_device *dev, int end)
 512 {
 513         int i;
 514         struct ocp_enet_private *fep = dev->priv;
 515
 516         i = fep->rx_slot;
 517         do {
 518                 /* We don't want the 16 bytes skb_reserve done by dev_alloc_skb,
 519                  * it breaks our cache line alignement. However, we still allocate
 520                  * +16 so that we end up allocating the exact same size as
 521                  * dev_alloc_skb() would do.
 522                  * Also, because of the skb_res, the max DMA size we give to EMAC
 523                  * is slighly wrong, causing it to potentially DMA 2 more bytes
 524                  * from a broken/oversized packet. These 16 bytes will take care
 525                  * that we don't walk on somebody else toes with that.
 526                  */
 527                 fep->rx_skb[i] =
 528                     alloc_skb(fep->rx_buffer_size + 16, GFP_ATOMIC);
 529
 530                 if (fep->rx_skb[i] == NULL) {
 531                         /* Keep rx_slot here, the next time clean/fill is called
 532                          * we will try again before the MAL wraps back here
 533                          * If the MAL tries to use this descriptor with
 534                          * the EMPTY bit off it will cause the
 535                          * rxde interrupt.  That is where we will
 536                          * try again to allocate an sk_buff.
 537                          */
 538                         break;
 539
 540                 }
 541
 542                 if (skb_res)
 543                         skb_reserve(fep->rx_skb[i], skb_res);
 544
 545                 /* We must NOT dma_map_single the cache line right after the
 546                  * buffer, so we must crop our sync size to account for the
 547                  * reserved space
 548                  */
 549                 fep->rx_desc[i].data_ptr =
 550                     (unsigned char *)dma_map_single(&fep->ocpdev->dev,
 551                                                     (void *)fep->rx_skb[i]->
 552                                                     data,
 553                                                     fep->rx_buffer_size -
 554                                                     skb_res, DMA_FROM_DEVICE);
 555
 556                 /*
 557                  * Some 4xx implementations use the previously
 558                  * reserved bits in data_len to encode the MS
 559                  * 4-bits of a 36-bit physical address (ERPN)
 560                  * This must be initialized.
 561                  */
 562                 fep->rx_desc[i].data_len = 0;
 563                 fep->rx_desc[i].ctrl = MAL_RX_CTRL_EMPTY | MAL_RX_CTRL_INTR |
 564                     (i == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
 565
 566         } while ((i = (i + 1) % NUM_RX_BUFF) != end);
 567
 568         fep->rx_slot = i;
 569 }
 570
 571 static void
 572 emac_rx_csum(struct net_device *dev, unsigned short ctrl, struct sk_buff *skb)
 573 {
 574         struct ocp_enet_private *fep = dev->priv;
 575
 576         /* Exit if interface has no TAH engine */
 577         if (!fep->tah_dev) {
 578                 skb->ip_summed = CHECKSUM_NONE;
 579                 return;
 580         }
 581
 582         /* Check for TCP/UDP/IP csum error */
 583         if (ctrl & EMAC_CSUM_VER_ERROR) {
 584                 /* Let the stack verify checksum errors */
 585                 skb->ip_summed = CHECKSUM_NONE;
 586 /*              adapter->hw_csum_err++; */
 587         } else {
 588                 /* Csum is good */
 589                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 590 /*              adapter->hw_csum_good++; */
 591         }
 592 }
 593
 594 static int emac_rx_clean(struct net_device *dev)
 595 {
 596         int i, b, bnum, buf[6];
 597         int error, frame_length;
 598         struct ocp_enet_private *fep = dev->priv;
 599         unsigned short ctrl;
 600
 601         i = fep->rx_slot;
 602
 603         PKT_DEBUG(("emac_rx_clean() entry, rx_slot: %d\n", fep->rx_slot));
 604
 605         do {
 606                 if (fep->rx_skb[i] == NULL)
 607                         continue;       /*we have already handled the packet but haved failed to alloc */
 608                 /*
 609                    since rx_desc is in uncached mem we don't keep reading it directly
 610                    we pull out a local copy of ctrl and do the checks on the copy.
 611                  */
 612                 ctrl = fep->rx_desc[i].ctrl;
 613                 if (ctrl & MAL_RX_CTRL_EMPTY)
 614                         break;  /*we don't have any more ready packets */
 615
 616                 if (EMAC_IS_BAD_RX_PACKET(ctrl)) {
 617                         fep->stats.rx_errors++;
 618                         fep->stats.rx_dropped++;
 619
 620                         if (ctrl & EMAC_RX_ST_OE)
 621                                 fep->stats.rx_fifo_errors++;
 622                         if (ctrl & EMAC_RX_ST_AE)
 623                                 fep->stats.rx_frame_errors++;
 624                         if (ctrl & EMAC_RX_ST_BFCS)
 625                                 fep->stats.rx_crc_errors++;
 626                         if (ctrl & (EMAC_RX_ST_RP | EMAC_RX_ST_PTL |
 627                                     EMAC_RX_ST_ORE | EMAC_RX_ST_IRE))
 628                                 fep->stats.rx_length_errors++;
 629                 } else {
 630                         if ((ctrl & (MAL_RX_CTRL_FIRST | MAL_RX_CTRL_LAST)) ==
 631                             (MAL_RX_CTRL_FIRST | MAL_RX_CTRL_LAST)) {
 632                                 /* Single descriptor packet */
 633                                 emac_rx_csum(dev, ctrl, fep->rx_skb[i]);
 634                                 /* Send the skb up the chain. */
 635                                 frame_length = fep->rx_desc[i].data_len - 4;
 636                                 skb_put(fep->rx_skb[i], frame_length);
 637                                 fep->rx_skb[i]->dev = dev;
 638                                 fep->rx_skb[i]->protocol =
 639                                     eth_type_trans(fep->rx_skb[i], dev);
 640                                 error = netif_rx(fep->rx_skb[i]);
 641
 642                                 if ((error == NET_RX_DROP) ||
 643                                     (error == NET_RX_BAD)) {
 644                                         fep->stats.rx_dropped++;
 645                                 } else {
 646                                         fep->stats.rx_packets++;
 647                                         fep->stats.rx_bytes += frame_length;
 648                                 }
 649                                 fep->rx_skb[i] = NULL;
 650                         } else {
 651                                 /* Multiple descriptor packet */
 652                                 if (ctrl & MAL_RX_CTRL_FIRST) {
 653                                         if (fep->rx_desc[(i + 1) % NUM_RX_BUFF].
 654                                             ctrl & MAL_RX_CTRL_EMPTY)
 655                                                 break;
 656                                         bnum = 0;
 657                                         buf[bnum] = i;
 658                                         ++bnum;
 659                                         continue;
 660                                 }
 661                                 if (((ctrl & MAL_RX_CTRL_FIRST) !=
 662                                      MAL_RX_CTRL_FIRST) &&
 663                                     ((ctrl & MAL_RX_CTRL_LAST) !=
 664                                      MAL_RX_CTRL_LAST)) {
 665                                         if (fep->rx_desc[(i + 1) %
 666                                                          NUM_RX_BUFF].ctrl &
 667                                             MAL_RX_CTRL_EMPTY) {
 668                                                 i = buf[0];
 669                                                 break;
 670                                         }
 671                                         buf[bnum] = i;
 672                                         ++bnum;
 673                                         continue;
 674                                 }
 675                                 if (ctrl & MAL_RX_CTRL_LAST) {
 676                                         buf[bnum] = i;
 677                                         ++bnum;
 678                                         skb_put(fep->rx_skb[buf[0]],
 679                                                 fep->rx_desc[buf[0]].data_len);
 680                                         for (b = 1; b < bnum; b++) {
 681                                                 /*
 682                                                  * MAL is braindead, we need
 683                                                  * to copy the remainder
 684                                                  * of the packet from the
 685                                                  * latter descriptor buffers
 686                                                  * to the first skb. Then
 687                                                  * dispose of the source
 688                                                  * skbs.
 689                                                  *
 690                                                  * Once the stack is fixed
 691                                                  * to handle frags on most
 692                                                  * protocols we can generate
 693                                                  * a fragmented skb with
 694                                                  * no copies.
 695                                                  */
 696                                                 memcpy(fep->rx_skb[buf[0]]->
 697                                                        data +
 698                                                        fep->rx_skb[buf[0]]->len,
 699                                                        fep->rx_skb[buf[b]]->
 700                                                        data,
 701                                                        fep->rx_desc[buf[b]].
 702                                                        data_len);
 703                                                 skb_put(fep->rx_skb[buf[0]],
 704                                                         fep->rx_desc[buf[b]].
 705                                                         data_len);
 706                                                 dma_unmap_single(&fep->ocpdev->
 707                                                                  dev,
 708                                                                  fep->
 709                                                                  rx_desc[buf
 710                                                                          [b]].
 711                                                                  data_ptr,
 712                                                                  fep->
 713                                                                  rx_desc[buf
 714                                                                          [b]].
 715                                                                  data_len,
 716                                                                  DMA_FROM_DEVICE);
 717                                                 dev_kfree_skb(fep->
 718                                                               rx_skb[buf[b]]);
 719                                         }
 720                                         emac_rx_csum(dev, ctrl,
 721                                                      fep->rx_skb[buf[0]]);
 722
 723                                         fep->rx_skb[buf[0]]->dev = dev;
 724                                         fep->rx_skb[buf[0]]->protocol =
 725                                             eth_type_trans(fep->rx_skb[buf[0]],
 726                                                            dev);
 727                                         error = netif_rx(fep->rx_skb[buf[0]]);
 728
 729                                         if ((error == NET_RX_DROP)
 730                                             || (error == NET_RX_BAD)) {
 731                                                 fep->stats.rx_dropped++;
 732                                         } else {
 733                                                 fep->stats.rx_packets++;
 734                                                 fep->stats.rx_bytes +=
 735                                                     fep->rx_skb[buf[0]]->len;
 736                                         }
 737                                         for (b = 0; b < bnum; b++)
 738                                                 fep->rx_skb[buf[b]] = NULL;
 739                                 }
 740                         }
 741                 }
 742         } while ((i = (i + 1) % NUM_RX_BUFF) != fep->rx_slot);
 743
 744         PKT_DEBUG(("emac_rx_clean() exit, rx_slot: %d\n", fep->rx_slot));
 745
 746         return i;
 747 }
 748
 749 static void emac_rxeob_dev(void *param, u32 chanmask)
 750 {
 751         struct net_device *dev = param;
 752         struct ocp_enet_private *fep = dev->priv;
 753         unsigned long flags;
 754         int n;
 755
 756         spin_lock_irqsave(&fep->lock, flags);
 757         if ((n = emac_rx_clean(dev)) != fep->rx_slot)
 758                 emac_rx_fill(dev, n);
 759         spin_unlock_irqrestore(&fep->lock, flags);
 760 }
 761
 762 /*
 763  * This interrupt should never occurr, we don't program
 764  * the MAL for contiunous mode.
 765  */
 766 static void emac_txde_dev(void *param, u32 chanmask)
 767 {
 768         struct net_device *dev = param;
 769         struct ocp_enet_private *fep = dev->priv;
 770
 771         printk(KERN_WARNING "%s: transmit descriptor error\n", dev->name);
 772
 773         emac_mac_dump(dev);
 774         emac_mal_dump(dev);
 775
 776         /* Reenable the transmit channel */
 777         mal_enable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
 778 }
 779
 780 /*
 781  * This interrupt should be very rare at best.  This occurs when
 782  * the hardware has a problem with the receive descriptors.  The manual
 783  * states that it occurs when the hardware cannot the receive descriptor
 784  * empty bit is not set.  The recovery mechanism will be to
 785  * traverse through the descriptors, handle any that are marked to be
 786  * handled and reinitialize each along the way.  At that point the driver
 787  * will be restarted.
 788  */
 789 static void emac_rxde_dev(void *param, u32 chanmask)
 790 {
 791         struct net_device *dev = param;
 792         struct ocp_enet_private *fep = dev->priv;
 793         unsigned long flags;
 794
 795         if (net_ratelimit()) {
 796                 printk(KERN_WARNING "%s: receive descriptor error\n",
 797                        fep->ndev->name);
 798
 799                 emac_mac_dump(dev);
 800                 emac_mal_dump(dev);
 801                 emac_desc_dump(dev);
 802         }
 803
 804         /* Disable RX channel */
 805         spin_lock_irqsave(&fep->lock, flags);
 806         mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
 807
 808         /* For now, charge the error against all emacs */
 809         fep->stats.rx_errors++;
 810
 811         /* so do we have any good packets still? */
 812         emac_rx_clean(dev);
 813
 814         /* When the interface is restarted it resets processing to the
 815          *  first descriptor in the table.
 816          */
 817
 818         fep->rx_slot = 0;
 819         emac_rx_fill(dev, 0);
 820
 821         set_mal_dcrn(fep->mal, DCRN_MALRXEOBISR, fep->commac.rx_chan_mask);
 822         set_mal_dcrn(fep->mal, DCRN_MALRXDEIR, fep->commac.rx_chan_mask);
 823
 824         /* Reenable the receive channels */
 825         mal_enable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
 826         spin_unlock_irqrestore(&fep->lock, flags);
 827 }
 828
 829 static irqreturn_t
 830 emac_mac_irq(int irq, void *dev_instance, struct pt_regs *regs)
 831 {
 832         struct net_device *dev = dev_instance;
 833         struct ocp_enet_private *fep = dev->priv;
 834         emac_t *emacp = fep->emacp;
 835         unsigned long tmp_em0isr;
 836
 837         /* EMAC interrupt */
 838         tmp_em0isr = in_be32(&emacp->em0isr);
 839         if (tmp_em0isr & (EMAC_ISR_TE0 | EMAC_ISR_TE1)) {
 840                 /* This error is a hard transmit error - could retransmit */
 841                 fep->stats.tx_errors++;
 842
 843                 /* Reenable the transmit channel */
 844                 mal_enable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
 845
 846         } else {
 847                 fep->stats.rx_errors++;
 848         }
 849
 850         if (tmp_em0isr & EMAC_ISR_RP)
 851                 fep->stats.rx_length_errors++;
 852         if (tmp_em0isr & EMAC_ISR_ALE)
 853                 fep->stats.rx_frame_errors++;
 854         if (tmp_em0isr & EMAC_ISR_BFCS)
 855                 fep->stats.rx_crc_errors++;
 856         if (tmp_em0isr & EMAC_ISR_PTLE)
 857                 fep->stats.rx_length_errors++;
 858         if (tmp_em0isr & EMAC_ISR_ORE)
 859                 fep->stats.rx_length_errors++;
 860         if (tmp_em0isr & EMAC_ISR_TE0)
 861                 fep->stats.tx_aborted_errors++;
 862
 863         emac_err_dump(dev, tmp_em0isr);
 864
 865         out_be32(&emacp->em0isr, tmp_em0isr);
 866
 867         return IRQ_HANDLED;
 868 }
 869
 870 static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev)
 871 {
 872         unsigned short ctrl;
 873         unsigned long flags;
 874         struct ocp_enet_private *fep = dev->priv;
 875         emac_t *emacp = fep->emacp;
 876         int len = skb->len;
 877         unsigned int offset = 0, size, f, tx_slot_first;
 878         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
 879
 880         spin_lock_irqsave(&fep->lock, flags);
 881
 882         len -= skb->data_len;
 883
 884         if ((fep->tx_cnt + nr_frags + len / DESC_BUF_SIZE + 1) > NUM_TX_BUFF) {
 885                 PKT_DEBUG(("emac_start_xmit() stopping queue\n"));
 886                 netif_stop_queue(dev);
 887                 spin_unlock_irqrestore(&fep->lock, flags);
 888                 restore_flags(flags);
 889                 return -EBUSY;
 890         }
 891
 892         tx_slot_first = fep->tx_slot;
 893
 894         while (len) {
 895                 size = min(len, DESC_BUF_SIZE);
 896
 897                 fep->tx_desc[fep->tx_slot].data_len = (short)size;
 898                 fep->tx_desc[fep->tx_slot].data_ptr =
 899                     (unsigned char *)dma_map_single(&fep->ocpdev->dev,
 900                                                     (void *)((unsigned int)skb->
 901                                                              data + offset),
 902                                                     size, DMA_TO_DEVICE);
 903
 904                 ctrl = EMAC_TX_CTRL_DFLT;
 905                 if (fep->tx_slot != tx_slot_first)
 906                         ctrl |= MAL_TX_CTRL_READY;
 907                 if ((NUM_TX_BUFF - 1) == fep->tx_slot)
 908                         ctrl |= MAL_TX_CTRL_WRAP;
 909                 if (!nr_frags && (len == size)) {
 910                         ctrl |= MAL_TX_CTRL_LAST;
 911                         fep->tx_skb[fep->tx_slot] = skb;
 912                 }
 913                 if (skb->ip_summed == CHECKSUM_HW)
 914                         ctrl |= EMAC_TX_CTRL_TAH_CSUM;
 915
 916                 fep->tx_desc[fep->tx_slot].ctrl = ctrl;
 917
 918                 len -= size;
 919                 offset += size;
 920
 921                 /* Bump tx count */
 922                 if (++fep->tx_cnt == NUM_TX_BUFF)
 923                         netif_stop_queue(dev);
 924
 925                 /* Next descriptor */
 926                 if (++fep->tx_slot == NUM_TX_BUFF)
 927                         fep->tx_slot = 0;
 928         }
 929
 930         for (f = 0; f < nr_frags; f++) {
 931                 struct skb_frag_struct *frag;
 932
 933                 frag = &skb_shinfo(skb)->frags[f];
 934                 len = frag->size;
 935                 offset = 0;
 936
 937                 while (len) {
 938                         size = min(len, DESC_BUF_SIZE);
 939
 940                         dma_map_page(&fep->ocpdev->dev,
 941                                      frag->page,
 942                                      frag->page_offset + offset,
 943                                      size, DMA_TO_DEVICE);
 944
 945                         ctrl = EMAC_TX_CTRL_DFLT | MAL_TX_CTRL_READY;
 946                         if ((NUM_TX_BUFF - 1) == fep->tx_slot)
 947                                 ctrl |= MAL_TX_CTRL_WRAP;
 948                         if ((f == (nr_frags - 1)) && (len == size)) {
 949                                 ctrl |= MAL_TX_CTRL_LAST;
 950                                 fep->tx_skb[fep->tx_slot] = skb;
 951                         }
 952
 953                         if (skb->ip_summed == CHECKSUM_HW)
 954                                 ctrl |= EMAC_TX_CTRL_TAH_CSUM;
 955
 956                         fep->tx_desc[fep->tx_slot].data_len = (short)size;
 957                         fep->tx_desc[fep->tx_slot].data_ptr =
 958                             (char *)((page_to_pfn(frag->page) << PAGE_SHIFT) +
 959                                      frag->page_offset + offset);
 960                         fep->tx_desc[fep->tx_slot].ctrl = ctrl;
 961
 962                         len -= size;
 963                         offset += size;
 964
 965                         /* Bump tx count */
 966                         if (++fep->tx_cnt == NUM_TX_BUFF)
 967                                 netif_stop_queue(dev);
 968
 969                         /* Next descriptor */
 970                         if (++fep->tx_slot == NUM_TX_BUFF)
 971                                 fep->tx_slot = 0;
 972                 }
 973         }
 974
 975         /*
 976          * Deferred set READY on first descriptor of packet to
 977          * avoid TX MAL race.
 978          */
 979         fep->tx_desc[tx_slot_first].ctrl |= MAL_TX_CTRL_READY;
 980
 981         /* Send the packet out. */
 982         out_be32(&emacp->em0tmr0, EMAC_TMR0_XMIT);
 983
 984         fep->stats.tx_packets++;
 985         fep->stats.tx_bytes += skb->len;
 986
 987         PKT_DEBUG(("emac_start_xmit() exitn"));
 988
 989         spin_unlock_irqrestore(&fep->lock, flags);
 990
 991         return 0;
 992 }
 993
 994 static int emac_adjust_to_link(struct ocp_enet_private *fep)
 995 {
 996         emac_t *emacp = fep->emacp;
 997         struct ibm_ocp_rgmii *rgmii;
 998         unsigned long mode_reg;
 999         int full_duplex, speed;
1000
1001         full_duplex = 0;
1002         speed = SPEED_10;
1003
1004         /* set mode register 1 defaults */
1005         mode_reg = EMAC_M1_DEFAULT;
1006
1007         /* Read link mode on PHY */
1008         if (fep->phy_mii.def->ops->read_link(&fep->phy_mii) == 0) {
1009                 /* If an error occurred, we don't deal with it yet */
1010                 full_duplex = (fep->phy_mii.duplex == DUPLEX_FULL);
1011                 speed = fep->phy_mii.speed;
1012         }
1013
1014         if (fep->rgmii_dev)
1015                 rgmii = RGMII_PRIV(fep->rgmii_dev);
1016
1017         /* set speed (default is 10Mb) */
1018         switch (speed) {
1019         case SPEED_1000:
1020                 mode_reg |= EMAC_M1_JUMBO_ENABLE | EMAC_M1_RFS_16K;
1021                 if ((rgmii->mode[fep->rgmii_input] == RTBI)
1022                     || (rgmii->mode[fep->rgmii_input] == TBI))
1023                         mode_reg |= EMAC_M1_MF_1000GPCS;
1024                 else
1025                         mode_reg |= EMAC_M1_MF_1000MBPS;
1026                 if (fep->rgmii_dev)
1027                         emac_rgmii_port_speed(fep->rgmii_dev, fep->rgmii_input,
1028                                               1000);
1029                 break;
1030         case SPEED_100:
1031                 mode_reg |= EMAC_M1_MF_100MBPS | EMAC_M1_RFS_4K;
1032                 if (fep->rgmii_dev)
1033                         emac_rgmii_port_speed(fep->rgmii_dev, fep->rgmii_input,
1034                                               100);
1035                 if (fep->zmii_dev)
1036                         emac_zmii_port_speed(fep->zmii_dev, fep->zmii_input,
1037                                              100);
1038                 break;
1039         case SPEED_10:
1040         default:
1041                 mode_reg = (mode_reg & ~EMAC_M1_MF_100MBPS) | EMAC_M1_RFS_4K;
1042                 if (fep->rgmii_dev)
1043                         emac_rgmii_port_speed(fep->rgmii_dev, fep->rgmii_input,
1044                                               10);
1045                 if (fep->zmii_dev)
1046                         emac_zmii_port_speed(fep->zmii_dev, fep->zmii_input,
1047                                              10);
1048         }
1049
1050         if (full_duplex)
1051                 mode_reg |= EMAC_M1_FDE | EMAC_M1_EIFC | EMAC_M1_IST;
1052         else
1053                 mode_reg &= ~(EMAC_M1_FDE | EMAC_M1_EIFC | EMAC_M1_ILE);
1054
1055         LINK_DEBUG(("%s: adjust to link, speed: %d, duplex: %d, opened: %d\n",
1056                     fep->ndev->name, speed, full_duplex, fep->opened));
1057
1058         printk(KERN_INFO "%s: Speed: %d, %s duplex.\n",
1059                fep->ndev->name, speed, full_duplex ? "Full" : "Half");
1060         if (fep->opened)
1061                 out_be32(&emacp->em0mr1, mode_reg);
1062
1063         return 0;
1064 }
1065
1066 static int emac_set_mac_address(struct net_device *ndev, void *p)
1067 {
1068         struct ocp_enet_private *fep = ndev->priv;
1069         emac_t *emacp = fep->emacp;
1070         struct sockaddr *addr = p;
1071
1072         if (!is_valid_ether_addr(addr->sa_data))
1073                 return -EADDRNOTAVAIL;
1074
1075         memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
1076
1077         /* set the high address */
1078         out_be32(&emacp->em0iahr,
1079                  (fep->ndev->dev_addr[0] << 8) | fep->ndev->dev_addr[1]);
1080
1081         /* set the low address */
1082         out_be32(&emacp->em0ialr,
1083                  (fep->ndev->dev_addr[2] << 24) | (fep->ndev->dev_addr[3] << 16)
1084                  | (fep->ndev->dev_addr[4] << 8) | fep->ndev->dev_addr[5]);
1085
1086         return 0;
1087 }
1088
1089 static int emac_change_mtu(struct net_device *dev, int new_mtu)
1090 {
1091         struct ocp_enet_private *fep = dev->priv;
1092         int old_mtu = dev->mtu;
1093         emac_t *emacp = fep->emacp;
1094         u32 em0mr0;
1095         int i, full;
1096         unsigned long flags;
1097
1098         if ((new_mtu < EMAC_MIN_MTU) || (new_mtu > EMAC_MAX_MTU)) {
1099                 printk(KERN_ERR
1100                        "emac: Invalid MTU setting, MTU must be between %d and %d\n",
1101                        EMAC_MIN_MTU, EMAC_MAX_MTU);
1102                 return -EINVAL;
1103         }
1104
1105         if (old_mtu != new_mtu && netif_running(dev)) {
1106                 /* Stop rx engine */
1107                 em0mr0 = in_be32(&emacp->em0mr0);
1108                 out_be32(&emacp->em0mr0, em0mr0 & ~EMAC_M0_RXE);
1109
1110                 /* Wait for descriptors to be empty */
1111                 do {
1112                         full = 0;
1113                         for (i = 0; i < NUM_RX_BUFF; i++)
1114                                 if (!(fep->rx_desc[i].ctrl & MAL_RX_CTRL_EMPTY)) {
1115                                         printk(KERN_NOTICE
1116                                                "emac: RX ring is still full\n");
1117                                         full = 1;
1118                                 }
1119                 } while (full);
1120
1121                 spin_lock_irqsave(&fep->lock, flags);
1122
1123                 mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1124
1125                 /* Destroy all old rx skbs */
1126                 for (i = 0; i < NUM_RX_BUFF; i++) {
1127                         dma_unmap_single(&fep->ocpdev->dev,
1128                                          fep->rx_desc[i].data_ptr,
1129                                          fep->rx_desc[i].data_len,
1130                                          DMA_FROM_DEVICE);
1131                         dev_kfree_skb(fep->rx_skb[i]);
1132                         fep->rx_skb[i] = NULL;
1133                 }
1134
1135                 /* Set new rx_buffer_size and advertise new mtu */
1136                 fep->rx_buffer_size =
1137                     new_mtu + ENET_HEADER_SIZE + ENET_FCS_SIZE;
1138                 dev->mtu = new_mtu;
1139
1140                 /* Re-init rx skbs */
1141                 fep->rx_slot = 0;
1142                 emac_rx_fill(dev, 0);
1143
1144                 /* Restart the rx engine */
1145                 mal_enable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1146                 out_be32(&emacp->em0mr0, em0mr0 | EMAC_M0_RXE);
1147
1148                 spin_unlock_irqrestore(&fep->lock, flags);
1149         }
1150
1151         return 0;
1152 }
1153
1154 static void __emac_set_multicast_list(struct net_device *dev)
1155 {
1156         struct ocp_enet_private *fep = dev->priv;
1157         emac_t *emacp = fep->emacp;
1158         u32 rmr = in_be32(&emacp->em0rmr);
1159
1160         /* First clear all special bits, they can be set later */
1161         rmr &= ~(EMAC_RMR_PME | EMAC_RMR_PMME | EMAC_RMR_MAE);
1162
1163         if (dev->flags & IFF_PROMISC) {
1164                 rmr |= EMAC_RMR_PME;
1165         } else if (dev->flags & IFF_ALLMULTI || 32 < dev->mc_count) {
1166                 /*
1167                  * Must be setting up to use multicast
1168                  * Now check for promiscuous multicast
1169                  */
1170                 rmr |= EMAC_RMR_PMME;
1171         } else if (dev->flags & IFF_MULTICAST && 0 < dev->mc_count) {
1172                 unsigned short em0gaht[4] = { 0, 0, 0, 0 };
1173                 struct dev_mc_list *dmi;
1174
1175                 /* Need to hash on the multicast address. */
1176                 for (dmi = dev->mc_list; dmi; dmi = dmi->next) {
1177                         unsigned long mc_crc;
1178                         unsigned int bit_number;
1179
1180                         mc_crc = ether_crc(6, (char *)dmi->dmi_addr);
1181                         bit_number = 63 - (mc_crc >> 26);       /* MSB: 0 LSB: 63 */
1182                         em0gaht[bit_number >> 4] |=
1183                             0x8000 >> (bit_number & 0x0f);
1184                 }
1185                 emacp->em0gaht1 = em0gaht[0];
1186                 emacp->em0gaht2 = em0gaht[1];
1187                 emacp->em0gaht3 = em0gaht[2];
1188                 emacp->em0gaht4 = em0gaht[3];
1189
1190                 /* Turn on multicast addressing */
1191                 rmr |= EMAC_RMR_MAE;
1192         }
1193         out_be32(&emacp->em0rmr, rmr);
1194 }
1195
1196 static int emac_init_tah(struct ocp_enet_private *fep)
1197 {
1198         tah_t *tahp;
1199
1200         /* Initialize TAH and enable checksum verification */
1201         tahp = (tah_t *) ioremap(fep->tah_dev->def->paddr, sizeof(*tahp));
1202
1203         if (tahp == NULL) {
1204                 printk(KERN_ERR "tah%d: Cannot ioremap TAH registers!\n",
1205                        fep->tah_dev->def->index);
1206
1207                 return -ENOMEM;
1208         }
1209
1210         out_be32(&tahp->tah_mr, TAH_MR_SR);
1211
1212         /* wait for reset to complete */
1213         while (in_be32(&tahp->tah_mr) & TAH_MR_SR) ;
1214
1215         /* 10KB TAH TX FIFO accomodates the max MTU of 9000 */
1216         out_be32(&tahp->tah_mr,
1217                  TAH_MR_CVR | TAH_MR_ST_768 | TAH_MR_TFS_10KB | TAH_MR_DTFP |
1218                  TAH_MR_DIG);
1219
1220         iounmap(&tahp);
1221
1222         return 0;
1223 }
1224
1225 static void emac_init_rings(struct net_device *dev)
1226 {
1227         struct ocp_enet_private *ep = dev->priv;
1228         int loop;
1229
1230         ep->tx_desc = (struct mal_descriptor *)((char *)ep->mal->tx_virt_addr +
1231                                                 (ep->mal_tx_chan *
1232                                                  MAL_DT_ALIGN));
1233         ep->rx_desc =
1234             (struct mal_descriptor *)((char *)ep->mal->rx_virt_addr +
1235                                       (ep->mal_rx_chan * MAL_DT_ALIGN));
1236
1237         /* Fill in the transmit descriptor ring. */
1238         for (loop = 0; loop < NUM_TX_BUFF; loop++) {
1239                 if (ep->tx_skb[loop]) {
1240                         dma_unmap_single(&ep->ocpdev->dev,
1241                                          ep->tx_desc[loop].data_ptr,
1242                                          ep->tx_desc[loop].data_len,
1243                                          DMA_TO_DEVICE);
1244                         dev_kfree_skb_irq(ep->tx_skb[loop]);
1245                 }
1246                 ep->tx_skb[loop] = NULL;
1247                 ep->tx_desc[loop].ctrl = 0;
1248                 ep->tx_desc[loop].data_len = 0;
1249                 ep->tx_desc[loop].data_ptr = NULL;
1250         }
1251         ep->tx_desc[loop - 1].ctrl |= MAL_TX_CTRL_WRAP;
1252
1253         /* Format the receive descriptor ring. */
1254         ep->rx_slot = 0;
1255         /* Default is MTU=1500 + Ethernet overhead */
1256         ep->rx_buffer_size = ENET_DEF_BUF_SIZE;
1257         emac_rx_fill(dev, 0);
1258         if (ep->rx_slot != 0) {
1259                 printk(KERN_ERR
1260                        "%s: Not enough mem for RxChain durning Open?\n",
1261                        dev->name);
1262                 /*We couldn't fill the ring at startup?
1263                  *We could clean up and fail to open but right now we will try to
1264                  *carry on. It may be a sign of a bad NUM_RX_BUFF value
1265                  */
1266         }
1267
1268         ep->tx_cnt = 0;
1269         ep->tx_slot = 0;
1270         ep->ack_slot = 0;
1271 }
1272
1273 static void emac_reset_configure(struct ocp_enet_private *fep)
1274 {
1275         emac_t *emacp = fep->emacp;
1276         int i;
1277
1278         mal_disable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
1279         mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1280
1281         /*
1282          * Check for a link, some PHYs don't provide a clock if
1283          * no link is present.  Some EMACs will not come out of
1284          * soft reset without a PHY clock present.
1285          */
1286         if (fep->phy_mii.def->ops->poll_link(&fep->phy_mii)) {
1287                 /* Reset the EMAC */
1288                 out_be32(&emacp->em0mr0, EMAC_M0_SRST);
1289                 udelay(20);
1290                 for (i = 0; i < 100; i++) {
1291                         if ((in_be32(&emacp->em0mr0) & EMAC_M0_SRST) == 0)
1292                                 break;
1293                         udelay(10);
1294                 }
1295
1296                 if (i >= 100) {
1297                         printk(KERN_ERR "%s: Cannot reset EMAC\n",
1298                                fep->ndev->name);
1299                         return;
1300                 }
1301         }
1302
1303         /* Switch IRQs off for now */
1304         out_be32(&emacp->em0iser, 0);
1305
1306         /* Configure MAL rx channel */
1307         mal_set_rcbs(fep->mal, fep->mal_rx_chan, DESC_BUF_SIZE_REG);
1308
1309         /* set the high address */
1310         out_be32(&emacp->em0iahr,
1311                  (fep->ndev->dev_addr[0] << 8) | fep->ndev->dev_addr[1]);
1312
1313         /* set the low address */
1314         out_be32(&emacp->em0ialr,
1315                  (fep->ndev->dev_addr[2] << 24) | (fep->ndev->dev_addr[3] << 16)
1316                  | (fep->ndev->dev_addr[4] << 8) | fep->ndev->dev_addr[5]);
1317
1318         /* Adjust to link */
1319         if (netif_carrier_ok(fep->ndev))
1320                 emac_adjust_to_link(fep);
1321
1322         /* enable broadcast/individual address and RX FIFO defaults */
1323         out_be32(&emacp->em0rmr, EMAC_RMR_DEFAULT);
1324
1325         /* set transmit request threshold register */
1326         out_be32(&emacp->em0trtr, EMAC_TRTR_DEFAULT);
1327
1328         /* Reconfigure multicast */
1329         __emac_set_multicast_list(fep->ndev);
1330
1331         /* Set receiver/transmitter defaults */
1332         out_be32(&emacp->em0rwmr, EMAC_RWMR_DEFAULT);
1333         out_be32(&emacp->em0tmr0, EMAC_TMR0_DEFAULT);
1334         out_be32(&emacp->em0tmr1, EMAC_TMR1_DEFAULT);
1335
1336         /* set frame gap */
1337         out_be32(&emacp->em0ipgvr, CONFIG_IBM_EMAC_FGAP);
1338
1339         /* Init ring buffers */
1340         emac_init_rings(fep->ndev);
1341 }
1342
1343 static void emac_kick(struct ocp_enet_private *fep)
1344 {
1345         emac_t *emacp = fep->emacp;
1346         unsigned long emac_ier;
1347
1348         emac_ier = EMAC_ISR_PP | EMAC_ISR_BP | EMAC_ISR_RP |
1349             EMAC_ISR_SE | EMAC_ISR_PTLE | EMAC_ISR_ALE |
1350             EMAC_ISR_BFCS | EMAC_ISR_ORE | EMAC_ISR_IRE;
1351
1352         out_be32(&emacp->em0iser, emac_ier);
1353
1354         /* enable all MAL transmit and receive channels */
1355         mal_enable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
1356         mal_enable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1357
1358         /* set transmit and receive enable */
1359         out_be32(&emacp->em0mr0, EMAC_M0_TXE | EMAC_M0_RXE);
1360 }
1361
1362 static void
1363 emac_start_link(struct ocp_enet_private *fep, struct ethtool_cmd *ep)
1364 {
1365         u32 advertise;
1366         int autoneg;
1367         int forced_speed;
1368         int forced_duplex;
1369
1370         /* Default advertise */
1371         advertise = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
1372             ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
1373             ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full;
1374         autoneg = fep->want_autoneg;
1375         forced_speed = fep->phy_mii.speed;
1376         forced_duplex = fep->phy_mii.duplex;
1377
1378         /* Setup link parameters */
1379         if (ep) {
1380                 if (ep->autoneg == AUTONEG_ENABLE) {
1381                         advertise = ep->advertising;
1382                         autoneg = 1;
1383                 } else {
1384                         autoneg = 0;
1385                         forced_speed = ep->speed;
1386                         forced_duplex = ep->duplex;
1387                 }
1388         }
1389
1390         /* Configure PHY & start aneg */
1391         fep->want_autoneg = autoneg;
1392         if (autoneg) {
1393                 LINK_DEBUG(("%s: start link aneg, advertise: 0x%x\n",
1394                             fep->ndev->name, advertise));
1395                 fep->phy_mii.def->ops->setup_aneg(&fep->phy_mii, advertise);
1396         } else {
1397                 LINK_DEBUG(("%s: start link forced, speed: %d, duplex: %d\n",
1398                             fep->ndev->name, forced_speed, forced_duplex));
1399                 fep->phy_mii.def->ops->setup_forced(&fep->phy_mii, forced_speed,
1400                                                     forced_duplex);
1401         }
1402         fep->timer_ticks = 0;
1403         mod_timer(&fep->link_timer, jiffies + HZ);
1404 }
1405
1406 static void emac_link_timer(unsigned long data)
1407 {
1408         struct ocp_enet_private *fep = (struct ocp_enet_private *)data;
1409         int link;
1410
1411         if (fep->going_away)
1412                 return;
1413
1414         spin_lock_irq(&fep->lock);
1415
1416         link = fep->phy_mii.def->ops->poll_link(&fep->phy_mii);
1417         LINK_DEBUG(("%s: poll_link: %d\n", fep->ndev->name, link));
1418
1419         if (link == netif_carrier_ok(fep->ndev)) {
1420                 if (!link && fep->want_autoneg && (++fep->timer_ticks) > 10)
1421                         emac_start_link(fep, NULL);
1422                 goto out;
1423         }
1424         printk(KERN_INFO "%s: Link is %s\n", fep->ndev->name,
1425                link ? "Up" : "Down");
1426         if (link) {
1427                 netif_carrier_on(fep->ndev);
1428                 /* Chip needs a full reset on config change. That sucks, so I
1429                  * should ultimately move that to some tasklet to limit
1430                  * latency peaks caused by this code
1431                  */
1432                 emac_reset_configure(fep);
1433                 if (fep->opened)
1434                         emac_kick(fep);
1435         } else {
1436                 fep->timer_ticks = 0;
1437                 netif_carrier_off(fep->ndev);
1438         }
1439       out:
1440         mod_timer(&fep->link_timer, jiffies + HZ);
1441         spin_unlock_irq(&fep->lock);
1442 }
1443
1444 static void emac_set_multicast_list(struct net_device *dev)
1445 {
1446         struct ocp_enet_private *fep = dev->priv;
1447
1448         spin_lock_irq(&fep->lock);
1449         __emac_set_multicast_list(dev);
1450         spin_unlock_irq(&fep->lock);
1451 }
1452
1453 static int emac_get_settings(struct net_device *ndev, struct ethtool_cmd *cmd)
1454 {
1455         struct ocp_enet_private *fep = ndev->priv;
1456
1457         cmd->supported = fep->phy_mii.def->features;
1458         cmd->port = PORT_MII;
1459         cmd->transceiver = XCVR_EXTERNAL;
1460         cmd->phy_address = fep->mii_phy_addr;
1461         spin_lock_irq(&fep->lock);
1462         cmd->autoneg = fep->want_autoneg;
1463         cmd->speed = fep->phy_mii.speed;
1464         cmd->duplex = fep->phy_mii.duplex;
1465         spin_unlock_irq(&fep->lock);
1466         return 0;
1467 }
1468
1469 static int emac_set_settings(struct net_device *ndev, struct ethtool_cmd *cmd)
1470 {
1471         struct ocp_enet_private *fep = ndev->priv;
1472         unsigned long features = fep->phy_mii.def->features;
1473
1474         if (!capable(CAP_NET_ADMIN))
1475                 return -EPERM;
1476
1477         if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
1478                 return -EINVAL;
1479         if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
1480                 return -EINVAL;
1481         if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL)
1482                 return -EINVAL;
1483         if (cmd->autoneg == AUTONEG_DISABLE)
1484                 switch (cmd->speed) {
1485                 case SPEED_10:
1486                         if (cmd->duplex == DUPLEX_HALF &&
1487                             (features & SUPPORTED_10baseT_Half) == 0)
1488                                 return -EINVAL;
1489                         if (cmd->duplex == DUPLEX_FULL &&
1490                             (features & SUPPORTED_10baseT_Full) == 0)
1491                                 return -EINVAL;
1492                         break;
1493                 case SPEED_100:
1494                         if (cmd->duplex == DUPLEX_HALF &&
1495                             (features & SUPPORTED_100baseT_Half) == 0)
1496                                 return -EINVAL;
1497                         if (cmd->duplex == DUPLEX_FULL &&
1498                             (features & SUPPORTED_100baseT_Full) == 0)
1499                                 return -EINVAL;
1500                         break;
1501                 case SPEED_1000:
1502                         if (cmd->duplex == DUPLEX_HALF &&
1503                             (features & SUPPORTED_1000baseT_Half) == 0)
1504                                 return -EINVAL;
1505                         if (cmd->duplex == DUPLEX_FULL &&
1506                             (features & SUPPORTED_1000baseT_Full) == 0)
1507                                 return -EINVAL;
1508                         break;
1509                 default:
1510                         return -EINVAL;
1511         } else if ((features & SUPPORTED_Autoneg) == 0)
1512                 return -EINVAL;
1513         spin_lock_irq(&fep->lock);
1514         emac_start_link(fep, cmd);
1515         spin_unlock_irq(&fep->lock);
1516         return 0;
1517 }
1518
1519 static void
1520 emac_get_drvinfo(struct net_device *ndev, struct ethtool_drvinfo *info)
1521 {
1522         struct ocp_enet_private *fep = ndev->priv;
1523
1524         strcpy(info->driver, DRV_NAME);
1525         strcpy(info->version, DRV_VERSION);
1526         info->fw_version[0] = '\0';
1527         sprintf(info->bus_info, "IBM EMAC %d", fep->ocpdev->def->index);
1528         info->regdump_len = 0;
1529 }
1530
1531 static int emac_nway_reset(struct net_device *ndev)
1532 {
1533         struct ocp_enet_private *fep = ndev->priv;
1534
1535         if (!fep->want_autoneg)
1536                 return -EINVAL;
1537         spin_lock_irq(&fep->lock);
1538         emac_start_link(fep, NULL);
1539         spin_unlock_irq(&fep->lock);
1540         return 0;
1541 }
1542
1543 static u32 emac_get_link(struct net_device *ndev)
1544 {
1545         return netif_carrier_ok(ndev);
1546 }
1547
1548 static struct ethtool_ops emac_ethtool_ops = {
1549         .get_settings = emac_get_settings,
1550         .set_settings = emac_set_settings,
1551         .get_drvinfo = emac_get_drvinfo,
1552         .nway_reset = emac_nway_reset,
1553         .get_link = emac_get_link
1554 };
1555
1556 static int emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1557 {
1558         struct ocp_enet_private *fep = dev->priv;
1559         uint *data = (uint *) & rq->ifr_ifru;
1560
1561         switch (cmd) {
1562         case SIOCGMIIPHY:
1563                 data[0] = fep->mii_phy_addr;
1564                 /* Fall through */
1565         case SIOCGMIIREG:
1566                 data[3] = emac_phy_read(dev, fep->mii_phy_addr, data[1]);
1567                 return 0;
1568         case SIOCSMIIREG:
1569                 if (!capable(CAP_NET_ADMIN))
1570                         return -EPERM;
1571
1572                 emac_phy_write(dev, fep->mii_phy_addr, data[1], data[2]);
1573                 return 0;
1574         default:
1575                 return -EOPNOTSUPP;
1576         }
1577 }
1578
1579 static int emac_open(struct net_device *dev)
1580 {
1581         struct ocp_enet_private *fep = dev->priv;
1582         int rc;
1583
1584         spin_lock_irq(&fep->lock);
1585
1586         fep->opened = 1;
1587         netif_carrier_off(dev);
1588
1589         /* Reset & configure the chip */
1590         emac_reset_configure(fep);
1591
1592         spin_unlock_irq(&fep->lock);
1593
1594         /* Request our interrupt lines */
1595         rc = request_irq(dev->irq, emac_mac_irq, 0, "IBM EMAC MAC", dev);
1596         if (rc != 0) {
1597                 printk("dev->irq %d failed\n", dev->irq);
1598                 goto bail;
1599         }
1600         /* Kick the chip rx & tx channels into life */
1601         spin_lock_irq(&fep->lock);
1602         emac_kick(fep);
1603         spin_unlock_irq(&fep->lock);
1604
1605         netif_start_queue(dev);
1606       bail:
1607         return rc;
1608 }
1609
1610 static int emac_close(struct net_device *dev)
1611 {
1612         struct ocp_enet_private *fep = dev->priv;
1613         emac_t *emacp = fep->emacp;
1614
1615         /* XXX Stop IRQ emitting here */
1616         spin_lock_irq(&fep->lock);
1617         fep->opened = 0;
1618         mal_disable_tx_channels(fep->mal, fep->commac.tx_chan_mask);
1619         mal_disable_rx_channels(fep->mal, fep->commac.rx_chan_mask);
1620         netif_carrier_off(dev);
1621         netif_stop_queue(dev);
1622
1623         /*
1624          * Check for a link, some PHYs don't provide a clock if
1625          * no link is present.  Some EMACs will not come out of
1626          * soft reset without a PHY clock present.
1627          */
1628         if (fep->phy_mii.def->ops->poll_link(&fep->phy_mii)) {
1629                 out_be32(&emacp->em0mr0, EMAC_M0_SRST);
1630                 udelay(10);
1631
1632                 if (emacp->em0mr0 & EMAC_M0_SRST) {
1633                         /*not sure what to do here hopefully it clears before another open */
1634                         printk(KERN_ERR
1635                                "%s: Phy SoftReset didn't clear, no link?\n",
1636                                dev->name);
1637                 }
1638         }
1639
1640         /* Free the irq's */
1641         free_irq(dev->irq, dev);
1642
1643         spin_unlock_irq(&fep->lock);
1644
1645         return 0;
1646 }
1647
1648 static void emac_remove(struct ocp_device *ocpdev)
1649 {
1650         struct net_device *dev = ocp_get_drvdata(ocpdev);
1651         struct ocp_enet_private *ep = dev->priv;
1652
1653         /* FIXME: locking, races, ... */
1654         ep->going_away = 1;
1655         ocp_set_drvdata(ocpdev, NULL);
1656         if (ep->rgmii_dev)
1657                 emac_close_rgmii(ep->rgmii_dev);
1658         if (ep->zmii_dev)
1659                 emac_close_zmii(ep->zmii_dev);
1660
1661         unregister_netdev(dev);
1662         del_timer_sync(&ep->link_timer);
1663         mal_unregister_commac(ep->mal, &ep->commac);
1664         iounmap((void *)ep->emacp);
1665         kfree(dev);
1666 }
1667
1668 struct mal_commac_ops emac_commac_ops = {
1669         .txeob = &emac_txeob_dev,
1670         .txde = &emac_txde_dev,
1671         .rxeob = &emac_rxeob_dev,
1672         .rxde = &emac_rxde_dev,
1673 };
1674
1675 static int emac_init_device(struct ocp_device *ocpdev, struct ibm_ocp_mal *mal)
1676 {
1677         int deferred_init = 0;
1678         int rc = 0, i;
1679         struct net_device *ndev;
1680         struct ocp_enet_private *ep;
1681         struct ocp_func_emac_data *emacdata;
1682         int commac_reg = 0;
1683         u32 phy_map;
1684
1685         emacdata = (struct ocp_func_emac_data *)ocpdev->def->additions;
1686         if (!emacdata) {
1687                 printk(KERN_ERR "emac%d: Missing additional data!\n",
1688                        ocpdev->def->index);
1689                 return -ENODEV;
1690         }
1691
1692         /* Allocate our net_device structure */
1693         ndev = alloc_etherdev(sizeof(struct ocp_enet_private));
1694         if (ndev == NULL) {
1695                 printk(KERN_ERR
1696                        "emac%d: Could not allocate ethernet device.\n",
1697                        ocpdev->def->index);
1698                 return -ENOMEM;
1699         }
1700         ep = ndev->priv;
1701         ep->ndev = ndev;
1702         ep->ocpdev = ocpdev;
1703         ndev->irq = ocpdev->def->irq;
1704         ep->wol_irq = emacdata->wol_irq;
1705         if (emacdata->mdio_idx >= 0) {
1706                 if (emacdata->mdio_idx == ocpdev->def->index) {
1707                         /* Set the common MDIO net_device */
1708                         mdio_ndev = ndev;
1709                         deferred_init = 1;
1710                 }
1711                 ep->mdio_dev = mdio_ndev;
1712         } else {
1713                 ep->mdio_dev = ndev;
1714         }
1715
1716         ocp_set_drvdata(ocpdev, ndev);
1717
1718         spin_lock_init(&ep->lock);
1719
1720         /* Fill out MAL informations and register commac */
1721         ep->mal = mal;
1722         ep->mal_tx_chan = emacdata->mal_tx_chan;
1723         ep->mal_rx_chan = emacdata->mal_rx_chan;
1724         ep->commac.ops = &emac_commac_ops;
1725         ep->commac.dev = ndev;
1726         ep->commac.tx_chan_mask = MAL_CHAN_MASK(ep->mal_tx_chan);
1727         ep->commac.rx_chan_mask = MAL_CHAN_MASK(ep->mal_rx_chan);
1728         rc = mal_register_commac(ep->mal, &ep->commac);
1729         if (rc != 0)
1730                 goto bail;
1731         commac_reg = 1;
1732
1733         /* Map our MMIOs */
1734         ep->emacp = (emac_t *) ioremap(ocpdev->def->paddr, sizeof(emac_t));
1735
1736         /* Check if we need to attach to a ZMII */
1737         if (emacdata->zmii_idx >= 0) {
1738                 ep->zmii_input = emacdata->zmii_mux;
1739                 ep->zmii_dev =
1740                     ocp_find_device(OCP_ANY_ID, OCP_FUNC_ZMII,
1741                                     emacdata->zmii_idx);
1742                 if (ep->zmii_dev == NULL)
1743                         printk(KERN_WARNING
1744                                "emac%d: ZMII %d requested but not found !\n",
1745                                ocpdev->def->index, emacdata->zmii_idx);
1746                 else if ((rc =
1747                           emac_init_zmii(ep->zmii_dev, ep->zmii_input,
1748                                          emacdata->phy_mode)) != 0)
1749                         goto bail;
1750         }
1751
1752         /* Check if we need to attach to a RGMII */
1753         if (emacdata->rgmii_idx >= 0) {
1754                 ep->rgmii_input = emacdata->rgmii_mux;
1755                 ep->rgmii_dev =
1756                     ocp_find_device(OCP_ANY_ID, OCP_FUNC_RGMII,
1757                                     emacdata->rgmii_idx);
1758                 if (ep->rgmii_dev == NULL)
1759                         printk(KERN_WARNING
1760                                "emac%d: RGMII %d requested but not found !\n",
1761                                ocpdev->def->index, emacdata->rgmii_idx);
1762                 else if ((rc =
1763                           emac_init_rgmii(ep->rgmii_dev, ep->rgmii_input,
1764                                           emacdata->phy_mode)) != 0)
1765                         goto bail;
1766         }
1767
1768         /* Check if we need to attach to a TAH */
1769         if (emacdata->tah_idx >= 0) {
1770                 ep->tah_dev =
1771                     ocp_find_device(OCP_ANY_ID, OCP_FUNC_TAH,
1772                                     emacdata->tah_idx);
1773                 if (ep->tah_dev == NULL)
1774                         printk(KERN_WARNING
1775                                "emac%d: TAH %d requested but not found !\n",
1776                                ocpdev->def->index, emacdata->tah_idx);
1777                 else if ((rc = emac_init_tah(ep)) != 0)
1778                         goto bail;
1779         }
1780
1781         if (deferred_init) {
1782                 if (!list_empty(&emac_init_list)) {
1783                         struct list_head *entry;
1784                         struct emac_def_dev *ddev;
1785
1786                         list_for_each(entry, &emac_init_list) {
1787                                 ddev =
1788                                     list_entry(entry, struct emac_def_dev,
1789                                                link);
1790                                 emac_init_device(ddev->ocpdev, ddev->mal);
1791                         }
1792                 }
1793         }
1794
1795         /* Init link monitoring timer */
1796         init_timer(&ep->link_timer);
1797         ep->link_timer.function = emac_link_timer;
1798         ep->link_timer.data = (unsigned long)ep;
1799         ep->timer_ticks = 0;
1800
1801         /* Fill up the mii_phy structure */
1802         ep->phy_mii.dev = ndev;
1803         ep->phy_mii.mdio_read = emac_phy_read;
1804         ep->phy_mii.mdio_write = emac_phy_write;
1805         ep->phy_mii.mode = emacdata->phy_mode;
1806
1807         /* Find PHY */
1808         phy_map = emacdata->phy_map | busy_phy_map;
1809         for (i = 0; i <= 0x1f; i++, phy_map >>= 1) {
1810                 if ((phy_map & 0x1) == 0) {
1811                         int val = emac_phy_read(ndev, i, MII_BMCR);
1812                         if (val != 0xffff && val != -1)
1813                                 break;
1814                 }
1815         }
1816         if (i == 0x20) {
1817                 printk(KERN_WARNING "emac%d: Can't find PHY.\n",
1818                        ocpdev->def->index);
1819                 rc = -ENODEV;
1820                 goto bail;
1821         }
1822         busy_phy_map |= 1 << i;
1823         ep->mii_phy_addr = i;
1824         rc = mii_phy_probe(&ep->phy_mii, i);
1825         if (rc) {
1826                 printk(KERN_WARNING "emac%d: Failed to probe PHY type.\n",
1827                        ocpdev->def->index);
1828                 rc = -ENODEV;
1829                 goto bail;
1830         }
1831
1832         /* Setup initial PHY config & startup aneg */
1833         if (ep->phy_mii.def->ops->init)
1834                 ep->phy_mii.def->ops->init(&ep->phy_mii);
1835         netif_carrier_off(ndev);
1836         if (ep->phy_mii.def->features & SUPPORTED_Autoneg)
1837                 ep->want_autoneg = 1;
1838         emac_start_link(ep, NULL);
1839
1840         /* read the MAC Address */
1841         for (i = 0; i < 6; i++)
1842                 ndev->dev_addr[i] = emacdata->mac_addr[i];
1843
1844         /* Fill in the driver function table */
1845         ndev->open = &emac_open;
1846         ndev->hard_start_xmit = &emac_start_xmit;
1847         ndev->stop = &emac_close;
1848         ndev->get_stats = &emac_stats;
1849         if (emacdata->jumbo)
1850                 ndev->change_mtu = &emac_change_mtu;
1851         ndev->set_mac_address = &emac_set_mac_address;
1852         ndev->set_multicast_list = &emac_set_multicast_list;
1853         ndev->do_ioctl = &emac_ioctl;
1854         SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops);
1855         if (emacdata->tah_idx >= 0)
1856                 ndev->features = NETIF_F_IP_CSUM | NETIF_F_SG;
1857
1858         SET_MODULE_OWNER(ndev);
1859
1860         rc = register_netdev(ndev);
1861         if (rc != 0)
1862                 goto bail;
1863
1864         printk("%s: IBM emac, MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
1865                ndev->name,
1866                ndev->dev_addr[0], ndev->dev_addr[1], ndev->dev_addr[2],
1867                ndev->dev_addr[3], ndev->dev_addr[4], ndev->dev_addr[5]);
1868         printk(KERN_INFO "%s: Found %s PHY (0x%02x)\n",
1869                ndev->name, ep->phy_mii.def->name, ep->mii_phy_addr);
1870
1871       bail:
1872         if (rc && commac_reg)
1873                 mal_unregister_commac(ep->mal, &ep->commac);
1874         if (rc && ndev)
1875                 kfree(ndev);
1876
1877         return rc;
1878 }
1879
1880 static int emac_probe(struct ocp_device *ocpdev)
1881 {
1882         struct ocp_device *maldev;
1883         struct ibm_ocp_mal *mal;
1884         struct ocp_func_emac_data *emacdata;
1885
1886         emacdata = (struct ocp_func_emac_data *)ocpdev->def->additions;
1887         if (emacdata == NULL) {
1888                 printk(KERN_ERR "emac%d: Missing additional datas !\n",
1889                        ocpdev->def->index);
1890                 return -ENODEV;
1891         }
1892
1893         /* Get the MAL device  */
1894         maldev = ocp_find_device(OCP_ANY_ID, OCP_FUNC_MAL, emacdata->mal_idx);
1895         if (maldev == NULL) {
1896                 printk("No maldev\n");
1897                 return -ENODEV;
1898         }
1899         /*
1900          * Get MAL driver data, it must be here due to link order.
1901          * When the driver is modularized, symbol dependencies will
1902          * ensure the MAL driver is already present if built as a
1903          * module.
1904          */
1905         mal = (struct ibm_ocp_mal *)ocp_get_drvdata(maldev);
1906         if (mal == NULL) {
1907                 printk("No maldrv\n");
1908                 return -ENODEV;
1909         }
1910
1911         /* If we depend on another EMAC for MDIO, wait for it to show up */
1912         if (emacdata->mdio_idx >= 0 &&
1913             (emacdata->mdio_idx != ocpdev->def->index) && !mdio_ndev) {
1914                 struct emac_def_dev *ddev;
1915                 /* Add this index to the deferred init table */
1916                 ddev = kmalloc(sizeof(struct emac_def_dev), GFP_KERNEL);
1917                 ddev->ocpdev = ocpdev;
1918                 ddev->mal = mal;
1919                 list_add_tail(&ddev->link, &emac_init_list);
1920         } else {
1921                 emac_init_device(ocpdev, mal);
1922         }
1923
1924         return 0;
1925 }
1926
1927 /* Structure for a device driver */
1928 static struct ocp_device_id emac_ids[] = {
1929         {.vendor = OCP_ANY_ID,.function = OCP_FUNC_EMAC},
1930         {.vendor = OCP_VENDOR_INVALID}
1931 };
1932
1933 static struct ocp_driver emac_driver = {
1934         .name = "emac",
1935         .id_table = emac_ids,
1936
1937         .probe = emac_probe,
1938         .remove = emac_remove,
1939 };
1940
1941 static int __init emac_init(void)
1942 {
1943         int rc;
1944
1945         printk(KERN_INFO DRV_NAME ": " DRV_DESC ", version " DRV_VERSION "\n");
1946         printk(KERN_INFO "Maintained by " DRV_AUTHOR "\n");
1947
1948         if (skb_res > 2) {
1949                 printk(KERN_WARNING "Invalid skb_res: %d, cropping to 2\n",
1950                        skb_res);
1951                 skb_res = 2;
1952         }
1953         rc = ocp_register_driver(&emac_driver);
1954         if (rc < 0) {
1955                 ocp_unregister_driver(&emac_driver);
1956                 return -ENODEV;
1957         }
1958
1959         return 0;
1960 }
1961
1962 static void __exit emac_exit(void)
1963 {
1964         ocp_unregister_driver(&emac_driver);
1965 }
1966
1967 module_init(emac_init);
1968 module_exit(emac_exit);