drivers/net/irda/nsc-ircc.c

   1 /*********************************************************************
   2  *
   3  * Filename:      nsc-ircc.c
   4  * Version:       1.0
   5  * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
   6  * Status:        Stable.
   7  * Author:        Dag Brattli <dagb@cs.uit.no>
   8  * Created at:    Sat Nov  7 21:43:15 1998
   9  * Modified at:   Wed Mar  1 11:29:34 2000
  10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  11  *
  12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
  13  *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
  14  *     Copyright (c) 1998 Actisys Corp., www.actisys.com
  15  *     All Rights Reserved
  16  *
  17  *     This program is free software; you can redistribute it and/or
  18  *     modify it under the terms of the GNU General Public License as
  19  *     published by the Free Software Foundation; either version 2 of
  20  *     the License, or (at your option) any later version.
  21  *
  22  *     Neither Dag Brattli nor University of Tromsø admit liability nor
  23  *     provide warranty for any of this software. This material is
  24  *     provided "AS-IS" and at no charge.
  25  *
  26  *     Notice that all functions that needs to access the chip in _any_
  27  *     way, must save BSR register on entry, and restore it on exit.
  28  *     It is _very_ important to follow this policy!
  29  *
  30  *         __u8 bank;
  31  *
  32  *         bank = inb(iobase+BSR);
  33  *
  34  *         do_your_stuff_here();
  35  *
  36  *         outb(bank, iobase+BSR);
  37  *
  38  *    If you find bugs in this file, its very likely that the same bug
  39  *    will also be in w83977af_ir.c since the implementations are quite
  40  *    similar.
  41  *
  42  ********************************************************************/
  43
  44 #include <linux/module.h>
  45
  46 #include <linux/kernel.h>
  47 #include <linux/types.h>
  48 #include <linux/skbuff.h>
  49 #include <linux/netdevice.h>
  50 #include <linux/ioport.h>
  51 #include <linux/delay.h>
  52 #include <linux/slab.h>
  53 #include <linux/init.h>
  54 #include <linux/rtnetlink.h>
  55
  56 #include <asm/io.h>
  57 #include <asm/dma.h>
  58 #include <asm/byteorder.h>
  59
  60 #include <linux/pm.h>
  61
  62 #include <net/irda/wrapper.h>
  63 #include <net/irda/irda.h>
  64 #include <net/irda/irda_device.h>
  65
  66 #include "nsc-ircc.h"
  67
  68 #define CHIP_IO_EXTENT 8
  69 #define BROKEN_DONGLE_ID
  70
  71 static char *driver_name = "nsc-ircc";
  72
  73 /* Module parameters */
  74 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
  75 static int dongle_id;
  76
  77 /* Use BIOS settions by default, but user may supply module parameters */
  78 static unsigned int io[]  = { ~0, ~0, ~0, ~0 };
  79 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
  80 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
  81
  82 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
  83 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
  84 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
  85 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
  86 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
  87 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
  88
  89 /* These are the known NSC chips */
  90 static nsc_chip_t chips[] = {
  91 /*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
  92         { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
  93           nsc_ircc_probe_108, nsc_ircc_init_108 },
  94         { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
  95           nsc_ircc_probe_338, nsc_ircc_init_338 },
  96         /* Contributed by Jan Frey - IBM A30/A31 */
  97         { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
  98           nsc_ircc_probe_39x, nsc_ircc_init_39x },
  99         { NULL }
 100 #if 0
 101         /* Probably bogus, "PC8739x" should be the real thing. Jean II */
 102         /* Contributed by Kevin Thayer - OmniBook 6100 */
 103         { "PC87338?", { 0x2e, 0x15c, 0x398 }, 0x08, 0x00, 0xf8,
 104           nsc_ircc_probe_338, nsc_ircc_init_338 },
 105 #endif
 106 };
 107
 108 /* Max 4 instances for now */
 109 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
 110
 111 static char *dongle_types[] = {
 112         "Differential serial interface",
 113         "Differential serial interface",
 114         "Reserved",
 115         "Reserved",
 116         "Sharp RY5HD01",
 117         "Reserved",
 118         "Single-ended serial interface",
 119         "Consumer-IR only",
 120         "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
 121         "IBM31T1100 or Temic TFDS6000/TFDS6500",
 122         "Reserved",
 123         "Reserved",
 124         "HP HSDL-1100/HSDL-2100",
 125         "HP HSDL-1100/HSDL-2100",
 126         "Supports SIR Mode only",
 127         "No dongle connected",
 128 };
 129
 130 /* Some prototypes */
 131 static int  nsc_ircc_open(int i, chipio_t *info);
 132 static int  nsc_ircc_close(struct nsc_ircc_cb *self);
 133 static int  nsc_ircc_setup(chipio_t *info);
 134 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
 135 static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
 136 static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
 137 static int  nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
 138 static int  nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
 139 static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
 140 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
 141 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
 142 static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
 143 static int  nsc_ircc_read_dongle_id (int iobase);
 144 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
 145
 146 static int  nsc_ircc_net_open(struct net_device *dev);
 147 static int  nsc_ircc_net_close(struct net_device *dev);
 148 static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 149 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
 150 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
 151
 152 /*
 153  * Function nsc_ircc_init ()
 154  *
 155  *    Initialize chip. Just try to find out how many chips we are dealing with
 156  *    and where they are
 157  */
 158 static int __init nsc_ircc_init(void)
 159 {
 160         chipio_t info;
 161         nsc_chip_t *chip;
 162         int ret = -ENODEV;
 163         int cfg_base;
 164         int cfg, id;
 165         int reg;
 166         int i = 0;
 167
 168         /* Probe for all the NSC chipsets we know about */
 169         for (chip=chips; chip->name ; chip++) {
 170                 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
 171                            chip->name);
 172
 173                 /* Try all config registers for this chip */
 174                 for (cfg=0; cfg<3; cfg++) {
 175                         cfg_base = chip->cfg[cfg];
 176                         if (!cfg_base)
 177                                 continue;
 178
 179                         memset(&info, 0, sizeof(chipio_t));
 180                         info.cfg_base = cfg_base;
 181                         info.fir_base = io[i];
 182                         info.dma = dma[i];
 183                         info.irq = irq[i];
 184
 185                         /* Read index register */
 186                         reg = inb(cfg_base);
 187                         if (reg == 0xff) {
 188                                 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
 189                                 continue;
 190                         }
 191
 192                         /* Read chip identification register */
 193                         outb(chip->cid_index, cfg_base);
 194                         id = inb(cfg_base+1);
 195                         if ((id & chip->cid_mask) == chip->cid_value) {
 196                                 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
 197                                            __FUNCTION__, chip->name, id & ~chip->cid_mask);
 198                                 /*
 199                                  * If the user supplies the base address, then
 200                                  * we init the chip, if not we probe the values
 201                                  * set by the BIOS
 202                                  */
 203                                 if (io[i] < 0x2000) {
 204                                         chip->init(chip, &info);
 205                                 } else
 206                                         chip->probe(chip, &info);
 207
 208                                 if (nsc_ircc_open(i, &info) == 0)
 209                                         ret = 0;
 210                                 i++;
 211                         } else {
 212                                 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
 213                         }
 214                 }
 215
 216         }
 217
 218         return ret;
 219 }
 220
 221 /*
 222  * Function nsc_ircc_cleanup ()
 223  *
 224  *    Close all configured chips
 225  *
 226  */
 227 static void __exit nsc_ircc_cleanup(void)
 228 {
 229         int i;
 230
 231         pm_unregister_all(nsc_ircc_pmproc);
 232
 233         for (i=0; i < 4; i++) {
 234                 if (dev_self[i])
 235                         nsc_ircc_close(dev_self[i]);
 236         }
 237 }
 238
 239 /*
 240  * Function nsc_ircc_open (iobase, irq)
 241  *
 242  *    Open driver instance
 243  *
 244  */
 245 static int __init nsc_ircc_open(int i, chipio_t *info)
 246 {
 247         struct net_device *dev;
 248         struct nsc_ircc_cb *self;
 249         struct pm_dev *pmdev;
 250         void *ret;
 251         int err;
 252
 253         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
 254
 255         MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
 256                 info->cfg_base);
 257
 258         if ((nsc_ircc_setup(info)) == -1)
 259                 return -1;
 260
 261         MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
 262
 263         dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
 264         if (dev == NULL) {
 265                 ERROR("%s(), can't allocate memory for "
 266                        "control block!\n", __FUNCTION__);
 267                 return -ENOMEM;
 268         }
 269
 270         self = dev->priv;
 271         self->netdev = dev;
 272         spin_lock_init(&self->lock);
 273
 274         /* Need to store self somewhere */
 275         dev_self[i] = self;
 276         self->index = i;
 277
 278         /* Initialize IO */
 279         self->io.cfg_base  = info->cfg_base;
 280         self->io.fir_base  = info->fir_base;
 281         self->io.irq       = info->irq;
 282         self->io.fir_ext   = CHIP_IO_EXTENT;
 283         self->io.dma       = info->dma;
 284         self->io.fifo_size = 32;
 285
 286         /* Reserve the ioports that we need */
 287         ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
 288         if (!ret) {
 289                 WARNING("%s(), can't get iobase of 0x%03x\n",
 290                         __FUNCTION__, self->io.fir_base);
 291                 err = -ENODEV;
 292                 goto out1;
 293         }
 294
 295         /* Initialize QoS for this device */
 296         irda_init_max_qos_capabilies(&self->qos);
 297
 298         /* The only value we must override it the baudrate */
 299         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 300                 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
 301
 302         self->qos.min_turn_time.bits = qos_mtt_bits;
 303         irda_qos_bits_to_value(&self->qos);
 304
 305         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 306         self->rx_buff.truesize = 14384;
 307         self->tx_buff.truesize = 14384;
 308
 309         /* Allocate memory if needed */
 310         self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
 311                                               GFP_KERNEL|GFP_DMA);
 312         if (self->rx_buff.head == NULL) {
 313                 err = -ENOMEM;
 314                 goto out2;
 315
 316         }
 317         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 318
 319         self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
 320                                               GFP_KERNEL|GFP_DMA);
 321         if (self->tx_buff.head == NULL) {
 322                 err = -ENOMEM;
 323                 goto out3;
 324         }
 325         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 326
 327         self->rx_buff.in_frame = FALSE;
 328         self->rx_buff.state = OUTSIDE_FRAME;
 329         self->tx_buff.data = self->tx_buff.head;
 330         self->rx_buff.data = self->rx_buff.head;
 331
 332         /* Reset Tx queue info */
 333         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 334         self->tx_fifo.tail = self->tx_buff.head;
 335
 336         /* Override the network functions we need to use */
 337         SET_MODULE_OWNER(dev);
 338         dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
 339         dev->open            = nsc_ircc_net_open;
 340         dev->stop            = nsc_ircc_net_close;
 341         dev->do_ioctl        = nsc_ircc_net_ioctl;
 342         dev->get_stats       = nsc_ircc_net_get_stats;
 343
 344         err = register_netdev(dev);
 345         if (err) {
 346                 ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
 347                 goto out4;
 348         }
 349         MESSAGE("IrDA: Registered device %s\n", dev->name);
 350
 351         /* Check if user has supplied the dongle id or not */
 352         if (!dongle_id) {
 353                 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
 354
 355                 MESSAGE("%s, Found dongle: %s\n", driver_name,
 356                         dongle_types[dongle_id]);
 357         } else {
 358                 MESSAGE("%s, Using dongle: %s\n", driver_name,
 359                         dongle_types[dongle_id]);
 360         }
 361
 362         self->io.dongle_id = dongle_id;
 363         nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
 364
 365         pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
 366         if (pmdev)
 367                 pmdev->data = self;
 368
 369         return 0;
 370  out4:
 371         kfree(self->tx_buff.head);
 372  out3:
 373         kfree(self->rx_buff.head);
 374  out2:
 375         release_region(self->io.fir_base, self->io.fir_ext);
 376  out1:
 377         free_netdev(dev);
 378         dev_self[i] = NULL;
 379         return err;
 380 }
 381
 382 /*
 383  * Function nsc_ircc_close (self)
 384  *
 385  *    Close driver instance
 386  *
 387  */
 388 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
 389 {
 390         int iobase;
 391
 392         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
 393
 394         ASSERT(self != NULL, return -1;);
 395
 396         iobase = self->io.fir_base;
 397
 398         /* Remove netdevice */
 399         unregister_netdev(self->netdev);
 400
 401         /* Release the PORT that this driver is using */
 402         IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
 403                    __FUNCTION__, self->io.fir_base);
 404         release_region(self->io.fir_base, self->io.fir_ext);
 405
 406         if (self->tx_buff.head)
 407                 kfree(self->tx_buff.head);
 408
 409         if (self->rx_buff.head)
 410                 kfree(self->rx_buff.head);
 411
 412         dev_self[self->index] = NULL;
 413         free_netdev(self->netdev);
 414
 415         return 0;
 416 }
 417
 418 /*
 419  * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
 420  *
 421  *    Initialize the NSC '108 chip
 422  *
 423  */
 424 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
 425 {
 426         int cfg_base = info->cfg_base;
 427         __u8 temp=0;
 428
 429         outb(2, cfg_base);      /* Mode Control Register (MCTL) */
 430         outb(0x00, cfg_base+1); /* Disable device */
 431
 432         /* Base Address and Interrupt Control Register (BAIC) */
 433         outb(CFG_108_BAIC, cfg_base);
 434         switch (info->fir_base) {
 435         case 0x3e8: outb(0x14, cfg_base+1); break;
 436         case 0x2e8: outb(0x15, cfg_base+1); break;
 437         case 0x3f8: outb(0x16, cfg_base+1); break;
 438         case 0x2f8: outb(0x17, cfg_base+1); break;
 439         default: ERROR("%s(), invalid base_address", __FUNCTION__);
 440         }
 441
 442         /* Control Signal Routing Register (CSRT) */
 443         switch (info->irq) {
 444         case 3:  temp = 0x01; break;
 445         case 4:  temp = 0x02; break;
 446         case 5:  temp = 0x03; break;
 447         case 7:  temp = 0x04; break;
 448         case 9:  temp = 0x05; break;
 449         case 11: temp = 0x06; break;
 450         case 15: temp = 0x07; break;
 451         default: ERROR("%s(), invalid irq", __FUNCTION__);
 452         }
 453         outb(CFG_108_CSRT, cfg_base);
 454
 455         switch (info->dma) {
 456         case 0: outb(0x08+temp, cfg_base+1); break;
 457         case 1: outb(0x10+temp, cfg_base+1); break;
 458         case 3: outb(0x18+temp, cfg_base+1); break;
 459         default: ERROR("%s(), invalid dma", __FUNCTION__);
 460         }
 461
 462         outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
 463         outb(0x03, cfg_base+1); /* Enable device */
 464
 465         return 0;
 466 }
 467
 468 /*
 469  * Function nsc_ircc_probe_108 (chip, info)
 470  *
 471  *
 472  *
 473  */
 474 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
 475 {
 476         int cfg_base = info->cfg_base;
 477         int reg;
 478
 479         /* Read address and interrupt control register (BAIC) */
 480         outb(CFG_108_BAIC, cfg_base);
 481         reg = inb(cfg_base+1);
 482
 483         switch (reg & 0x03) {
 484         case 0:
 485                 info->fir_base = 0x3e8;
 486                 break;
 487         case 1:
 488                 info->fir_base = 0x2e8;
 489                 break;
 490         case 2:
 491                 info->fir_base = 0x3f8;
 492                 break;
 493         case 3:
 494                 info->fir_base = 0x2f8;
 495                 break;
 496         }
 497         info->sir_base = info->fir_base;
 498         IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
 499                    info->fir_base);
 500
 501         /* Read control signals routing register (CSRT) */
 502         outb(CFG_108_CSRT, cfg_base);
 503         reg = inb(cfg_base+1);
 504
 505         switch (reg & 0x07) {
 506         case 0:
 507                 info->irq = -1;
 508                 break;
 509         case 1:
 510                 info->irq = 3;
 511                 break;
 512         case 2:
 513                 info->irq = 4;
 514                 break;
 515         case 3:
 516                 info->irq = 5;
 517                 break;
 518         case 4:
 519                 info->irq = 7;
 520                 break;
 521         case 5:
 522                 info->irq = 9;
 523                 break;
 524         case 6:
 525                 info->irq = 11;
 526                 break;
 527         case 7:
 528                 info->irq = 15;
 529                 break;
 530         }
 531         IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
 532
 533         /* Currently we only read Rx DMA but it will also be used for Tx */
 534         switch ((reg >> 3) & 0x03) {
 535         case 0:
 536                 info->dma = -1;
 537                 break;
 538         case 1:
 539                 info->dma = 0;
 540                 break;
 541         case 2:
 542                 info->dma = 1;
 543                 break;
 544         case 3:
 545                 info->dma = 3;
 546                 break;
 547         }
 548         IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
 549
 550         /* Read mode control register (MCTL) */
 551         outb(CFG_108_MCTL, cfg_base);
 552         reg = inb(cfg_base+1);
 553
 554         info->enabled = reg & 0x01;
 555         info->suspended = !((reg >> 1) & 0x01);
 556
 557         return 0;
 558 }
 559
 560 /*
 561  * Function nsc_ircc_init_338 (chip, info)
 562  *
 563  *    Initialize the NSC '338 chip. Remember that the 87338 needs two
 564  *    consecutive writes to the data registers while CPU interrupts are
 565  *    disabled. The 97338 does not require this, but shouldn't be any
 566  *    harm if we do it anyway.
 567  */
 568 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
 569 {
 570         /* No init yet */
 571
 572         return 0;
 573 }
 574
 575 /*
 576  * Function nsc_ircc_probe_338 (chip, info)
 577  *
 578  *
 579  *
 580  */
 581 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
 582 {
 583         int cfg_base = info->cfg_base;
 584         int reg, com = 0;
 585         int pnp;
 586
 587         /* Read funtion enable register (FER) */
 588         outb(CFG_338_FER, cfg_base);
 589         reg = inb(cfg_base+1);
 590
 591         info->enabled = (reg >> 2) & 0x01;
 592
 593         /* Check if we are in Legacy or PnP mode */
 594         outb(CFG_338_PNP0, cfg_base);
 595         reg = inb(cfg_base+1);
 596
 597         pnp = (reg >> 3) & 0x01;
 598         if (pnp) {
 599                 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
 600                 outb(0x46, cfg_base);
 601                 reg = (inb(cfg_base+1) & 0xfe) << 2;
 602
 603                 outb(0x47, cfg_base);
 604                 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
 605
 606                 info->fir_base = reg;
 607         } else {
 608                 /* Read function address register (FAR) */
 609                 outb(CFG_338_FAR, cfg_base);
 610                 reg = inb(cfg_base+1);
 611
 612                 switch ((reg >> 4) & 0x03) {
 613                 case 0:
 614                         info->fir_base = 0x3f8;
 615                         break;
 616                 case 1:
 617                         info->fir_base = 0x2f8;
 618                         break;
 619                 case 2:
 620                         com = 3;
 621                         break;
 622                 case 3:
 623                         com = 4;
 624                         break;
 625                 }
 626
 627                 if (com) {
 628                         switch ((reg >> 6) & 0x03) {
 629                         case 0:
 630                                 if (com == 3)
 631                                         info->fir_base = 0x3e8;
 632                                 else
 633                                         info->fir_base = 0x2e8;
 634                                 break;
 635                         case 1:
 636                                 if (com == 3)
 637                                         info->fir_base = 0x338;
 638                                 else
 639                                         info->fir_base = 0x238;
 640                                 break;
 641                         case 2:
 642                                 if (com == 3)
 643                                         info->fir_base = 0x2e8;
 644                                 else
 645                                         info->fir_base = 0x2e0;
 646                                 break;
 647                         case 3:
 648                                 if (com == 3)
 649                                         info->fir_base = 0x220;
 650                                 else
 651                                         info->fir_base = 0x228;
 652                                 break;
 653                         }
 654                 }
 655         }
 656         info->sir_base = info->fir_base;
 657
 658         /* Read PnP register 1 (PNP1) */
 659         outb(CFG_338_PNP1, cfg_base);
 660         reg = inb(cfg_base+1);
 661
 662         info->irq = reg >> 4;
 663
 664         /* Read PnP register 3 (PNP3) */
 665         outb(CFG_338_PNP3, cfg_base);
 666         reg = inb(cfg_base+1);
 667
 668         info->dma = (reg & 0x07) - 1;
 669
 670         /* Read power and test register (PTR) */
 671         outb(CFG_338_PTR, cfg_base);
 672         reg = inb(cfg_base+1);
 673
 674         info->suspended = reg & 0x01;
 675
 676         return 0;
 677 }
 678
 679
 680 /*
 681  * Function nsc_ircc_init_39x (chip, info)
 682  *
 683  *    Now that we know it's a '39x (see probe below), we need to
 684  *    configure it so we can use it.
 685  *
 686  * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
 687  * the configuration of the different functionality (serial, parallel,
 688  * floppy...) are each in a different bank (Logical Device Number).
 689  * The base address, irq and dma configuration registers are common
 690  * to all functionalities (index 0x30 to 0x7F).
 691  * There is only one configuration register specific to the
 692  * serial port, CFG_39X_SPC.
 693  * JeanII
 694  *
 695  * Note : this code was written by Jan Frey <janfrey@web.de>
 696  */
 697 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
 698 {
 699         int cfg_base = info->cfg_base;
 700         int enabled;
 701
 702         /* User is shure about his config... accept it. */
 703         IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
 704                    "io=0x%04x, irq=%d, dma=%d\n",
 705                    __FUNCTION__, info->fir_base, info->irq, info->dma);
 706
 707         /* Access bank for SP2 */
 708         outb(CFG_39X_LDN, cfg_base);
 709         outb(0x02, cfg_base+1);
 710
 711         /* Configure SP2 */
 712
 713         /* We want to enable the device if not enabled */
 714         outb(CFG_39X_ACT, cfg_base);
 715         enabled = inb(cfg_base+1) & 0x01;
 716
 717         if (!enabled) {
 718                 /* Enable the device */
 719                 outb(CFG_39X_SIOCF1, cfg_base);
 720                 outb(0x01, cfg_base+1);
 721                 /* May want to update info->enabled. Jean II */
 722         }
 723
 724         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 725          * power mode (wake up from sleep mode) (bit 1) */
 726         outb(CFG_39X_SPC, cfg_base);
 727         outb(0x82, cfg_base+1);
 728
 729         return 0;
 730 }
 731
 732 /*
 733  * Function nsc_ircc_probe_39x (chip, info)
 734  *
 735  *    Test if we really have a '39x chip at the given address
 736  *
 737  * Note : this code was written by Jan Frey <janfrey@web.de>
 738  */
 739 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
 740 {
 741         int cfg_base = info->cfg_base;
 742         int reg1, reg2, irq, irqt, dma1, dma2;
 743         int enabled, susp;
 744
 745         IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
 746                    __FUNCTION__, cfg_base);
 747
 748         /* This function should be executed with irq off to avoid
 749          * another driver messing with the Super I/O bank - Jean II */
 750
 751         /* Access bank for SP2 */
 752         outb(CFG_39X_LDN, cfg_base);
 753         outb(0x02, cfg_base+1);
 754
 755         /* Read infos about SP2 ; store in info struct */
 756         outb(CFG_39X_BASEH, cfg_base);
 757         reg1 = inb(cfg_base+1);
 758         outb(CFG_39X_BASEL, cfg_base);
 759         reg2 = inb(cfg_base+1);
 760         info->fir_base = (reg1 << 8) | reg2;
 761
 762         outb(CFG_39X_IRQNUM, cfg_base);
 763         irq = inb(cfg_base+1);
 764         outb(CFG_39X_IRQSEL, cfg_base);
 765         irqt = inb(cfg_base+1);
 766         info->irq = irq;
 767
 768         outb(CFG_39X_DMA0, cfg_base);
 769         dma1 = inb(cfg_base+1);
 770         outb(CFG_39X_DMA1, cfg_base);
 771         dma2 = inb(cfg_base+1);
 772         info->dma = dma1 -1;
 773
 774         outb(CFG_39X_ACT, cfg_base);
 775         info->enabled = enabled = inb(cfg_base+1) & 0x01;
 776
 777         outb(CFG_39X_SPC, cfg_base);
 778         susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
 779
 780         IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
 781
 782         /* Configure SP2 */
 783
 784         /* We want to enable the device if not enabled */
 785         outb(CFG_39X_ACT, cfg_base);
 786         enabled = inb(cfg_base+1) & 0x01;
 787
 788         if (!enabled) {
 789                 /* Enable the device */
 790                 outb(CFG_39X_SIOCF1, cfg_base);
 791                 outb(0x01, cfg_base+1);
 792                 /* May want to update info->enabled. Jean II */
 793         }
 794
 795         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 796          * power mode (wake up from sleep mode) (bit 1) */
 797         outb(CFG_39X_SPC, cfg_base);
 798         outb(0x82, cfg_base+1);
 799
 800         return 0;
 801 }
 802
 803 /*
 804  * Function nsc_ircc_setup (info)
 805  *
 806  *    Returns non-negative on success.
 807  *
 808  */
 809 static int nsc_ircc_setup(chipio_t *info)
 810 {
 811         int version;
 812         int iobase = info->fir_base;
 813
 814         /* Read the Module ID */
 815         switch_bank(iobase, BANK3);
 816         version = inb(iobase+MID);
 817
 818         IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
 819                    __FUNCTION__, driver_name, version);
 820
 821         /* Should be 0x2? */
 822         if (0x20 != (version & 0xf0)) {
 823                 ERROR("%s, Wrong chip version %02x\n", driver_name, version);
 824                 return -1;
 825         }
 826
 827         /* Switch to advanced mode */
 828         switch_bank(iobase, BANK2);
 829         outb(ECR1_EXT_SL, iobase+ECR1);
 830         switch_bank(iobase, BANK0);
 831
 832         /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
 833         switch_bank(iobase, BANK0);
 834         outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
 835
 836         outb(0x03, iobase+LCR);         /* 8 bit word length */
 837         outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
 838
 839         /* Set FIFO size to 32 */
 840         switch_bank(iobase, BANK2);
 841         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
 842
 843         /* IRCR2: FEND_MD is not set */
 844         switch_bank(iobase, BANK5);
 845         outb(0x02, iobase+4);
 846
 847         /* Make sure that some defaults are OK */
 848         switch_bank(iobase, BANK6);
 849         outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
 850         outb(0x0a, iobase+1); /* Set MIR pulse width */
 851         outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
 852         outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
 853
 854         /* Enable receive interrupts */
 855         switch_bank(iobase, BANK0);
 856         outb(IER_RXHDL_IE, iobase+IER);
 857
 858         return 0;
 859 }
 860
 861 /*
 862  * Function nsc_ircc_read_dongle_id (void)
 863  *
 864  * Try to read dongle indentification. This procedure needs to be executed
 865  * once after power-on/reset. It also needs to be used whenever you suspect
 866  * that the user may have plugged/unplugged the IrDA Dongle.
 867  */
 868 static int nsc_ircc_read_dongle_id (int iobase)
 869 {
 870         int dongle_id;
 871         __u8 bank;
 872
 873         bank = inb(iobase+BSR);
 874
 875         /* Select Bank 7 */
 876         switch_bank(iobase, BANK7);
 877
 878         /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
 879         outb(0x00, iobase+7);
 880
 881         /* ID0, 1, and 2 are pulled up/down very slowly */
 882         udelay(50);
 883
 884         /* IRCFG1: read the ID bits */
 885         dongle_id = inb(iobase+4) & 0x0f;
 886
 887 #ifdef BROKEN_DONGLE_ID
 888         if (dongle_id == 0x0a)
 889                 dongle_id = 0x09;
 890 #endif
 891         /* Go back to  bank 0 before returning */
 892         switch_bank(iobase, BANK0);
 893
 894         outb(bank, iobase+BSR);
 895
 896         return dongle_id;
 897 }
 898
 899 /*
 900  * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
 901  *
 902  *     This function initializes the dongle for the transceiver that is
 903  *     used. This procedure needs to be executed once after
 904  *     power-on/reset. It also needs to be used whenever you suspect that
 905  *     the dongle is changed.
 906  */
 907 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
 908 {
 909         int bank;
 910
 911         /* Save current bank */
 912         bank = inb(iobase+BSR);
 913
 914         /* Select Bank 7 */
 915         switch_bank(iobase, BANK7);
 916
 917         /* IRCFG4: set according to dongle_id */
 918         switch (dongle_id) {
 919         case 0x00: /* same as */
 920         case 0x01: /* Differential serial interface */
 921                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 922                            __FUNCTION__, dongle_types[dongle_id]);
 923                 break;
 924         case 0x02: /* same as */
 925         case 0x03: /* Reserved */
 926                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 927                            __FUNCTION__, dongle_types[dongle_id]);
 928                 break;
 929         case 0x04: /* Sharp RY5HD01 */
 930                 break;
 931         case 0x05: /* Reserved, but this is what the Thinkpad reports */
 932                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 933                            __FUNCTION__, dongle_types[dongle_id]);
 934                 break;
 935         case 0x06: /* Single-ended serial interface */
 936                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 937                            __FUNCTION__, dongle_types[dongle_id]);
 938                 break;
 939         case 0x07: /* Consumer-IR only */
 940                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
 941                            __FUNCTION__, dongle_types[dongle_id]);
 942                 break;
 943         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
 944                 IRDA_DEBUG(0, "%s(), %s\n",
 945                            __FUNCTION__, dongle_types[dongle_id]);
 946                 break;
 947         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
 948                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
 949                 break;
 950         case 0x0A: /* same as */
 951         case 0x0B: /* Reserved */
 952                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 953                            __FUNCTION__, dongle_types[dongle_id]);
 954                 break;
 955         case 0x0C: /* same as */
 956         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
 957                 /*
 958                  * Set irsl0 as input, irsl[1-2] as output, and separate
 959                  * inputs are used for SIR and MIR/FIR
 960                  */
 961                 outb(0x48, iobase+7);
 962                 break;
 963         case 0x0E: /* Supports SIR Mode only */
 964                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
 965                 break;
 966         case 0x0F: /* No dongle connected */
 967                 IRDA_DEBUG(0, "%s(), %s\n",
 968                            __FUNCTION__, dongle_types[dongle_id]);
 969
 970                 switch_bank(iobase, BANK0);
 971                 outb(0x62, iobase+MCR);
 972                 break;
 973         default:
 974                 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
 975                            __FUNCTION__, dongle_id);
 976         }
 977
 978         /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
 979         outb(0x00, iobase+4);
 980
 981         /* Restore bank register */
 982         outb(bank, iobase+BSR);
 983
 984 } /* set_up_dongle_interface */
 985
 986 /*
 987  * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
 988  *
 989  *    Change speed of the attach dongle
 990  *
 991  */
 992 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
 993 {
 994         __u8 bank;
 995
 996         /* Save current bank */
 997         bank = inb(iobase+BSR);
 998
 999         /* Select Bank 7 */
1000         switch_bank(iobase, BANK7);
1001
1002         /* IRCFG1: set according to dongle_id */
1003         switch (dongle_id) {
1004         case 0x00: /* same as */
1005         case 0x01: /* Differential serial interface */
1006                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1007                            __FUNCTION__, dongle_types[dongle_id]);
1008                 break;
1009         case 0x02: /* same as */
1010         case 0x03: /* Reserved */
1011                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1012                            __FUNCTION__, dongle_types[dongle_id]);
1013                 break;
1014         case 0x04: /* Sharp RY5HD01 */
1015                 break;
1016         case 0x05: /* Reserved */
1017                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1018                            __FUNCTION__, dongle_types[dongle_id]);
1019                 break;
1020         case 0x06: /* Single-ended serial interface */
1021                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1022                            __FUNCTION__, dongle_types[dongle_id]);
1023                 break;
1024         case 0x07: /* Consumer-IR only */
1025                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1026                            __FUNCTION__, dongle_types[dongle_id]);
1027                 break;
1028         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1029                 IRDA_DEBUG(0, "%s(), %s\n",
1030                            __FUNCTION__, dongle_types[dongle_id]);
1031                 outb(0x00, iobase+4);
1032                 if (speed > 115200)
1033                         outb(0x01, iobase+4);
1034                 break;
1035         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1036                 outb(0x01, iobase+4);
1037
1038                 if (speed == 4000000) {
1039                         /* There was a cli() there, but we now are already
1040                          * under spin_lock_irqsave() - JeanII */
1041                         outb(0x81, iobase+4);
1042                         outb(0x80, iobase+4);
1043                 } else
1044                         outb(0x00, iobase+4);
1045                 break;
1046         case 0x0A: /* same as */
1047         case 0x0B: /* Reserved */
1048                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1049                            __FUNCTION__, dongle_types[dongle_id]);
1050                 break;
1051         case 0x0C: /* same as */
1052         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1053                 break;
1054         case 0x0E: /* Supports SIR Mode only */
1055                 break;
1056         case 0x0F: /* No dongle connected */
1057                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1058                            __FUNCTION__, dongle_types[dongle_id]);
1059
1060                 switch_bank(iobase, BANK0);
1061                 outb(0x62, iobase+MCR);
1062                 break;
1063         default:
1064                 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1065         }
1066         /* Restore bank register */
1067         outb(bank, iobase+BSR);
1068 }
1069
1070 /*
1071  * Function nsc_ircc_change_speed (self, baud)
1072  *
1073  *    Change the speed of the device
1074  *
1075  * This function *must* be called with irq off and spin-lock.
1076  */
1077 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1078 {
1079         struct net_device *dev = self->netdev;
1080         __u8 mcr = MCR_SIR;
1081         int iobase;
1082         __u8 bank;
1083         __u8 ier;                  /* Interrupt enable register */
1084
1085         IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1086
1087         ASSERT(self != NULL, return 0;);
1088
1089         iobase = self->io.fir_base;
1090
1091         /* Update accounting for new speed */
1092         self->io.speed = speed;
1093
1094         /* Save current bank */
1095         bank = inb(iobase+BSR);
1096
1097         /* Disable interrupts */
1098         switch_bank(iobase, BANK0);
1099         outb(0, iobase+IER);
1100
1101         /* Select Bank 2 */
1102         switch_bank(iobase, BANK2);
1103
1104         outb(0x00, iobase+BGDH);
1105         switch (speed) {
1106         case 9600:   outb(0x0c, iobase+BGDL); break;
1107         case 19200:  outb(0x06, iobase+BGDL); break;
1108         case 38400:  outb(0x03, iobase+BGDL); break;
1109         case 57600:  outb(0x02, iobase+BGDL); break;
1110         case 115200: outb(0x01, iobase+BGDL); break;
1111         case 576000:
1112                 switch_bank(iobase, BANK5);
1113
1114                 /* IRCR2: MDRS is set */
1115                 outb(inb(iobase+4) | 0x04, iobase+4);
1116
1117                 mcr = MCR_MIR;
1118                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1119                 break;
1120         case 1152000:
1121                 mcr = MCR_MIR;
1122                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1123                 break;
1124         case 4000000:
1125                 mcr = MCR_FIR;
1126                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1127                 break;
1128         default:
1129                 mcr = MCR_FIR;
1130                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1131                            __FUNCTION__, speed);
1132                 break;
1133         }
1134
1135         /* Set appropriate speed mode */
1136         switch_bank(iobase, BANK0);
1137         outb(mcr | MCR_TX_DFR, iobase+MCR);
1138
1139         /* Give some hits to the transceiver */
1140         nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1141
1142         /* Set FIFO threshold to TX17, RX16 */
1143         switch_bank(iobase, BANK0);
1144         outb(0x00, iobase+FCR);
1145         outb(FCR_FIFO_EN, iobase+FCR);
1146         outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1147              FCR_TXTH|     /* Set Tx FIFO threshold */
1148              FCR_TXSR|     /* Reset Tx FIFO */
1149              FCR_RXSR|     /* Reset Rx FIFO */
1150              FCR_FIFO_EN,  /* Enable FIFOs */
1151              iobase+FCR);
1152
1153         /* Set FIFO size to 32 */
1154         switch_bank(iobase, BANK2);
1155         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1156
1157         /* Enable some interrupts so we can receive frames */
1158         switch_bank(iobase, BANK0);
1159         if (speed > 115200) {
1160                 /* Install FIR xmit handler */
1161                 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1162                 ier = IER_SFIF_IE;
1163                 nsc_ircc_dma_receive(self);
1164         } else {
1165                 /* Install SIR xmit handler */
1166                 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1167                 ier = IER_RXHDL_IE;
1168         }
1169         /* Set our current interrupt mask */
1170         outb(ier, iobase+IER);
1171
1172         /* Restore BSR */
1173         outb(bank, iobase+BSR);
1174
1175         /* Make sure interrupt handlers keep the proper interrupt mask */
1176         return(ier);
1177 }
1178
1179 /*
1180  * Function nsc_ircc_hard_xmit (skb, dev)
1181  *
1182  *    Transmit the frame!
1183  *
1184  */
1185 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1186 {
1187         struct nsc_ircc_cb *self;
1188         unsigned long flags;
1189         int iobase;
1190         __s32 speed;
1191         __u8 bank;
1192
1193         self = (struct nsc_ircc_cb *) dev->priv;
1194
1195         ASSERT(self != NULL, return 0;);
1196
1197         iobase = self->io.fir_base;
1198
1199         netif_stop_queue(dev);
1200
1201         /* Make sure tests *& speed change are atomic */
1202         spin_lock_irqsave(&self->lock, flags);
1203
1204         /* Check if we need to change the speed */
1205         speed = irda_get_next_speed(skb);
1206         if ((speed != self->io.speed) && (speed != -1)) {
1207                 /* Check for empty frame. */
1208                 if (!skb->len) {
1209                         /* If we just sent a frame, we get called before
1210                          * the last bytes get out (because of the SIR FIFO).
1211                          * If this is the case, let interrupt handler change
1212                          * the speed itself... Jean II */
1213                         if (self->io.direction == IO_RECV) {
1214                                 nsc_ircc_change_speed(self, speed);
1215                                 /* TODO : For SIR->SIR, the next packet
1216                                  * may get corrupted - Jean II */
1217                                 netif_wake_queue(dev);
1218                         } else {
1219                                 self->new_speed = speed;
1220                                 /* Queue will be restarted after speed change
1221                                  * to make sure packets gets through the
1222                                  * proper xmit handler - Jean II */
1223                         }
1224                         dev->trans_start = jiffies;
1225                         spin_unlock_irqrestore(&self->lock, flags);
1226                         dev_kfree_skb(skb);
1227                         return 0;
1228                 } else
1229                         self->new_speed = speed;
1230         }
1231
1232         /* Save current bank */
1233         bank = inb(iobase+BSR);
1234
1235         self->tx_buff.data = self->tx_buff.head;
1236
1237         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1238                                            self->tx_buff.truesize);
1239
1240         self->stats.tx_bytes += self->tx_buff.len;
1241
1242         /* Add interrupt on tx low level (will fire immediately) */
1243         switch_bank(iobase, BANK0);
1244         outb(IER_TXLDL_IE, iobase+IER);
1245
1246         /* Restore bank register */
1247         outb(bank, iobase+BSR);
1248
1249         dev->trans_start = jiffies;
1250         spin_unlock_irqrestore(&self->lock, flags);
1251
1252         dev_kfree_skb(skb);
1253
1254         return 0;
1255 }
1256
1257 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1258 {
1259         struct nsc_ircc_cb *self;
1260         unsigned long flags;
1261         int iobase;
1262         __s32 speed;
1263         __u8 bank;
1264         int mtt, diff;
1265
1266         self = (struct nsc_ircc_cb *) dev->priv;
1267         iobase = self->io.fir_base;
1268
1269         netif_stop_queue(dev);
1270
1271         /* Make sure tests *& speed change are atomic */
1272         spin_lock_irqsave(&self->lock, flags);
1273
1274         /* Check if we need to change the speed */
1275         speed = irda_get_next_speed(skb);
1276         if ((speed != self->io.speed) && (speed != -1)) {
1277                 /* Check for empty frame. */
1278                 if (!skb->len) {
1279                         /* If we are currently transmitting, defer to
1280                          * interrupt handler. - Jean II */
1281                         if(self->tx_fifo.len == 0) {
1282                                 nsc_ircc_change_speed(self, speed);
1283                                 netif_wake_queue(dev);
1284                         } else {
1285                                 self->new_speed = speed;
1286                                 /* Keep queue stopped :
1287                                  * the speed change operation may change the
1288                                  * xmit handler, and we want to make sure
1289                                  * the next packet get through the proper
1290                                  * Tx path, so block the Tx queue until
1291                                  * the speed change has been done.
1292                                  * Jean II */
1293                         }
1294                         dev->trans_start = jiffies;
1295                         spin_unlock_irqrestore(&self->lock, flags);
1296                         dev_kfree_skb(skb);
1297                         return 0;
1298                 } else {
1299                         /* Change speed after current frame */
1300                         self->new_speed = speed;
1301                 }
1302         }
1303
1304         /* Save current bank */
1305         bank = inb(iobase+BSR);
1306
1307         /* Register and copy this frame to DMA memory */
1308         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1309         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1310         self->tx_fifo.tail += skb->len;
1311
1312         self->stats.tx_bytes += skb->len;
1313
1314         memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1315                skb->len);
1316
1317         self->tx_fifo.len++;
1318         self->tx_fifo.free++;
1319
1320         /* Start transmit only if there is currently no transmit going on */
1321         if (self->tx_fifo.len == 1) {
1322                 /* Check if we must wait the min turn time or not */
1323                 mtt = irda_get_mtt(skb);
1324                 if (mtt) {
1325                         /* Check how much time we have used already */
1326                         do_gettimeofday(&self->now);
1327                         diff = self->now.tv_usec - self->stamp.tv_usec;
1328                         if (diff < 0)
1329                                 diff += 1000000;
1330
1331                         /* Check if the mtt is larger than the time we have
1332                          * already used by all the protocol processing
1333                          */
1334                         if (mtt > diff) {
1335                                 mtt -= diff;
1336
1337                                 /*
1338                                  * Use timer if delay larger than 125 us, and
1339                                  * use udelay for smaller values which should
1340                                  * be acceptable
1341                                  */
1342                                 if (mtt > 125) {
1343                                         /* Adjust for timer resolution */
1344                                         mtt = mtt / 125;
1345
1346                                         /* Setup timer */
1347                                         switch_bank(iobase, BANK4);
1348                                         outb(mtt & 0xff, iobase+TMRL);
1349                                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
1350
1351                                         /* Start timer */
1352                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1353                                         self->io.direction = IO_XMIT;
1354
1355                                         /* Enable timer interrupt */
1356                                         switch_bank(iobase, BANK0);
1357                                         outb(IER_TMR_IE, iobase+IER);
1358
1359                                         /* Timer will take care of the rest */
1360                                         goto out;
1361                                 } else
1362                                         udelay(mtt);
1363                         }
1364                 }
1365                 /* Enable DMA interrupt */
1366                 switch_bank(iobase, BANK0);
1367                 outb(IER_DMA_IE, iobase+IER);
1368
1369                 /* Transmit frame */
1370                 nsc_ircc_dma_xmit(self, iobase);
1371         }
1372  out:
1373         /* Not busy transmitting anymore if window is not full,
1374          * and if we don't need to change speed */
1375         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1376                 netif_wake_queue(self->netdev);
1377
1378         /* Restore bank register */
1379         outb(bank, iobase+BSR);
1380
1381         dev->trans_start = jiffies;
1382         spin_unlock_irqrestore(&self->lock, flags);
1383         dev_kfree_skb(skb);
1384
1385         return 0;
1386 }
1387
1388 /*
1389  * Function nsc_ircc_dma_xmit (self, iobase)
1390  *
1391  *    Transmit data using DMA
1392  *
1393  */
1394 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1395 {
1396         int bsr;
1397
1398         /* Save current bank */
1399         bsr = inb(iobase+BSR);
1400
1401         /* Disable DMA */
1402         switch_bank(iobase, BANK0);
1403         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1404
1405         self->io.direction = IO_XMIT;
1406
1407         /* Choose transmit DMA channel  */
1408         switch_bank(iobase, BANK2);
1409         outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1410
1411         irda_setup_dma(self->io.dma,
1412                        self->tx_fifo.queue[self->tx_fifo.ptr].start,
1413                        self->tx_fifo.queue[self->tx_fifo.ptr].len,
1414                        DMA_TX_MODE);
1415
1416         /* Enable DMA and SIR interaction pulse */
1417         switch_bank(iobase, BANK0);
1418         outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1419
1420         /* Restore bank register */
1421         outb(bsr, iobase+BSR);
1422 }
1423
1424 /*
1425  * Function nsc_ircc_pio_xmit (self, iobase)
1426  *
1427  *    Transmit data using PIO. Returns the number of bytes that actually
1428  *    got transferred
1429  *
1430  */
1431 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1432 {
1433         int actual = 0;
1434         __u8 bank;
1435
1436         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1437
1438         /* Save current bank */
1439         bank = inb(iobase+BSR);
1440
1441         switch_bank(iobase, BANK0);
1442         if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1443                 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1444                            __FUNCTION__);
1445
1446                 /* FIFO may still be filled to the Tx interrupt threshold */
1447                 fifo_size -= 17;
1448         }
1449
1450         /* Fill FIFO with current frame */
1451         while ((fifo_size-- > 0) && (actual < len)) {
1452                 /* Transmit next byte */
1453                 outb(buf[actual++], iobase+TXD);
1454         }
1455
1456         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1457                    __FUNCTION__, fifo_size, actual, len);
1458
1459         /* Restore bank */
1460         outb(bank, iobase+BSR);
1461
1462         return actual;
1463 }
1464
1465 /*
1466  * Function nsc_ircc_dma_xmit_complete (self)
1467  *
1468  *    The transfer of a frame in finished. This function will only be called
1469  *    by the interrupt handler
1470  *
1471  */
1472 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1473 {
1474         int iobase;
1475         __u8 bank;
1476         int ret = TRUE;
1477
1478         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1479
1480         iobase = self->io.fir_base;
1481
1482         /* Save current bank */
1483         bank = inb(iobase+BSR);
1484
1485         /* Disable DMA */
1486         switch_bank(iobase, BANK0);
1487         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1488
1489         /* Check for underrrun! */
1490         if (inb(iobase+ASCR) & ASCR_TXUR) {
1491                 self->stats.tx_errors++;
1492                 self->stats.tx_fifo_errors++;
1493
1494                 /* Clear bit, by writing 1 into it */
1495                 outb(ASCR_TXUR, iobase+ASCR);
1496         } else {
1497                 self->stats.tx_packets++;
1498         }
1499
1500         /* Finished with this frame, so prepare for next */
1501         self->tx_fifo.ptr++;
1502         self->tx_fifo.len--;
1503
1504         /* Any frames to be sent back-to-back? */
1505         if (self->tx_fifo.len) {
1506                 nsc_ircc_dma_xmit(self, iobase);
1507
1508                 /* Not finished yet! */
1509                 ret = FALSE;
1510         } else {
1511                 /* Reset Tx FIFO info */
1512                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1513                 self->tx_fifo.tail = self->tx_buff.head;
1514         }
1515
1516         /* Make sure we have room for more frames and
1517          * that we don't need to change speed */
1518         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1519                 /* Not busy transmitting anymore */
1520                 /* Tell the network layer, that we can accept more frames */
1521                 netif_wake_queue(self->netdev);
1522         }
1523
1524         /* Restore bank */
1525         outb(bank, iobase+BSR);
1526
1527         return ret;
1528 }
1529
1530 /*
1531  * Function nsc_ircc_dma_receive (self)
1532  *
1533  *    Get ready for receiving a frame. The device will initiate a DMA
1534  *    if it starts to receive a frame.
1535  *
1536  */
1537 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1538 {
1539         int iobase;
1540         __u8 bsr;
1541
1542         iobase = self->io.fir_base;
1543
1544         /* Reset Tx FIFO info */
1545         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1546         self->tx_fifo.tail = self->tx_buff.head;
1547
1548         /* Save current bank */
1549         bsr = inb(iobase+BSR);
1550
1551         /* Disable DMA */
1552         switch_bank(iobase, BANK0);
1553         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1554
1555         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1556         switch_bank(iobase, BANK2);
1557         outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1558
1559         self->io.direction = IO_RECV;
1560         self->rx_buff.data = self->rx_buff.head;
1561
1562         /* Reset Rx FIFO. This will also flush the ST_FIFO */
1563         switch_bank(iobase, BANK0);
1564         outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1565
1566         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1567         self->st_fifo.tail = self->st_fifo.head = 0;
1568
1569         irda_setup_dma(self->io.dma, self->rx_buff.data,
1570                        self->rx_buff.truesize, DMA_RX_MODE);
1571
1572         /* Enable DMA */
1573         switch_bank(iobase, BANK0);
1574         outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1575
1576         /* Restore bank register */
1577         outb(bsr, iobase+BSR);
1578
1579         return 0;
1580 }
1581
1582 /*
1583  * Function nsc_ircc_dma_receive_complete (self)
1584  *
1585  *    Finished with receiving frames
1586  *
1587  *
1588  */
1589 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1590 {
1591         struct st_fifo *st_fifo;
1592         struct sk_buff *skb;
1593         __u8 status;
1594         __u8 bank;
1595         int len;
1596
1597         st_fifo = &self->st_fifo;
1598
1599         /* Save current bank */
1600         bank = inb(iobase+BSR);
1601
1602         /* Read all entries in status FIFO */
1603         switch_bank(iobase, BANK5);
1604         while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1605                 /* We must empty the status FIFO no matter what */
1606                 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1607
1608                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1609                         IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1610                         continue;
1611                 }
1612
1613                 st_fifo->entries[st_fifo->tail].status = status;
1614                 st_fifo->entries[st_fifo->tail].len = len;
1615                 st_fifo->pending_bytes += len;
1616                 st_fifo->tail++;
1617                 st_fifo->len++;
1618         }
1619         /* Try to process all entries in status FIFO */
1620         while (st_fifo->len > 0) {
1621                 /* Get first entry */
1622                 status = st_fifo->entries[st_fifo->head].status;
1623                 len    = st_fifo->entries[st_fifo->head].len;
1624                 st_fifo->pending_bytes -= len;
1625                 st_fifo->head++;
1626                 st_fifo->len--;
1627
1628                 /* Check for errors */
1629                 if (status & FRM_ST_ERR_MSK) {
1630                         if (status & FRM_ST_LOST_FR) {
1631                                 /* Add number of lost frames to stats */
1632                                 self->stats.rx_errors += len;
1633                         } else {
1634                                 /* Skip frame */
1635                                 self->stats.rx_errors++;
1636
1637                                 self->rx_buff.data += len;
1638
1639                                 if (status & FRM_ST_MAX_LEN)
1640                                         self->stats.rx_length_errors++;
1641
1642                                 if (status & FRM_ST_PHY_ERR)
1643                                         self->stats.rx_frame_errors++;
1644
1645                                 if (status & FRM_ST_BAD_CRC)
1646                                         self->stats.rx_crc_errors++;
1647                         }
1648                         /* The errors below can be reported in both cases */
1649                         if (status & FRM_ST_OVR1)
1650                                 self->stats.rx_fifo_errors++;
1651
1652                         if (status & FRM_ST_OVR2)
1653                                 self->stats.rx_fifo_errors++;
1654                 } else {
1655                         /*
1656                          * First we must make sure that the frame we
1657                          * want to deliver is all in main memory. If we
1658                          * cannot tell, then we check if the Rx FIFO is
1659                          * empty. If not then we will have to take a nap
1660                          * and try again later.
1661                          */
1662                         if (st_fifo->pending_bytes < self->io.fifo_size) {
1663                                 switch_bank(iobase, BANK0);
1664                                 if (inb(iobase+LSR) & LSR_RXDA) {
1665                                         /* Put this entry back in fifo */
1666                                         st_fifo->head--;
1667                                         st_fifo->len++;
1668                                         st_fifo->pending_bytes += len;
1669                                         st_fifo->entries[st_fifo->head].status = status;
1670                                         st_fifo->entries[st_fifo->head].len = len;
1671                                         /*
1672                                          * DMA not finished yet, so try again
1673                                          * later, set timer value, resolution
1674                                          * 125 us
1675                                          */
1676                                         switch_bank(iobase, BANK4);
1677                                         outb(0x02, iobase+TMRL); /* x 125 us */
1678                                         outb(0x00, iobase+TMRH);
1679
1680                                         /* Start timer */
1681                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1682
1683                                         /* Restore bank register */
1684                                         outb(bank, iobase+BSR);
1685
1686                                         return FALSE; /* I'll be back! */
1687                                 }
1688                         }
1689
1690                         /*
1691                          * Remember the time we received this frame, so we can
1692                          * reduce the min turn time a bit since we will know
1693                          * how much time we have used for protocol processing
1694                          */
1695                         do_gettimeofday(&self->stamp);
1696
1697                         skb = dev_alloc_skb(len+1);
1698                         if (skb == NULL)  {
1699                                 WARNING("%s(), memory squeeze, "
1700                                         "dropping frame.\n", __FUNCTION__);
1701                                 self->stats.rx_dropped++;
1702
1703                                 /* Restore bank register */
1704                                 outb(bank, iobase+BSR);
1705
1706                                 return FALSE;
1707                         }
1708
1709                         /* Make sure IP header gets aligned */
1710                         skb_reserve(skb, 1);
1711
1712                         /* Copy frame without CRC */
1713                         if (self->io.speed < 4000000) {
1714                                 skb_put(skb, len-2);
1715                                 memcpy(skb->data, self->rx_buff.data, len-2);
1716                         } else {
1717                                 skb_put(skb, len-4);
1718                                 memcpy(skb->data, self->rx_buff.data, len-4);
1719                         }
1720
1721                         /* Move to next frame */
1722                         self->rx_buff.data += len;
1723                         self->stats.rx_bytes += len;
1724                         self->stats.rx_packets++;
1725
1726                         skb->dev = self->netdev;
1727                         skb->mac.raw  = skb->data;
1728                         skb->protocol = htons(ETH_P_IRDA);
1729                         netif_rx(skb);
1730                         self->netdev->last_rx = jiffies;
1731                 }
1732         }
1733         /* Restore bank register */
1734         outb(bank, iobase+BSR);
1735
1736         return TRUE;
1737 }
1738
1739 /*
1740  * Function nsc_ircc_pio_receive (self)
1741  *
1742  *    Receive all data in receiver FIFO
1743  *
1744  */
1745 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1746 {
1747         __u8 byte;
1748         int iobase;
1749
1750         iobase = self->io.fir_base;
1751
1752         /*  Receive all characters in Rx FIFO */
1753         do {
1754                 byte = inb(iobase+RXD);
1755                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1756                                   byte);
1757         } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1758 }
1759
1760 /*
1761  * Function nsc_ircc_sir_interrupt (self, eir)
1762  *
1763  *    Handle SIR interrupt
1764  *
1765  */
1766 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1767 {
1768         int actual;
1769
1770         /* Check if transmit FIFO is low on data */
1771         if (eir & EIR_TXLDL_EV) {
1772                 /* Write data left in transmit buffer */
1773                 actual = nsc_ircc_pio_write(self->io.fir_base,
1774                                            self->tx_buff.data,
1775                                            self->tx_buff.len,
1776                                            self->io.fifo_size);
1777                 self->tx_buff.data += actual;
1778                 self->tx_buff.len  -= actual;
1779
1780                 self->io.direction = IO_XMIT;
1781
1782                 /* Check if finished */
1783                 if (self->tx_buff.len > 0)
1784                         self->ier = IER_TXLDL_IE;
1785                 else {
1786
1787                         self->stats.tx_packets++;
1788                         netif_wake_queue(self->netdev);
1789                         self->ier = IER_TXEMP_IE;
1790                 }
1791
1792         }
1793         /* Check if transmission has completed */
1794         if (eir & EIR_TXEMP_EV) {
1795                 /* Turn around and get ready to receive some data */
1796                 self->io.direction = IO_RECV;
1797                 self->ier = IER_RXHDL_IE;
1798                 /* Check if we need to change the speed?
1799                  * Need to be after self->io.direction to avoid race with
1800                  * nsc_ircc_hard_xmit_sir() - Jean II */
1801                 if (self->new_speed) {
1802                         IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1803                         self->ier = nsc_ircc_change_speed(self,
1804                                                           self->new_speed);
1805                         self->new_speed = 0;
1806                         netif_wake_queue(self->netdev);
1807
1808                         /* Check if we are going to FIR */
1809                         if (self->io.speed > 115200) {
1810                                 /* No need to do anymore SIR stuff */
1811                                 return;
1812                         }
1813                 }
1814         }
1815
1816         /* Rx FIFO threshold or timeout */
1817         if (eir & EIR_RXHDL_EV) {
1818                 nsc_ircc_pio_receive(self);
1819
1820                 /* Keep receiving */
1821                 self->ier = IER_RXHDL_IE;
1822         }
1823 }
1824
1825 /*
1826  * Function nsc_ircc_fir_interrupt (self, eir)
1827  *
1828  *    Handle MIR/FIR interrupt
1829  *
1830  */
1831 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1832                                    int eir)
1833 {
1834         __u8 bank;
1835
1836         bank = inb(iobase+BSR);
1837
1838         /* Status FIFO event*/
1839         if (eir & EIR_SFIF_EV) {
1840                 /* Check if DMA has finished */
1841                 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1842                         /* Wait for next status FIFO interrupt */
1843                         self->ier = IER_SFIF_IE;
1844                 } else {
1845                         self->ier = IER_SFIF_IE | IER_TMR_IE;
1846                 }
1847         } else if (eir & EIR_TMR_EV) { /* Timer finished */
1848                 /* Disable timer */
1849                 switch_bank(iobase, BANK4);
1850                 outb(0, iobase+IRCR1);
1851
1852                 /* Clear timer event */
1853                 switch_bank(iobase, BANK0);
1854                 outb(ASCR_CTE, iobase+ASCR);
1855
1856                 /* Check if this is a Tx timer interrupt */
1857                 if (self->io.direction == IO_XMIT) {
1858                         nsc_ircc_dma_xmit(self, iobase);
1859
1860                         /* Interrupt on DMA */
1861                         self->ier = IER_DMA_IE;
1862                 } else {
1863                         /* Check (again) if DMA has finished */
1864                         if (nsc_ircc_dma_receive_complete(self, iobase)) {
1865                                 self->ier = IER_SFIF_IE;
1866                         } else {
1867                                 self->ier = IER_SFIF_IE | IER_TMR_IE;
1868                         }
1869                 }
1870         } else if (eir & EIR_DMA_EV) {
1871                 /* Finished with all transmissions? */
1872                 if (nsc_ircc_dma_xmit_complete(self)) {
1873                         if(self->new_speed != 0) {
1874                                 /* As we stop the Tx queue, the speed change
1875                                  * need to be done when the Tx fifo is
1876                                  * empty. Ask for a Tx done interrupt */
1877                                 self->ier = IER_TXEMP_IE;
1878                         } else {
1879                                 /* Check if there are more frames to be
1880                                  * transmitted */
1881                                 if (irda_device_txqueue_empty(self->netdev)) {
1882                                         /* Prepare for receive */
1883                                         nsc_ircc_dma_receive(self);
1884                                         self->ier = IER_SFIF_IE;
1885                                 } else
1886                                         WARNING("%s(), potential "
1887                                                 "Tx queue lockup !\n",
1888                                                 __FUNCTION__);
1889                         }
1890                 } else {
1891                         /*  Not finished yet, so interrupt on DMA again */
1892                         self->ier = IER_DMA_IE;
1893                 }
1894         } else if (eir & EIR_TXEMP_EV) {
1895                 /* The Tx FIFO has totally drained out, so now we can change
1896                  * the speed... - Jean II */
1897                 self->ier = nsc_ircc_change_speed(self, self->new_speed);
1898                 self->new_speed = 0;
1899                 netif_wake_queue(self->netdev);
1900                 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
1901         }
1902
1903         outb(bank, iobase+BSR);
1904 }
1905
1906 /*
1907  * Function nsc_ircc_interrupt (irq, dev_id, regs)
1908  *
1909  *    An interrupt from the chip has arrived. Time to do some work
1910  *
1911  */
1912 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id,
1913                                 struct pt_regs *regs)
1914 {
1915         struct net_device *dev = (struct net_device *) dev_id;
1916         struct nsc_ircc_cb *self;
1917         __u8 bsr, eir;
1918         int iobase;
1919
1920         if (!dev) {
1921                 WARNING("%s: irq %d for unknown device.\n", driver_name, irq);
1922                 return IRQ_NONE;
1923         }
1924         self = (struct nsc_ircc_cb *) dev->priv;
1925
1926         spin_lock(&self->lock);
1927
1928         iobase = self->io.fir_base;
1929
1930         bsr = inb(iobase+BSR);  /* Save current bank */
1931
1932         switch_bank(iobase, BANK0);
1933         self->ier = inb(iobase+IER);
1934         eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
1935
1936         outb(0, iobase+IER); /* Disable interrupts */
1937
1938         if (eir) {
1939                 /* Dispatch interrupt handler for the current speed */
1940                 if (self->io.speed > 115200)
1941                         nsc_ircc_fir_interrupt(self, iobase, eir);
1942                 else
1943                         nsc_ircc_sir_interrupt(self, eir);
1944         }
1945
1946         outb(self->ier, iobase+IER); /* Restore interrupts */
1947         outb(bsr, iobase+BSR);       /* Restore bank register */
1948
1949         spin_unlock(&self->lock);
1950         return IRQ_RETVAL(eir);
1951 }
1952
1953 /*
1954  * Function nsc_ircc_is_receiving (self)
1955  *
1956  *    Return TRUE is we are currently receiving a frame
1957  *
1958  */
1959 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
1960 {
1961         unsigned long flags;
1962         int status = FALSE;
1963         int iobase;
1964         __u8 bank;
1965
1966         ASSERT(self != NULL, return FALSE;);
1967
1968         spin_lock_irqsave(&self->lock, flags);
1969
1970         if (self->io.speed > 115200) {
1971                 iobase = self->io.fir_base;
1972
1973                 /* Check if rx FIFO is not empty */
1974                 bank = inb(iobase+BSR);
1975                 switch_bank(iobase, BANK2);
1976                 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
1977                         /* We are receiving something */
1978                         status =  TRUE;
1979                 }
1980                 outb(bank, iobase+BSR);
1981         } else
1982                 status = (self->rx_buff.state != OUTSIDE_FRAME);
1983
1984         spin_unlock_irqrestore(&self->lock, flags);
1985
1986         return status;
1987 }
1988
1989 /*
1990  * Function nsc_ircc_net_open (dev)
1991  *
1992  *    Start the device
1993  *
1994  */
1995 static int nsc_ircc_net_open(struct net_device *dev)
1996 {
1997         struct nsc_ircc_cb *self;
1998         int iobase;
1999         char hwname[32];
2000         __u8 bank;
2001
2002         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2003
2004         ASSERT(dev != NULL, return -1;);
2005         self = (struct nsc_ircc_cb *) dev->priv;
2006
2007         ASSERT(self != NULL, return 0;);
2008
2009         iobase = self->io.fir_base;
2010
2011         if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2012                 WARNING("%s, unable to allocate irq=%d\n", driver_name,
2013                         self->io.irq);
2014                 return -EAGAIN;
2015         }
2016         /*
2017          * Always allocate the DMA channel after the IRQ, and clean up on
2018          * failure.
2019          */
2020         if (request_dma(self->io.dma, dev->name)) {
2021                 WARNING("%s, unable to allocate dma=%d\n", driver_name,
2022                         self->io.dma);
2023                 free_irq(self->io.irq, dev);
2024                 return -EAGAIN;
2025         }
2026
2027         /* Save current bank */
2028         bank = inb(iobase+BSR);
2029
2030         /* turn on interrupts */
2031         switch_bank(iobase, BANK0);
2032         outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2033
2034         /* Restore bank register */
2035         outb(bank, iobase+BSR);
2036
2037         /* Ready to play! */
2038         netif_start_queue(dev);
2039
2040         /* Give self a hardware name */
2041         sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2042
2043         /*
2044          * Open new IrLAP layer instance, now that everything should be
2045          * initialized properly
2046          */
2047         self->irlap = irlap_open(dev, &self->qos, hwname);
2048
2049         return 0;
2050 }
2051
2052 /*
2053  * Function nsc_ircc_net_close (dev)
2054  *
2055  *    Stop the device
2056  *
2057  */
2058 static int nsc_ircc_net_close(struct net_device *dev)
2059 {
2060         struct nsc_ircc_cb *self;
2061         int iobase;
2062         __u8 bank;
2063
2064         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2065
2066         ASSERT(dev != NULL, return -1;);
2067
2068         self = (struct nsc_ircc_cb *) dev->priv;
2069         ASSERT(self != NULL, return 0;);
2070
2071         /* Stop device */
2072         netif_stop_queue(dev);
2073
2074         /* Stop and remove instance of IrLAP */
2075         if (self->irlap)
2076                 irlap_close(self->irlap);
2077         self->irlap = NULL;
2078
2079         iobase = self->io.fir_base;
2080
2081         disable_dma(self->io.dma);
2082
2083         /* Save current bank */
2084         bank = inb(iobase+BSR);
2085
2086         /* Disable interrupts */
2087         switch_bank(iobase, BANK0);
2088         outb(0, iobase+IER);
2089
2090         free_irq(self->io.irq, dev);
2091         free_dma(self->io.dma);
2092
2093         /* Restore bank register */
2094         outb(bank, iobase+BSR);
2095
2096         return 0;
2097 }
2098
2099 /*
2100  * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2101  *
2102  *    Process IOCTL commands for this device
2103  *
2104  */
2105 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2106 {
2107         struct if_irda_req *irq = (struct if_irda_req *) rq;
2108         struct nsc_ircc_cb *self;
2109         unsigned long flags;
2110         int ret = 0;
2111
2112         ASSERT(dev != NULL, return -1;);
2113
2114         self = dev->priv;
2115
2116         ASSERT(self != NULL, return -1;);
2117
2118         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2119
2120         switch (cmd) {
2121         case SIOCSBANDWIDTH: /* Set bandwidth */
2122                 if (!capable(CAP_NET_ADMIN)) {
2123                         ret = -EPERM;
2124                         break;
2125                 }
2126                 spin_lock_irqsave(&self->lock, flags);
2127                 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2128                 spin_unlock_irqrestore(&self->lock, flags);
2129                 break;
2130         case SIOCSMEDIABUSY: /* Set media busy */
2131                 if (!capable(CAP_NET_ADMIN)) {
2132                         ret = -EPERM;
2133                         break;
2134                 }
2135                 irda_device_set_media_busy(self->netdev, TRUE);
2136                 break;
2137         case SIOCGRECEIVING: /* Check if we are receiving right now */
2138                 /* This is already protected */
2139                 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2140                 break;
2141         default:
2142                 ret = -EOPNOTSUPP;
2143         }
2144         return ret;
2145 }
2146
2147 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2148 {
2149         struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2150
2151         return &self->stats;
2152 }
2153
2154 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
2155 {
2156         MESSAGE("%s, Suspending\n", driver_name);
2157
2158         if (self->io.suspended)
2159                 return;
2160
2161         nsc_ircc_net_close(self->netdev);
2162
2163         self->io.suspended = 1;
2164 }
2165
2166 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2167 {
2168         if (!self->io.suspended)
2169                 return;
2170
2171         nsc_ircc_setup(&self->io);
2172         nsc_ircc_net_open(self->netdev);
2173
2174         MESSAGE("%s, Waking up\n", driver_name);
2175
2176         self->io.suspended = 0;
2177 }
2178
2179 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2180 {
2181         struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2182         if (self) {
2183                 switch (rqst) {
2184                 case PM_SUSPEND:
2185                         nsc_ircc_suspend(self);
2186                         break;
2187                 case PM_RESUME:
2188                         nsc_ircc_wakeup(self);
2189                         break;
2190                 }
2191         }
2192         return 0;
2193 }
2194
2195 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2196 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2197 MODULE_LICENSE("GPL");
2198
2199
2200 MODULE_PARM(qos_mtt_bits, "i");
2201 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2202 MODULE_PARM(io,  "1-4i");
2203 MODULE_PARM_DESC(io, "Base I/O addresses");
2204 MODULE_PARM(irq, "1-4i");
2205 MODULE_PARM_DESC(irq, "IRQ lines");
2206 MODULE_PARM(dma, "1-4i");
2207 MODULE_PARM_DESC(dma, "DMA channels");
2208 MODULE_PARM(dongle_id, "i");
2209 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2210
2211 module_init(nsc_ircc_init);
2212 module_exit(nsc_ircc_cleanup);
2213