drivers/net/irda/nsc-ircc.c

   1 /*********************************************************************
   2  *
   3  * Filename:      nsc-ircc.c
   4  * Version:       1.0
   5  * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
   6  * Status:        Stable.
   7  * Author:        Dag Brattli <dagb@cs.uit.no>
   8  * Created at:    Sat Nov  7 21:43:15 1998
   9  * Modified at:   Wed Mar  1 11:29:34 2000
  10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  11  *
  12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
  13  *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
  14  *     Copyright (c) 1998 Actisys Corp., www.actisys.com
  15  *     All Rights Reserved
  16  *
  17  *     This program is free software; you can redistribute it and/or
  18  *     modify it under the terms of the GNU General Public License as
  19  *     published by the Free Software Foundation; either version 2 of
  20  *     the License, or (at your option) any later version.
  21  *
  22  *     Neither Dag Brattli nor University of Tromsø admit liability nor
  23  *     provide warranty for any of this software. This material is
  24  *     provided "AS-IS" and at no charge.
  25  *
  26  *     Notice that all functions that needs to access the chip in _any_
  27  *     way, must save BSR register on entry, and restore it on exit.
  28  *     It is _very_ important to follow this policy!
  29  *
  30  *         __u8 bank;
  31  *
  32  *         bank = inb(iobase+BSR);
  33  *
  34  *         do_your_stuff_here();
  35  *
  36  *         outb(bank, iobase+BSR);
  37  *
  38  *    If you find bugs in this file, its very likely that the same bug
  39  *    will also be in w83977af_ir.c since the implementations are quite
  40  *    similar.
  41  *
  42  ********************************************************************/
  43
  44 #include <linux/module.h>
  45
  46 #include <linux/kernel.h>
  47 #include <linux/types.h>
  48 #include <linux/skbuff.h>
  49 #include <linux/netdevice.h>
  50 #include <linux/ioport.h>
  51 #include <linux/delay.h>
  52 #include <linux/slab.h>
  53 #include <linux/init.h>
  54 #include <linux/rtnetlink.h>
  55 #include <linux/dma-mapping.h>
  56
  57 #include <asm/io.h>
  58 #include <asm/dma.h>
  59 #include <asm/byteorder.h>
  60
  61 #include <linux/pm.h>
  62
  63 #include <net/irda/wrapper.h>
  64 #include <net/irda/irda.h>
  65 #include <net/irda/irda_device.h>
  66
  67 #include "nsc-ircc.h"
  68
  69 #define CHIP_IO_EXTENT 8
  70 #define BROKEN_DONGLE_ID
  71
  72 static char *driver_name = "nsc-ircc";
  73
  74 /* Module parameters */
  75 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
  76 static int dongle_id;
  77
  78 /* Use BIOS settions by default, but user may supply module parameters */
  79 static unsigned int io[]  = { ~0, ~0, ~0, ~0 };
  80 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
  81 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
  82
  83 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
  84 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
  85 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
  86 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
  87 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
  88 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
  89
  90 /* These are the known NSC chips */
  91 static nsc_chip_t chips[] = {
  92 /*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
  93         { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
  94           nsc_ircc_probe_108, nsc_ircc_init_108 },
  95         { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
  96           nsc_ircc_probe_338, nsc_ircc_init_338 },
  97         /* Contributed by Jan Frey - IBM A30/A31 */
  98         { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
  99           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 100         { NULL }
 101 #if 0
 102         /* Probably bogus, "PC8739x" should be the real thing. Jean II */
 103         /* Contributed by Kevin Thayer - OmniBook 6100 */
 104         { "PC87338?", { 0x2e, 0x15c, 0x398 }, 0x08, 0x00, 0xf8,
 105           nsc_ircc_probe_338, nsc_ircc_init_338 },
 106 #endif
 107 };
 108
 109 /* Max 4 instances for now */
 110 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
 111
 112 static char *dongle_types[] = {
 113         "Differential serial interface",
 114         "Differential serial interface",
 115         "Reserved",
 116         "Reserved",
 117         "Sharp RY5HD01",
 118         "Reserved",
 119         "Single-ended serial interface",
 120         "Consumer-IR only",
 121         "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
 122         "IBM31T1100 or Temic TFDS6000/TFDS6500",
 123         "Reserved",
 124         "Reserved",
 125         "HP HSDL-1100/HSDL-2100",
 126         "HP HSDL-1100/HSDL-2100",
 127         "Supports SIR Mode only",
 128         "No dongle connected",
 129 };
 130
 131 /* Some prototypes */
 132 static int  nsc_ircc_open(int i, chipio_t *info);
 133 static int  nsc_ircc_close(struct nsc_ircc_cb *self);
 134 static int  nsc_ircc_setup(chipio_t *info);
 135 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
 136 static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
 137 static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
 138 static int  nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
 139 static int  nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
 140 static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
 141 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
 142 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
 143 static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
 144 static int  nsc_ircc_read_dongle_id (int iobase);
 145 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
 146
 147 static int  nsc_ircc_net_open(struct net_device *dev);
 148 static int  nsc_ircc_net_close(struct net_device *dev);
 149 static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 150 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
 151 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
 152
 153 /*
 154  * Function nsc_ircc_init ()
 155  *
 156  *    Initialize chip. Just try to find out how many chips we are dealing with
 157  *    and where they are
 158  */
 159 static int __init nsc_ircc_init(void)
 160 {
 161         chipio_t info;
 162         nsc_chip_t *chip;
 163         int ret = -ENODEV;
 164         int cfg_base;
 165         int cfg, id;
 166         int reg;
 167         int i = 0;
 168
 169         /* Probe for all the NSC chipsets we know about */
 170         for (chip=chips; chip->name ; chip++) {
 171                 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
 172                            chip->name);
 173
 174                 /* Try all config registers for this chip */
 175                 for (cfg=0; cfg<3; cfg++) {
 176                         cfg_base = chip->cfg[cfg];
 177                         if (!cfg_base)
 178                                 continue;
 179
 180                         memset(&info, 0, sizeof(chipio_t));
 181                         info.cfg_base = cfg_base;
 182                         info.fir_base = io[i];
 183                         info.dma = dma[i];
 184                         info.irq = irq[i];
 185
 186                         /* Read index register */
 187                         reg = inb(cfg_base);
 188                         if (reg == 0xff) {
 189                                 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
 190                                 continue;
 191                         }
 192
 193                         /* Read chip identification register */
 194                         outb(chip->cid_index, cfg_base);
 195                         id = inb(cfg_base+1);
 196                         if ((id & chip->cid_mask) == chip->cid_value) {
 197                                 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
 198                                            __FUNCTION__, chip->name, id & ~chip->cid_mask);
 199                                 /*
 200                                  * If the user supplies the base address, then
 201                                  * we init the chip, if not we probe the values
 202                                  * set by the BIOS
 203                                  */
 204                                 if (io[i] < 0x2000) {
 205                                         chip->init(chip, &info);
 206                                 } else
 207                                         chip->probe(chip, &info);
 208
 209                                 if (nsc_ircc_open(i, &info) == 0)
 210                                         ret = 0;
 211                                 i++;
 212                         } else {
 213                                 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
 214                         }
 215                 }
 216
 217         }
 218
 219         return ret;
 220 }
 221
 222 /*
 223  * Function nsc_ircc_cleanup ()
 224  *
 225  *    Close all configured chips
 226  *
 227  */
 228 static void __exit nsc_ircc_cleanup(void)
 229 {
 230         int i;
 231
 232         pm_unregister_all(nsc_ircc_pmproc);
 233
 234         for (i=0; i < 4; i++) {
 235                 if (dev_self[i])
 236                         nsc_ircc_close(dev_self[i]);
 237         }
 238 }
 239
 240 /*
 241  * Function nsc_ircc_open (iobase, irq)
 242  *
 243  *    Open driver instance
 244  *
 245  */
 246 static int __init nsc_ircc_open(int i, chipio_t *info)
 247 {
 248         struct net_device *dev;
 249         struct nsc_ircc_cb *self;
 250         struct pm_dev *pmdev;
 251         void *ret;
 252         int err;
 253
 254         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
 255
 256         MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
 257                 info->cfg_base);
 258
 259         if ((nsc_ircc_setup(info)) == -1)
 260                 return -1;
 261
 262         MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
 263
 264         dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
 265         if (dev == NULL) {
 266                 ERROR("%s(), can't allocate memory for "
 267                        "control block!\n", __FUNCTION__);
 268                 return -ENOMEM;
 269         }
 270
 271         self = dev->priv;
 272         self->netdev = dev;
 273         spin_lock_init(&self->lock);
 274
 275         /* Need to store self somewhere */
 276         dev_self[i] = self;
 277         self->index = i;
 278
 279         /* Initialize IO */
 280         self->io.cfg_base  = info->cfg_base;
 281         self->io.fir_base  = info->fir_base;
 282         self->io.irq       = info->irq;
 283         self->io.fir_ext   = CHIP_IO_EXTENT;
 284         self->io.dma       = info->dma;
 285         self->io.fifo_size = 32;
 286
 287         /* Reserve the ioports that we need */
 288         ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
 289         if (!ret) {
 290                 WARNING("%s(), can't get iobase of 0x%03x\n",
 291                         __FUNCTION__, self->io.fir_base);
 292                 err = -ENODEV;
 293                 goto out1;
 294         }
 295
 296         /* Initialize QoS for this device */
 297         irda_init_max_qos_capabilies(&self->qos);
 298
 299         /* The only value we must override it the baudrate */
 300         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 301                 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
 302
 303         self->qos.min_turn_time.bits = qos_mtt_bits;
 304         irda_qos_bits_to_value(&self->qos);
 305
 306         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 307         self->rx_buff.truesize = 14384;
 308         self->tx_buff.truesize = 14384;
 309
 310         /* Allocate memory if needed */
 311         self->rx_buff.head =
 312                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
 313                                    &self->rx_buff_dma, GFP_KERNEL);
 314         if (self->rx_buff.head == NULL) {
 315                 err = -ENOMEM;
 316                 goto out2;
 317
 318         }
 319         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 320
 321         self->tx_buff.head =
 322                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
 323                                    &self->tx_buff_dma, GFP_KERNEL);
 324         if (self->tx_buff.head == NULL) {
 325                 err = -ENOMEM;
 326                 goto out3;
 327         }
 328         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 329
 330         self->rx_buff.in_frame = FALSE;
 331         self->rx_buff.state = OUTSIDE_FRAME;
 332         self->tx_buff.data = self->tx_buff.head;
 333         self->rx_buff.data = self->rx_buff.head;
 334
 335         /* Reset Tx queue info */
 336         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 337         self->tx_fifo.tail = self->tx_buff.head;
 338
 339         /* Override the network functions we need to use */
 340         SET_MODULE_OWNER(dev);
 341         dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
 342         dev->open            = nsc_ircc_net_open;
 343         dev->stop            = nsc_ircc_net_close;
 344         dev->do_ioctl        = nsc_ircc_net_ioctl;
 345         dev->get_stats       = nsc_ircc_net_get_stats;
 346
 347         err = register_netdev(dev);
 348         if (err) {
 349                 ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
 350                 goto out4;
 351         }
 352         MESSAGE("IrDA: Registered device %s\n", dev->name);
 353
 354         /* Check if user has supplied a valid dongle id or not */
 355         if ((dongle_id <= 0) ||
 356             (dongle_id >= (sizeof(dongle_types) / sizeof(dongle_types[0]))) ) {
 357                 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
 358
 359                 MESSAGE("%s, Found dongle: %s\n", driver_name,
 360                         dongle_types[dongle_id]);
 361         } else {
 362                 MESSAGE("%s, Using dongle: %s\n", driver_name,
 363                         dongle_types[dongle_id]);
 364         }
 365
 366         self->io.dongle_id = dongle_id;
 367         nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
 368
 369         pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
 370         if (pmdev)
 371                 pmdev->data = self;
 372
 373         return 0;
 374  out4:
 375         dma_free_coherent(NULL, self->tx_buff.truesize,
 376                           self->tx_buff.head, self->tx_buff_dma);
 377  out3:
 378         dma_free_coherent(NULL, self->rx_buff.truesize,
 379                           self->rx_buff.head, self->rx_buff_dma);
 380  out2:
 381         release_region(self->io.fir_base, self->io.fir_ext);
 382  out1:
 383         free_netdev(dev);
 384         dev_self[i] = NULL;
 385         return err;
 386 }
 387
 388 /*
 389  * Function nsc_ircc_close (self)
 390  *
 391  *    Close driver instance
 392  *
 393  */
 394 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
 395 {
 396         int iobase;
 397
 398         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
 399
 400         ASSERT(self != NULL, return -1;);
 401
 402         iobase = self->io.fir_base;
 403
 404         /* Remove netdevice */
 405         unregister_netdev(self->netdev);
 406
 407         /* Release the PORT that this driver is using */
 408         IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
 409                    __FUNCTION__, self->io.fir_base);
 410         release_region(self->io.fir_base, self->io.fir_ext);
 411
 412         if (self->tx_buff.head)
 413                 dma_free_coherent(NULL, self->tx_buff.truesize,
 414                                   self->tx_buff.head, self->tx_buff_dma);
 415
 416         if (self->rx_buff.head)
 417                 dma_free_coherent(NULL, self->rx_buff.truesize,
 418                                   self->rx_buff.head, self->rx_buff_dma);
 419
 420         dev_self[self->index] = NULL;
 421         free_netdev(self->netdev);
 422
 423         return 0;
 424 }
 425
 426 /*
 427  * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
 428  *
 429  *    Initialize the NSC '108 chip
 430  *
 431  */
 432 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
 433 {
 434         int cfg_base = info->cfg_base;
 435         __u8 temp=0;
 436
 437         outb(2, cfg_base);      /* Mode Control Register (MCTL) */
 438         outb(0x00, cfg_base+1); /* Disable device */
 439
 440         /* Base Address and Interrupt Control Register (BAIC) */
 441         outb(CFG_108_BAIC, cfg_base);
 442         switch (info->fir_base) {
 443         case 0x3e8: outb(0x14, cfg_base+1); break;
 444         case 0x2e8: outb(0x15, cfg_base+1); break;
 445         case 0x3f8: outb(0x16, cfg_base+1); break;
 446         case 0x2f8: outb(0x17, cfg_base+1); break;
 447         default: ERROR("%s(), invalid base_address", __FUNCTION__);
 448         }
 449
 450         /* Control Signal Routing Register (CSRT) */
 451         switch (info->irq) {
 452         case 3:  temp = 0x01; break;
 453         case 4:  temp = 0x02; break;
 454         case 5:  temp = 0x03; break;
 455         case 7:  temp = 0x04; break;
 456         case 9:  temp = 0x05; break;
 457         case 11: temp = 0x06; break;
 458         case 15: temp = 0x07; break;
 459         default: ERROR("%s(), invalid irq", __FUNCTION__);
 460         }
 461         outb(CFG_108_CSRT, cfg_base);
 462
 463         switch (info->dma) {
 464         case 0: outb(0x08+temp, cfg_base+1); break;
 465         case 1: outb(0x10+temp, cfg_base+1); break;
 466         case 3: outb(0x18+temp, cfg_base+1); break;
 467         default: ERROR("%s(), invalid dma", __FUNCTION__);
 468         }
 469
 470         outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
 471         outb(0x03, cfg_base+1); /* Enable device */
 472
 473         return 0;
 474 }
 475
 476 /*
 477  * Function nsc_ircc_probe_108 (chip, info)
 478  *
 479  *
 480  *
 481  */
 482 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
 483 {
 484         int cfg_base = info->cfg_base;
 485         int reg;
 486
 487         /* Read address and interrupt control register (BAIC) */
 488         outb(CFG_108_BAIC, cfg_base);
 489         reg = inb(cfg_base+1);
 490
 491         switch (reg & 0x03) {
 492         case 0:
 493                 info->fir_base = 0x3e8;
 494                 break;
 495         case 1:
 496                 info->fir_base = 0x2e8;
 497                 break;
 498         case 2:
 499                 info->fir_base = 0x3f8;
 500                 break;
 501         case 3:
 502                 info->fir_base = 0x2f8;
 503                 break;
 504         }
 505         info->sir_base = info->fir_base;
 506         IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
 507                    info->fir_base);
 508
 509         /* Read control signals routing register (CSRT) */
 510         outb(CFG_108_CSRT, cfg_base);
 511         reg = inb(cfg_base+1);
 512
 513         switch (reg & 0x07) {
 514         case 0:
 515                 info->irq = -1;
 516                 break;
 517         case 1:
 518                 info->irq = 3;
 519                 break;
 520         case 2:
 521                 info->irq = 4;
 522                 break;
 523         case 3:
 524                 info->irq = 5;
 525                 break;
 526         case 4:
 527                 info->irq = 7;
 528                 break;
 529         case 5:
 530                 info->irq = 9;
 531                 break;
 532         case 6:
 533                 info->irq = 11;
 534                 break;
 535         case 7:
 536                 info->irq = 15;
 537                 break;
 538         }
 539         IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
 540
 541         /* Currently we only read Rx DMA but it will also be used for Tx */
 542         switch ((reg >> 3) & 0x03) {
 543         case 0:
 544                 info->dma = -1;
 545                 break;
 546         case 1:
 547                 info->dma = 0;
 548                 break;
 549         case 2:
 550                 info->dma = 1;
 551                 break;
 552         case 3:
 553                 info->dma = 3;
 554                 break;
 555         }
 556         IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
 557
 558         /* Read mode control register (MCTL) */
 559         outb(CFG_108_MCTL, cfg_base);
 560         reg = inb(cfg_base+1);
 561
 562         info->enabled = reg & 0x01;
 563         info->suspended = !((reg >> 1) & 0x01);
 564
 565         return 0;
 566 }
 567
 568 /*
 569  * Function nsc_ircc_init_338 (chip, info)
 570  *
 571  *    Initialize the NSC '338 chip. Remember that the 87338 needs two
 572  *    consecutive writes to the data registers while CPU interrupts are
 573  *    disabled. The 97338 does not require this, but shouldn't be any
 574  *    harm if we do it anyway.
 575  */
 576 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
 577 {
 578         /* No init yet */
 579
 580         return 0;
 581 }
 582
 583 /*
 584  * Function nsc_ircc_probe_338 (chip, info)
 585  *
 586  *
 587  *
 588  */
 589 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
 590 {
 591         int cfg_base = info->cfg_base;
 592         int reg, com = 0;
 593         int pnp;
 594
 595         /* Read funtion enable register (FER) */
 596         outb(CFG_338_FER, cfg_base);
 597         reg = inb(cfg_base+1);
 598
 599         info->enabled = (reg >> 2) & 0x01;
 600
 601         /* Check if we are in Legacy or PnP mode */
 602         outb(CFG_338_PNP0, cfg_base);
 603         reg = inb(cfg_base+1);
 604
 605         pnp = (reg >> 3) & 0x01;
 606         if (pnp) {
 607                 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
 608                 outb(0x46, cfg_base);
 609                 reg = (inb(cfg_base+1) & 0xfe) << 2;
 610
 611                 outb(0x47, cfg_base);
 612                 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
 613
 614                 info->fir_base = reg;
 615         } else {
 616                 /* Read function address register (FAR) */
 617                 outb(CFG_338_FAR, cfg_base);
 618                 reg = inb(cfg_base+1);
 619
 620                 switch ((reg >> 4) & 0x03) {
 621                 case 0:
 622                         info->fir_base = 0x3f8;
 623                         break;
 624                 case 1:
 625                         info->fir_base = 0x2f8;
 626                         break;
 627                 case 2:
 628                         com = 3;
 629                         break;
 630                 case 3:
 631                         com = 4;
 632                         break;
 633                 }
 634
 635                 if (com) {
 636                         switch ((reg >> 6) & 0x03) {
 637                         case 0:
 638                                 if (com == 3)
 639                                         info->fir_base = 0x3e8;
 640                                 else
 641                                         info->fir_base = 0x2e8;
 642                                 break;
 643                         case 1:
 644                                 if (com == 3)
 645                                         info->fir_base = 0x338;
 646                                 else
 647                                         info->fir_base = 0x238;
 648                                 break;
 649                         case 2:
 650                                 if (com == 3)
 651                                         info->fir_base = 0x2e8;
 652                                 else
 653                                         info->fir_base = 0x2e0;
 654                                 break;
 655                         case 3:
 656                                 if (com == 3)
 657                                         info->fir_base = 0x220;
 658                                 else
 659                                         info->fir_base = 0x228;
 660                                 break;
 661                         }
 662                 }
 663         }
 664         info->sir_base = info->fir_base;
 665
 666         /* Read PnP register 1 (PNP1) */
 667         outb(CFG_338_PNP1, cfg_base);
 668         reg = inb(cfg_base+1);
 669
 670         info->irq = reg >> 4;
 671
 672         /* Read PnP register 3 (PNP3) */
 673         outb(CFG_338_PNP3, cfg_base);
 674         reg = inb(cfg_base+1);
 675
 676         info->dma = (reg & 0x07) - 1;
 677
 678         /* Read power and test register (PTR) */
 679         outb(CFG_338_PTR, cfg_base);
 680         reg = inb(cfg_base+1);
 681
 682         info->suspended = reg & 0x01;
 683
 684         return 0;
 685 }
 686
 687
 688 /*
 689  * Function nsc_ircc_init_39x (chip, info)
 690  *
 691  *    Now that we know it's a '39x (see probe below), we need to
 692  *    configure it so we can use it.
 693  *
 694  * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
 695  * the configuration of the different functionality (serial, parallel,
 696  * floppy...) are each in a different bank (Logical Device Number).
 697  * The base address, irq and dma configuration registers are common
 698  * to all functionalities (index 0x30 to 0x7F).
 699  * There is only one configuration register specific to the
 700  * serial port, CFG_39X_SPC.
 701  * JeanII
 702  *
 703  * Note : this code was written by Jan Frey <janfrey@web.de>
 704  */
 705 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
 706 {
 707         int cfg_base = info->cfg_base;
 708         int enabled;
 709
 710         /* User is shure about his config... accept it. */
 711         IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
 712                    "io=0x%04x, irq=%d, dma=%d\n",
 713                    __FUNCTION__, info->fir_base, info->irq, info->dma);
 714
 715         /* Access bank for SP2 */
 716         outb(CFG_39X_LDN, cfg_base);
 717         outb(0x02, cfg_base+1);
 718
 719         /* Configure SP2 */
 720
 721         /* We want to enable the device if not enabled */
 722         outb(CFG_39X_ACT, cfg_base);
 723         enabled = inb(cfg_base+1) & 0x01;
 724
 725         if (!enabled) {
 726                 /* Enable the device */
 727                 outb(CFG_39X_SIOCF1, cfg_base);
 728                 outb(0x01, cfg_base+1);
 729                 /* May want to update info->enabled. Jean II */
 730         }
 731
 732         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 733          * power mode (wake up from sleep mode) (bit 1) */
 734         outb(CFG_39X_SPC, cfg_base);
 735         outb(0x82, cfg_base+1);
 736
 737         return 0;
 738 }
 739
 740 /*
 741  * Function nsc_ircc_probe_39x (chip, info)
 742  *
 743  *    Test if we really have a '39x chip at the given address
 744  *
 745  * Note : this code was written by Jan Frey <janfrey@web.de>
 746  */
 747 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
 748 {
 749         int cfg_base = info->cfg_base;
 750         int reg1, reg2, irq, irqt, dma1, dma2;
 751         int enabled, susp;
 752
 753         IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
 754                    __FUNCTION__, cfg_base);
 755
 756         /* This function should be executed with irq off to avoid
 757          * another driver messing with the Super I/O bank - Jean II */
 758
 759         /* Access bank for SP2 */
 760         outb(CFG_39X_LDN, cfg_base);
 761         outb(0x02, cfg_base+1);
 762
 763         /* Read infos about SP2 ; store in info struct */
 764         outb(CFG_39X_BASEH, cfg_base);
 765         reg1 = inb(cfg_base+1);
 766         outb(CFG_39X_BASEL, cfg_base);
 767         reg2 = inb(cfg_base+1);
 768         info->fir_base = (reg1 << 8) | reg2;
 769
 770         outb(CFG_39X_IRQNUM, cfg_base);
 771         irq = inb(cfg_base+1);
 772         outb(CFG_39X_IRQSEL, cfg_base);
 773         irqt = inb(cfg_base+1);
 774         info->irq = irq;
 775
 776         outb(CFG_39X_DMA0, cfg_base);
 777         dma1 = inb(cfg_base+1);
 778         outb(CFG_39X_DMA1, cfg_base);
 779         dma2 = inb(cfg_base+1);
 780         info->dma = dma1 -1;
 781
 782         outb(CFG_39X_ACT, cfg_base);
 783         info->enabled = enabled = inb(cfg_base+1) & 0x01;
 784
 785         outb(CFG_39X_SPC, cfg_base);
 786         susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
 787
 788         IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
 789
 790         /* Configure SP2 */
 791
 792         /* We want to enable the device if not enabled */
 793         outb(CFG_39X_ACT, cfg_base);
 794         enabled = inb(cfg_base+1) & 0x01;
 795
 796         if (!enabled) {
 797                 /* Enable the device */
 798                 outb(CFG_39X_SIOCF1, cfg_base);
 799                 outb(0x01, cfg_base+1);
 800                 /* May want to update info->enabled. Jean II */
 801         }
 802
 803         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 804          * power mode (wake up from sleep mode) (bit 1) */
 805         outb(CFG_39X_SPC, cfg_base);
 806         outb(0x82, cfg_base+1);
 807
 808         return 0;
 809 }
 810
 811 /*
 812  * Function nsc_ircc_setup (info)
 813  *
 814  *    Returns non-negative on success.
 815  *
 816  */
 817 static int nsc_ircc_setup(chipio_t *info)
 818 {
 819         int version;
 820         int iobase = info->fir_base;
 821
 822         /* Read the Module ID */
 823         switch_bank(iobase, BANK3);
 824         version = inb(iobase+MID);
 825
 826         IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
 827                    __FUNCTION__, driver_name, version);
 828
 829         /* Should be 0x2? */
 830         if (0x20 != (version & 0xf0)) {
 831                 ERROR("%s, Wrong chip version %02x\n", driver_name, version);
 832                 return -1;
 833         }
 834
 835         /* Switch to advanced mode */
 836         switch_bank(iobase, BANK2);
 837         outb(ECR1_EXT_SL, iobase+ECR1);
 838         switch_bank(iobase, BANK0);
 839
 840         /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
 841         switch_bank(iobase, BANK0);
 842         outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
 843
 844         outb(0x03, iobase+LCR);         /* 8 bit word length */
 845         outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
 846
 847         /* Set FIFO size to 32 */
 848         switch_bank(iobase, BANK2);
 849         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
 850
 851         /* IRCR2: FEND_MD is not set */
 852         switch_bank(iobase, BANK5);
 853         outb(0x02, iobase+4);
 854
 855         /* Make sure that some defaults are OK */
 856         switch_bank(iobase, BANK6);
 857         outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
 858         outb(0x0a, iobase+1); /* Set MIR pulse width */
 859         outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
 860         outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
 861
 862         /* Enable receive interrupts */
 863         switch_bank(iobase, BANK0);
 864         outb(IER_RXHDL_IE, iobase+IER);
 865
 866         return 0;
 867 }
 868
 869 /*
 870  * Function nsc_ircc_read_dongle_id (void)
 871  *
 872  * Try to read dongle indentification. This procedure needs to be executed
 873  * once after power-on/reset. It also needs to be used whenever you suspect
 874  * that the user may have plugged/unplugged the IrDA Dongle.
 875  */
 876 static int nsc_ircc_read_dongle_id (int iobase)
 877 {
 878         int dongle_id;
 879         __u8 bank;
 880
 881         bank = inb(iobase+BSR);
 882
 883         /* Select Bank 7 */
 884         switch_bank(iobase, BANK7);
 885
 886         /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
 887         outb(0x00, iobase+7);
 888
 889         /* ID0, 1, and 2 are pulled up/down very slowly */
 890         udelay(50);
 891
 892         /* IRCFG1: read the ID bits */
 893         dongle_id = inb(iobase+4) & 0x0f;
 894
 895 #ifdef BROKEN_DONGLE_ID
 896         if (dongle_id == 0x0a)
 897                 dongle_id = 0x09;
 898 #endif
 899         /* Go back to  bank 0 before returning */
 900         switch_bank(iobase, BANK0);
 901
 902         outb(bank, iobase+BSR);
 903
 904         return dongle_id;
 905 }
 906
 907 /*
 908  * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
 909  *
 910  *     This function initializes the dongle for the transceiver that is
 911  *     used. This procedure needs to be executed once after
 912  *     power-on/reset. It also needs to be used whenever you suspect that
 913  *     the dongle is changed.
 914  */
 915 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
 916 {
 917         int bank;
 918
 919         /* Save current bank */
 920         bank = inb(iobase+BSR);
 921
 922         /* Select Bank 7 */
 923         switch_bank(iobase, BANK7);
 924
 925         /* IRCFG4: set according to dongle_id */
 926         switch (dongle_id) {
 927         case 0x00: /* same as */
 928         case 0x01: /* Differential serial interface */
 929                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 930                            __FUNCTION__, dongle_types[dongle_id]);
 931                 break;
 932         case 0x02: /* same as */
 933         case 0x03: /* Reserved */
 934                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 935                            __FUNCTION__, dongle_types[dongle_id]);
 936                 break;
 937         case 0x04: /* Sharp RY5HD01 */
 938                 break;
 939         case 0x05: /* Reserved, but this is what the Thinkpad reports */
 940                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 941                            __FUNCTION__, dongle_types[dongle_id]);
 942                 break;
 943         case 0x06: /* Single-ended serial interface */
 944                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 945                            __FUNCTION__, dongle_types[dongle_id]);
 946                 break;
 947         case 0x07: /* Consumer-IR only */
 948                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
 949                            __FUNCTION__, dongle_types[dongle_id]);
 950                 break;
 951         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
 952                 IRDA_DEBUG(0, "%s(), %s\n",
 953                            __FUNCTION__, dongle_types[dongle_id]);
 954                 break;
 955         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
 956                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
 957                 break;
 958         case 0x0A: /* same as */
 959         case 0x0B: /* Reserved */
 960                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 961                            __FUNCTION__, dongle_types[dongle_id]);
 962                 break;
 963         case 0x0C: /* same as */
 964         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
 965                 /*
 966                  * Set irsl0 as input, irsl[1-2] as output, and separate
 967                  * inputs are used for SIR and MIR/FIR
 968                  */
 969                 outb(0x48, iobase+7);
 970                 break;
 971         case 0x0E: /* Supports SIR Mode only */
 972                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
 973                 break;
 974         case 0x0F: /* No dongle connected */
 975                 IRDA_DEBUG(0, "%s(), %s\n",
 976                            __FUNCTION__, dongle_types[dongle_id]);
 977
 978                 switch_bank(iobase, BANK0);
 979                 outb(0x62, iobase+MCR);
 980                 break;
 981         default:
 982                 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
 983                            __FUNCTION__, dongle_id);
 984         }
 985
 986         /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
 987         outb(0x00, iobase+4);
 988
 989         /* Restore bank register */
 990         outb(bank, iobase+BSR);
 991
 992 } /* set_up_dongle_interface */
 993
 994 /*
 995  * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
 996  *
 997  *    Change speed of the attach dongle
 998  *
 999  */
1000 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1001 {
1002         __u8 bank;
1003
1004         /* Save current bank */
1005         bank = inb(iobase+BSR);
1006
1007         /* Select Bank 7 */
1008         switch_bank(iobase, BANK7);
1009
1010         /* IRCFG1: set according to dongle_id */
1011         switch (dongle_id) {
1012         case 0x00: /* same as */
1013         case 0x01: /* Differential serial interface */
1014                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1015                            __FUNCTION__, dongle_types[dongle_id]);
1016                 break;
1017         case 0x02: /* same as */
1018         case 0x03: /* Reserved */
1019                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1020                            __FUNCTION__, dongle_types[dongle_id]);
1021                 break;
1022         case 0x04: /* Sharp RY5HD01 */
1023                 break;
1024         case 0x05: /* Reserved */
1025                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1026                            __FUNCTION__, dongle_types[dongle_id]);
1027                 break;
1028         case 0x06: /* Single-ended serial interface */
1029                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1030                            __FUNCTION__, dongle_types[dongle_id]);
1031                 break;
1032         case 0x07: /* Consumer-IR only */
1033                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1034                            __FUNCTION__, dongle_types[dongle_id]);
1035                 break;
1036         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1037                 IRDA_DEBUG(0, "%s(), %s\n",
1038                            __FUNCTION__, dongle_types[dongle_id]);
1039                 outb(0x00, iobase+4);
1040                 if (speed > 115200)
1041                         outb(0x01, iobase+4);
1042                 break;
1043         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1044                 outb(0x01, iobase+4);
1045
1046                 if (speed == 4000000) {
1047                         /* There was a cli() there, but we now are already
1048                          * under spin_lock_irqsave() - JeanII */
1049                         outb(0x81, iobase+4);
1050                         outb(0x80, iobase+4);
1051                 } else
1052                         outb(0x00, iobase+4);
1053                 break;
1054         case 0x0A: /* same as */
1055         case 0x0B: /* Reserved */
1056                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1057                            __FUNCTION__, dongle_types[dongle_id]);
1058                 break;
1059         case 0x0C: /* same as */
1060         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1061                 break;
1062         case 0x0E: /* Supports SIR Mode only */
1063                 break;
1064         case 0x0F: /* No dongle connected */
1065                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1066                            __FUNCTION__, dongle_types[dongle_id]);
1067
1068                 switch_bank(iobase, BANK0);
1069                 outb(0x62, iobase+MCR);
1070                 break;
1071         default:
1072                 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1073         }
1074         /* Restore bank register */
1075         outb(bank, iobase+BSR);
1076 }
1077
1078 /*
1079  * Function nsc_ircc_change_speed (self, baud)
1080  *
1081  *    Change the speed of the device
1082  *
1083  * This function *must* be called with irq off and spin-lock.
1084  */
1085 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1086 {
1087         struct net_device *dev = self->netdev;
1088         __u8 mcr = MCR_SIR;
1089         int iobase;
1090         __u8 bank;
1091         __u8 ier;                  /* Interrupt enable register */
1092
1093         IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1094
1095         ASSERT(self != NULL, return 0;);
1096
1097         iobase = self->io.fir_base;
1098
1099         /* Update accounting for new speed */
1100         self->io.speed = speed;
1101
1102         /* Save current bank */
1103         bank = inb(iobase+BSR);
1104
1105         /* Disable interrupts */
1106         switch_bank(iobase, BANK0);
1107         outb(0, iobase+IER);
1108
1109         /* Select Bank 2 */
1110         switch_bank(iobase, BANK2);
1111
1112         outb(0x00, iobase+BGDH);
1113         switch (speed) {
1114         case 9600:   outb(0x0c, iobase+BGDL); break;
1115         case 19200:  outb(0x06, iobase+BGDL); break;
1116         case 38400:  outb(0x03, iobase+BGDL); break;
1117         case 57600:  outb(0x02, iobase+BGDL); break;
1118         case 115200: outb(0x01, iobase+BGDL); break;
1119         case 576000:
1120                 switch_bank(iobase, BANK5);
1121
1122                 /* IRCR2: MDRS is set */
1123                 outb(inb(iobase+4) | 0x04, iobase+4);
1124
1125                 mcr = MCR_MIR;
1126                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1127                 break;
1128         case 1152000:
1129                 mcr = MCR_MIR;
1130                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1131                 break;
1132         case 4000000:
1133                 mcr = MCR_FIR;
1134                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1135                 break;
1136         default:
1137                 mcr = MCR_FIR;
1138                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1139                            __FUNCTION__, speed);
1140                 break;
1141         }
1142
1143         /* Set appropriate speed mode */
1144         switch_bank(iobase, BANK0);
1145         outb(mcr | MCR_TX_DFR, iobase+MCR);
1146
1147         /* Give some hits to the transceiver */
1148         nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1149
1150         /* Set FIFO threshold to TX17, RX16 */
1151         switch_bank(iobase, BANK0);
1152         outb(0x00, iobase+FCR);
1153         outb(FCR_FIFO_EN, iobase+FCR);
1154         outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1155              FCR_TXTH|     /* Set Tx FIFO threshold */
1156              FCR_TXSR|     /* Reset Tx FIFO */
1157              FCR_RXSR|     /* Reset Rx FIFO */
1158              FCR_FIFO_EN,  /* Enable FIFOs */
1159              iobase+FCR);
1160
1161         /* Set FIFO size to 32 */
1162         switch_bank(iobase, BANK2);
1163         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1164
1165         /* Enable some interrupts so we can receive frames */
1166         switch_bank(iobase, BANK0);
1167         if (speed > 115200) {
1168                 /* Install FIR xmit handler */
1169                 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1170                 ier = IER_SFIF_IE;
1171                 nsc_ircc_dma_receive(self);
1172         } else {
1173                 /* Install SIR xmit handler */
1174                 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1175                 ier = IER_RXHDL_IE;
1176         }
1177         /* Set our current interrupt mask */
1178         outb(ier, iobase+IER);
1179
1180         /* Restore BSR */
1181         outb(bank, iobase+BSR);
1182
1183         /* Make sure interrupt handlers keep the proper interrupt mask */
1184         return(ier);
1185 }
1186
1187 /*
1188  * Function nsc_ircc_hard_xmit (skb, dev)
1189  *
1190  *    Transmit the frame!
1191  *
1192  */
1193 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1194 {
1195         struct nsc_ircc_cb *self;
1196         unsigned long flags;
1197         int iobase;
1198         __s32 speed;
1199         __u8 bank;
1200
1201         self = (struct nsc_ircc_cb *) dev->priv;
1202
1203         ASSERT(self != NULL, return 0;);
1204
1205         iobase = self->io.fir_base;
1206
1207         netif_stop_queue(dev);
1208
1209         /* Make sure tests *& speed change are atomic */
1210         spin_lock_irqsave(&self->lock, flags);
1211
1212         /* Check if we need to change the speed */
1213         speed = irda_get_next_speed(skb);
1214         if ((speed != self->io.speed) && (speed != -1)) {
1215                 /* Check for empty frame. */
1216                 if (!skb->len) {
1217                         /* If we just sent a frame, we get called before
1218                          * the last bytes get out (because of the SIR FIFO).
1219                          * If this is the case, let interrupt handler change
1220                          * the speed itself... Jean II */
1221                         if (self->io.direction == IO_RECV) {
1222                                 nsc_ircc_change_speed(self, speed);
1223                                 /* TODO : For SIR->SIR, the next packet
1224                                  * may get corrupted - Jean II */
1225                                 netif_wake_queue(dev);
1226                         } else {
1227                                 self->new_speed = speed;
1228                                 /* Queue will be restarted after speed change
1229                                  * to make sure packets gets through the
1230                                  * proper xmit handler - Jean II */
1231                         }
1232                         dev->trans_start = jiffies;
1233                         spin_unlock_irqrestore(&self->lock, flags);
1234                         dev_kfree_skb(skb);
1235                         return 0;
1236                 } else
1237                         self->new_speed = speed;
1238         }
1239
1240         /* Save current bank */
1241         bank = inb(iobase+BSR);
1242
1243         self->tx_buff.data = self->tx_buff.head;
1244
1245         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1246                                            self->tx_buff.truesize);
1247
1248         self->stats.tx_bytes += self->tx_buff.len;
1249
1250         /* Add interrupt on tx low level (will fire immediately) */
1251         switch_bank(iobase, BANK0);
1252         outb(IER_TXLDL_IE, iobase+IER);
1253
1254         /* Restore bank register */
1255         outb(bank, iobase+BSR);
1256
1257         dev->trans_start = jiffies;
1258         spin_unlock_irqrestore(&self->lock, flags);
1259
1260         dev_kfree_skb(skb);
1261
1262         return 0;
1263 }
1264
1265 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1266 {
1267         struct nsc_ircc_cb *self;
1268         unsigned long flags;
1269         int iobase;
1270         __s32 speed;
1271         __u8 bank;
1272         int mtt, diff;
1273
1274         self = (struct nsc_ircc_cb *) dev->priv;
1275         iobase = self->io.fir_base;
1276
1277         netif_stop_queue(dev);
1278
1279         /* Make sure tests *& speed change are atomic */
1280         spin_lock_irqsave(&self->lock, flags);
1281
1282         /* Check if we need to change the speed */
1283         speed = irda_get_next_speed(skb);
1284         if ((speed != self->io.speed) && (speed != -1)) {
1285                 /* Check for empty frame. */
1286                 if (!skb->len) {
1287                         /* If we are currently transmitting, defer to
1288                          * interrupt handler. - Jean II */
1289                         if(self->tx_fifo.len == 0) {
1290                                 nsc_ircc_change_speed(self, speed);
1291                                 netif_wake_queue(dev);
1292                         } else {
1293                                 self->new_speed = speed;
1294                                 /* Keep queue stopped :
1295                                  * the speed change operation may change the
1296                                  * xmit handler, and we want to make sure
1297                                  * the next packet get through the proper
1298                                  * Tx path, so block the Tx queue until
1299                                  * the speed change has been done.
1300                                  * Jean II */
1301                         }
1302                         dev->trans_start = jiffies;
1303                         spin_unlock_irqrestore(&self->lock, flags);
1304                         dev_kfree_skb(skb);
1305                         return 0;
1306                 } else {
1307                         /* Change speed after current frame */
1308                         self->new_speed = speed;
1309                 }
1310         }
1311
1312         /* Save current bank */
1313         bank = inb(iobase+BSR);
1314
1315         /* Register and copy this frame to DMA memory */
1316         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1317         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1318         self->tx_fifo.tail += skb->len;
1319
1320         self->stats.tx_bytes += skb->len;
1321
1322         memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1323                skb->len);
1324
1325         self->tx_fifo.len++;
1326         self->tx_fifo.free++;
1327
1328         /* Start transmit only if there is currently no transmit going on */
1329         if (self->tx_fifo.len == 1) {
1330                 /* Check if we must wait the min turn time or not */
1331                 mtt = irda_get_mtt(skb);
1332                 if (mtt) {
1333                         /* Check how much time we have used already */
1334                         do_gettimeofday(&self->now);
1335                         diff = self->now.tv_usec - self->stamp.tv_usec;
1336                         if (diff < 0)
1337                                 diff += 1000000;
1338
1339                         /* Check if the mtt is larger than the time we have
1340                          * already used by all the protocol processing
1341                          */
1342                         if (mtt > diff) {
1343                                 mtt -= diff;
1344
1345                                 /*
1346                                  * Use timer if delay larger than 125 us, and
1347                                  * use udelay for smaller values which should
1348                                  * be acceptable
1349                                  */
1350                                 if (mtt > 125) {
1351                                         /* Adjust for timer resolution */
1352                                         mtt = mtt / 125;
1353
1354                                         /* Setup timer */
1355                                         switch_bank(iobase, BANK4);
1356                                         outb(mtt & 0xff, iobase+TMRL);
1357                                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
1358
1359                                         /* Start timer */
1360                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1361                                         self->io.direction = IO_XMIT;
1362
1363                                         /* Enable timer interrupt */
1364                                         switch_bank(iobase, BANK0);
1365                                         outb(IER_TMR_IE, iobase+IER);
1366
1367                                         /* Timer will take care of the rest */
1368                                         goto out;
1369                                 } else
1370                                         udelay(mtt);
1371                         }
1372                 }
1373                 /* Enable DMA interrupt */
1374                 switch_bank(iobase, BANK0);
1375                 outb(IER_DMA_IE, iobase+IER);
1376
1377                 /* Transmit frame */
1378                 nsc_ircc_dma_xmit(self, iobase);
1379         }
1380  out:
1381         /* Not busy transmitting anymore if window is not full,
1382          * and if we don't need to change speed */
1383         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1384                 netif_wake_queue(self->netdev);
1385
1386         /* Restore bank register */
1387         outb(bank, iobase+BSR);
1388
1389         dev->trans_start = jiffies;
1390         spin_unlock_irqrestore(&self->lock, flags);
1391         dev_kfree_skb(skb);
1392
1393         return 0;
1394 }
1395
1396 /*
1397  * Function nsc_ircc_dma_xmit (self, iobase)
1398  *
1399  *    Transmit data using DMA
1400  *
1401  */
1402 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1403 {
1404         int bsr;
1405
1406         /* Save current bank */
1407         bsr = inb(iobase+BSR);
1408
1409         /* Disable DMA */
1410         switch_bank(iobase, BANK0);
1411         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1412
1413         self->io.direction = IO_XMIT;
1414
1415         /* Choose transmit DMA channel  */
1416         switch_bank(iobase, BANK2);
1417         outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1418
1419         irda_setup_dma(self->io.dma,
1420                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1421                         self->tx_buff.head) + self->tx_buff_dma,
1422                        self->tx_fifo.queue[self->tx_fifo.ptr].len,
1423                        DMA_TX_MODE);
1424
1425         /* Enable DMA and SIR interaction pulse */
1426         switch_bank(iobase, BANK0);
1427         outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1428
1429         /* Restore bank register */
1430         outb(bsr, iobase+BSR);
1431 }
1432
1433 /*
1434  * Function nsc_ircc_pio_xmit (self, iobase)
1435  *
1436  *    Transmit data using PIO. Returns the number of bytes that actually
1437  *    got transferred
1438  *
1439  */
1440 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1441 {
1442         int actual = 0;
1443         __u8 bank;
1444
1445         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1446
1447         /* Save current bank */
1448         bank = inb(iobase+BSR);
1449
1450         switch_bank(iobase, BANK0);
1451         if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1452                 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1453                            __FUNCTION__);
1454
1455                 /* FIFO may still be filled to the Tx interrupt threshold */
1456                 fifo_size -= 17;
1457         }
1458
1459         /* Fill FIFO with current frame */
1460         while ((fifo_size-- > 0) && (actual < len)) {
1461                 /* Transmit next byte */
1462                 outb(buf[actual++], iobase+TXD);
1463         }
1464
1465         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1466                    __FUNCTION__, fifo_size, actual, len);
1467
1468         /* Restore bank */
1469         outb(bank, iobase+BSR);
1470
1471         return actual;
1472 }
1473
1474 /*
1475  * Function nsc_ircc_dma_xmit_complete (self)
1476  *
1477  *    The transfer of a frame in finished. This function will only be called
1478  *    by the interrupt handler
1479  *
1480  */
1481 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1482 {
1483         int iobase;
1484         __u8 bank;
1485         int ret = TRUE;
1486
1487         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1488
1489         iobase = self->io.fir_base;
1490
1491         /* Save current bank */
1492         bank = inb(iobase+BSR);
1493
1494         /* Disable DMA */
1495         switch_bank(iobase, BANK0);
1496         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1497
1498         /* Check for underrrun! */
1499         if (inb(iobase+ASCR) & ASCR_TXUR) {
1500                 self->stats.tx_errors++;
1501                 self->stats.tx_fifo_errors++;
1502
1503                 /* Clear bit, by writing 1 into it */
1504                 outb(ASCR_TXUR, iobase+ASCR);
1505         } else {
1506                 self->stats.tx_packets++;
1507         }
1508
1509         /* Finished with this frame, so prepare for next */
1510         self->tx_fifo.ptr++;
1511         self->tx_fifo.len--;
1512
1513         /* Any frames to be sent back-to-back? */
1514         if (self->tx_fifo.len) {
1515                 nsc_ircc_dma_xmit(self, iobase);
1516
1517                 /* Not finished yet! */
1518                 ret = FALSE;
1519         } else {
1520                 /* Reset Tx FIFO info */
1521                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1522                 self->tx_fifo.tail = self->tx_buff.head;
1523         }
1524
1525         /* Make sure we have room for more frames and
1526          * that we don't need to change speed */
1527         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1528                 /* Not busy transmitting anymore */
1529                 /* Tell the network layer, that we can accept more frames */
1530                 netif_wake_queue(self->netdev);
1531         }
1532
1533         /* Restore bank */
1534         outb(bank, iobase+BSR);
1535
1536         return ret;
1537 }
1538
1539 /*
1540  * Function nsc_ircc_dma_receive (self)
1541  *
1542  *    Get ready for receiving a frame. The device will initiate a DMA
1543  *    if it starts to receive a frame.
1544  *
1545  */
1546 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1547 {
1548         int iobase;
1549         __u8 bsr;
1550
1551         iobase = self->io.fir_base;
1552
1553         /* Reset Tx FIFO info */
1554         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1555         self->tx_fifo.tail = self->tx_buff.head;
1556
1557         /* Save current bank */
1558         bsr = inb(iobase+BSR);
1559
1560         /* Disable DMA */
1561         switch_bank(iobase, BANK0);
1562         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1563
1564         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1565         switch_bank(iobase, BANK2);
1566         outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1567
1568         self->io.direction = IO_RECV;
1569         self->rx_buff.data = self->rx_buff.head;
1570
1571         /* Reset Rx FIFO. This will also flush the ST_FIFO */
1572         switch_bank(iobase, BANK0);
1573         outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1574
1575         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1576         self->st_fifo.tail = self->st_fifo.head = 0;
1577
1578         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1579                        DMA_RX_MODE);
1580
1581         /* Enable DMA */
1582         switch_bank(iobase, BANK0);
1583         outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1584
1585         /* Restore bank register */
1586         outb(bsr, iobase+BSR);
1587
1588         return 0;
1589 }
1590
1591 /*
1592  * Function nsc_ircc_dma_receive_complete (self)
1593  *
1594  *    Finished with receiving frames
1595  *
1596  *
1597  */
1598 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1599 {
1600         struct st_fifo *st_fifo;
1601         struct sk_buff *skb;
1602         __u8 status;
1603         __u8 bank;
1604         int len;
1605
1606         st_fifo = &self->st_fifo;
1607
1608         /* Save current bank */
1609         bank = inb(iobase+BSR);
1610
1611         /* Read all entries in status FIFO */
1612         switch_bank(iobase, BANK5);
1613         while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1614                 /* We must empty the status FIFO no matter what */
1615                 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1616
1617                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1618                         IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1619                         continue;
1620                 }
1621
1622                 st_fifo->entries[st_fifo->tail].status = status;
1623                 st_fifo->entries[st_fifo->tail].len = len;
1624                 st_fifo->pending_bytes += len;
1625                 st_fifo->tail++;
1626                 st_fifo->len++;
1627         }
1628         /* Try to process all entries in status FIFO */
1629         while (st_fifo->len > 0) {
1630                 /* Get first entry */
1631                 status = st_fifo->entries[st_fifo->head].status;
1632                 len    = st_fifo->entries[st_fifo->head].len;
1633                 st_fifo->pending_bytes -= len;
1634                 st_fifo->head++;
1635                 st_fifo->len--;
1636
1637                 /* Check for errors */
1638                 if (status & FRM_ST_ERR_MSK) {
1639                         if (status & FRM_ST_LOST_FR) {
1640                                 /* Add number of lost frames to stats */
1641                                 self->stats.rx_errors += len;
1642                         } else {
1643                                 /* Skip frame */
1644                                 self->stats.rx_errors++;
1645
1646                                 self->rx_buff.data += len;
1647
1648                                 if (status & FRM_ST_MAX_LEN)
1649                                         self->stats.rx_length_errors++;
1650
1651                                 if (status & FRM_ST_PHY_ERR)
1652                                         self->stats.rx_frame_errors++;
1653
1654                                 if (status & FRM_ST_BAD_CRC)
1655                                         self->stats.rx_crc_errors++;
1656                         }
1657                         /* The errors below can be reported in both cases */
1658                         if (status & FRM_ST_OVR1)
1659                                 self->stats.rx_fifo_errors++;
1660
1661                         if (status & FRM_ST_OVR2)
1662                                 self->stats.rx_fifo_errors++;
1663                 } else {
1664                         /*
1665                          * First we must make sure that the frame we
1666                          * want to deliver is all in main memory. If we
1667                          * cannot tell, then we check if the Rx FIFO is
1668                          * empty. If not then we will have to take a nap
1669                          * and try again later.
1670                          */
1671                         if (st_fifo->pending_bytes < self->io.fifo_size) {
1672                                 switch_bank(iobase, BANK0);
1673                                 if (inb(iobase+LSR) & LSR_RXDA) {
1674                                         /* Put this entry back in fifo */
1675                                         st_fifo->head--;
1676                                         st_fifo->len++;
1677                                         st_fifo->pending_bytes += len;
1678                                         st_fifo->entries[st_fifo->head].status = status;
1679                                         st_fifo->entries[st_fifo->head].len = len;
1680                                         /*
1681                                          * DMA not finished yet, so try again
1682                                          * later, set timer value, resolution
1683                                          * 125 us
1684                                          */
1685                                         switch_bank(iobase, BANK4);
1686                                         outb(0x02, iobase+TMRL); /* x 125 us */
1687                                         outb(0x00, iobase+TMRH);
1688
1689                                         /* Start timer */
1690                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1691
1692                                         /* Restore bank register */
1693                                         outb(bank, iobase+BSR);
1694
1695                                         return FALSE; /* I'll be back! */
1696                                 }
1697                         }
1698
1699                         /*
1700                          * Remember the time we received this frame, so we can
1701                          * reduce the min turn time a bit since we will know
1702                          * how much time we have used for protocol processing
1703                          */
1704                         do_gettimeofday(&self->stamp);
1705
1706                         skb = dev_alloc_skb(len+1);
1707                         if (skb == NULL)  {
1708                                 WARNING("%s(), memory squeeze, "
1709                                         "dropping frame.\n", __FUNCTION__);
1710                                 self->stats.rx_dropped++;
1711
1712                                 /* Restore bank register */
1713                                 outb(bank, iobase+BSR);
1714
1715                                 return FALSE;
1716                         }
1717
1718                         /* Make sure IP header gets aligned */
1719                         skb_reserve(skb, 1);
1720
1721                         /* Copy frame without CRC */
1722                         if (self->io.speed < 4000000) {
1723                                 skb_put(skb, len-2);
1724                                 memcpy(skb->data, self->rx_buff.data, len-2);
1725                         } else {
1726                                 skb_put(skb, len-4);
1727                                 memcpy(skb->data, self->rx_buff.data, len-4);
1728                         }
1729
1730                         /* Move to next frame */
1731                         self->rx_buff.data += len;
1732                         self->stats.rx_bytes += len;
1733                         self->stats.rx_packets++;
1734
1735                         skb->dev = self->netdev;
1736                         skb->mac.raw  = skb->data;
1737                         skb->protocol = htons(ETH_P_IRDA);
1738                         netif_rx(skb);
1739                         self->netdev->last_rx = jiffies;
1740                 }
1741         }
1742         /* Restore bank register */
1743         outb(bank, iobase+BSR);
1744
1745         return TRUE;
1746 }
1747
1748 /*
1749  * Function nsc_ircc_pio_receive (self)
1750  *
1751  *    Receive all data in receiver FIFO
1752  *
1753  */
1754 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1755 {
1756         __u8 byte;
1757         int iobase;
1758
1759         iobase = self->io.fir_base;
1760
1761         /*  Receive all characters in Rx FIFO */
1762         do {
1763                 byte = inb(iobase+RXD);
1764                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1765                                   byte);
1766         } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1767 }
1768
1769 /*
1770  * Function nsc_ircc_sir_interrupt (self, eir)
1771  *
1772  *    Handle SIR interrupt
1773  *
1774  */
1775 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1776 {
1777         int actual;
1778
1779         /* Check if transmit FIFO is low on data */
1780         if (eir & EIR_TXLDL_EV) {
1781                 /* Write data left in transmit buffer */
1782                 actual = nsc_ircc_pio_write(self->io.fir_base,
1783                                            self->tx_buff.data,
1784                                            self->tx_buff.len,
1785                                            self->io.fifo_size);
1786                 self->tx_buff.data += actual;
1787                 self->tx_buff.len  -= actual;
1788
1789                 self->io.direction = IO_XMIT;
1790
1791                 /* Check if finished */
1792                 if (self->tx_buff.len > 0)
1793                         self->ier = IER_TXLDL_IE;
1794                 else {
1795
1796                         self->stats.tx_packets++;
1797                         netif_wake_queue(self->netdev);
1798                         self->ier = IER_TXEMP_IE;
1799                 }
1800
1801         }
1802         /* Check if transmission has completed */
1803         if (eir & EIR_TXEMP_EV) {
1804                 /* Turn around and get ready to receive some data */
1805                 self->io.direction = IO_RECV;
1806                 self->ier = IER_RXHDL_IE;
1807                 /* Check if we need to change the speed?
1808                  * Need to be after self->io.direction to avoid race with
1809                  * nsc_ircc_hard_xmit_sir() - Jean II */
1810                 if (self->new_speed) {
1811                         IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1812                         self->ier = nsc_ircc_change_speed(self,
1813                                                           self->new_speed);
1814                         self->new_speed = 0;
1815                         netif_wake_queue(self->netdev);
1816
1817                         /* Check if we are going to FIR */
1818                         if (self->io.speed > 115200) {
1819                                 /* No need to do anymore SIR stuff */
1820                                 return;
1821                         }
1822                 }
1823         }
1824
1825         /* Rx FIFO threshold or timeout */
1826         if (eir & EIR_RXHDL_EV) {
1827                 nsc_ircc_pio_receive(self);
1828
1829                 /* Keep receiving */
1830                 self->ier = IER_RXHDL_IE;
1831         }
1832 }
1833
1834 /*
1835  * Function nsc_ircc_fir_interrupt (self, eir)
1836  *
1837  *    Handle MIR/FIR interrupt
1838  *
1839  */
1840 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1841                                    int eir)
1842 {
1843         __u8 bank;
1844
1845         bank = inb(iobase+BSR);
1846
1847         /* Status FIFO event*/
1848         if (eir & EIR_SFIF_EV) {
1849                 /* Check if DMA has finished */
1850                 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1851                         /* Wait for next status FIFO interrupt */
1852                         self->ier = IER_SFIF_IE;
1853                 } else {
1854                         self->ier = IER_SFIF_IE | IER_TMR_IE;
1855                 }
1856         } else if (eir & EIR_TMR_EV) { /* Timer finished */
1857                 /* Disable timer */
1858                 switch_bank(iobase, BANK4);
1859                 outb(0, iobase+IRCR1);
1860
1861                 /* Clear timer event */
1862                 switch_bank(iobase, BANK0);
1863                 outb(ASCR_CTE, iobase+ASCR);
1864
1865                 /* Check if this is a Tx timer interrupt */
1866                 if (self->io.direction == IO_XMIT) {
1867                         nsc_ircc_dma_xmit(self, iobase);
1868
1869                         /* Interrupt on DMA */
1870                         self->ier = IER_DMA_IE;
1871                 } else {
1872                         /* Check (again) if DMA has finished */
1873                         if (nsc_ircc_dma_receive_complete(self, iobase)) {
1874                                 self->ier = IER_SFIF_IE;
1875                         } else {
1876                                 self->ier = IER_SFIF_IE | IER_TMR_IE;
1877                         }
1878                 }
1879         } else if (eir & EIR_DMA_EV) {
1880                 /* Finished with all transmissions? */
1881                 if (nsc_ircc_dma_xmit_complete(self)) {
1882                         if(self->new_speed != 0) {
1883                                 /* As we stop the Tx queue, the speed change
1884                                  * need to be done when the Tx fifo is
1885                                  * empty. Ask for a Tx done interrupt */
1886                                 self->ier = IER_TXEMP_IE;
1887                         } else {
1888                                 /* Check if there are more frames to be
1889                                  * transmitted */
1890                                 if (irda_device_txqueue_empty(self->netdev)) {
1891                                         /* Prepare for receive */
1892                                         nsc_ircc_dma_receive(self);
1893                                         self->ier = IER_SFIF_IE;
1894                                 } else
1895                                         WARNING("%s(), potential "
1896                                                 "Tx queue lockup !\n",
1897                                                 __FUNCTION__);
1898                         }
1899                 } else {
1900                         /*  Not finished yet, so interrupt on DMA again */
1901                         self->ier = IER_DMA_IE;
1902                 }
1903         } else if (eir & EIR_TXEMP_EV) {
1904                 /* The Tx FIFO has totally drained out, so now we can change
1905                  * the speed... - Jean II */
1906                 self->ier = nsc_ircc_change_speed(self, self->new_speed);
1907                 self->new_speed = 0;
1908                 netif_wake_queue(self->netdev);
1909                 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
1910         }
1911
1912         outb(bank, iobase+BSR);
1913 }
1914
1915 /*
1916  * Function nsc_ircc_interrupt (irq, dev_id, regs)
1917  *
1918  *    An interrupt from the chip has arrived. Time to do some work
1919  *
1920  */
1921 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id,
1922                                 struct pt_regs *regs)
1923 {
1924         struct net_device *dev = (struct net_device *) dev_id;
1925         struct nsc_ircc_cb *self;
1926         __u8 bsr, eir;
1927         int iobase;
1928
1929         if (!dev) {
1930                 WARNING("%s: irq %d for unknown device.\n", driver_name, irq);
1931                 return IRQ_NONE;
1932         }
1933         self = (struct nsc_ircc_cb *) dev->priv;
1934
1935         spin_lock(&self->lock);
1936
1937         iobase = self->io.fir_base;
1938
1939         bsr = inb(iobase+BSR);  /* Save current bank */
1940
1941         switch_bank(iobase, BANK0);
1942         self->ier = inb(iobase+IER);
1943         eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
1944
1945         outb(0, iobase+IER); /* Disable interrupts */
1946
1947         if (eir) {
1948                 /* Dispatch interrupt handler for the current speed */
1949                 if (self->io.speed > 115200)
1950                         nsc_ircc_fir_interrupt(self, iobase, eir);
1951                 else
1952                         nsc_ircc_sir_interrupt(self, eir);
1953         }
1954
1955         outb(self->ier, iobase+IER); /* Restore interrupts */
1956         outb(bsr, iobase+BSR);       /* Restore bank register */
1957
1958         spin_unlock(&self->lock);
1959         return IRQ_RETVAL(eir);
1960 }
1961
1962 /*
1963  * Function nsc_ircc_is_receiving (self)
1964  *
1965  *    Return TRUE is we are currently receiving a frame
1966  *
1967  */
1968 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
1969 {
1970         unsigned long flags;
1971         int status = FALSE;
1972         int iobase;
1973         __u8 bank;
1974
1975         ASSERT(self != NULL, return FALSE;);
1976
1977         spin_lock_irqsave(&self->lock, flags);
1978
1979         if (self->io.speed > 115200) {
1980                 iobase = self->io.fir_base;
1981
1982                 /* Check if rx FIFO is not empty */
1983                 bank = inb(iobase+BSR);
1984                 switch_bank(iobase, BANK2);
1985                 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
1986                         /* We are receiving something */
1987                         status =  TRUE;
1988                 }
1989                 outb(bank, iobase+BSR);
1990         } else
1991                 status = (self->rx_buff.state != OUTSIDE_FRAME);
1992
1993         spin_unlock_irqrestore(&self->lock, flags);
1994
1995         return status;
1996 }
1997
1998 /*
1999  * Function nsc_ircc_net_open (dev)
2000  *
2001  *    Start the device
2002  *
2003  */
2004 static int nsc_ircc_net_open(struct net_device *dev)
2005 {
2006         struct nsc_ircc_cb *self;
2007         int iobase;
2008         char hwname[32];
2009         __u8 bank;
2010
2011         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2012
2013         ASSERT(dev != NULL, return -1;);
2014         self = (struct nsc_ircc_cb *) dev->priv;
2015
2016         ASSERT(self != NULL, return 0;);
2017
2018         iobase = self->io.fir_base;
2019
2020         if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2021                 WARNING("%s, unable to allocate irq=%d\n", driver_name,
2022                         self->io.irq);
2023                 return -EAGAIN;
2024         }
2025         /*
2026          * Always allocate the DMA channel after the IRQ, and clean up on
2027          * failure.
2028          */
2029         if (request_dma(self->io.dma, dev->name)) {
2030                 WARNING("%s, unable to allocate dma=%d\n", driver_name,
2031                         self->io.dma);
2032                 free_irq(self->io.irq, dev);
2033                 return -EAGAIN;
2034         }
2035
2036         /* Save current bank */
2037         bank = inb(iobase+BSR);
2038
2039         /* turn on interrupts */
2040         switch_bank(iobase, BANK0);
2041         outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2042
2043         /* Restore bank register */
2044         outb(bank, iobase+BSR);
2045
2046         /* Ready to play! */
2047         netif_start_queue(dev);
2048
2049         /* Give self a hardware name */
2050         sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2051
2052         /*
2053          * Open new IrLAP layer instance, now that everything should be
2054          * initialized properly
2055          */
2056         self->irlap = irlap_open(dev, &self->qos, hwname);
2057
2058         return 0;
2059 }
2060
2061 /*
2062  * Function nsc_ircc_net_close (dev)
2063  *
2064  *    Stop the device
2065  *
2066  */
2067 static int nsc_ircc_net_close(struct net_device *dev)
2068 {
2069         struct nsc_ircc_cb *self;
2070         int iobase;
2071         __u8 bank;
2072
2073         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2074
2075         ASSERT(dev != NULL, return -1;);
2076
2077         self = (struct nsc_ircc_cb *) dev->priv;
2078         ASSERT(self != NULL, return 0;);
2079
2080         /* Stop device */
2081         netif_stop_queue(dev);
2082
2083         /* Stop and remove instance of IrLAP */
2084         if (self->irlap)
2085                 irlap_close(self->irlap);
2086         self->irlap = NULL;
2087
2088         iobase = self->io.fir_base;
2089
2090         disable_dma(self->io.dma);
2091
2092         /* Save current bank */
2093         bank = inb(iobase+BSR);
2094
2095         /* Disable interrupts */
2096         switch_bank(iobase, BANK0);
2097         outb(0, iobase+IER);
2098
2099         free_irq(self->io.irq, dev);
2100         free_dma(self->io.dma);
2101
2102         /* Restore bank register */
2103         outb(bank, iobase+BSR);
2104
2105         return 0;
2106 }
2107
2108 /*
2109  * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2110  *
2111  *    Process IOCTL commands for this device
2112  *
2113  */
2114 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2115 {
2116         struct if_irda_req *irq = (struct if_irda_req *) rq;
2117         struct nsc_ircc_cb *self;
2118         unsigned long flags;
2119         int ret = 0;
2120
2121         ASSERT(dev != NULL, return -1;);
2122
2123         self = dev->priv;
2124
2125         ASSERT(self != NULL, return -1;);
2126
2127         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2128
2129         switch (cmd) {
2130         case SIOCSBANDWIDTH: /* Set bandwidth */
2131                 if (!capable(CAP_NET_ADMIN)) {
2132                         ret = -EPERM;
2133                         break;
2134                 }
2135                 spin_lock_irqsave(&self->lock, flags);
2136                 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2137                 spin_unlock_irqrestore(&self->lock, flags);
2138                 break;
2139         case SIOCSMEDIABUSY: /* Set media busy */
2140                 if (!capable(CAP_NET_ADMIN)) {
2141                         ret = -EPERM;
2142                         break;
2143                 }
2144                 irda_device_set_media_busy(self->netdev, TRUE);
2145                 break;
2146         case SIOCGRECEIVING: /* Check if we are receiving right now */
2147                 /* This is already protected */
2148                 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2149                 break;
2150         default:
2151                 ret = -EOPNOTSUPP;
2152         }
2153         return ret;
2154 }
2155
2156 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2157 {
2158         struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2159
2160         return &self->stats;
2161 }
2162
2163 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
2164 {
2165         MESSAGE("%s, Suspending\n", driver_name);
2166
2167         if (self->io.suspended)
2168                 return;
2169
2170         nsc_ircc_net_close(self->netdev);
2171
2172         self->io.suspended = 1;
2173 }
2174
2175 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2176 {
2177         if (!self->io.suspended)
2178                 return;
2179
2180         nsc_ircc_setup(&self->io);
2181         nsc_ircc_net_open(self->netdev);
2182
2183         MESSAGE("%s, Waking up\n", driver_name);
2184
2185         self->io.suspended = 0;
2186 }
2187
2188 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2189 {
2190         struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2191         if (self) {
2192                 switch (rqst) {
2193                 case PM_SUSPEND:
2194                         nsc_ircc_suspend(self);
2195                         break;
2196                 case PM_RESUME:
2197                         nsc_ircc_wakeup(self);
2198                         break;
2199                 }
2200         }
2201         return 0;
2202 }
2203
2204 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2205 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2206 MODULE_LICENSE("GPL");
2207
2208
2209 module_param(qos_mtt_bits, int, 0);
2210 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2211 module_param_array(io, int, NULL, 0);
2212 MODULE_PARM_DESC(io, "Base I/O addresses");
2213 module_param_array(irq, int, NULL, 0);
2214 MODULE_PARM_DESC(irq, "IRQ lines");
2215 module_param_array(dma, int, NULL, 0);
2216 MODULE_PARM_DESC(dma, "DMA channels");
2217 module_param(dongle_id, int, 0);
2218 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2219
2220 module_init(nsc_ircc_init);
2221 module_exit(nsc_ircc_cleanup);
2222