drivers/net/irda/nsc-ircc.c

   1 /*********************************************************************
   2  *
   3  * Filename:      nsc-ircc.c
   4  * Version:       1.0
   5  * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
   6  * Status:        Stable.
   7  * Author:        Dag Brattli <dagb@cs.uit.no>
   8  * Created at:    Sat Nov  7 21:43:15 1998
   9  * Modified at:   Wed Mar  1 11:29:34 2000
  10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  11  *
  12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
  13  *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
  14  *     Copyright (c) 1998 Actisys Corp., www.actisys.com
  15  *     All Rights Reserved
  16  *
  17  *     This program is free software; you can redistribute it and/or
  18  *     modify it under the terms of the GNU General Public License as
  19  *     published by the Free Software Foundation; either version 2 of
  20  *     the License, or (at your option) any later version.
  21  *
  22  *     Neither Dag Brattli nor University of Tromsø admit liability nor
  23  *     provide warranty for any of this software. This material is
  24  *     provided "AS-IS" and at no charge.
  25  *
  26  *     Notice that all functions that needs to access the chip in _any_
  27  *     way, must save BSR register on entry, and restore it on exit.
  28  *     It is _very_ important to follow this policy!
  29  *
  30  *         __u8 bank;
  31  *
  32  *         bank = inb(iobase+BSR);
  33  *
  34  *         do_your_stuff_here();
  35  *
  36  *         outb(bank, iobase+BSR);
  37  *
  38  *    If you find bugs in this file, its very likely that the same bug
  39  *    will also be in w83977af_ir.c since the implementations are quite
  40  *    similar.
  41  *
  42  ********************************************************************/
  43
  44 #include <linux/module.h>
  45
  46 #include <linux/kernel.h>
  47 #include <linux/types.h>
  48 #include <linux/skbuff.h>
  49 #include <linux/netdevice.h>
  50 #include <linux/ioport.h>
  51 #include <linux/delay.h>
  52 #include <linux/slab.h>
  53 #include <linux/init.h>
  54 #include <linux/rtnetlink.h>
  55 #include <linux/dma-mapping.h>
  56
  57 #include <asm/io.h>
  58 #include <asm/dma.h>
  59 #include <asm/byteorder.h>
  60
  61 #include <linux/pm.h>
  62
  63 #include <net/irda/wrapper.h>
  64 #include <net/irda/irda.h>
  65 #include <net/irda/irda_device.h>
  66
  67 #include "nsc-ircc.h"
  68
  69 #define CHIP_IO_EXTENT 8
  70 #define BROKEN_DONGLE_ID
  71
  72 static char *driver_name = "nsc-ircc";
  73
  74 /* Module parameters */
  75 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
  76 static int dongle_id;
  77
  78 /* Use BIOS settions by default, but user may supply module parameters */
  79 static unsigned int io[]  = { ~0, ~0, ~0, ~0 };
  80 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
  81 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
  82
  83 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
  84 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
  85 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
  86 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
  87 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
  88 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
  89
  90 /* These are the known NSC chips */
  91 static nsc_chip_t chips[] = {
  92 /*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
  93         { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
  94           nsc_ircc_probe_108, nsc_ircc_init_108 },
  95         { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
  96           nsc_ircc_probe_338, nsc_ircc_init_338 },
  97         /* Contributed by Jan Frey - IBM A30/A31 */
  98         { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
  99           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 100         { NULL }
 101 #if 0
 102         /* Probably bogus, "PC8739x" should be the real thing. Jean II */
 103         /* Contributed by Kevin Thayer - OmniBook 6100 */
 104         { "PC87338?", { 0x2e, 0x15c, 0x398 }, 0x08, 0x00, 0xf8,
 105           nsc_ircc_probe_338, nsc_ircc_init_338 },
 106 #endif
 107 };
 108
 109 /* Max 4 instances for now */
 110 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
 111
 112 static char *dongle_types[] = {
 113         "Differential serial interface",
 114         "Differential serial interface",
 115         "Reserved",
 116         "Reserved",
 117         "Sharp RY5HD01",
 118         "Reserved",
 119         "Single-ended serial interface",
 120         "Consumer-IR only",
 121         "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
 122         "IBM31T1100 or Temic TFDS6000/TFDS6500",
 123         "Reserved",
 124         "Reserved",
 125         "HP HSDL-1100/HSDL-2100",
 126         "HP HSDL-1100/HSDL-2100",
 127         "Supports SIR Mode only",
 128         "No dongle connected",
 129 };
 130
 131 /* Some prototypes */
 132 static int  nsc_ircc_open(int i, chipio_t *info);
 133 static int  nsc_ircc_close(struct nsc_ircc_cb *self);
 134 static int  nsc_ircc_setup(chipio_t *info);
 135 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
 136 static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
 137 static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
 138 static int  nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
 139 static int  nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
 140 static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
 141 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
 142 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
 143 static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
 144 static int  nsc_ircc_read_dongle_id (int iobase);
 145 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
 146
 147 static int  nsc_ircc_net_open(struct net_device *dev);
 148 static int  nsc_ircc_net_close(struct net_device *dev);
 149 static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 150 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
 151 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
 152
 153 /*
 154  * Function nsc_ircc_init ()
 155  *
 156  *    Initialize chip. Just try to find out how many chips we are dealing with
 157  *    and where they are
 158  */
 159 static int __init nsc_ircc_init(void)
 160 {
 161         chipio_t info;
 162         nsc_chip_t *chip;
 163         int ret = -ENODEV;
 164         int cfg_base;
 165         int cfg, id;
 166         int reg;
 167         int i = 0;
 168
 169         /* Probe for all the NSC chipsets we know about */
 170         for (chip=chips; chip->name ; chip++) {
 171                 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
 172                            chip->name);
 173
 174                 /* Try all config registers for this chip */
 175                 for (cfg=0; cfg<3; cfg++) {
 176                         cfg_base = chip->cfg[cfg];
 177                         if (!cfg_base)
 178                                 continue;
 179
 180                         memset(&info, 0, sizeof(chipio_t));
 181                         info.cfg_base = cfg_base;
 182                         info.fir_base = io[i];
 183                         info.dma = dma[i];
 184                         info.irq = irq[i];
 185
 186                         /* Read index register */
 187                         reg = inb(cfg_base);
 188                         if (reg == 0xff) {
 189                                 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
 190                                 continue;
 191                         }
 192
 193                         /* Read chip identification register */
 194                         outb(chip->cid_index, cfg_base);
 195                         id = inb(cfg_base+1);
 196                         if ((id & chip->cid_mask) == chip->cid_value) {
 197                                 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
 198                                            __FUNCTION__, chip->name, id & ~chip->cid_mask);
 199                                 /*
 200                                  * If the user supplies the base address, then
 201                                  * we init the chip, if not we probe the values
 202                                  * set by the BIOS
 203                                  */
 204                                 if (io[i] < 0x2000) {
 205                                         chip->init(chip, &info);
 206                                 } else
 207                                         chip->probe(chip, &info);
 208
 209                                 if (nsc_ircc_open(i, &info) == 0)
 210                                         ret = 0;
 211                                 i++;
 212                         } else {
 213                                 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
 214                         }
 215                 }
 216
 217         }
 218
 219         return ret;
 220 }
 221
 222 /*
 223  * Function nsc_ircc_cleanup ()
 224  *
 225  *    Close all configured chips
 226  *
 227  */
 228 static void __exit nsc_ircc_cleanup(void)
 229 {
 230         int i;
 231
 232         pm_unregister_all(nsc_ircc_pmproc);
 233
 234         for (i=0; i < 4; i++) {
 235                 if (dev_self[i])
 236                         nsc_ircc_close(dev_self[i]);
 237         }
 238 }
 239
 240 /*
 241  * Function nsc_ircc_open (iobase, irq)
 242  *
 243  *    Open driver instance
 244  *
 245  */
 246 static int __init nsc_ircc_open(int i, chipio_t *info)
 247 {
 248         struct net_device *dev;
 249         struct nsc_ircc_cb *self;
 250         struct pm_dev *pmdev;
 251         void *ret;
 252         int err;
 253
 254         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
 255
 256         MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
 257                 info->cfg_base);
 258
 259         if ((nsc_ircc_setup(info)) == -1)
 260                 return -1;
 261
 262         MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
 263
 264         dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
 265         if (dev == NULL) {
 266                 ERROR("%s(), can't allocate memory for "
 267                        "control block!\n", __FUNCTION__);
 268                 return -ENOMEM;
 269         }
 270
 271         self = dev->priv;
 272         self->netdev = dev;
 273         spin_lock_init(&self->lock);
 274
 275         /* Need to store self somewhere */
 276         dev_self[i] = self;
 277         self->index = i;
 278
 279         /* Initialize IO */
 280         self->io.cfg_base  = info->cfg_base;
 281         self->io.fir_base  = info->fir_base;
 282         self->io.irq       = info->irq;
 283         self->io.fir_ext   = CHIP_IO_EXTENT;
 284         self->io.dma       = info->dma;
 285         self->io.fifo_size = 32;
 286
 287         /* Reserve the ioports that we need */
 288         ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
 289         if (!ret) {
 290                 WARNING("%s(), can't get iobase of 0x%03x\n",
 291                         __FUNCTION__, self->io.fir_base);
 292                 err = -ENODEV;
 293                 goto out1;
 294         }
 295
 296         /* Initialize QoS for this device */
 297         irda_init_max_qos_capabilies(&self->qos);
 298
 299         /* The only value we must override it the baudrate */
 300         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 301                 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
 302
 303         self->qos.min_turn_time.bits = qos_mtt_bits;
 304         irda_qos_bits_to_value(&self->qos);
 305
 306         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 307         self->rx_buff.truesize = 14384;
 308         self->tx_buff.truesize = 14384;
 309
 310         /* Allocate memory if needed */
 311         self->rx_buff.head =
 312                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
 313                                    &self->rx_buff_dma, GFP_KERNEL);
 314         if (self->rx_buff.head == NULL) {
 315                 err = -ENOMEM;
 316                 goto out2;
 317
 318         }
 319         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 320
 321         self->tx_buff.head =
 322                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
 323                                    &self->tx_buff_dma, GFP_KERNEL);
 324         if (self->tx_buff.head == NULL) {
 325                 err = -ENOMEM;
 326                 goto out3;
 327         }
 328         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 329
 330         self->rx_buff.in_frame = FALSE;
 331         self->rx_buff.state = OUTSIDE_FRAME;
 332         self->tx_buff.data = self->tx_buff.head;
 333         self->rx_buff.data = self->rx_buff.head;
 334
 335         /* Reset Tx queue info */
 336         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 337         self->tx_fifo.tail = self->tx_buff.head;
 338
 339         /* Override the network functions we need to use */
 340         SET_MODULE_OWNER(dev);
 341         dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
 342         dev->open            = nsc_ircc_net_open;
 343         dev->stop            = nsc_ircc_net_close;
 344         dev->do_ioctl        = nsc_ircc_net_ioctl;
 345         dev->get_stats       = nsc_ircc_net_get_stats;
 346
 347         err = register_netdev(dev);
 348         if (err) {
 349                 ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
 350                 goto out4;
 351         }
 352         MESSAGE("IrDA: Registered device %s\n", dev->name);
 353
 354         /* Check if user has supplied the dongle id or not */
 355         if (!dongle_id) {
 356                 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
 357
 358                 MESSAGE("%s, Found dongle: %s\n", driver_name,
 359                         dongle_types[dongle_id]);
 360         } else {
 361                 MESSAGE("%s, Using dongle: %s\n", driver_name,
 362                         dongle_types[dongle_id]);
 363         }
 364
 365         self->io.dongle_id = dongle_id;
 366         nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
 367
 368         pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
 369         if (pmdev)
 370                 pmdev->data = self;
 371
 372         return 0;
 373  out4:
 374         dma_free_coherent(NULL, self->tx_buff.truesize,
 375                           self->tx_buff.head, self->tx_buff_dma);
 376  out3:
 377         dma_free_coherent(NULL, self->rx_buff.truesize,
 378                           self->rx_buff.head, self->rx_buff_dma);
 379  out2:
 380         release_region(self->io.fir_base, self->io.fir_ext);
 381  out1:
 382         free_netdev(dev);
 383         dev_self[i] = NULL;
 384         return err;
 385 }
 386
 387 /*
 388  * Function nsc_ircc_close (self)
 389  *
 390  *    Close driver instance
 391  *
 392  */
 393 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
 394 {
 395         int iobase;
 396
 397         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
 398
 399         ASSERT(self != NULL, return -1;);
 400
 401         iobase = self->io.fir_base;
 402
 403         /* Remove netdevice */
 404         unregister_netdev(self->netdev);
 405
 406         /* Release the PORT that this driver is using */
 407         IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
 408                    __FUNCTION__, self->io.fir_base);
 409         release_region(self->io.fir_base, self->io.fir_ext);
 410
 411         if (self->tx_buff.head)
 412                 dma_free_coherent(NULL, self->tx_buff.truesize,
 413                                   self->tx_buff.head, self->tx_buff_dma);
 414
 415         if (self->rx_buff.head)
 416                 dma_free_coherent(NULL, self->rx_buff.truesize,
 417                                   self->rx_buff.head, self->rx_buff_dma);
 418
 419         dev_self[self->index] = NULL;
 420         free_netdev(self->netdev);
 421
 422         return 0;
 423 }
 424
 425 /*
 426  * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
 427  *
 428  *    Initialize the NSC '108 chip
 429  *
 430  */
 431 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
 432 {
 433         int cfg_base = info->cfg_base;
 434         __u8 temp=0;
 435
 436         outb(2, cfg_base);      /* Mode Control Register (MCTL) */
 437         outb(0x00, cfg_base+1); /* Disable device */
 438
 439         /* Base Address and Interrupt Control Register (BAIC) */
 440         outb(CFG_108_BAIC, cfg_base);
 441         switch (info->fir_base) {
 442         case 0x3e8: outb(0x14, cfg_base+1); break;
 443         case 0x2e8: outb(0x15, cfg_base+1); break;
 444         case 0x3f8: outb(0x16, cfg_base+1); break;
 445         case 0x2f8: outb(0x17, cfg_base+1); break;
 446         default: ERROR("%s(), invalid base_address", __FUNCTION__);
 447         }
 448
 449         /* Control Signal Routing Register (CSRT) */
 450         switch (info->irq) {
 451         case 3:  temp = 0x01; break;
 452         case 4:  temp = 0x02; break;
 453         case 5:  temp = 0x03; break;
 454         case 7:  temp = 0x04; break;
 455         case 9:  temp = 0x05; break;
 456         case 11: temp = 0x06; break;
 457         case 15: temp = 0x07; break;
 458         default: ERROR("%s(), invalid irq", __FUNCTION__);
 459         }
 460         outb(CFG_108_CSRT, cfg_base);
 461
 462         switch (info->dma) {
 463         case 0: outb(0x08+temp, cfg_base+1); break;
 464         case 1: outb(0x10+temp, cfg_base+1); break;
 465         case 3: outb(0x18+temp, cfg_base+1); break;
 466         default: ERROR("%s(), invalid dma", __FUNCTION__);
 467         }
 468
 469         outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
 470         outb(0x03, cfg_base+1); /* Enable device */
 471
 472         return 0;
 473 }
 474
 475 /*
 476  * Function nsc_ircc_probe_108 (chip, info)
 477  *
 478  *
 479  *
 480  */
 481 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
 482 {
 483         int cfg_base = info->cfg_base;
 484         int reg;
 485
 486         /* Read address and interrupt control register (BAIC) */
 487         outb(CFG_108_BAIC, cfg_base);
 488         reg = inb(cfg_base+1);
 489
 490         switch (reg & 0x03) {
 491         case 0:
 492                 info->fir_base = 0x3e8;
 493                 break;
 494         case 1:
 495                 info->fir_base = 0x2e8;
 496                 break;
 497         case 2:
 498                 info->fir_base = 0x3f8;
 499                 break;
 500         case 3:
 501                 info->fir_base = 0x2f8;
 502                 break;
 503         }
 504         info->sir_base = info->fir_base;
 505         IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
 506                    info->fir_base);
 507
 508         /* Read control signals routing register (CSRT) */
 509         outb(CFG_108_CSRT, cfg_base);
 510         reg = inb(cfg_base+1);
 511
 512         switch (reg & 0x07) {
 513         case 0:
 514                 info->irq = -1;
 515                 break;
 516         case 1:
 517                 info->irq = 3;
 518                 break;
 519         case 2:
 520                 info->irq = 4;
 521                 break;
 522         case 3:
 523                 info->irq = 5;
 524                 break;
 525         case 4:
 526                 info->irq = 7;
 527                 break;
 528         case 5:
 529                 info->irq = 9;
 530                 break;
 531         case 6:
 532                 info->irq = 11;
 533                 break;
 534         case 7:
 535                 info->irq = 15;
 536                 break;
 537         }
 538         IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
 539
 540         /* Currently we only read Rx DMA but it will also be used for Tx */
 541         switch ((reg >> 3) & 0x03) {
 542         case 0:
 543                 info->dma = -1;
 544                 break;
 545         case 1:
 546                 info->dma = 0;
 547                 break;
 548         case 2:
 549                 info->dma = 1;
 550                 break;
 551         case 3:
 552                 info->dma = 3;
 553                 break;
 554         }
 555         IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
 556
 557         /* Read mode control register (MCTL) */
 558         outb(CFG_108_MCTL, cfg_base);
 559         reg = inb(cfg_base+1);
 560
 561         info->enabled = reg & 0x01;
 562         info->suspended = !((reg >> 1) & 0x01);
 563
 564         return 0;
 565 }
 566
 567 /*
 568  * Function nsc_ircc_init_338 (chip, info)
 569  *
 570  *    Initialize the NSC '338 chip. Remember that the 87338 needs two
 571  *    consecutive writes to the data registers while CPU interrupts are
 572  *    disabled. The 97338 does not require this, but shouldn't be any
 573  *    harm if we do it anyway.
 574  */
 575 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
 576 {
 577         /* No init yet */
 578
 579         return 0;
 580 }
 581
 582 /*
 583  * Function nsc_ircc_probe_338 (chip, info)
 584  *
 585  *
 586  *
 587  */
 588 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
 589 {
 590         int cfg_base = info->cfg_base;
 591         int reg, com = 0;
 592         int pnp;
 593
 594         /* Read funtion enable register (FER) */
 595         outb(CFG_338_FER, cfg_base);
 596         reg = inb(cfg_base+1);
 597
 598         info->enabled = (reg >> 2) & 0x01;
 599
 600         /* Check if we are in Legacy or PnP mode */
 601         outb(CFG_338_PNP0, cfg_base);
 602         reg = inb(cfg_base+1);
 603
 604         pnp = (reg >> 3) & 0x01;
 605         if (pnp) {
 606                 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
 607                 outb(0x46, cfg_base);
 608                 reg = (inb(cfg_base+1) & 0xfe) << 2;
 609
 610                 outb(0x47, cfg_base);
 611                 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
 612
 613                 info->fir_base = reg;
 614         } else {
 615                 /* Read function address register (FAR) */
 616                 outb(CFG_338_FAR, cfg_base);
 617                 reg = inb(cfg_base+1);
 618
 619                 switch ((reg >> 4) & 0x03) {
 620                 case 0:
 621                         info->fir_base = 0x3f8;
 622                         break;
 623                 case 1:
 624                         info->fir_base = 0x2f8;
 625                         break;
 626                 case 2:
 627                         com = 3;
 628                         break;
 629                 case 3:
 630                         com = 4;
 631                         break;
 632                 }
 633
 634                 if (com) {
 635                         switch ((reg >> 6) & 0x03) {
 636                         case 0:
 637                                 if (com == 3)
 638                                         info->fir_base = 0x3e8;
 639                                 else
 640                                         info->fir_base = 0x2e8;
 641                                 break;
 642                         case 1:
 643                                 if (com == 3)
 644                                         info->fir_base = 0x338;
 645                                 else
 646                                         info->fir_base = 0x238;
 647                                 break;
 648                         case 2:
 649                                 if (com == 3)
 650                                         info->fir_base = 0x2e8;
 651                                 else
 652                                         info->fir_base = 0x2e0;
 653                                 break;
 654                         case 3:
 655                                 if (com == 3)
 656                                         info->fir_base = 0x220;
 657                                 else
 658                                         info->fir_base = 0x228;
 659                                 break;
 660                         }
 661                 }
 662         }
 663         info->sir_base = info->fir_base;
 664
 665         /* Read PnP register 1 (PNP1) */
 666         outb(CFG_338_PNP1, cfg_base);
 667         reg = inb(cfg_base+1);
 668
 669         info->irq = reg >> 4;
 670
 671         /* Read PnP register 3 (PNP3) */
 672         outb(CFG_338_PNP3, cfg_base);
 673         reg = inb(cfg_base+1);
 674
 675         info->dma = (reg & 0x07) - 1;
 676
 677         /* Read power and test register (PTR) */
 678         outb(CFG_338_PTR, cfg_base);
 679         reg = inb(cfg_base+1);
 680
 681         info->suspended = reg & 0x01;
 682
 683         return 0;
 684 }
 685
 686
 687 /*
 688  * Function nsc_ircc_init_39x (chip, info)
 689  *
 690  *    Now that we know it's a '39x (see probe below), we need to
 691  *    configure it so we can use it.
 692  *
 693  * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
 694  * the configuration of the different functionality (serial, parallel,
 695  * floppy...) are each in a different bank (Logical Device Number).
 696  * The base address, irq and dma configuration registers are common
 697  * to all functionalities (index 0x30 to 0x7F).
 698  * There is only one configuration register specific to the
 699  * serial port, CFG_39X_SPC.
 700  * JeanII
 701  *
 702  * Note : this code was written by Jan Frey <janfrey@web.de>
 703  */
 704 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
 705 {
 706         int cfg_base = info->cfg_base;
 707         int enabled;
 708
 709         /* User is shure about his config... accept it. */
 710         IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
 711                    "io=0x%04x, irq=%d, dma=%d\n",
 712                    __FUNCTION__, info->fir_base, info->irq, info->dma);
 713
 714         /* Access bank for SP2 */
 715         outb(CFG_39X_LDN, cfg_base);
 716         outb(0x02, cfg_base+1);
 717
 718         /* Configure SP2 */
 719
 720         /* We want to enable the device if not enabled */
 721         outb(CFG_39X_ACT, cfg_base);
 722         enabled = inb(cfg_base+1) & 0x01;
 723
 724         if (!enabled) {
 725                 /* Enable the device */
 726                 outb(CFG_39X_SIOCF1, cfg_base);
 727                 outb(0x01, cfg_base+1);
 728                 /* May want to update info->enabled. Jean II */
 729         }
 730
 731         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 732          * power mode (wake up from sleep mode) (bit 1) */
 733         outb(CFG_39X_SPC, cfg_base);
 734         outb(0x82, cfg_base+1);
 735
 736         return 0;
 737 }
 738
 739 /*
 740  * Function nsc_ircc_probe_39x (chip, info)
 741  *
 742  *    Test if we really have a '39x chip at the given address
 743  *
 744  * Note : this code was written by Jan Frey <janfrey@web.de>
 745  */
 746 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
 747 {
 748         int cfg_base = info->cfg_base;
 749         int reg1, reg2, irq, irqt, dma1, dma2;
 750         int enabled, susp;
 751
 752         IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
 753                    __FUNCTION__, cfg_base);
 754
 755         /* This function should be executed with irq off to avoid
 756          * another driver messing with the Super I/O bank - Jean II */
 757
 758         /* Access bank for SP2 */
 759         outb(CFG_39X_LDN, cfg_base);
 760         outb(0x02, cfg_base+1);
 761
 762         /* Read infos about SP2 ; store in info struct */
 763         outb(CFG_39X_BASEH, cfg_base);
 764         reg1 = inb(cfg_base+1);
 765         outb(CFG_39X_BASEL, cfg_base);
 766         reg2 = inb(cfg_base+1);
 767         info->fir_base = (reg1 << 8) | reg2;
 768
 769         outb(CFG_39X_IRQNUM, cfg_base);
 770         irq = inb(cfg_base+1);
 771         outb(CFG_39X_IRQSEL, cfg_base);
 772         irqt = inb(cfg_base+1);
 773         info->irq = irq;
 774
 775         outb(CFG_39X_DMA0, cfg_base);
 776         dma1 = inb(cfg_base+1);
 777         outb(CFG_39X_DMA1, cfg_base);
 778         dma2 = inb(cfg_base+1);
 779         info->dma = dma1 -1;
 780
 781         outb(CFG_39X_ACT, cfg_base);
 782         info->enabled = enabled = inb(cfg_base+1) & 0x01;
 783
 784         outb(CFG_39X_SPC, cfg_base);
 785         susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
 786
 787         IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
 788
 789         /* Configure SP2 */
 790
 791         /* We want to enable the device if not enabled */
 792         outb(CFG_39X_ACT, cfg_base);
 793         enabled = inb(cfg_base+1) & 0x01;
 794
 795         if (!enabled) {
 796                 /* Enable the device */
 797                 outb(CFG_39X_SIOCF1, cfg_base);
 798                 outb(0x01, cfg_base+1);
 799                 /* May want to update info->enabled. Jean II */
 800         }
 801
 802         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 803          * power mode (wake up from sleep mode) (bit 1) */
 804         outb(CFG_39X_SPC, cfg_base);
 805         outb(0x82, cfg_base+1);
 806
 807         return 0;
 808 }
 809
 810 /*
 811  * Function nsc_ircc_setup (info)
 812  *
 813  *    Returns non-negative on success.
 814  *
 815  */
 816 static int nsc_ircc_setup(chipio_t *info)
 817 {
 818         int version;
 819         int iobase = info->fir_base;
 820
 821         /* Read the Module ID */
 822         switch_bank(iobase, BANK3);
 823         version = inb(iobase+MID);
 824
 825         IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
 826                    __FUNCTION__, driver_name, version);
 827
 828         /* Should be 0x2? */
 829         if (0x20 != (version & 0xf0)) {
 830                 ERROR("%s, Wrong chip version %02x\n", driver_name, version);
 831                 return -1;
 832         }
 833
 834         /* Switch to advanced mode */
 835         switch_bank(iobase, BANK2);
 836         outb(ECR1_EXT_SL, iobase+ECR1);
 837         switch_bank(iobase, BANK0);
 838
 839         /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
 840         switch_bank(iobase, BANK0);
 841         outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
 842
 843         outb(0x03, iobase+LCR);         /* 8 bit word length */
 844         outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
 845
 846         /* Set FIFO size to 32 */
 847         switch_bank(iobase, BANK2);
 848         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
 849
 850         /* IRCR2: FEND_MD is not set */
 851         switch_bank(iobase, BANK5);
 852         outb(0x02, iobase+4);
 853
 854         /* Make sure that some defaults are OK */
 855         switch_bank(iobase, BANK6);
 856         outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
 857         outb(0x0a, iobase+1); /* Set MIR pulse width */
 858         outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
 859         outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
 860
 861         /* Enable receive interrupts */
 862         switch_bank(iobase, BANK0);
 863         outb(IER_RXHDL_IE, iobase+IER);
 864
 865         return 0;
 866 }
 867
 868 /*
 869  * Function nsc_ircc_read_dongle_id (void)
 870  *
 871  * Try to read dongle indentification. This procedure needs to be executed
 872  * once after power-on/reset. It also needs to be used whenever you suspect
 873  * that the user may have plugged/unplugged the IrDA Dongle.
 874  */
 875 static int nsc_ircc_read_dongle_id (int iobase)
 876 {
 877         int dongle_id;
 878         __u8 bank;
 879
 880         bank = inb(iobase+BSR);
 881
 882         /* Select Bank 7 */
 883         switch_bank(iobase, BANK7);
 884
 885         /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
 886         outb(0x00, iobase+7);
 887
 888         /* ID0, 1, and 2 are pulled up/down very slowly */
 889         udelay(50);
 890
 891         /* IRCFG1: read the ID bits */
 892         dongle_id = inb(iobase+4) & 0x0f;
 893
 894 #ifdef BROKEN_DONGLE_ID
 895         if (dongle_id == 0x0a)
 896                 dongle_id = 0x09;
 897 #endif
 898         /* Go back to  bank 0 before returning */
 899         switch_bank(iobase, BANK0);
 900
 901         outb(bank, iobase+BSR);
 902
 903         return dongle_id;
 904 }
 905
 906 /*
 907  * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
 908  *
 909  *     This function initializes the dongle for the transceiver that is
 910  *     used. This procedure needs to be executed once after
 911  *     power-on/reset. It also needs to be used whenever you suspect that
 912  *     the dongle is changed.
 913  */
 914 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
 915 {
 916         int bank;
 917
 918         /* Save current bank */
 919         bank = inb(iobase+BSR);
 920
 921         /* Select Bank 7 */
 922         switch_bank(iobase, BANK7);
 923
 924         /* IRCFG4: set according to dongle_id */
 925         switch (dongle_id) {
 926         case 0x00: /* same as */
 927         case 0x01: /* Differential serial interface */
 928                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 929                            __FUNCTION__, dongle_types[dongle_id]);
 930                 break;
 931         case 0x02: /* same as */
 932         case 0x03: /* Reserved */
 933                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 934                            __FUNCTION__, dongle_types[dongle_id]);
 935                 break;
 936         case 0x04: /* Sharp RY5HD01 */
 937                 break;
 938         case 0x05: /* Reserved, but this is what the Thinkpad reports */
 939                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 940                            __FUNCTION__, dongle_types[dongle_id]);
 941                 break;
 942         case 0x06: /* Single-ended serial interface */
 943                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 944                            __FUNCTION__, dongle_types[dongle_id]);
 945                 break;
 946         case 0x07: /* Consumer-IR only */
 947                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
 948                            __FUNCTION__, dongle_types[dongle_id]);
 949                 break;
 950         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
 951                 IRDA_DEBUG(0, "%s(), %s\n",
 952                            __FUNCTION__, dongle_types[dongle_id]);
 953                 break;
 954         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
 955                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
 956                 break;
 957         case 0x0A: /* same as */
 958         case 0x0B: /* Reserved */
 959                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
 960                            __FUNCTION__, dongle_types[dongle_id]);
 961                 break;
 962         case 0x0C: /* same as */
 963         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
 964                 /*
 965                  * Set irsl0 as input, irsl[1-2] as output, and separate
 966                  * inputs are used for SIR and MIR/FIR
 967                  */
 968                 outb(0x48, iobase+7);
 969                 break;
 970         case 0x0E: /* Supports SIR Mode only */
 971                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
 972                 break;
 973         case 0x0F: /* No dongle connected */
 974                 IRDA_DEBUG(0, "%s(), %s\n",
 975                            __FUNCTION__, dongle_types[dongle_id]);
 976
 977                 switch_bank(iobase, BANK0);
 978                 outb(0x62, iobase+MCR);
 979                 break;
 980         default:
 981                 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
 982                            __FUNCTION__, dongle_id);
 983         }
 984
 985         /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
 986         outb(0x00, iobase+4);
 987
 988         /* Restore bank register */
 989         outb(bank, iobase+BSR);
 990
 991 } /* set_up_dongle_interface */
 992
 993 /*
 994  * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
 995  *
 996  *    Change speed of the attach dongle
 997  *
 998  */
 999 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1000 {
1001         __u8 bank;
1002
1003         /* Save current bank */
1004         bank = inb(iobase+BSR);
1005
1006         /* Select Bank 7 */
1007         switch_bank(iobase, BANK7);
1008
1009         /* IRCFG1: set according to dongle_id */
1010         switch (dongle_id) {
1011         case 0x00: /* same as */
1012         case 0x01: /* Differential serial interface */
1013                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1014                            __FUNCTION__, dongle_types[dongle_id]);
1015                 break;
1016         case 0x02: /* same as */
1017         case 0x03: /* Reserved */
1018                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1019                            __FUNCTION__, dongle_types[dongle_id]);
1020                 break;
1021         case 0x04: /* Sharp RY5HD01 */
1022                 break;
1023         case 0x05: /* Reserved */
1024                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1025                            __FUNCTION__, dongle_types[dongle_id]);
1026                 break;
1027         case 0x06: /* Single-ended serial interface */
1028                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1029                            __FUNCTION__, dongle_types[dongle_id]);
1030                 break;
1031         case 0x07: /* Consumer-IR only */
1032                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1033                            __FUNCTION__, dongle_types[dongle_id]);
1034                 break;
1035         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1036                 IRDA_DEBUG(0, "%s(), %s\n",
1037                            __FUNCTION__, dongle_types[dongle_id]);
1038                 outb(0x00, iobase+4);
1039                 if (speed > 115200)
1040                         outb(0x01, iobase+4);
1041                 break;
1042         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1043                 outb(0x01, iobase+4);
1044
1045                 if (speed == 4000000) {
1046                         /* There was a cli() there, but we now are already
1047                          * under spin_lock_irqsave() - JeanII */
1048                         outb(0x81, iobase+4);
1049                         outb(0x80, iobase+4);
1050                 } else
1051                         outb(0x00, iobase+4);
1052                 break;
1053         case 0x0A: /* same as */
1054         case 0x0B: /* Reserved */
1055                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1056                            __FUNCTION__, dongle_types[dongle_id]);
1057                 break;
1058         case 0x0C: /* same as */
1059         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1060                 break;
1061         case 0x0E: /* Supports SIR Mode only */
1062                 break;
1063         case 0x0F: /* No dongle connected */
1064                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1065                            __FUNCTION__, dongle_types[dongle_id]);
1066
1067                 switch_bank(iobase, BANK0);
1068                 outb(0x62, iobase+MCR);
1069                 break;
1070         default:
1071                 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1072         }
1073         /* Restore bank register */
1074         outb(bank, iobase+BSR);
1075 }
1076
1077 /*
1078  * Function nsc_ircc_change_speed (self, baud)
1079  *
1080  *    Change the speed of the device
1081  *
1082  * This function *must* be called with irq off and spin-lock.
1083  */
1084 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1085 {
1086         struct net_device *dev = self->netdev;
1087         __u8 mcr = MCR_SIR;
1088         int iobase;
1089         __u8 bank;
1090         __u8 ier;                  /* Interrupt enable register */
1091
1092         IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1093
1094         ASSERT(self != NULL, return 0;);
1095
1096         iobase = self->io.fir_base;
1097
1098         /* Update accounting for new speed */
1099         self->io.speed = speed;
1100
1101         /* Save current bank */
1102         bank = inb(iobase+BSR);
1103
1104         /* Disable interrupts */
1105         switch_bank(iobase, BANK0);
1106         outb(0, iobase+IER);
1107
1108         /* Select Bank 2 */
1109         switch_bank(iobase, BANK2);
1110
1111         outb(0x00, iobase+BGDH);
1112         switch (speed) {
1113         case 9600:   outb(0x0c, iobase+BGDL); break;
1114         case 19200:  outb(0x06, iobase+BGDL); break;
1115         case 38400:  outb(0x03, iobase+BGDL); break;
1116         case 57600:  outb(0x02, iobase+BGDL); break;
1117         case 115200: outb(0x01, iobase+BGDL); break;
1118         case 576000:
1119                 switch_bank(iobase, BANK5);
1120
1121                 /* IRCR2: MDRS is set */
1122                 outb(inb(iobase+4) | 0x04, iobase+4);
1123
1124                 mcr = MCR_MIR;
1125                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1126                 break;
1127         case 1152000:
1128                 mcr = MCR_MIR;
1129                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1130                 break;
1131         case 4000000:
1132                 mcr = MCR_FIR;
1133                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1134                 break;
1135         default:
1136                 mcr = MCR_FIR;
1137                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1138                            __FUNCTION__, speed);
1139                 break;
1140         }
1141
1142         /* Set appropriate speed mode */
1143         switch_bank(iobase, BANK0);
1144         outb(mcr | MCR_TX_DFR, iobase+MCR);
1145
1146         /* Give some hits to the transceiver */
1147         nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1148
1149         /* Set FIFO threshold to TX17, RX16 */
1150         switch_bank(iobase, BANK0);
1151         outb(0x00, iobase+FCR);
1152         outb(FCR_FIFO_EN, iobase+FCR);
1153         outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1154              FCR_TXTH|     /* Set Tx FIFO threshold */
1155              FCR_TXSR|     /* Reset Tx FIFO */
1156              FCR_RXSR|     /* Reset Rx FIFO */
1157              FCR_FIFO_EN,  /* Enable FIFOs */
1158              iobase+FCR);
1159
1160         /* Set FIFO size to 32 */
1161         switch_bank(iobase, BANK2);
1162         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1163
1164         /* Enable some interrupts so we can receive frames */
1165         switch_bank(iobase, BANK0);
1166         if (speed > 115200) {
1167                 /* Install FIR xmit handler */
1168                 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1169                 ier = IER_SFIF_IE;
1170                 nsc_ircc_dma_receive(self);
1171         } else {
1172                 /* Install SIR xmit handler */
1173                 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1174                 ier = IER_RXHDL_IE;
1175         }
1176         /* Set our current interrupt mask */
1177         outb(ier, iobase+IER);
1178
1179         /* Restore BSR */
1180         outb(bank, iobase+BSR);
1181
1182         /* Make sure interrupt handlers keep the proper interrupt mask */
1183         return(ier);
1184 }
1185
1186 /*
1187  * Function nsc_ircc_hard_xmit (skb, dev)
1188  *
1189  *    Transmit the frame!
1190  *
1191  */
1192 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1193 {
1194         struct nsc_ircc_cb *self;
1195         unsigned long flags;
1196         int iobase;
1197         __s32 speed;
1198         __u8 bank;
1199
1200         self = (struct nsc_ircc_cb *) dev->priv;
1201
1202         ASSERT(self != NULL, return 0;);
1203
1204         iobase = self->io.fir_base;
1205
1206         netif_stop_queue(dev);
1207
1208         /* Make sure tests *& speed change are atomic */
1209         spin_lock_irqsave(&self->lock, flags);
1210
1211         /* Check if we need to change the speed */
1212         speed = irda_get_next_speed(skb);
1213         if ((speed != self->io.speed) && (speed != -1)) {
1214                 /* Check for empty frame. */
1215                 if (!skb->len) {
1216                         /* If we just sent a frame, we get called before
1217                          * the last bytes get out (because of the SIR FIFO).
1218                          * If this is the case, let interrupt handler change
1219                          * the speed itself... Jean II */
1220                         if (self->io.direction == IO_RECV) {
1221                                 nsc_ircc_change_speed(self, speed);
1222                                 /* TODO : For SIR->SIR, the next packet
1223                                  * may get corrupted - Jean II */
1224                                 netif_wake_queue(dev);
1225                         } else {
1226                                 self->new_speed = speed;
1227                                 /* Queue will be restarted after speed change
1228                                  * to make sure packets gets through the
1229                                  * proper xmit handler - Jean II */
1230                         }
1231                         dev->trans_start = jiffies;
1232                         spin_unlock_irqrestore(&self->lock, flags);
1233                         dev_kfree_skb(skb);
1234                         return 0;
1235                 } else
1236                         self->new_speed = speed;
1237         }
1238
1239         /* Save current bank */
1240         bank = inb(iobase+BSR);
1241
1242         self->tx_buff.data = self->tx_buff.head;
1243
1244         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1245                                            self->tx_buff.truesize);
1246
1247         self->stats.tx_bytes += self->tx_buff.len;
1248
1249         /* Add interrupt on tx low level (will fire immediately) */
1250         switch_bank(iobase, BANK0);
1251         outb(IER_TXLDL_IE, iobase+IER);
1252
1253         /* Restore bank register */
1254         outb(bank, iobase+BSR);
1255
1256         dev->trans_start = jiffies;
1257         spin_unlock_irqrestore(&self->lock, flags);
1258
1259         dev_kfree_skb(skb);
1260
1261         return 0;
1262 }
1263
1264 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1265 {
1266         struct nsc_ircc_cb *self;
1267         unsigned long flags;
1268         int iobase;
1269         __s32 speed;
1270         __u8 bank;
1271         int mtt, diff;
1272
1273         self = (struct nsc_ircc_cb *) dev->priv;
1274         iobase = self->io.fir_base;
1275
1276         netif_stop_queue(dev);
1277
1278         /* Make sure tests *& speed change are atomic */
1279         spin_lock_irqsave(&self->lock, flags);
1280
1281         /* Check if we need to change the speed */
1282         speed = irda_get_next_speed(skb);
1283         if ((speed != self->io.speed) && (speed != -1)) {
1284                 /* Check for empty frame. */
1285                 if (!skb->len) {
1286                         /* If we are currently transmitting, defer to
1287                          * interrupt handler. - Jean II */
1288                         if(self->tx_fifo.len == 0) {
1289                                 nsc_ircc_change_speed(self, speed);
1290                                 netif_wake_queue(dev);
1291                         } else {
1292                                 self->new_speed = speed;
1293                                 /* Keep queue stopped :
1294                                  * the speed change operation may change the
1295                                  * xmit handler, and we want to make sure
1296                                  * the next packet get through the proper
1297                                  * Tx path, so block the Tx queue until
1298                                  * the speed change has been done.
1299                                  * Jean II */
1300                         }
1301                         dev->trans_start = jiffies;
1302                         spin_unlock_irqrestore(&self->lock, flags);
1303                         dev_kfree_skb(skb);
1304                         return 0;
1305                 } else {
1306                         /* Change speed after current frame */
1307                         self->new_speed = speed;
1308                 }
1309         }
1310
1311         /* Save current bank */
1312         bank = inb(iobase+BSR);
1313
1314         /* Register and copy this frame to DMA memory */
1315         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1316         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1317         self->tx_fifo.tail += skb->len;
1318
1319         self->stats.tx_bytes += skb->len;
1320
1321         memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1322                skb->len);
1323
1324         self->tx_fifo.len++;
1325         self->tx_fifo.free++;
1326
1327         /* Start transmit only if there is currently no transmit going on */
1328         if (self->tx_fifo.len == 1) {
1329                 /* Check if we must wait the min turn time or not */
1330                 mtt = irda_get_mtt(skb);
1331                 if (mtt) {
1332                         /* Check how much time we have used already */
1333                         do_gettimeofday(&self->now);
1334                         diff = self->now.tv_usec - self->stamp.tv_usec;
1335                         if (diff < 0)
1336                                 diff += 1000000;
1337
1338                         /* Check if the mtt is larger than the time we have
1339                          * already used by all the protocol processing
1340                          */
1341                         if (mtt > diff) {
1342                                 mtt -= diff;
1343
1344                                 /*
1345                                  * Use timer if delay larger than 125 us, and
1346                                  * use udelay for smaller values which should
1347                                  * be acceptable
1348                                  */
1349                                 if (mtt > 125) {
1350                                         /* Adjust for timer resolution */
1351                                         mtt = mtt / 125;
1352
1353                                         /* Setup timer */
1354                                         switch_bank(iobase, BANK4);
1355                                         outb(mtt & 0xff, iobase+TMRL);
1356                                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
1357
1358                                         /* Start timer */
1359                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1360                                         self->io.direction = IO_XMIT;
1361
1362                                         /* Enable timer interrupt */
1363                                         switch_bank(iobase, BANK0);
1364                                         outb(IER_TMR_IE, iobase+IER);
1365
1366                                         /* Timer will take care of the rest */
1367                                         goto out;
1368                                 } else
1369                                         udelay(mtt);
1370                         }
1371                 }
1372                 /* Enable DMA interrupt */
1373                 switch_bank(iobase, BANK0);
1374                 outb(IER_DMA_IE, iobase+IER);
1375
1376                 /* Transmit frame */
1377                 nsc_ircc_dma_xmit(self, iobase);
1378         }
1379  out:
1380         /* Not busy transmitting anymore if window is not full,
1381          * and if we don't need to change speed */
1382         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1383                 netif_wake_queue(self->netdev);
1384
1385         /* Restore bank register */
1386         outb(bank, iobase+BSR);
1387
1388         dev->trans_start = jiffies;
1389         spin_unlock_irqrestore(&self->lock, flags);
1390         dev_kfree_skb(skb);
1391
1392         return 0;
1393 }
1394
1395 /*
1396  * Function nsc_ircc_dma_xmit (self, iobase)
1397  *
1398  *    Transmit data using DMA
1399  *
1400  */
1401 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1402 {
1403         int bsr;
1404
1405         /* Save current bank */
1406         bsr = inb(iobase+BSR);
1407
1408         /* Disable DMA */
1409         switch_bank(iobase, BANK0);
1410         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1411
1412         self->io.direction = IO_XMIT;
1413
1414         /* Choose transmit DMA channel  */
1415         switch_bank(iobase, BANK2);
1416         outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1417
1418         irda_setup_dma(self->io.dma,
1419                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1420                         self->tx_buff.head) + self->tx_buff_dma,
1421                        self->tx_fifo.queue[self->tx_fifo.ptr].len,
1422                        DMA_TX_MODE);
1423
1424         /* Enable DMA and SIR interaction pulse */
1425         switch_bank(iobase, BANK0);
1426         outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1427
1428         /* Restore bank register */
1429         outb(bsr, iobase+BSR);
1430 }
1431
1432 /*
1433  * Function nsc_ircc_pio_xmit (self, iobase)
1434  *
1435  *    Transmit data using PIO. Returns the number of bytes that actually
1436  *    got transferred
1437  *
1438  */
1439 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1440 {
1441         int actual = 0;
1442         __u8 bank;
1443
1444         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1445
1446         /* Save current bank */
1447         bank = inb(iobase+BSR);
1448
1449         switch_bank(iobase, BANK0);
1450         if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1451                 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1452                            __FUNCTION__);
1453
1454                 /* FIFO may still be filled to the Tx interrupt threshold */
1455                 fifo_size -= 17;
1456         }
1457
1458         /* Fill FIFO with current frame */
1459         while ((fifo_size-- > 0) && (actual < len)) {
1460                 /* Transmit next byte */
1461                 outb(buf[actual++], iobase+TXD);
1462         }
1463
1464         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1465                    __FUNCTION__, fifo_size, actual, len);
1466
1467         /* Restore bank */
1468         outb(bank, iobase+BSR);
1469
1470         return actual;
1471 }
1472
1473 /*
1474  * Function nsc_ircc_dma_xmit_complete (self)
1475  *
1476  *    The transfer of a frame in finished. This function will only be called
1477  *    by the interrupt handler
1478  *
1479  */
1480 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1481 {
1482         int iobase;
1483         __u8 bank;
1484         int ret = TRUE;
1485
1486         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1487
1488         iobase = self->io.fir_base;
1489
1490         /* Save current bank */
1491         bank = inb(iobase+BSR);
1492
1493         /* Disable DMA */
1494         switch_bank(iobase, BANK0);
1495         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1496
1497         /* Check for underrrun! */
1498         if (inb(iobase+ASCR) & ASCR_TXUR) {
1499                 self->stats.tx_errors++;
1500                 self->stats.tx_fifo_errors++;
1501
1502                 /* Clear bit, by writing 1 into it */
1503                 outb(ASCR_TXUR, iobase+ASCR);
1504         } else {
1505                 self->stats.tx_packets++;
1506         }
1507
1508         /* Finished with this frame, so prepare for next */
1509         self->tx_fifo.ptr++;
1510         self->tx_fifo.len--;
1511
1512         /* Any frames to be sent back-to-back? */
1513         if (self->tx_fifo.len) {
1514                 nsc_ircc_dma_xmit(self, iobase);
1515
1516                 /* Not finished yet! */
1517                 ret = FALSE;
1518         } else {
1519                 /* Reset Tx FIFO info */
1520                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1521                 self->tx_fifo.tail = self->tx_buff.head;
1522         }
1523
1524         /* Make sure we have room for more frames and
1525          * that we don't need to change speed */
1526         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1527                 /* Not busy transmitting anymore */
1528                 /* Tell the network layer, that we can accept more frames */
1529                 netif_wake_queue(self->netdev);
1530         }
1531
1532         /* Restore bank */
1533         outb(bank, iobase+BSR);
1534
1535         return ret;
1536 }
1537
1538 /*
1539  * Function nsc_ircc_dma_receive (self)
1540  *
1541  *    Get ready for receiving a frame. The device will initiate a DMA
1542  *    if it starts to receive a frame.
1543  *
1544  */
1545 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1546 {
1547         int iobase;
1548         __u8 bsr;
1549
1550         iobase = self->io.fir_base;
1551
1552         /* Reset Tx FIFO info */
1553         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1554         self->tx_fifo.tail = self->tx_buff.head;
1555
1556         /* Save current bank */
1557         bsr = inb(iobase+BSR);
1558
1559         /* Disable DMA */
1560         switch_bank(iobase, BANK0);
1561         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1562
1563         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1564         switch_bank(iobase, BANK2);
1565         outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1566
1567         self->io.direction = IO_RECV;
1568         self->rx_buff.data = self->rx_buff.head;
1569
1570         /* Reset Rx FIFO. This will also flush the ST_FIFO */
1571         switch_bank(iobase, BANK0);
1572         outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1573
1574         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1575         self->st_fifo.tail = self->st_fifo.head = 0;
1576
1577         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1578                        DMA_RX_MODE);
1579
1580         /* Enable DMA */
1581         switch_bank(iobase, BANK0);
1582         outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1583
1584         /* Restore bank register */
1585         outb(bsr, iobase+BSR);
1586
1587         return 0;
1588 }
1589
1590 /*
1591  * Function nsc_ircc_dma_receive_complete (self)
1592  *
1593  *    Finished with receiving frames
1594  *
1595  *
1596  */
1597 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1598 {
1599         struct st_fifo *st_fifo;
1600         struct sk_buff *skb;
1601         __u8 status;
1602         __u8 bank;
1603         int len;
1604
1605         st_fifo = &self->st_fifo;
1606
1607         /* Save current bank */
1608         bank = inb(iobase+BSR);
1609
1610         /* Read all entries in status FIFO */
1611         switch_bank(iobase, BANK5);
1612         while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1613                 /* We must empty the status FIFO no matter what */
1614                 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1615
1616                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1617                         IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1618                         continue;
1619                 }
1620
1621                 st_fifo->entries[st_fifo->tail].status = status;
1622                 st_fifo->entries[st_fifo->tail].len = len;
1623                 st_fifo->pending_bytes += len;
1624                 st_fifo->tail++;
1625                 st_fifo->len++;
1626         }
1627         /* Try to process all entries in status FIFO */
1628         while (st_fifo->len > 0) {
1629                 /* Get first entry */
1630                 status = st_fifo->entries[st_fifo->head].status;
1631                 len    = st_fifo->entries[st_fifo->head].len;
1632                 st_fifo->pending_bytes -= len;
1633                 st_fifo->head++;
1634                 st_fifo->len--;
1635
1636                 /* Check for errors */
1637                 if (status & FRM_ST_ERR_MSK) {
1638                         if (status & FRM_ST_LOST_FR) {
1639                                 /* Add number of lost frames to stats */
1640                                 self->stats.rx_errors += len;
1641                         } else {
1642                                 /* Skip frame */
1643                                 self->stats.rx_errors++;
1644
1645                                 self->rx_buff.data += len;
1646
1647                                 if (status & FRM_ST_MAX_LEN)
1648                                         self->stats.rx_length_errors++;
1649
1650                                 if (status & FRM_ST_PHY_ERR)
1651                                         self->stats.rx_frame_errors++;
1652
1653                                 if (status & FRM_ST_BAD_CRC)
1654                                         self->stats.rx_crc_errors++;
1655                         }
1656                         /* The errors below can be reported in both cases */
1657                         if (status & FRM_ST_OVR1)
1658                                 self->stats.rx_fifo_errors++;
1659
1660                         if (status & FRM_ST_OVR2)
1661                                 self->stats.rx_fifo_errors++;
1662                 } else {
1663                         /*
1664                          * First we must make sure that the frame we
1665                          * want to deliver is all in main memory. If we
1666                          * cannot tell, then we check if the Rx FIFO is
1667                          * empty. If not then we will have to take a nap
1668                          * and try again later.
1669                          */
1670                         if (st_fifo->pending_bytes < self->io.fifo_size) {
1671                                 switch_bank(iobase, BANK0);
1672                                 if (inb(iobase+LSR) & LSR_RXDA) {
1673                                         /* Put this entry back in fifo */
1674                                         st_fifo->head--;
1675                                         st_fifo->len++;
1676                                         st_fifo->pending_bytes += len;
1677                                         st_fifo->entries[st_fifo->head].status = status;
1678                                         st_fifo->entries[st_fifo->head].len = len;
1679                                         /*
1680                                          * DMA not finished yet, so try again
1681                                          * later, set timer value, resolution
1682                                          * 125 us
1683                                          */
1684                                         switch_bank(iobase, BANK4);
1685                                         outb(0x02, iobase+TMRL); /* x 125 us */
1686                                         outb(0x00, iobase+TMRH);
1687
1688                                         /* Start timer */
1689                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1690
1691                                         /* Restore bank register */
1692                                         outb(bank, iobase+BSR);
1693
1694                                         return FALSE; /* I'll be back! */
1695                                 }
1696                         }
1697
1698                         /*
1699                          * Remember the time we received this frame, so we can
1700                          * reduce the min turn time a bit since we will know
1701                          * how much time we have used for protocol processing
1702                          */
1703                         do_gettimeofday(&self->stamp);
1704
1705                         skb = dev_alloc_skb(len+1);
1706                         if (skb == NULL)  {
1707                                 WARNING("%s(), memory squeeze, "
1708                                         "dropping frame.\n", __FUNCTION__);
1709                                 self->stats.rx_dropped++;
1710
1711                                 /* Restore bank register */
1712                                 outb(bank, iobase+BSR);
1713
1714                                 return FALSE;
1715                         }
1716
1717                         /* Make sure IP header gets aligned */
1718                         skb_reserve(skb, 1);
1719
1720                         /* Copy frame without CRC */
1721                         if (self->io.speed < 4000000) {
1722                                 skb_put(skb, len-2);
1723                                 memcpy(skb->data, self->rx_buff.data, len-2);
1724                         } else {
1725                                 skb_put(skb, len-4);
1726                                 memcpy(skb->data, self->rx_buff.data, len-4);
1727                         }
1728
1729                         /* Move to next frame */
1730                         self->rx_buff.data += len;
1731                         self->stats.rx_bytes += len;
1732                         self->stats.rx_packets++;
1733
1734                         skb->dev = self->netdev;
1735                         skb->mac.raw  = skb->data;
1736                         skb->protocol = htons(ETH_P_IRDA);
1737                         netif_rx(skb);
1738                         self->netdev->last_rx = jiffies;
1739                 }
1740         }
1741         /* Restore bank register */
1742         outb(bank, iobase+BSR);
1743
1744         return TRUE;
1745 }
1746
1747 /*
1748  * Function nsc_ircc_pio_receive (self)
1749  *
1750  *    Receive all data in receiver FIFO
1751  *
1752  */
1753 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1754 {
1755         __u8 byte;
1756         int iobase;
1757
1758         iobase = self->io.fir_base;
1759
1760         /*  Receive all characters in Rx FIFO */
1761         do {
1762                 byte = inb(iobase+RXD);
1763                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1764                                   byte);
1765         } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1766 }
1767
1768 /*
1769  * Function nsc_ircc_sir_interrupt (self, eir)
1770  *
1771  *    Handle SIR interrupt
1772  *
1773  */
1774 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1775 {
1776         int actual;
1777
1778         /* Check if transmit FIFO is low on data */
1779         if (eir & EIR_TXLDL_EV) {
1780                 /* Write data left in transmit buffer */
1781                 actual = nsc_ircc_pio_write(self->io.fir_base,
1782                                            self->tx_buff.data,
1783                                            self->tx_buff.len,
1784                                            self->io.fifo_size);
1785                 self->tx_buff.data += actual;
1786                 self->tx_buff.len  -= actual;
1787
1788                 self->io.direction = IO_XMIT;
1789
1790                 /* Check if finished */
1791                 if (self->tx_buff.len > 0)
1792                         self->ier = IER_TXLDL_IE;
1793                 else {
1794
1795                         self->stats.tx_packets++;
1796                         netif_wake_queue(self->netdev);
1797                         self->ier = IER_TXEMP_IE;
1798                 }
1799
1800         }
1801         /* Check if transmission has completed */
1802         if (eir & EIR_TXEMP_EV) {
1803                 /* Turn around and get ready to receive some data */
1804                 self->io.direction = IO_RECV;
1805                 self->ier = IER_RXHDL_IE;
1806                 /* Check if we need to change the speed?
1807                  * Need to be after self->io.direction to avoid race with
1808                  * nsc_ircc_hard_xmit_sir() - Jean II */
1809                 if (self->new_speed) {
1810                         IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1811                         self->ier = nsc_ircc_change_speed(self,
1812                                                           self->new_speed);
1813                         self->new_speed = 0;
1814                         netif_wake_queue(self->netdev);
1815
1816                         /* Check if we are going to FIR */
1817                         if (self->io.speed > 115200) {
1818                                 /* No need to do anymore SIR stuff */
1819                                 return;
1820                         }
1821                 }
1822         }
1823
1824         /* Rx FIFO threshold or timeout */
1825         if (eir & EIR_RXHDL_EV) {
1826                 nsc_ircc_pio_receive(self);
1827
1828                 /* Keep receiving */
1829                 self->ier = IER_RXHDL_IE;
1830         }
1831 }
1832
1833 /*
1834  * Function nsc_ircc_fir_interrupt (self, eir)
1835  *
1836  *    Handle MIR/FIR interrupt
1837  *
1838  */
1839 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1840                                    int eir)
1841 {
1842         __u8 bank;
1843
1844         bank = inb(iobase+BSR);
1845
1846         /* Status FIFO event*/
1847         if (eir & EIR_SFIF_EV) {
1848                 /* Check if DMA has finished */
1849                 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1850                         /* Wait for next status FIFO interrupt */
1851                         self->ier = IER_SFIF_IE;
1852                 } else {
1853                         self->ier = IER_SFIF_IE | IER_TMR_IE;
1854                 }
1855         } else if (eir & EIR_TMR_EV) { /* Timer finished */
1856                 /* Disable timer */
1857                 switch_bank(iobase, BANK4);
1858                 outb(0, iobase+IRCR1);
1859
1860                 /* Clear timer event */
1861                 switch_bank(iobase, BANK0);
1862                 outb(ASCR_CTE, iobase+ASCR);
1863
1864                 /* Check if this is a Tx timer interrupt */
1865                 if (self->io.direction == IO_XMIT) {
1866                         nsc_ircc_dma_xmit(self, iobase);
1867
1868                         /* Interrupt on DMA */
1869                         self->ier = IER_DMA_IE;
1870                 } else {
1871                         /* Check (again) if DMA has finished */
1872                         if (nsc_ircc_dma_receive_complete(self, iobase)) {
1873                                 self->ier = IER_SFIF_IE;
1874                         } else {
1875                                 self->ier = IER_SFIF_IE | IER_TMR_IE;
1876                         }
1877                 }
1878         } else if (eir & EIR_DMA_EV) {
1879                 /* Finished with all transmissions? */
1880                 if (nsc_ircc_dma_xmit_complete(self)) {
1881                         if(self->new_speed != 0) {
1882                                 /* As we stop the Tx queue, the speed change
1883                                  * need to be done when the Tx fifo is
1884                                  * empty. Ask for a Tx done interrupt */
1885                                 self->ier = IER_TXEMP_IE;
1886                         } else {
1887                                 /* Check if there are more frames to be
1888                                  * transmitted */
1889                                 if (irda_device_txqueue_empty(self->netdev)) {
1890                                         /* Prepare for receive */
1891                                         nsc_ircc_dma_receive(self);
1892                                         self->ier = IER_SFIF_IE;
1893                                 } else
1894                                         WARNING("%s(), potential "
1895                                                 "Tx queue lockup !\n",
1896                                                 __FUNCTION__);
1897                         }
1898                 } else {
1899                         /*  Not finished yet, so interrupt on DMA again */
1900                         self->ier = IER_DMA_IE;
1901                 }
1902         } else if (eir & EIR_TXEMP_EV) {
1903                 /* The Tx FIFO has totally drained out, so now we can change
1904                  * the speed... - Jean II */
1905                 self->ier = nsc_ircc_change_speed(self, self->new_speed);
1906                 self->new_speed = 0;
1907                 netif_wake_queue(self->netdev);
1908                 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
1909         }
1910
1911         outb(bank, iobase+BSR);
1912 }
1913
1914 /*
1915  * Function nsc_ircc_interrupt (irq, dev_id, regs)
1916  *
1917  *    An interrupt from the chip has arrived. Time to do some work
1918  *
1919  */
1920 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id,
1921                                 struct pt_regs *regs)
1922 {
1923         struct net_device *dev = (struct net_device *) dev_id;
1924         struct nsc_ircc_cb *self;
1925         __u8 bsr, eir;
1926         int iobase;
1927
1928         if (!dev) {
1929                 WARNING("%s: irq %d for unknown device.\n", driver_name, irq);
1930                 return IRQ_NONE;
1931         }
1932         self = (struct nsc_ircc_cb *) dev->priv;
1933
1934         spin_lock(&self->lock);
1935
1936         iobase = self->io.fir_base;
1937
1938         bsr = inb(iobase+BSR);  /* Save current bank */
1939
1940         switch_bank(iobase, BANK0);
1941         self->ier = inb(iobase+IER);
1942         eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
1943
1944         outb(0, iobase+IER); /* Disable interrupts */
1945
1946         if (eir) {
1947                 /* Dispatch interrupt handler for the current speed */
1948                 if (self->io.speed > 115200)
1949                         nsc_ircc_fir_interrupt(self, iobase, eir);
1950                 else
1951                         nsc_ircc_sir_interrupt(self, eir);
1952         }
1953
1954         outb(self->ier, iobase+IER); /* Restore interrupts */
1955         outb(bsr, iobase+BSR);       /* Restore bank register */
1956
1957         spin_unlock(&self->lock);
1958         return IRQ_RETVAL(eir);
1959 }
1960
1961 /*
1962  * Function nsc_ircc_is_receiving (self)
1963  *
1964  *    Return TRUE is we are currently receiving a frame
1965  *
1966  */
1967 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
1968 {
1969         unsigned long flags;
1970         int status = FALSE;
1971         int iobase;
1972         __u8 bank;
1973
1974         ASSERT(self != NULL, return FALSE;);
1975
1976         spin_lock_irqsave(&self->lock, flags);
1977
1978         if (self->io.speed > 115200) {
1979                 iobase = self->io.fir_base;
1980
1981                 /* Check if rx FIFO is not empty */
1982                 bank = inb(iobase+BSR);
1983                 switch_bank(iobase, BANK2);
1984                 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
1985                         /* We are receiving something */
1986                         status =  TRUE;
1987                 }
1988                 outb(bank, iobase+BSR);
1989         } else
1990                 status = (self->rx_buff.state != OUTSIDE_FRAME);
1991
1992         spin_unlock_irqrestore(&self->lock, flags);
1993
1994         return status;
1995 }
1996
1997 /*
1998  * Function nsc_ircc_net_open (dev)
1999  *
2000  *    Start the device
2001  *
2002  */
2003 static int nsc_ircc_net_open(struct net_device *dev)
2004 {
2005         struct nsc_ircc_cb *self;
2006         int iobase;
2007         char hwname[32];
2008         __u8 bank;
2009
2010         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2011
2012         ASSERT(dev != NULL, return -1;);
2013         self = (struct nsc_ircc_cb *) dev->priv;
2014
2015         ASSERT(self != NULL, return 0;);
2016
2017         iobase = self->io.fir_base;
2018
2019         if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2020                 WARNING("%s, unable to allocate irq=%d\n", driver_name,
2021                         self->io.irq);
2022                 return -EAGAIN;
2023         }
2024         /*
2025          * Always allocate the DMA channel after the IRQ, and clean up on
2026          * failure.
2027          */
2028         if (request_dma(self->io.dma, dev->name)) {
2029                 WARNING("%s, unable to allocate dma=%d\n", driver_name,
2030                         self->io.dma);
2031                 free_irq(self->io.irq, dev);
2032                 return -EAGAIN;
2033         }
2034
2035         /* Save current bank */
2036         bank = inb(iobase+BSR);
2037
2038         /* turn on interrupts */
2039         switch_bank(iobase, BANK0);
2040         outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2041
2042         /* Restore bank register */
2043         outb(bank, iobase+BSR);
2044
2045         /* Ready to play! */
2046         netif_start_queue(dev);
2047
2048         /* Give self a hardware name */
2049         sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2050
2051         /*
2052          * Open new IrLAP layer instance, now that everything should be
2053          * initialized properly
2054          */
2055         self->irlap = irlap_open(dev, &self->qos, hwname);
2056
2057         return 0;
2058 }
2059
2060 /*
2061  * Function nsc_ircc_net_close (dev)
2062  *
2063  *    Stop the device
2064  *
2065  */
2066 static int nsc_ircc_net_close(struct net_device *dev)
2067 {
2068         struct nsc_ircc_cb *self;
2069         int iobase;
2070         __u8 bank;
2071
2072         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2073
2074         ASSERT(dev != NULL, return -1;);
2075
2076         self = (struct nsc_ircc_cb *) dev->priv;
2077         ASSERT(self != NULL, return 0;);
2078
2079         /* Stop device */
2080         netif_stop_queue(dev);
2081
2082         /* Stop and remove instance of IrLAP */
2083         if (self->irlap)
2084                 irlap_close(self->irlap);
2085         self->irlap = NULL;
2086
2087         iobase = self->io.fir_base;
2088
2089         disable_dma(self->io.dma);
2090
2091         /* Save current bank */
2092         bank = inb(iobase+BSR);
2093
2094         /* Disable interrupts */
2095         switch_bank(iobase, BANK0);
2096         outb(0, iobase+IER);
2097
2098         free_irq(self->io.irq, dev);
2099         free_dma(self->io.dma);
2100
2101         /* Restore bank register */
2102         outb(bank, iobase+BSR);
2103
2104         return 0;
2105 }
2106
2107 /*
2108  * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2109  *
2110  *    Process IOCTL commands for this device
2111  *
2112  */
2113 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2114 {
2115         struct if_irda_req *irq = (struct if_irda_req *) rq;
2116         struct nsc_ircc_cb *self;
2117         unsigned long flags;
2118         int ret = 0;
2119
2120         ASSERT(dev != NULL, return -1;);
2121
2122         self = dev->priv;
2123
2124         ASSERT(self != NULL, return -1;);
2125
2126         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2127
2128         switch (cmd) {
2129         case SIOCSBANDWIDTH: /* Set bandwidth */
2130                 if (!capable(CAP_NET_ADMIN)) {
2131                         ret = -EPERM;
2132                         break;
2133                 }
2134                 spin_lock_irqsave(&self->lock, flags);
2135                 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2136                 spin_unlock_irqrestore(&self->lock, flags);
2137                 break;
2138         case SIOCSMEDIABUSY: /* Set media busy */
2139                 if (!capable(CAP_NET_ADMIN)) {
2140                         ret = -EPERM;
2141                         break;
2142                 }
2143                 irda_device_set_media_busy(self->netdev, TRUE);
2144                 break;
2145         case SIOCGRECEIVING: /* Check if we are receiving right now */
2146                 /* This is already protected */
2147                 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2148                 break;
2149         default:
2150                 ret = -EOPNOTSUPP;
2151         }
2152         return ret;
2153 }
2154
2155 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2156 {
2157         struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2158
2159         return &self->stats;
2160 }
2161
2162 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
2163 {
2164         MESSAGE("%s, Suspending\n", driver_name);
2165
2166         if (self->io.suspended)
2167                 return;
2168
2169         nsc_ircc_net_close(self->netdev);
2170
2171         self->io.suspended = 1;
2172 }
2173
2174 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2175 {
2176         if (!self->io.suspended)
2177                 return;
2178
2179         nsc_ircc_setup(&self->io);
2180         nsc_ircc_net_open(self->netdev);
2181
2182         MESSAGE("%s, Waking up\n", driver_name);
2183
2184         self->io.suspended = 0;
2185 }
2186
2187 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2188 {
2189         struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2190         if (self) {
2191                 switch (rqst) {
2192                 case PM_SUSPEND:
2193                         nsc_ircc_suspend(self);
2194                         break;
2195                 case PM_RESUME:
2196                         nsc_ircc_wakeup(self);
2197                         break;
2198                 }
2199         }
2200         return 0;
2201 }
2202
2203 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2204 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2205 MODULE_LICENSE("GPL");
2206
2207
2208 MODULE_PARM(qos_mtt_bits, "i");
2209 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2210 MODULE_PARM(io,  "1-4i");
2211 MODULE_PARM_DESC(io, "Base I/O addresses");
2212 MODULE_PARM(irq, "1-4i");
2213 MODULE_PARM_DESC(irq, "IRQ lines");
2214 MODULE_PARM(dma, "1-4i");
2215 MODULE_PARM_DESC(dma, "DMA channels");
2216 MODULE_PARM(dongle_id, "i");
2217 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2218
2219 module_init(nsc_ircc_init);
2220 module_exit(nsc_ircc_cleanup);
2221