1 /*********************************************************************
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * Neither Dag Brattli nor University of Tromsø admit liability nor
23 * provide warranty for any of this software. This material is
24 * provided "AS-IS" and at no charge.
26 * Notice that all functions that needs to access the chip in _any_
27 * way, must save BSR register on entry, and restore it on exit.
28 * It is _very_ important to follow this policy!
32 * bank = inb(iobase+BSR);
34 * do_your_stuff_here();
36 * outb(bank, iobase+BSR);
38 * If you find bugs in this file, its very likely that the same bug
39 * will also be in w83977af_ir.c since the implementations are quite
42 ********************************************************************/
44 #include <linux/module.h>
46 #include <linux/kernel.h>
47 #include <linux/types.h>
48 #include <linux/skbuff.h>
49 #include <linux/netdevice.h>
50 #include <linux/ioport.h>
51 #include <linux/delay.h>
52 #include <linux/slab.h>
53 #include <linux/init.h>
54 #include <linux/rtnetlink.h>
55 #include <linux/dma-mapping.h>
59 #include <asm/byteorder.h>
63 #include <net/irda/wrapper.h>
64 #include <net/irda/irda.h>
65 #include <net/irda/irda_device.h>
69 #define CHIP_IO_EXTENT 8
70 #define BROKEN_DONGLE_ID
72 static char *driver_name = "nsc-ircc";
74 /* Module parameters */
75 static int qos_mtt_bits = 0x07; /* 1 ms or more */
78 /* Use BIOS settions by default, but user may supply module parameters */
79 static unsigned int io[] = { ~0, ~0, ~0, ~0 };
80 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
81 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
83 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
84 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
85 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
86 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
87 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
88 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
90 /* These are the known NSC chips */
91 static nsc_chip_t chips[] = {
92 /* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
93 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
94 nsc_ircc_probe_108, nsc_ircc_init_108 },
95 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
96 nsc_ircc_probe_338, nsc_ircc_init_338 },
97 /* Contributed by Jan Frey - IBM A30/A31 */
98 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
99 nsc_ircc_probe_39x, nsc_ircc_init_39x },
102 /* Probably bogus, "PC8739x" should be the real thing. Jean II */
103 /* Contributed by Kevin Thayer - OmniBook 6100 */
104 { "PC87338?", { 0x2e, 0x15c, 0x398 }, 0x08, 0x00, 0xf8,
105 nsc_ircc_probe_338, nsc_ircc_init_338 },
109 /* Max 4 instances for now */
110 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
112 static char *dongle_types[] = {
113 "Differential serial interface",
114 "Differential serial interface",
119 "Single-ended serial interface",
121 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
122 "IBM31T1100 or Temic TFDS6000/TFDS6500",
125 "HP HSDL-1100/HSDL-2100",
126 "HP HSDL-1100/HSDL-2100",
127 "Supports SIR Mode only",
128 "No dongle connected",
131 /* Some prototypes */
132 static int nsc_ircc_open(int i, chipio_t *info);
133 static int nsc_ircc_close(struct nsc_ircc_cb *self);
134 static int nsc_ircc_setup(chipio_t *info);
135 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
136 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
137 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
138 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
139 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
140 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
141 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
142 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
143 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
144 static int nsc_ircc_read_dongle_id (int iobase);
145 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
147 static int nsc_ircc_net_open(struct net_device *dev);
148 static int nsc_ircc_net_close(struct net_device *dev);
149 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
150 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
151 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
154 * Function nsc_ircc_init ()
156 * Initialize chip. Just try to find out how many chips we are dealing with
159 static int __init nsc_ircc_init(void)
169 /* Probe for all the NSC chipsets we know about */
170 for (chip=chips; chip->name ; chip++) {
171 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
174 /* Try all config registers for this chip */
175 for (cfg=0; cfg<3; cfg++) {
176 cfg_base = chip->cfg[cfg];
180 memset(&info, 0, sizeof(chipio_t));
181 info.cfg_base = cfg_base;
182 info.fir_base = io[i];
186 /* Read index register */
189 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
193 /* Read chip identification register */
194 outb(chip->cid_index, cfg_base);
195 id = inb(cfg_base+1);
196 if ((id & chip->cid_mask) == chip->cid_value) {
197 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
198 __FUNCTION__, chip->name, id & ~chip->cid_mask);
200 * If the user supplies the base address, then
201 * we init the chip, if not we probe the values
204 if (io[i] < 0x2000) {
205 chip->init(chip, &info);
207 chip->probe(chip, &info);
209 if (nsc_ircc_open(i, &info) == 0)
213 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
223 * Function nsc_ircc_cleanup ()
225 * Close all configured chips
228 static void __exit nsc_ircc_cleanup(void)
232 pm_unregister_all(nsc_ircc_pmproc);
234 for (i=0; i < 4; i++) {
236 nsc_ircc_close(dev_self[i]);
241 * Function nsc_ircc_open (iobase, irq)
243 * Open driver instance
246 static int __init nsc_ircc_open(int i, chipio_t *info)
248 struct net_device *dev;
249 struct nsc_ircc_cb *self;
250 struct pm_dev *pmdev;
254 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
256 MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
259 if ((nsc_ircc_setup(info)) == -1)
262 MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
264 dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
266 ERROR("%s(), can't allocate memory for "
267 "control block!\n", __FUNCTION__);
273 spin_lock_init(&self->lock);
275 /* Need to store self somewhere */
280 self->io.cfg_base = info->cfg_base;
281 self->io.fir_base = info->fir_base;
282 self->io.irq = info->irq;
283 self->io.fir_ext = CHIP_IO_EXTENT;
284 self->io.dma = info->dma;
285 self->io.fifo_size = 32;
287 /* Reserve the ioports that we need */
288 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
290 WARNING("%s(), can't get iobase of 0x%03x\n",
291 __FUNCTION__, self->io.fir_base);
296 /* Initialize QoS for this device */
297 irda_init_max_qos_capabilies(&self->qos);
299 /* The only value we must override it the baudrate */
300 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
301 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
303 self->qos.min_turn_time.bits = qos_mtt_bits;
304 irda_qos_bits_to_value(&self->qos);
306 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
307 self->rx_buff.truesize = 14384;
308 self->tx_buff.truesize = 14384;
310 /* Allocate memory if needed */
312 dma_alloc_coherent(NULL, self->rx_buff.truesize,
313 &self->rx_buff_dma, GFP_KERNEL);
314 if (self->rx_buff.head == NULL) {
319 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
322 dma_alloc_coherent(NULL, self->tx_buff.truesize,
323 &self->tx_buff_dma, GFP_KERNEL);
324 if (self->tx_buff.head == NULL) {
328 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
330 self->rx_buff.in_frame = FALSE;
331 self->rx_buff.state = OUTSIDE_FRAME;
332 self->tx_buff.data = self->tx_buff.head;
333 self->rx_buff.data = self->rx_buff.head;
335 /* Reset Tx queue info */
336 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
337 self->tx_fifo.tail = self->tx_buff.head;
339 /* Override the network functions we need to use */
340 SET_MODULE_OWNER(dev);
341 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
342 dev->open = nsc_ircc_net_open;
343 dev->stop = nsc_ircc_net_close;
344 dev->do_ioctl = nsc_ircc_net_ioctl;
345 dev->get_stats = nsc_ircc_net_get_stats;
347 err = register_netdev(dev);
349 ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
352 MESSAGE("IrDA: Registered device %s\n", dev->name);
354 /* Check if user has supplied the dongle id or not */
356 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
358 MESSAGE("%s, Found dongle: %s\n", driver_name,
359 dongle_types[dongle_id]);
361 MESSAGE("%s, Using dongle: %s\n", driver_name,
362 dongle_types[dongle_id]);
365 self->io.dongle_id = dongle_id;
366 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
368 pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
374 dma_free_coherent(NULL, self->tx_buff.truesize,
375 self->tx_buff.head, self->tx_buff_dma);
377 dma_free_coherent(NULL, self->rx_buff.truesize,
378 self->rx_buff.head, self->rx_buff_dma);
380 release_region(self->io.fir_base, self->io.fir_ext);
388 * Function nsc_ircc_close (self)
390 * Close driver instance
393 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
397 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
399 ASSERT(self != NULL, return -1;);
401 iobase = self->io.fir_base;
403 /* Remove netdevice */
404 unregister_netdev(self->netdev);
406 /* Release the PORT that this driver is using */
407 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
408 __FUNCTION__, self->io.fir_base);
409 release_region(self->io.fir_base, self->io.fir_ext);
411 if (self->tx_buff.head)
412 dma_free_coherent(NULL, self->tx_buff.truesize,
413 self->tx_buff.head, self->tx_buff_dma);
415 if (self->rx_buff.head)
416 dma_free_coherent(NULL, self->rx_buff.truesize,
417 self->rx_buff.head, self->rx_buff_dma);
419 dev_self[self->index] = NULL;
420 free_netdev(self->netdev);
426 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
428 * Initialize the NSC '108 chip
431 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
433 int cfg_base = info->cfg_base;
436 outb(2, cfg_base); /* Mode Control Register (MCTL) */
437 outb(0x00, cfg_base+1); /* Disable device */
439 /* Base Address and Interrupt Control Register (BAIC) */
440 outb(CFG_108_BAIC, cfg_base);
441 switch (info->fir_base) {
442 case 0x3e8: outb(0x14, cfg_base+1); break;
443 case 0x2e8: outb(0x15, cfg_base+1); break;
444 case 0x3f8: outb(0x16, cfg_base+1); break;
445 case 0x2f8: outb(0x17, cfg_base+1); break;
446 default: ERROR("%s(), invalid base_address", __FUNCTION__);
449 /* Control Signal Routing Register (CSRT) */
451 case 3: temp = 0x01; break;
452 case 4: temp = 0x02; break;
453 case 5: temp = 0x03; break;
454 case 7: temp = 0x04; break;
455 case 9: temp = 0x05; break;
456 case 11: temp = 0x06; break;
457 case 15: temp = 0x07; break;
458 default: ERROR("%s(), invalid irq", __FUNCTION__);
460 outb(CFG_108_CSRT, cfg_base);
463 case 0: outb(0x08+temp, cfg_base+1); break;
464 case 1: outb(0x10+temp, cfg_base+1); break;
465 case 3: outb(0x18+temp, cfg_base+1); break;
466 default: ERROR("%s(), invalid dma", __FUNCTION__);
469 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
470 outb(0x03, cfg_base+1); /* Enable device */
476 * Function nsc_ircc_probe_108 (chip, info)
481 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
483 int cfg_base = info->cfg_base;
486 /* Read address and interrupt control register (BAIC) */
487 outb(CFG_108_BAIC, cfg_base);
488 reg = inb(cfg_base+1);
490 switch (reg & 0x03) {
492 info->fir_base = 0x3e8;
495 info->fir_base = 0x2e8;
498 info->fir_base = 0x3f8;
501 info->fir_base = 0x2f8;
504 info->sir_base = info->fir_base;
505 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
508 /* Read control signals routing register (CSRT) */
509 outb(CFG_108_CSRT, cfg_base);
510 reg = inb(cfg_base+1);
512 switch (reg & 0x07) {
538 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
540 /* Currently we only read Rx DMA but it will also be used for Tx */
541 switch ((reg >> 3) & 0x03) {
555 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
557 /* Read mode control register (MCTL) */
558 outb(CFG_108_MCTL, cfg_base);
559 reg = inb(cfg_base+1);
561 info->enabled = reg & 0x01;
562 info->suspended = !((reg >> 1) & 0x01);
568 * Function nsc_ircc_init_338 (chip, info)
570 * Initialize the NSC '338 chip. Remember that the 87338 needs two
571 * consecutive writes to the data registers while CPU interrupts are
572 * disabled. The 97338 does not require this, but shouldn't be any
573 * harm if we do it anyway.
575 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
583 * Function nsc_ircc_probe_338 (chip, info)
588 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
590 int cfg_base = info->cfg_base;
594 /* Read funtion enable register (FER) */
595 outb(CFG_338_FER, cfg_base);
596 reg = inb(cfg_base+1);
598 info->enabled = (reg >> 2) & 0x01;
600 /* Check if we are in Legacy or PnP mode */
601 outb(CFG_338_PNP0, cfg_base);
602 reg = inb(cfg_base+1);
604 pnp = (reg >> 3) & 0x01;
606 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
607 outb(0x46, cfg_base);
608 reg = (inb(cfg_base+1) & 0xfe) << 2;
610 outb(0x47, cfg_base);
611 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
613 info->fir_base = reg;
615 /* Read function address register (FAR) */
616 outb(CFG_338_FAR, cfg_base);
617 reg = inb(cfg_base+1);
619 switch ((reg >> 4) & 0x03) {
621 info->fir_base = 0x3f8;
624 info->fir_base = 0x2f8;
635 switch ((reg >> 6) & 0x03) {
638 info->fir_base = 0x3e8;
640 info->fir_base = 0x2e8;
644 info->fir_base = 0x338;
646 info->fir_base = 0x238;
650 info->fir_base = 0x2e8;
652 info->fir_base = 0x2e0;
656 info->fir_base = 0x220;
658 info->fir_base = 0x228;
663 info->sir_base = info->fir_base;
665 /* Read PnP register 1 (PNP1) */
666 outb(CFG_338_PNP1, cfg_base);
667 reg = inb(cfg_base+1);
669 info->irq = reg >> 4;
671 /* Read PnP register 3 (PNP3) */
672 outb(CFG_338_PNP3, cfg_base);
673 reg = inb(cfg_base+1);
675 info->dma = (reg & 0x07) - 1;
677 /* Read power and test register (PTR) */
678 outb(CFG_338_PTR, cfg_base);
679 reg = inb(cfg_base+1);
681 info->suspended = reg & 0x01;
688 * Function nsc_ircc_init_39x (chip, info)
690 * Now that we know it's a '39x (see probe below), we need to
691 * configure it so we can use it.
693 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
694 * the configuration of the different functionality (serial, parallel,
695 * floppy...) are each in a different bank (Logical Device Number).
696 * The base address, irq and dma configuration registers are common
697 * to all functionalities (index 0x30 to 0x7F).
698 * There is only one configuration register specific to the
699 * serial port, CFG_39X_SPC.
702 * Note : this code was written by Jan Frey <janfrey@web.de>
704 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
706 int cfg_base = info->cfg_base;
709 /* User is shure about his config... accept it. */
710 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
711 "io=0x%04x, irq=%d, dma=%d\n",
712 __FUNCTION__, info->fir_base, info->irq, info->dma);
714 /* Access bank for SP2 */
715 outb(CFG_39X_LDN, cfg_base);
716 outb(0x02, cfg_base+1);
720 /* We want to enable the device if not enabled */
721 outb(CFG_39X_ACT, cfg_base);
722 enabled = inb(cfg_base+1) & 0x01;
725 /* Enable the device */
726 outb(CFG_39X_SIOCF1, cfg_base);
727 outb(0x01, cfg_base+1);
728 /* May want to update info->enabled. Jean II */
731 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
732 * power mode (wake up from sleep mode) (bit 1) */
733 outb(CFG_39X_SPC, cfg_base);
734 outb(0x82, cfg_base+1);
740 * Function nsc_ircc_probe_39x (chip, info)
742 * Test if we really have a '39x chip at the given address
744 * Note : this code was written by Jan Frey <janfrey@web.de>
746 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
748 int cfg_base = info->cfg_base;
749 int reg1, reg2, irq, irqt, dma1, dma2;
752 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
753 __FUNCTION__, cfg_base);
755 /* This function should be executed with irq off to avoid
756 * another driver messing with the Super I/O bank - Jean II */
758 /* Access bank for SP2 */
759 outb(CFG_39X_LDN, cfg_base);
760 outb(0x02, cfg_base+1);
762 /* Read infos about SP2 ; store in info struct */
763 outb(CFG_39X_BASEH, cfg_base);
764 reg1 = inb(cfg_base+1);
765 outb(CFG_39X_BASEL, cfg_base);
766 reg2 = inb(cfg_base+1);
767 info->fir_base = (reg1 << 8) | reg2;
769 outb(CFG_39X_IRQNUM, cfg_base);
770 irq = inb(cfg_base+1);
771 outb(CFG_39X_IRQSEL, cfg_base);
772 irqt = inb(cfg_base+1);
775 outb(CFG_39X_DMA0, cfg_base);
776 dma1 = inb(cfg_base+1);
777 outb(CFG_39X_DMA1, cfg_base);
778 dma2 = inb(cfg_base+1);
781 outb(CFG_39X_ACT, cfg_base);
782 info->enabled = enabled = inb(cfg_base+1) & 0x01;
784 outb(CFG_39X_SPC, cfg_base);
785 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
787 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
791 /* We want to enable the device if not enabled */
792 outb(CFG_39X_ACT, cfg_base);
793 enabled = inb(cfg_base+1) & 0x01;
796 /* Enable the device */
797 outb(CFG_39X_SIOCF1, cfg_base);
798 outb(0x01, cfg_base+1);
799 /* May want to update info->enabled. Jean II */
802 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
803 * power mode (wake up from sleep mode) (bit 1) */
804 outb(CFG_39X_SPC, cfg_base);
805 outb(0x82, cfg_base+1);
811 * Function nsc_ircc_setup (info)
813 * Returns non-negative on success.
816 static int nsc_ircc_setup(chipio_t *info)
819 int iobase = info->fir_base;
821 /* Read the Module ID */
822 switch_bank(iobase, BANK3);
823 version = inb(iobase+MID);
825 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
826 __FUNCTION__, driver_name, version);
829 if (0x20 != (version & 0xf0)) {
830 ERROR("%s, Wrong chip version %02x\n", driver_name, version);
834 /* Switch to advanced mode */
835 switch_bank(iobase, BANK2);
836 outb(ECR1_EXT_SL, iobase+ECR1);
837 switch_bank(iobase, BANK0);
839 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
840 switch_bank(iobase, BANK0);
841 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
843 outb(0x03, iobase+LCR); /* 8 bit word length */
844 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
846 /* Set FIFO size to 32 */
847 switch_bank(iobase, BANK2);
848 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
850 /* IRCR2: FEND_MD is not set */
851 switch_bank(iobase, BANK5);
852 outb(0x02, iobase+4);
854 /* Make sure that some defaults are OK */
855 switch_bank(iobase, BANK6);
856 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
857 outb(0x0a, iobase+1); /* Set MIR pulse width */
858 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
859 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
861 /* Enable receive interrupts */
862 switch_bank(iobase, BANK0);
863 outb(IER_RXHDL_IE, iobase+IER);
869 * Function nsc_ircc_read_dongle_id (void)
871 * Try to read dongle indentification. This procedure needs to be executed
872 * once after power-on/reset. It also needs to be used whenever you suspect
873 * that the user may have plugged/unplugged the IrDA Dongle.
875 static int nsc_ircc_read_dongle_id (int iobase)
880 bank = inb(iobase+BSR);
883 switch_bank(iobase, BANK7);
885 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
886 outb(0x00, iobase+7);
888 /* ID0, 1, and 2 are pulled up/down very slowly */
891 /* IRCFG1: read the ID bits */
892 dongle_id = inb(iobase+4) & 0x0f;
894 #ifdef BROKEN_DONGLE_ID
895 if (dongle_id == 0x0a)
898 /* Go back to bank 0 before returning */
899 switch_bank(iobase, BANK0);
901 outb(bank, iobase+BSR);
907 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
909 * This function initializes the dongle for the transceiver that is
910 * used. This procedure needs to be executed once after
911 * power-on/reset. It also needs to be used whenever you suspect that
912 * the dongle is changed.
914 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
918 /* Save current bank */
919 bank = inb(iobase+BSR);
922 switch_bank(iobase, BANK7);
924 /* IRCFG4: set according to dongle_id */
926 case 0x00: /* same as */
927 case 0x01: /* Differential serial interface */
928 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
929 __FUNCTION__, dongle_types[dongle_id]);
931 case 0x02: /* same as */
932 case 0x03: /* Reserved */
933 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
934 __FUNCTION__, dongle_types[dongle_id]);
936 case 0x04: /* Sharp RY5HD01 */
938 case 0x05: /* Reserved, but this is what the Thinkpad reports */
939 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
940 __FUNCTION__, dongle_types[dongle_id]);
942 case 0x06: /* Single-ended serial interface */
943 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
944 __FUNCTION__, dongle_types[dongle_id]);
946 case 0x07: /* Consumer-IR only */
947 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
948 __FUNCTION__, dongle_types[dongle_id]);
950 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
951 IRDA_DEBUG(0, "%s(), %s\n",
952 __FUNCTION__, dongle_types[dongle_id]);
954 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
955 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
957 case 0x0A: /* same as */
958 case 0x0B: /* Reserved */
959 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
960 __FUNCTION__, dongle_types[dongle_id]);
962 case 0x0C: /* same as */
963 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
965 * Set irsl0 as input, irsl[1-2] as output, and separate
966 * inputs are used for SIR and MIR/FIR
968 outb(0x48, iobase+7);
970 case 0x0E: /* Supports SIR Mode only */
971 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
973 case 0x0F: /* No dongle connected */
974 IRDA_DEBUG(0, "%s(), %s\n",
975 __FUNCTION__, dongle_types[dongle_id]);
977 switch_bank(iobase, BANK0);
978 outb(0x62, iobase+MCR);
981 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
982 __FUNCTION__, dongle_id);
985 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
986 outb(0x00, iobase+4);
988 /* Restore bank register */
989 outb(bank, iobase+BSR);
991 } /* set_up_dongle_interface */
994 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
996 * Change speed of the attach dongle
999 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1003 /* Save current bank */
1004 bank = inb(iobase+BSR);
1007 switch_bank(iobase, BANK7);
1009 /* IRCFG1: set according to dongle_id */
1010 switch (dongle_id) {
1011 case 0x00: /* same as */
1012 case 0x01: /* Differential serial interface */
1013 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1014 __FUNCTION__, dongle_types[dongle_id]);
1016 case 0x02: /* same as */
1017 case 0x03: /* Reserved */
1018 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1019 __FUNCTION__, dongle_types[dongle_id]);
1021 case 0x04: /* Sharp RY5HD01 */
1023 case 0x05: /* Reserved */
1024 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1025 __FUNCTION__, dongle_types[dongle_id]);
1027 case 0x06: /* Single-ended serial interface */
1028 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1029 __FUNCTION__, dongle_types[dongle_id]);
1031 case 0x07: /* Consumer-IR only */
1032 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1033 __FUNCTION__, dongle_types[dongle_id]);
1035 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1036 IRDA_DEBUG(0, "%s(), %s\n",
1037 __FUNCTION__, dongle_types[dongle_id]);
1038 outb(0x00, iobase+4);
1040 outb(0x01, iobase+4);
1042 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1043 outb(0x01, iobase+4);
1045 if (speed == 4000000) {
1046 /* There was a cli() there, but we now are already
1047 * under spin_lock_irqsave() - JeanII */
1048 outb(0x81, iobase+4);
1049 outb(0x80, iobase+4);
1051 outb(0x00, iobase+4);
1053 case 0x0A: /* same as */
1054 case 0x0B: /* Reserved */
1055 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1056 __FUNCTION__, dongle_types[dongle_id]);
1058 case 0x0C: /* same as */
1059 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1061 case 0x0E: /* Supports SIR Mode only */
1063 case 0x0F: /* No dongle connected */
1064 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1065 __FUNCTION__, dongle_types[dongle_id]);
1067 switch_bank(iobase, BANK0);
1068 outb(0x62, iobase+MCR);
1071 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1073 /* Restore bank register */
1074 outb(bank, iobase+BSR);
1078 * Function nsc_ircc_change_speed (self, baud)
1080 * Change the speed of the device
1082 * This function *must* be called with irq off and spin-lock.
1084 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1086 struct net_device *dev = self->netdev;
1090 __u8 ier; /* Interrupt enable register */
1092 IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1094 ASSERT(self != NULL, return 0;);
1096 iobase = self->io.fir_base;
1098 /* Update accounting for new speed */
1099 self->io.speed = speed;
1101 /* Save current bank */
1102 bank = inb(iobase+BSR);
1104 /* Disable interrupts */
1105 switch_bank(iobase, BANK0);
1106 outb(0, iobase+IER);
1109 switch_bank(iobase, BANK2);
1111 outb(0x00, iobase+BGDH);
1113 case 9600: outb(0x0c, iobase+BGDL); break;
1114 case 19200: outb(0x06, iobase+BGDL); break;
1115 case 38400: outb(0x03, iobase+BGDL); break;
1116 case 57600: outb(0x02, iobase+BGDL); break;
1117 case 115200: outb(0x01, iobase+BGDL); break;
1119 switch_bank(iobase, BANK5);
1121 /* IRCR2: MDRS is set */
1122 outb(inb(iobase+4) | 0x04, iobase+4);
1125 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1129 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1133 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1137 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1138 __FUNCTION__, speed);
1142 /* Set appropriate speed mode */
1143 switch_bank(iobase, BANK0);
1144 outb(mcr | MCR_TX_DFR, iobase+MCR);
1146 /* Give some hits to the transceiver */
1147 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1149 /* Set FIFO threshold to TX17, RX16 */
1150 switch_bank(iobase, BANK0);
1151 outb(0x00, iobase+FCR);
1152 outb(FCR_FIFO_EN, iobase+FCR);
1153 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1154 FCR_TXTH| /* Set Tx FIFO threshold */
1155 FCR_TXSR| /* Reset Tx FIFO */
1156 FCR_RXSR| /* Reset Rx FIFO */
1157 FCR_FIFO_EN, /* Enable FIFOs */
1160 /* Set FIFO size to 32 */
1161 switch_bank(iobase, BANK2);
1162 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1164 /* Enable some interrupts so we can receive frames */
1165 switch_bank(iobase, BANK0);
1166 if (speed > 115200) {
1167 /* Install FIR xmit handler */
1168 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1170 nsc_ircc_dma_receive(self);
1172 /* Install SIR xmit handler */
1173 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1176 /* Set our current interrupt mask */
1177 outb(ier, iobase+IER);
1180 outb(bank, iobase+BSR);
1182 /* Make sure interrupt handlers keep the proper interrupt mask */
1187 * Function nsc_ircc_hard_xmit (skb, dev)
1189 * Transmit the frame!
1192 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1194 struct nsc_ircc_cb *self;
1195 unsigned long flags;
1200 self = (struct nsc_ircc_cb *) dev->priv;
1202 ASSERT(self != NULL, return 0;);
1204 iobase = self->io.fir_base;
1206 netif_stop_queue(dev);
1208 /* Make sure tests *& speed change are atomic */
1209 spin_lock_irqsave(&self->lock, flags);
1211 /* Check if we need to change the speed */
1212 speed = irda_get_next_speed(skb);
1213 if ((speed != self->io.speed) && (speed != -1)) {
1214 /* Check for empty frame. */
1216 /* If we just sent a frame, we get called before
1217 * the last bytes get out (because of the SIR FIFO).
1218 * If this is the case, let interrupt handler change
1219 * the speed itself... Jean II */
1220 if (self->io.direction == IO_RECV) {
1221 nsc_ircc_change_speed(self, speed);
1222 /* TODO : For SIR->SIR, the next packet
1223 * may get corrupted - Jean II */
1224 netif_wake_queue(dev);
1226 self->new_speed = speed;
1227 /* Queue will be restarted after speed change
1228 * to make sure packets gets through the
1229 * proper xmit handler - Jean II */
1231 dev->trans_start = jiffies;
1232 spin_unlock_irqrestore(&self->lock, flags);
1236 self->new_speed = speed;
1239 /* Save current bank */
1240 bank = inb(iobase+BSR);
1242 self->tx_buff.data = self->tx_buff.head;
1244 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1245 self->tx_buff.truesize);
1247 self->stats.tx_bytes += self->tx_buff.len;
1249 /* Add interrupt on tx low level (will fire immediately) */
1250 switch_bank(iobase, BANK0);
1251 outb(IER_TXLDL_IE, iobase+IER);
1253 /* Restore bank register */
1254 outb(bank, iobase+BSR);
1256 dev->trans_start = jiffies;
1257 spin_unlock_irqrestore(&self->lock, flags);
1264 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1266 struct nsc_ircc_cb *self;
1267 unsigned long flags;
1273 self = (struct nsc_ircc_cb *) dev->priv;
1274 iobase = self->io.fir_base;
1276 netif_stop_queue(dev);
1278 /* Make sure tests *& speed change are atomic */
1279 spin_lock_irqsave(&self->lock, flags);
1281 /* Check if we need to change the speed */
1282 speed = irda_get_next_speed(skb);
1283 if ((speed != self->io.speed) && (speed != -1)) {
1284 /* Check for empty frame. */
1286 /* If we are currently transmitting, defer to
1287 * interrupt handler. - Jean II */
1288 if(self->tx_fifo.len == 0) {
1289 nsc_ircc_change_speed(self, speed);
1290 netif_wake_queue(dev);
1292 self->new_speed = speed;
1293 /* Keep queue stopped :
1294 * the speed change operation may change the
1295 * xmit handler, and we want to make sure
1296 * the next packet get through the proper
1297 * Tx path, so block the Tx queue until
1298 * the speed change has been done.
1301 dev->trans_start = jiffies;
1302 spin_unlock_irqrestore(&self->lock, flags);
1306 /* Change speed after current frame */
1307 self->new_speed = speed;
1311 /* Save current bank */
1312 bank = inb(iobase+BSR);
1314 /* Register and copy this frame to DMA memory */
1315 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1316 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1317 self->tx_fifo.tail += skb->len;
1319 self->stats.tx_bytes += skb->len;
1321 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
1324 self->tx_fifo.len++;
1325 self->tx_fifo.free++;
1327 /* Start transmit only if there is currently no transmit going on */
1328 if (self->tx_fifo.len == 1) {
1329 /* Check if we must wait the min turn time or not */
1330 mtt = irda_get_mtt(skb);
1332 /* Check how much time we have used already */
1333 do_gettimeofday(&self->now);
1334 diff = self->now.tv_usec - self->stamp.tv_usec;
1338 /* Check if the mtt is larger than the time we have
1339 * already used by all the protocol processing
1345 * Use timer if delay larger than 125 us, and
1346 * use udelay for smaller values which should
1350 /* Adjust for timer resolution */
1354 switch_bank(iobase, BANK4);
1355 outb(mtt & 0xff, iobase+TMRL);
1356 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1359 outb(IRCR1_TMR_EN, iobase+IRCR1);
1360 self->io.direction = IO_XMIT;
1362 /* Enable timer interrupt */
1363 switch_bank(iobase, BANK0);
1364 outb(IER_TMR_IE, iobase+IER);
1366 /* Timer will take care of the rest */
1372 /* Enable DMA interrupt */
1373 switch_bank(iobase, BANK0);
1374 outb(IER_DMA_IE, iobase+IER);
1376 /* Transmit frame */
1377 nsc_ircc_dma_xmit(self, iobase);
1380 /* Not busy transmitting anymore if window is not full,
1381 * and if we don't need to change speed */
1382 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1383 netif_wake_queue(self->netdev);
1385 /* Restore bank register */
1386 outb(bank, iobase+BSR);
1388 dev->trans_start = jiffies;
1389 spin_unlock_irqrestore(&self->lock, flags);
1396 * Function nsc_ircc_dma_xmit (self, iobase)
1398 * Transmit data using DMA
1401 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1405 /* Save current bank */
1406 bsr = inb(iobase+BSR);
1409 switch_bank(iobase, BANK0);
1410 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1412 self->io.direction = IO_XMIT;
1414 /* Choose transmit DMA channel */
1415 switch_bank(iobase, BANK2);
1416 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1418 irda_setup_dma(self->io.dma,
1419 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1420 self->tx_buff.head) + self->tx_buff_dma,
1421 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1424 /* Enable DMA and SIR interaction pulse */
1425 switch_bank(iobase, BANK0);
1426 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1428 /* Restore bank register */
1429 outb(bsr, iobase+BSR);
1433 * Function nsc_ircc_pio_xmit (self, iobase)
1435 * Transmit data using PIO. Returns the number of bytes that actually
1439 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1444 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1446 /* Save current bank */
1447 bank = inb(iobase+BSR);
1449 switch_bank(iobase, BANK0);
1450 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1451 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1454 /* FIFO may still be filled to the Tx interrupt threshold */
1458 /* Fill FIFO with current frame */
1459 while ((fifo_size-- > 0) && (actual < len)) {
1460 /* Transmit next byte */
1461 outb(buf[actual++], iobase+TXD);
1464 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1465 __FUNCTION__, fifo_size, actual, len);
1468 outb(bank, iobase+BSR);
1474 * Function nsc_ircc_dma_xmit_complete (self)
1476 * The transfer of a frame in finished. This function will only be called
1477 * by the interrupt handler
1480 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1486 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1488 iobase = self->io.fir_base;
1490 /* Save current bank */
1491 bank = inb(iobase+BSR);
1494 switch_bank(iobase, BANK0);
1495 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1497 /* Check for underrrun! */
1498 if (inb(iobase+ASCR) & ASCR_TXUR) {
1499 self->stats.tx_errors++;
1500 self->stats.tx_fifo_errors++;
1502 /* Clear bit, by writing 1 into it */
1503 outb(ASCR_TXUR, iobase+ASCR);
1505 self->stats.tx_packets++;
1508 /* Finished with this frame, so prepare for next */
1509 self->tx_fifo.ptr++;
1510 self->tx_fifo.len--;
1512 /* Any frames to be sent back-to-back? */
1513 if (self->tx_fifo.len) {
1514 nsc_ircc_dma_xmit(self, iobase);
1516 /* Not finished yet! */
1519 /* Reset Tx FIFO info */
1520 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1521 self->tx_fifo.tail = self->tx_buff.head;
1524 /* Make sure we have room for more frames and
1525 * that we don't need to change speed */
1526 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1527 /* Not busy transmitting anymore */
1528 /* Tell the network layer, that we can accept more frames */
1529 netif_wake_queue(self->netdev);
1533 outb(bank, iobase+BSR);
1539 * Function nsc_ircc_dma_receive (self)
1541 * Get ready for receiving a frame. The device will initiate a DMA
1542 * if it starts to receive a frame.
1545 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1550 iobase = self->io.fir_base;
1552 /* Reset Tx FIFO info */
1553 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1554 self->tx_fifo.tail = self->tx_buff.head;
1556 /* Save current bank */
1557 bsr = inb(iobase+BSR);
1560 switch_bank(iobase, BANK0);
1561 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1563 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1564 switch_bank(iobase, BANK2);
1565 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1567 self->io.direction = IO_RECV;
1568 self->rx_buff.data = self->rx_buff.head;
1570 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1571 switch_bank(iobase, BANK0);
1572 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1574 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1575 self->st_fifo.tail = self->st_fifo.head = 0;
1577 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1581 switch_bank(iobase, BANK0);
1582 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1584 /* Restore bank register */
1585 outb(bsr, iobase+BSR);
1591 * Function nsc_ircc_dma_receive_complete (self)
1593 * Finished with receiving frames
1597 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1599 struct st_fifo *st_fifo;
1600 struct sk_buff *skb;
1605 st_fifo = &self->st_fifo;
1607 /* Save current bank */
1608 bank = inb(iobase+BSR);
1610 /* Read all entries in status FIFO */
1611 switch_bank(iobase, BANK5);
1612 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1613 /* We must empty the status FIFO no matter what */
1614 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1616 if (st_fifo->tail >= MAX_RX_WINDOW) {
1617 IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1621 st_fifo->entries[st_fifo->tail].status = status;
1622 st_fifo->entries[st_fifo->tail].len = len;
1623 st_fifo->pending_bytes += len;
1627 /* Try to process all entries in status FIFO */
1628 while (st_fifo->len > 0) {
1629 /* Get first entry */
1630 status = st_fifo->entries[st_fifo->head].status;
1631 len = st_fifo->entries[st_fifo->head].len;
1632 st_fifo->pending_bytes -= len;
1636 /* Check for errors */
1637 if (status & FRM_ST_ERR_MSK) {
1638 if (status & FRM_ST_LOST_FR) {
1639 /* Add number of lost frames to stats */
1640 self->stats.rx_errors += len;
1643 self->stats.rx_errors++;
1645 self->rx_buff.data += len;
1647 if (status & FRM_ST_MAX_LEN)
1648 self->stats.rx_length_errors++;
1650 if (status & FRM_ST_PHY_ERR)
1651 self->stats.rx_frame_errors++;
1653 if (status & FRM_ST_BAD_CRC)
1654 self->stats.rx_crc_errors++;
1656 /* The errors below can be reported in both cases */
1657 if (status & FRM_ST_OVR1)
1658 self->stats.rx_fifo_errors++;
1660 if (status & FRM_ST_OVR2)
1661 self->stats.rx_fifo_errors++;
1664 * First we must make sure that the frame we
1665 * want to deliver is all in main memory. If we
1666 * cannot tell, then we check if the Rx FIFO is
1667 * empty. If not then we will have to take a nap
1668 * and try again later.
1670 if (st_fifo->pending_bytes < self->io.fifo_size) {
1671 switch_bank(iobase, BANK0);
1672 if (inb(iobase+LSR) & LSR_RXDA) {
1673 /* Put this entry back in fifo */
1676 st_fifo->pending_bytes += len;
1677 st_fifo->entries[st_fifo->head].status = status;
1678 st_fifo->entries[st_fifo->head].len = len;
1680 * DMA not finished yet, so try again
1681 * later, set timer value, resolution
1684 switch_bank(iobase, BANK4);
1685 outb(0x02, iobase+TMRL); /* x 125 us */
1686 outb(0x00, iobase+TMRH);
1689 outb(IRCR1_TMR_EN, iobase+IRCR1);
1691 /* Restore bank register */
1692 outb(bank, iobase+BSR);
1694 return FALSE; /* I'll be back! */
1699 * Remember the time we received this frame, so we can
1700 * reduce the min turn time a bit since we will know
1701 * how much time we have used for protocol processing
1703 do_gettimeofday(&self->stamp);
1705 skb = dev_alloc_skb(len+1);
1707 WARNING("%s(), memory squeeze, "
1708 "dropping frame.\n", __FUNCTION__);
1709 self->stats.rx_dropped++;
1711 /* Restore bank register */
1712 outb(bank, iobase+BSR);
1717 /* Make sure IP header gets aligned */
1718 skb_reserve(skb, 1);
1720 /* Copy frame without CRC */
1721 if (self->io.speed < 4000000) {
1722 skb_put(skb, len-2);
1723 memcpy(skb->data, self->rx_buff.data, len-2);
1725 skb_put(skb, len-4);
1726 memcpy(skb->data, self->rx_buff.data, len-4);
1729 /* Move to next frame */
1730 self->rx_buff.data += len;
1731 self->stats.rx_bytes += len;
1732 self->stats.rx_packets++;
1734 skb->dev = self->netdev;
1735 skb->mac.raw = skb->data;
1736 skb->protocol = htons(ETH_P_IRDA);
1738 self->netdev->last_rx = jiffies;
1741 /* Restore bank register */
1742 outb(bank, iobase+BSR);
1748 * Function nsc_ircc_pio_receive (self)
1750 * Receive all data in receiver FIFO
1753 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1758 iobase = self->io.fir_base;
1760 /* Receive all characters in Rx FIFO */
1762 byte = inb(iobase+RXD);
1763 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1765 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1769 * Function nsc_ircc_sir_interrupt (self, eir)
1771 * Handle SIR interrupt
1774 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1778 /* Check if transmit FIFO is low on data */
1779 if (eir & EIR_TXLDL_EV) {
1780 /* Write data left in transmit buffer */
1781 actual = nsc_ircc_pio_write(self->io.fir_base,
1784 self->io.fifo_size);
1785 self->tx_buff.data += actual;
1786 self->tx_buff.len -= actual;
1788 self->io.direction = IO_XMIT;
1790 /* Check if finished */
1791 if (self->tx_buff.len > 0)
1792 self->ier = IER_TXLDL_IE;
1795 self->stats.tx_packets++;
1796 netif_wake_queue(self->netdev);
1797 self->ier = IER_TXEMP_IE;
1801 /* Check if transmission has completed */
1802 if (eir & EIR_TXEMP_EV) {
1803 /* Turn around and get ready to receive some data */
1804 self->io.direction = IO_RECV;
1805 self->ier = IER_RXHDL_IE;
1806 /* Check if we need to change the speed?
1807 * Need to be after self->io.direction to avoid race with
1808 * nsc_ircc_hard_xmit_sir() - Jean II */
1809 if (self->new_speed) {
1810 IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1811 self->ier = nsc_ircc_change_speed(self,
1813 self->new_speed = 0;
1814 netif_wake_queue(self->netdev);
1816 /* Check if we are going to FIR */
1817 if (self->io.speed > 115200) {
1818 /* No need to do anymore SIR stuff */
1824 /* Rx FIFO threshold or timeout */
1825 if (eir & EIR_RXHDL_EV) {
1826 nsc_ircc_pio_receive(self);
1828 /* Keep receiving */
1829 self->ier = IER_RXHDL_IE;
1834 * Function nsc_ircc_fir_interrupt (self, eir)
1836 * Handle MIR/FIR interrupt
1839 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1844 bank = inb(iobase+BSR);
1846 /* Status FIFO event*/
1847 if (eir & EIR_SFIF_EV) {
1848 /* Check if DMA has finished */
1849 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1850 /* Wait for next status FIFO interrupt */
1851 self->ier = IER_SFIF_IE;
1853 self->ier = IER_SFIF_IE | IER_TMR_IE;
1855 } else if (eir & EIR_TMR_EV) { /* Timer finished */
1857 switch_bank(iobase, BANK4);
1858 outb(0, iobase+IRCR1);
1860 /* Clear timer event */
1861 switch_bank(iobase, BANK0);
1862 outb(ASCR_CTE, iobase+ASCR);
1864 /* Check if this is a Tx timer interrupt */
1865 if (self->io.direction == IO_XMIT) {
1866 nsc_ircc_dma_xmit(self, iobase);
1868 /* Interrupt on DMA */
1869 self->ier = IER_DMA_IE;
1871 /* Check (again) if DMA has finished */
1872 if (nsc_ircc_dma_receive_complete(self, iobase)) {
1873 self->ier = IER_SFIF_IE;
1875 self->ier = IER_SFIF_IE | IER_TMR_IE;
1878 } else if (eir & EIR_DMA_EV) {
1879 /* Finished with all transmissions? */
1880 if (nsc_ircc_dma_xmit_complete(self)) {
1881 if(self->new_speed != 0) {
1882 /* As we stop the Tx queue, the speed change
1883 * need to be done when the Tx fifo is
1884 * empty. Ask for a Tx done interrupt */
1885 self->ier = IER_TXEMP_IE;
1887 /* Check if there are more frames to be
1889 if (irda_device_txqueue_empty(self->netdev)) {
1890 /* Prepare for receive */
1891 nsc_ircc_dma_receive(self);
1892 self->ier = IER_SFIF_IE;
1894 WARNING("%s(), potential "
1895 "Tx queue lockup !\n",
1899 /* Not finished yet, so interrupt on DMA again */
1900 self->ier = IER_DMA_IE;
1902 } else if (eir & EIR_TXEMP_EV) {
1903 /* The Tx FIFO has totally drained out, so now we can change
1904 * the speed... - Jean II */
1905 self->ier = nsc_ircc_change_speed(self, self->new_speed);
1906 self->new_speed = 0;
1907 netif_wake_queue(self->netdev);
1908 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
1911 outb(bank, iobase+BSR);
1915 * Function nsc_ircc_interrupt (irq, dev_id, regs)
1917 * An interrupt from the chip has arrived. Time to do some work
1920 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id,
1921 struct pt_regs *regs)
1923 struct net_device *dev = (struct net_device *) dev_id;
1924 struct nsc_ircc_cb *self;
1929 WARNING("%s: irq %d for unknown device.\n", driver_name, irq);
1932 self = (struct nsc_ircc_cb *) dev->priv;
1934 spin_lock(&self->lock);
1936 iobase = self->io.fir_base;
1938 bsr = inb(iobase+BSR); /* Save current bank */
1940 switch_bank(iobase, BANK0);
1941 self->ier = inb(iobase+IER);
1942 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
1944 outb(0, iobase+IER); /* Disable interrupts */
1947 /* Dispatch interrupt handler for the current speed */
1948 if (self->io.speed > 115200)
1949 nsc_ircc_fir_interrupt(self, iobase, eir);
1951 nsc_ircc_sir_interrupt(self, eir);
1954 outb(self->ier, iobase+IER); /* Restore interrupts */
1955 outb(bsr, iobase+BSR); /* Restore bank register */
1957 spin_unlock(&self->lock);
1958 return IRQ_RETVAL(eir);
1962 * Function nsc_ircc_is_receiving (self)
1964 * Return TRUE is we are currently receiving a frame
1967 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
1969 unsigned long flags;
1974 ASSERT(self != NULL, return FALSE;);
1976 spin_lock_irqsave(&self->lock, flags);
1978 if (self->io.speed > 115200) {
1979 iobase = self->io.fir_base;
1981 /* Check if rx FIFO is not empty */
1982 bank = inb(iobase+BSR);
1983 switch_bank(iobase, BANK2);
1984 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
1985 /* We are receiving something */
1988 outb(bank, iobase+BSR);
1990 status = (self->rx_buff.state != OUTSIDE_FRAME);
1992 spin_unlock_irqrestore(&self->lock, flags);
1998 * Function nsc_ircc_net_open (dev)
2003 static int nsc_ircc_net_open(struct net_device *dev)
2005 struct nsc_ircc_cb *self;
2010 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2012 ASSERT(dev != NULL, return -1;);
2013 self = (struct nsc_ircc_cb *) dev->priv;
2015 ASSERT(self != NULL, return 0;);
2017 iobase = self->io.fir_base;
2019 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2020 WARNING("%s, unable to allocate irq=%d\n", driver_name,
2025 * Always allocate the DMA channel after the IRQ, and clean up on
2028 if (request_dma(self->io.dma, dev->name)) {
2029 WARNING("%s, unable to allocate dma=%d\n", driver_name,
2031 free_irq(self->io.irq, dev);
2035 /* Save current bank */
2036 bank = inb(iobase+BSR);
2038 /* turn on interrupts */
2039 switch_bank(iobase, BANK0);
2040 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2042 /* Restore bank register */
2043 outb(bank, iobase+BSR);
2045 /* Ready to play! */
2046 netif_start_queue(dev);
2048 /* Give self a hardware name */
2049 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2052 * Open new IrLAP layer instance, now that everything should be
2053 * initialized properly
2055 self->irlap = irlap_open(dev, &self->qos, hwname);
2061 * Function nsc_ircc_net_close (dev)
2066 static int nsc_ircc_net_close(struct net_device *dev)
2068 struct nsc_ircc_cb *self;
2072 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2074 ASSERT(dev != NULL, return -1;);
2076 self = (struct nsc_ircc_cb *) dev->priv;
2077 ASSERT(self != NULL, return 0;);
2080 netif_stop_queue(dev);
2082 /* Stop and remove instance of IrLAP */
2084 irlap_close(self->irlap);
2087 iobase = self->io.fir_base;
2089 disable_dma(self->io.dma);
2091 /* Save current bank */
2092 bank = inb(iobase+BSR);
2094 /* Disable interrupts */
2095 switch_bank(iobase, BANK0);
2096 outb(0, iobase+IER);
2098 free_irq(self->io.irq, dev);
2099 free_dma(self->io.dma);
2101 /* Restore bank register */
2102 outb(bank, iobase+BSR);
2108 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2110 * Process IOCTL commands for this device
2113 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2115 struct if_irda_req *irq = (struct if_irda_req *) rq;
2116 struct nsc_ircc_cb *self;
2117 unsigned long flags;
2120 ASSERT(dev != NULL, return -1;);
2124 ASSERT(self != NULL, return -1;);
2126 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2129 case SIOCSBANDWIDTH: /* Set bandwidth */
2130 if (!capable(CAP_NET_ADMIN)) {
2134 spin_lock_irqsave(&self->lock, flags);
2135 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2136 spin_unlock_irqrestore(&self->lock, flags);
2138 case SIOCSMEDIABUSY: /* Set media busy */
2139 if (!capable(CAP_NET_ADMIN)) {
2143 irda_device_set_media_busy(self->netdev, TRUE);
2145 case SIOCGRECEIVING: /* Check if we are receiving right now */
2146 /* This is already protected */
2147 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2155 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2157 struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2159 return &self->stats;
2162 static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
2164 MESSAGE("%s, Suspending\n", driver_name);
2166 if (self->io.suspended)
2169 nsc_ircc_net_close(self->netdev);
2171 self->io.suspended = 1;
2174 static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
2176 if (!self->io.suspended)
2179 nsc_ircc_setup(&self->io);
2180 nsc_ircc_net_open(self->netdev);
2182 MESSAGE("%s, Waking up\n", driver_name);
2184 self->io.suspended = 0;
2187 static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
2189 struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2193 nsc_ircc_suspend(self);
2196 nsc_ircc_wakeup(self);
2203 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2204 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2205 MODULE_LICENSE("GPL");
2208 MODULE_PARM(qos_mtt_bits, "i");
2209 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2210 MODULE_PARM(io, "1-4i");
2211 MODULE_PARM_DESC(io, "Base I/O addresses");
2212 MODULE_PARM(irq, "1-4i");
2213 MODULE_PARM_DESC(irq, "IRQ lines");
2214 MODULE_PARM(dma, "1-4i");
2215 MODULE_PARM_DESC(dma, "DMA channels");
2216 MODULE_PARM(dongle_id, "i");
2217 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2219 module_init(nsc_ircc_init);
2220 module_exit(nsc_ircc_cleanup);