drivers/net/irda/w83977af_ir.c

   1 /*********************************************************************
   2  *
   3  * Filename:      w83977af_ir.c
   4  * Version:       1.0
   5  * Description:   FIR driver for the Winbond W83977AF Super I/O chip
   6  * Status:        Experimental.
   7  * Author:        Paul VanderSpek
   8  * Created at:    Wed Nov  4 11:46:16 1998
   9  * Modified at:   Fri Jan 28 12:10:59 2000
  10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  11  *
  12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
  13  *     Copyright (c) 1998-1999 Rebel.com
  14  *
  15  *     This program is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of
  18  *     the License, or (at your option) any later version.
  19  *
  20  *     Neither Paul VanderSpek nor Rebel.com admit liability nor provide
  21  *     warranty for any of this software. This material is provided "AS-IS"
  22  *     and at no charge.
  23  *
  24  *     If you find bugs in this file, its very likely that the same bug
  25  *     will also be in pc87108.c since the implementations are quite
  26  *     similar.
  27  *
  28  *     Notice that all functions that needs to access the chip in _any_
  29  *     way, must save BSR register on entry, and restore it on exit.
  30  *     It is _very_ important to follow this policy!
  31  *
  32  *         __u8 bank;
  33  *
  34  *         bank = inb( iobase+BSR);
  35  *
  36  *         do_your_stuff_here();
  37  *
  38  *         outb( bank, iobase+BSR);
  39  *
  40  ********************************************************************/
  41
  42 #include <linux/module.h>
  43 #include <linux/config.h>
  44 #include <linux/kernel.h>
  45 #include <linux/types.h>
  46 #include <linux/skbuff.h>
  47 #include <linux/netdevice.h>
  48 #include <linux/ioport.h>
  49 #include <linux/delay.h>
  50 #include <linux/slab.h>
  51 #include <linux/init.h>
  52 #include <linux/rtnetlink.h>
  53
  54 #include <asm/io.h>
  55 #include <asm/dma.h>
  56 #include <asm/byteorder.h>
  57
  58 #include <net/irda/irda.h>
  59 #include <net/irda/wrapper.h>
  60 #include <net/irda/irda_device.h>
  61 #include "w83977af.h"
  62 #include "w83977af_ir.h"
  63
  64 #ifdef  CONFIG_ARCH_NETWINDER            /* Adjust to NetWinder differences */
  65 #undef  CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */
  66 #define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */
  67 #endif
  68 #undef  CONFIG_USE_INTERNAL_TIMER  /* Just cannot make that timer work */
  69 #define CONFIG_USE_W977_PNP        /* Currently needed */
  70 #define PIO_MAX_SPEED       115200
  71
  72 static char *driver_name = "w83977af_ir";
  73 static int  qos_mtt_bits = 0x07;   /* 1 ms or more */
  74
  75 #define CHIP_IO_EXTENT 8
  76
  77 static unsigned int io[] = { 0x180, ~0, ~0, ~0 };
  78 #ifdef CONFIG_ARCH_NETWINDER             /* Adjust to NetWinder differences */
  79 static unsigned int irq[] = { 6, 0, 0, 0 };
  80 #else
  81 static unsigned int irq[] = { 11, 0, 0, 0 };
  82 #endif
  83 static unsigned int dma[] = { 1, 0, 0, 0 };
  84 static unsigned int efbase[] = { W977_EFIO_BASE, W977_EFIO2_BASE };
  85 static unsigned int efio = W977_EFIO_BASE;
  86
  87 static struct w83977af_ir *dev_self[] = { NULL, NULL, NULL, NULL};
  88
  89 /* Some prototypes */
  90 static int  w83977af_open(int i, unsigned int iobase, unsigned int irq,
  91                           unsigned int dma);
  92 static int  w83977af_close(struct w83977af_ir *self);
  93 static int  w83977af_probe(int iobase, int irq, int dma);
  94 static int  w83977af_dma_receive(struct w83977af_ir *self);
  95 static int  w83977af_dma_receive_complete(struct w83977af_ir *self);
  96 static int  w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev);
  97 static int  w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
  98 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
  99 static void w83977af_change_speed(struct w83977af_ir *self, __u32 speed);
 100 static int  w83977af_is_receiving(struct w83977af_ir *self);
 101
 102 static int  w83977af_net_open(struct net_device *dev);
 103 static int  w83977af_net_close(struct net_device *dev);
 104 static int  w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 105 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev);
 106
 107 /*
 108  * Function w83977af_init ()
 109  *
 110  *    Initialize chip. Just try to find out how many chips we are dealing with
 111  *    and where they are
 112  */
 113 static int __init w83977af_init(void)
 114 {
 115         int i;
 116
 117         IRDA_DEBUG(0, "%s()\n", __FUNCTION__ );
 118
 119         for (i=0; (io[i] < 2000) && (i < 4); i++) {
 120                 if (w83977af_open(i, io[i], irq[i], dma[i]) == 0)
 121                         return 0;
 122         }
 123         return -ENODEV;
 124 }
 125
 126 /*
 127  * Function w83977af_cleanup ()
 128  *
 129  *    Close all configured chips
 130  *
 131  */
 132 static void __exit w83977af_cleanup(void)
 133 {
 134         int i;
 135
 136         IRDA_DEBUG(4, "%s()\n", __FUNCTION__ );
 137
 138         for (i=0; i < 4; i++) {
 139                 if (dev_self[i])
 140                         w83977af_close(dev_self[i]);
 141         }
 142 }
 143
 144 /*
 145  * Function w83977af_open (iobase, irq)
 146  *
 147  *    Open driver instance
 148  *
 149  */
 150 int w83977af_open(int i, unsigned int iobase, unsigned int irq,
 151                   unsigned int dma)
 152 {
 153         struct net_device *dev;
 154         struct w83977af_ir *self;
 155         int err;
 156
 157         IRDA_DEBUG(0, "%s()\n", __FUNCTION__ );
 158
 159         /* Lock the port that we need */
 160         if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) {
 161                 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
 162                       __FUNCTION__ , iobase);
 163                 return -ENODEV;
 164         }
 165
 166         if (w83977af_probe(iobase, irq, dma) == -1) {
 167                 err = -1;
 168                 goto err_out;
 169         }
 170         /*
 171          *  Allocate new instance of the driver
 172          */
 173         dev = alloc_irdadev(sizeof(struct w83977af_ir));
 174         if (dev == NULL) {
 175                 printk( KERN_ERR "IrDA: Can't allocate memory for "
 176                         "IrDA control block!\n");
 177                 err = -ENOMEM;
 178                 goto err_out;
 179         }
 180
 181         self = dev->priv;
 182         spin_lock_init(&self->lock);
 183
 184
 185         /* Initialize IO */
 186         self->io.fir_base   = iobase;
 187         self->io.irq       = irq;
 188         self->io.fir_ext   = CHIP_IO_EXTENT;
 189         self->io.dma       = dma;
 190         self->io.fifo_size = 32;
 191
 192         /* Initialize QoS for this device */
 193         irda_init_max_qos_capabilies(&self->qos);
 194
 195         /* The only value we must override it the baudrate */
 196
 197         /* FIXME: The HP HDLS-1100 does not support 1152000! */
 198         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 199                 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
 200
 201         /* The HP HDLS-1100 needs 1 ms according to the specs */
 202         self->qos.min_turn_time.bits = qos_mtt_bits;
 203         irda_qos_bits_to_value(&self->qos);
 204
 205         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 206         self->rx_buff.truesize = 14384;
 207         self->tx_buff.truesize = 4000;
 208
 209         /* Allocate memory if needed */
 210         self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
 211                                               GFP_KERNEL|GFP_DMA);
 212         if (self->rx_buff.head == NULL) {
 213                 err = -ENOMEM;
 214                 goto err_out1;
 215         }
 216
 217         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 218
 219         self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
 220                                               GFP_KERNEL|GFP_DMA);
 221         if (self->tx_buff.head == NULL) {
 222                 err = -ENOMEM;
 223                 goto err_out2;
 224         }
 225         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 226
 227         self->rx_buff.in_frame = FALSE;
 228         self->rx_buff.state = OUTSIDE_FRAME;
 229         self->tx_buff.data = self->tx_buff.head;
 230         self->rx_buff.data = self->rx_buff.head;
 231         self->netdev = dev;
 232
 233         /* Keep track of module usage */
 234         SET_MODULE_OWNER(dev);
 235
 236         /* Override the network functions we need to use */
 237         dev->hard_start_xmit = w83977af_hard_xmit;
 238         dev->open            = w83977af_net_open;
 239         dev->stop            = w83977af_net_close;
 240         dev->do_ioctl        = w83977af_net_ioctl;
 241         dev->get_stats       = w83977af_net_get_stats;
 242
 243         err = register_netdev(dev);
 244         if (err) {
 245                 ERROR("%s(), register_netdevice() failed!\n", __FUNCTION__);
 246                 goto err_out3;
 247         }
 248         MESSAGE("IrDA: Registered device %s\n", dev->name);
 249
 250         /* Need to store self somewhere */
 251         dev_self[i] = self;
 252
 253         return 0;
 254 err_out3:
 255         kfree(self->tx_buff.head);
 256 err_out2:
 257         kfree(self->rx_buff.head);
 258 err_out1:
 259         free_netdev(dev);
 260 err_out:
 261         release_region(iobase, CHIP_IO_EXTENT);
 262         return err;
 263 }
 264
 265 /*
 266  * Function w83977af_close (self)
 267  *
 268  *    Close driver instance
 269  *
 270  */
 271 static int w83977af_close(struct w83977af_ir *self)
 272 {
 273         int iobase;
 274
 275         IRDA_DEBUG(0, "%s()\n", __FUNCTION__ );
 276
 277         iobase = self->io.fir_base;
 278
 279 #ifdef CONFIG_USE_W977_PNP
 280         /* enter PnP configuration mode */
 281         w977_efm_enter(efio);
 282
 283         w977_select_device(W977_DEVICE_IR, efio);
 284
 285         /* Deactivate device */
 286         w977_write_reg(0x30, 0x00, efio);
 287
 288         w977_efm_exit(efio);
 289 #endif /* CONFIG_USE_W977_PNP */
 290
 291         /* Remove netdevice */
 292         unregister_netdev(self->netdev);
 293
 294         /* Release the PORT that this driver is using */
 295         IRDA_DEBUG(0 , "%s(), Releasing Region %03x\n",
 296               __FUNCTION__ , self->io.fir_base);
 297         release_region(self->io.fir_base, self->io.fir_ext);
 298
 299         if (self->tx_buff.head)
 300                 kfree(self->tx_buff.head);
 301
 302         if (self->rx_buff.head)
 303                 kfree(self->rx_buff.head);
 304
 305         free_netdev(self->netdev);
 306
 307         return 0;
 308 }
 309
 310 int w83977af_probe( int iobase, int irq, int dma)
 311 {
 312         int version;
 313         int i;
 314
 315         for (i=0; i < 2; i++) {
 316                 IRDA_DEBUG( 0, "%s()\n", __FUNCTION__ );
 317 #ifdef CONFIG_USE_W977_PNP
 318                 /* Enter PnP configuration mode */
 319                 w977_efm_enter(efbase[i]);
 320
 321                 w977_select_device(W977_DEVICE_IR, efbase[i]);
 322
 323                 /* Configure PnP port, IRQ, and DMA channel */
 324                 w977_write_reg(0x60, (iobase >> 8) & 0xff, efbase[i]);
 325                 w977_write_reg(0x61, (iobase) & 0xff, efbase[i]);
 326
 327                 w977_write_reg(0x70, irq, efbase[i]);
 328 #ifdef CONFIG_ARCH_NETWINDER
 329                 /* Netwinder uses 1 higher than Linux */
 330                 w977_write_reg(0x74, dma+1, efbase[i]);
 331 #else
 332                 w977_write_reg(0x74, dma, efbase[i]);
 333 #endif /*CONFIG_ARCH_NETWINDER */
 334                 w977_write_reg(0x75, 0x04, efbase[i]);  /* Disable Tx DMA */
 335
 336                 /* Set append hardware CRC, enable IR bank selection */
 337                 w977_write_reg(0xf0, APEDCRC|ENBNKSEL, efbase[i]);
 338
 339                 /* Activate device */
 340                 w977_write_reg(0x30, 0x01, efbase[i]);
 341
 342                 w977_efm_exit(efbase[i]);
 343 #endif /* CONFIG_USE_W977_PNP */
 344                 /* Disable Advanced mode */
 345                 switch_bank(iobase, SET2);
 346                 outb(iobase+2, 0x00);
 347
 348                 /* Turn on UART (global) interrupts */
 349                 switch_bank(iobase, SET0);
 350                 outb(HCR_EN_IRQ, iobase+HCR);
 351
 352                 /* Switch to advanced mode */
 353                 switch_bank(iobase, SET2);
 354                 outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1);
 355
 356                 /* Set default IR-mode */
 357                 switch_bank(iobase, SET0);
 358                 outb(HCR_SIR, iobase+HCR);
 359
 360                 /* Read the Advanced IR ID */
 361                 switch_bank(iobase, SET3);
 362                 version = inb(iobase+AUID);
 363
 364                 /* Should be 0x1? */
 365                 if (0x10 == (version & 0xf0)) {
 366                         efio = efbase[i];
 367
 368                         /* Set FIFO size to 32 */
 369                         switch_bank(iobase, SET2);
 370                         outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
 371
 372                         /* Set FIFO threshold to TX17, RX16 */
 373                         switch_bank(iobase, SET0);
 374                         outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST|
 375                              UFR_EN_FIFO,iobase+UFR);
 376
 377                         /* Receiver frame length */
 378                         switch_bank(iobase, SET4);
 379                         outb(2048 & 0xff, iobase+6);
 380                         outb((2048 >> 8) & 0x1f, iobase+7);
 381
 382                         /*
 383                          * Init HP HSDL-1100 transceiver.
 384                          *
 385                          * Set IRX_MSL since we have 2 * receive paths IRRX,
 386                          * and IRRXH. Clear IRSL0D since we want IRSL0 * to
 387                          * be a input pin used for IRRXH
 388                          *
 389                          *   IRRX  pin 37 connected to receiver
 390                          *   IRTX  pin 38 connected to transmitter
 391                          *   FIRRX pin 39 connected to receiver      (IRSL0)
 392                          *   CIRRX pin 40 connected to pin 37
 393                          */
 394                         switch_bank(iobase, SET7);
 395                         outb(0x40, iobase+7);
 396
 397                         MESSAGE("W83977AF (IR) driver loaded. "
 398                                 "Version: 0x%02x\n", version);
 399
 400                         return 0;
 401                 } else {
 402                         /* Try next extented function register address */
 403                         IRDA_DEBUG( 0, "%s(), Wrong chip version", __FUNCTION__ );
 404                 }
 405         }
 406         return -1;
 407 }
 408
 409 void w83977af_change_speed(struct w83977af_ir *self, __u32 speed)
 410 {
 411         int ir_mode = HCR_SIR;
 412         int iobase;
 413         __u8 set;
 414
 415         iobase = self->io.fir_base;
 416
 417         /* Update accounting for new speed */
 418         self->io.speed = speed;
 419
 420         /* Save current bank */
 421         set = inb(iobase+SSR);
 422
 423         /* Disable interrupts */
 424         switch_bank(iobase, SET0);
 425         outb(0, iobase+ICR);
 426
 427         /* Select Set 2 */
 428         switch_bank(iobase, SET2);
 429         outb(0x00, iobase+ABHL);
 430
 431         switch (speed) {
 432         case 9600:   outb(0x0c, iobase+ABLL); break;
 433         case 19200:  outb(0x06, iobase+ABLL); break;
 434         case 38400:  outb(0x03, iobase+ABLL); break;
 435         case 57600:  outb(0x02, iobase+ABLL); break;
 436         case 115200: outb(0x01, iobase+ABLL); break;
 437         case 576000:
 438                 ir_mode = HCR_MIR_576;
 439                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__ );
 440                 break;
 441         case 1152000:
 442                 ir_mode = HCR_MIR_1152;
 443                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__ );
 444                 break;
 445         case 4000000:
 446                 ir_mode = HCR_FIR;
 447                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__ );
 448                 break;
 449         default:
 450                 ir_mode = HCR_FIR;
 451                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", __FUNCTION__ , speed);
 452                 break;
 453         }
 454
 455         /* Set speed mode */
 456         switch_bank(iobase, SET0);
 457         outb(ir_mode, iobase+HCR);
 458
 459         /* set FIFO size to 32 */
 460         switch_bank(iobase, SET2);
 461         outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
 462
 463         /* set FIFO threshold to TX17, RX16 */
 464         switch_bank(iobase, SET0);
 465         outb(0x00, iobase+UFR);        /* Reset */
 466         outb(UFR_EN_FIFO, iobase+UFR); /* First we must enable FIFO */
 467         outb(0xa7, iobase+UFR);
 468
 469         netif_wake_queue(self->netdev);
 470
 471         /* Enable some interrupts so we can receive frames */
 472         switch_bank(iobase, SET0);
 473         if (speed > PIO_MAX_SPEED) {
 474                 outb(ICR_EFSFI, iobase+ICR);
 475                 w83977af_dma_receive(self);
 476         } else
 477                 outb(ICR_ERBRI, iobase+ICR);
 478
 479         /* Restore SSR */
 480         outb(set, iobase+SSR);
 481 }
 482
 483 /*
 484  * Function w83977af_hard_xmit (skb, dev)
 485  *
 486  *    Sets up a DMA transfer to send the current frame.
 487  *
 488  */
 489 int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev)
 490 {
 491         struct w83977af_ir *self;
 492         __s32 speed;
 493         int iobase;
 494         __u8 set;
 495         int mtt;
 496
 497         self = (struct w83977af_ir *) dev->priv;
 498
 499         iobase = self->io.fir_base;
 500
 501         IRDA_DEBUG(4, "%s(%ld), skb->len=%d\n", __FUNCTION__ , jiffies,
 502                    (int) skb->len);
 503
 504         /* Lock transmit buffer */
 505         netif_stop_queue(dev);
 506
 507         /* Check if we need to change the speed */
 508         speed = irda_get_next_speed(skb);
 509         if ((speed != self->io.speed) && (speed != -1)) {
 510                 /* Check for empty frame */
 511                 if (!skb->len) {
 512                         w83977af_change_speed(self, speed);
 513                         dev->trans_start = jiffies;
 514                         dev_kfree_skb(skb);
 515                         return 0;
 516                 } else
 517                         self->new_speed = speed;
 518         }
 519
 520         /* Save current set */
 521         set = inb(iobase+SSR);
 522
 523         /* Decide if we should use PIO or DMA transfer */
 524         if (self->io.speed > PIO_MAX_SPEED) {
 525                 self->tx_buff.data = self->tx_buff.head;
 526                 memcpy(self->tx_buff.data, skb->data, skb->len);
 527                 self->tx_buff.len = skb->len;
 528
 529                 mtt = irda_get_mtt(skb);
 530 #ifdef CONFIG_USE_INTERNAL_TIMER
 531                 if (mtt > 50) {
 532                         /* Adjust for timer resolution */
 533                         mtt /= 1000+1;
 534
 535                         /* Setup timer */
 536                         switch_bank(iobase, SET4);
 537                         outb(mtt & 0xff, iobase+TMRL);
 538                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
 539
 540                         /* Start timer */
 541                         outb(IR_MSL_EN_TMR, iobase+IR_MSL);
 542                         self->io.direction = IO_XMIT;
 543
 544                         /* Enable timer interrupt */
 545                         switch_bank(iobase, SET0);
 546                         outb(ICR_ETMRI, iobase+ICR);
 547                 } else {
 548 #endif
 549                         IRDA_DEBUG(4, "%s(%ld), mtt=%d\n", __FUNCTION__ , jiffies, mtt);
 550                         if (mtt)
 551                                 udelay(mtt);
 552
 553                         /* Enable DMA interrupt */
 554                         switch_bank(iobase, SET0);
 555                         outb(ICR_EDMAI, iobase+ICR);
 556                         w83977af_dma_write(self, iobase);
 557 #ifdef CONFIG_USE_INTERNAL_TIMER
 558                 }
 559 #endif
 560         } else {
 561                 self->tx_buff.data = self->tx_buff.head;
 562                 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
 563                                                    self->tx_buff.truesize);
 564
 565                 /* Add interrupt on tx low level (will fire immediately) */
 566                 switch_bank(iobase, SET0);
 567                 outb(ICR_ETXTHI, iobase+ICR);
 568         }
 569         dev->trans_start = jiffies;
 570         dev_kfree_skb(skb);
 571
 572         /* Restore set register */
 573         outb(set, iobase+SSR);
 574
 575         return 0;
 576 }
 577
 578 /*
 579  * Function w83977af_dma_write (self, iobase)
 580  *
 581  *    Send frame using DMA
 582  *
 583  */
 584 static void w83977af_dma_write(struct w83977af_ir *self, int iobase)
 585 {
 586         __u8 set;
 587 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
 588         unsigned long flags;
 589         __u8 hcr;
 590 #endif
 591         IRDA_DEBUG(4, "%s(), len=%d\n", __FUNCTION__ , self->tx_buff.len);
 592
 593         /* Save current set */
 594         set = inb(iobase+SSR);
 595
 596         /* Disable DMA */
 597         switch_bank(iobase, SET0);
 598         outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
 599
 600         /* Choose transmit DMA channel  */
 601         switch_bank(iobase, SET2);
 602         outb(ADCR1_D_CHSW|/*ADCR1_DMA_F|*/ADCR1_ADV_SL, iobase+ADCR1);
 603 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
 604         spin_lock_irqsave(&self->lock, flags);
 605
 606         disable_dma(self->io.dma);
 607         clear_dma_ff(self->io.dma);
 608         set_dma_mode(self->io.dma, DMA_MODE_READ);
 609         set_dma_addr(self->io.dma, isa_virt_to_bus(self->tx_buff.data));
 610         set_dma_count(self->io.dma, self->tx_buff.len);
 611 #else
 612         irda_setup_dma(self->io.dma, self->tx_buff.data, self->tx_buff.len,
 613                        DMA_MODE_WRITE);
 614 #endif
 615         self->io.direction = IO_XMIT;
 616
 617         /* Enable DMA */
 618         switch_bank(iobase, SET0);
 619 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
 620         hcr = inb(iobase+HCR);
 621         outb(hcr | HCR_EN_DMA, iobase+HCR);
 622         enable_dma(self->io.dma);
 623         spin_unlock_irqrestore(&self->lock, flags);
 624 #else
 625         outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR);
 626 #endif
 627
 628         /* Restore set register */
 629         outb(set, iobase+SSR);
 630 }
 631
 632 /*
 633  * Function w83977af_pio_write (iobase, buf, len, fifo_size)
 634  *
 635  *
 636  *
 637  */
 638 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
 639 {
 640         int actual = 0;
 641         __u8 set;
 642
 643         IRDA_DEBUG(4, "%s()\n", __FUNCTION__ );
 644
 645         /* Save current bank */
 646         set = inb(iobase+SSR);
 647
 648         switch_bank(iobase, SET0);
 649         if (!(inb_p(iobase+USR) & USR_TSRE)) {
 650                 IRDA_DEBUG(4,
 651                            "%s(), warning, FIFO not empty yet!\n", __FUNCTION__  );
 652
 653                 fifo_size -= 17;
 654                 IRDA_DEBUG(4, "%s(), %d bytes left in tx fifo\n",
 655                            __FUNCTION__ , fifo_size);
 656         }
 657
 658         /* Fill FIFO with current frame */
 659         while ((fifo_size-- > 0) && (actual < len)) {
 660                 /* Transmit next byte */
 661                 outb(buf[actual++], iobase+TBR);
 662         }
 663
 664         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
 665                    __FUNCTION__ , fifo_size, actual, len);
 666
 667         /* Restore bank */
 668         outb(set, iobase+SSR);
 669
 670         return actual;
 671 }
 672
 673 /*
 674  * Function w83977af_dma_xmit_complete (self)
 675  *
 676  *    The transfer of a frame in finished. So do the necessary things
 677  *
 678  *
 679  */
 680 static void w83977af_dma_xmit_complete(struct w83977af_ir *self)
 681 {
 682         int iobase;
 683         __u8 set;
 684
 685         IRDA_DEBUG(4, "%s(%ld)\n", __FUNCTION__ , jiffies);
 686
 687         ASSERT(self != NULL, return;);
 688
 689         iobase = self->io.fir_base;
 690
 691         /* Save current set */
 692         set = inb(iobase+SSR);
 693
 694         /* Disable DMA */
 695         switch_bank(iobase, SET0);
 696         outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
 697
 698         /* Check for underrrun! */
 699         if (inb(iobase+AUDR) & AUDR_UNDR) {
 700                 IRDA_DEBUG(0, "%s(), Transmit underrun!\n", __FUNCTION__ );
 701
 702                 self->stats.tx_errors++;
 703                 self->stats.tx_fifo_errors++;
 704
 705                 /* Clear bit, by writing 1 to it */
 706                 outb(AUDR_UNDR, iobase+AUDR);
 707         } else
 708                 self->stats.tx_packets++;
 709
 710
 711         if (self->new_speed) {
 712                 w83977af_change_speed(self, self->new_speed);
 713                 self->new_speed = 0;
 714         }
 715
 716         /* Unlock tx_buff and request another frame */
 717         /* Tell the network layer, that we want more frames */
 718         netif_wake_queue(self->netdev);
 719
 720         /* Restore set */
 721         outb(set, iobase+SSR);
 722 }
 723
 724 /*
 725  * Function w83977af_dma_receive (self)
 726  *
 727  *    Get ready for receiving a frame. The device will initiate a DMA
 728  *    if it starts to receive a frame.
 729  *
 730  */
 731 int w83977af_dma_receive(struct w83977af_ir *self)
 732 {
 733         int iobase;
 734         __u8 set;
 735 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
 736         unsigned long flags;
 737         __u8 hcr;
 738 #endif
 739         ASSERT(self != NULL, return -1;);
 740
 741         IRDA_DEBUG(4, "%s\n", __FUNCTION__ );
 742
 743         iobase= self->io.fir_base;
 744
 745         /* Save current set */
 746         set = inb(iobase+SSR);
 747
 748         /* Disable DMA */
 749         switch_bank(iobase, SET0);
 750         outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
 751
 752         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
 753         switch_bank(iobase, SET2);
 754         outb((inb(iobase+ADCR1) & ~ADCR1_D_CHSW)/*|ADCR1_DMA_F*/|ADCR1_ADV_SL,
 755              iobase+ADCR1);
 756
 757         self->io.direction = IO_RECV;
 758         self->rx_buff.data = self->rx_buff.head;
 759
 760 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
 761         spin_lock_irqsave(&self->lock, flags);
 762
 763         disable_dma(self->io.dma);
 764         clear_dma_ff(self->io.dma);
 765         set_dma_mode(self->io.dma, DMA_MODE_READ);
 766         set_dma_addr(self->io.dma, isa_virt_to_bus(self->rx_buff.data));
 767         set_dma_count(self->io.dma, self->rx_buff.truesize);
 768 #else
 769         irda_setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
 770                        DMA_MODE_READ);
 771 #endif
 772         /*
 773          * Reset Rx FIFO. This will also flush the ST_FIFO, it's very
 774          * important that we don't reset the Tx FIFO since it might not
 775          * be finished transmitting yet
 776          */
 777         switch_bank(iobase, SET0);
 778         outb(UFR_RXTL|UFR_TXTL|UFR_RXF_RST|UFR_EN_FIFO, iobase+UFR);
 779         self->st_fifo.len = self->st_fifo.tail = self->st_fifo.head = 0;
 780
 781         /* Enable DMA */
 782         switch_bank(iobase, SET0);
 783 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
 784         hcr = inb(iobase+HCR);
 785         outb(hcr | HCR_EN_DMA, iobase+HCR);
 786         enable_dma(self->io.dma);
 787         spin_unlock_irqrestore(&self->lock, flags);
 788 #else
 789         outb(inb(iobase+HCR) | HCR_EN_DMA, iobase+HCR);
 790 #endif
 791         /* Restore set */
 792         outb(set, iobase+SSR);
 793
 794         return 0;
 795 }
 796
 797 /*
 798  * Function w83977af_receive_complete (self)
 799  *
 800  *    Finished with receiving a frame
 801  *
 802  */
 803 int w83977af_dma_receive_complete(struct w83977af_ir *self)
 804 {
 805         struct sk_buff *skb;
 806         struct st_fifo *st_fifo;
 807         int len;
 808         int iobase;
 809         __u8 set;
 810         __u8 status;
 811
 812         IRDA_DEBUG(4, "%s\n", __FUNCTION__ );
 813
 814         st_fifo = &self->st_fifo;
 815
 816         iobase = self->io.fir_base;
 817
 818         /* Save current set */
 819         set = inb(iobase+SSR);
 820
 821         iobase = self->io.fir_base;
 822
 823         /* Read status FIFO */
 824         switch_bank(iobase, SET5);
 825         while ((status = inb(iobase+FS_FO)) & FS_FO_FSFDR) {
 826                 st_fifo->entries[st_fifo->tail].status = status;
 827
 828                 st_fifo->entries[st_fifo->tail].len  = inb(iobase+RFLFL);
 829                 st_fifo->entries[st_fifo->tail].len |= inb(iobase+RFLFH) << 8;
 830
 831                 st_fifo->tail++;
 832                 st_fifo->len++;
 833         }
 834
 835         while (st_fifo->len) {
 836                 /* Get first entry */
 837                 status = st_fifo->entries[st_fifo->head].status;
 838                 len    = st_fifo->entries[st_fifo->head].len;
 839                 st_fifo->head++;
 840                 st_fifo->len--;
 841
 842                 /* Check for errors */
 843                 if (status & FS_FO_ERR_MSK) {
 844                         if (status & FS_FO_LST_FR) {
 845                                 /* Add number of lost frames to stats */
 846                                 self->stats.rx_errors += len;
 847                         } else {
 848                                 /* Skip frame */
 849                                 self->stats.rx_errors++;
 850
 851                                 self->rx_buff.data += len;
 852
 853                                 if (status & FS_FO_MX_LEX)
 854                                         self->stats.rx_length_errors++;
 855
 856                                 if (status & FS_FO_PHY_ERR)
 857                                         self->stats.rx_frame_errors++;
 858
 859                                 if (status & FS_FO_CRC_ERR)
 860                                         self->stats.rx_crc_errors++;
 861                         }
 862                         /* The errors below can be reported in both cases */
 863                         if (status & FS_FO_RX_OV)
 864                                 self->stats.rx_fifo_errors++;
 865
 866                         if (status & FS_FO_FSF_OV)
 867                                 self->stats.rx_fifo_errors++;
 868
 869                 } else {
 870                         /* Check if we have transferred all data to memory */
 871                         switch_bank(iobase, SET0);
 872                         if (inb(iobase+USR) & USR_RDR) {
 873 #ifdef CONFIG_USE_INTERNAL_TIMER
 874                                 /* Put this entry back in fifo */
 875                                 st_fifo->head--;
 876                                 st_fifo->len++;
 877                                 st_fifo->entries[st_fifo->head].status = status;
 878                                 st_fifo->entries[st_fifo->head].len = len;
 879
 880                                 /* Restore set register */
 881                                 outb(set, iobase+SSR);
 882
 883                                 return FALSE;   /* I'll be back! */
 884 #else
 885                                 udelay(80); /* Should be enough!? */
 886 #endif
 887                         }
 888
 889                         skb = dev_alloc_skb(len+1);
 890                         if (skb == NULL)  {
 891                                 printk(KERN_INFO
 892                                        "%s(), memory squeeze, dropping frame.\n", __FUNCTION__);
 893                                 /* Restore set register */
 894                                 outb(set, iobase+SSR);
 895
 896                                 return FALSE;
 897                         }
 898
 899                         /*  Align to 20 bytes */
 900                         skb_reserve(skb, 1);
 901
 902                         /* Copy frame without CRC */
 903                         if (self->io.speed < 4000000) {
 904                                 skb_put(skb, len-2);
 905                                 memcpy(skb->data, self->rx_buff.data, len-2);
 906                         } else {
 907                                 skb_put(skb, len-4);
 908                                 memcpy(skb->data, self->rx_buff.data, len-4);
 909                         }
 910
 911                         /* Move to next frame */
 912                         self->rx_buff.data += len;
 913                         self->stats.rx_packets++;
 914
 915                         skb->dev = self->netdev;
 916                         skb->mac.raw  = skb->data;
 917                         skb->protocol = htons(ETH_P_IRDA);
 918                         netif_rx(skb);
 919                         self->netdev->last_rx = jiffies;
 920                 }
 921         }
 922         /* Restore set register */
 923         outb(set, iobase+SSR);
 924
 925         return TRUE;
 926 }
 927
 928 /*
 929  * Function pc87108_pio_receive (self)
 930  *
 931  *    Receive all data in receiver FIFO
 932  *
 933  */
 934 static void w83977af_pio_receive(struct w83977af_ir *self)
 935 {
 936         __u8 byte = 0x00;
 937         int iobase;
 938
 939         IRDA_DEBUG(4, "%s()\n", __FUNCTION__ );
 940
 941         ASSERT(self != NULL, return;);
 942
 943         iobase = self->io.fir_base;
 944
 945         /*  Receive all characters in Rx FIFO */
 946         do {
 947                 byte = inb(iobase+RBR);
 948                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
 949                                   byte);
 950         } while (inb(iobase+USR) & USR_RDR); /* Data available */
 951 }
 952
 953 /*
 954  * Function w83977af_sir_interrupt (self, eir)
 955  *
 956  *    Handle SIR interrupt
 957  *
 958  */
 959 static __u8 w83977af_sir_interrupt(struct w83977af_ir *self, int isr)
 960 {
 961         int actual;
 962         __u8 new_icr = 0;
 963         __u8 set;
 964         int iobase;
 965
 966         IRDA_DEBUG(4, "%s(), isr=%#x\n", __FUNCTION__ , isr);
 967
 968         iobase = self->io.fir_base;
 969         /* Transmit FIFO low on data */
 970         if (isr & ISR_TXTH_I) {
 971                 /* Write data left in transmit buffer */
 972                 actual = w83977af_pio_write(self->io.fir_base,
 973                                             self->tx_buff.data,
 974                                             self->tx_buff.len,
 975                                             self->io.fifo_size);
 976
 977                 self->tx_buff.data += actual;
 978                 self->tx_buff.len  -= actual;
 979
 980                 self->io.direction = IO_XMIT;
 981
 982                 /* Check if finished */
 983                 if (self->tx_buff.len > 0) {
 984                         new_icr |= ICR_ETXTHI;
 985                 } else {
 986                         set = inb(iobase+SSR);
 987                         switch_bank(iobase, SET0);
 988                         outb(AUDR_SFEND, iobase+AUDR);
 989                         outb(set, iobase+SSR);
 990
 991                         self->stats.tx_packets++;
 992
 993                         /* Feed me more packets */
 994                         netif_wake_queue(self->netdev);
 995                         new_icr |= ICR_ETBREI;
 996                 }
 997         }
 998         /* Check if transmission has completed */
 999         if (isr & ISR_TXEMP_I) {
1000                 /* Check if we need to change the speed? */
1001                 if (self->new_speed) {
1002                         IRDA_DEBUG(2,
1003                                    "%s(), Changing speed!\n", __FUNCTION__ );
1004                         w83977af_change_speed(self, self->new_speed);
1005                         self->new_speed = 0;
1006                 }
1007
1008                 /* Turn around and get ready to receive some data */
1009                 self->io.direction = IO_RECV;
1010                 new_icr |= ICR_ERBRI;
1011         }
1012
1013         /* Rx FIFO threshold or timeout */
1014         if (isr & ISR_RXTH_I) {
1015                 w83977af_pio_receive(self);
1016
1017                 /* Keep receiving */
1018                 new_icr |= ICR_ERBRI;
1019         }
1020         return new_icr;
1021 }
1022
1023 /*
1024  * Function pc87108_fir_interrupt (self, eir)
1025  *
1026  *    Handle MIR/FIR interrupt
1027  *
1028  */
1029 static __u8 w83977af_fir_interrupt(struct w83977af_ir *self, int isr)
1030 {
1031         __u8 new_icr = 0;
1032         __u8 set;
1033         int iobase;
1034
1035         iobase = self->io.fir_base;
1036         set = inb(iobase+SSR);
1037
1038         /* End of frame detected in FIFO */
1039         if (isr & (ISR_FEND_I|ISR_FSF_I)) {
1040                 if (w83977af_dma_receive_complete(self)) {
1041
1042                         /* Wait for next status FIFO interrupt */
1043                         new_icr |= ICR_EFSFI;
1044                 } else {
1045                         /* DMA not finished yet */
1046
1047                         /* Set timer value, resolution 1 ms */
1048                         switch_bank(iobase, SET4);
1049                         outb(0x01, iobase+TMRL); /* 1 ms */
1050                         outb(0x00, iobase+TMRH);
1051
1052                         /* Start timer */
1053                         outb(IR_MSL_EN_TMR, iobase+IR_MSL);
1054
1055                         new_icr |= ICR_ETMRI;
1056                 }
1057         }
1058         /* Timer finished */
1059         if (isr & ISR_TMR_I) {
1060                 /* Disable timer */
1061                 switch_bank(iobase, SET4);
1062                 outb(0, iobase+IR_MSL);
1063
1064                 /* Clear timer event */
1065                 /* switch_bank(iobase, SET0); */
1066 /*              outb(ASCR_CTE, iobase+ASCR); */
1067
1068                 /* Check if this is a TX timer interrupt */
1069                 if (self->io.direction == IO_XMIT) {
1070                         w83977af_dma_write(self, iobase);
1071
1072                         new_icr |= ICR_EDMAI;
1073                 } else {
1074                         /* Check if DMA has now finished */
1075                         w83977af_dma_receive_complete(self);
1076
1077                         new_icr |= ICR_EFSFI;
1078                 }
1079         }
1080         /* Finished with DMA */
1081         if (isr & ISR_DMA_I) {
1082                 w83977af_dma_xmit_complete(self);
1083
1084                 /* Check if there are more frames to be transmitted */
1085                 /* if (irda_device_txqueue_empty(self)) { */
1086
1087                 /* Prepare for receive
1088                  *
1089                  * ** Netwinder Tx DMA likes that we do this anyway **
1090                  */
1091                 w83977af_dma_receive(self);
1092                 new_icr = ICR_EFSFI;
1093                /* } */
1094         }
1095
1096         /* Restore set */
1097         outb(set, iobase+SSR);
1098
1099         return new_icr;
1100 }
1101
1102 /*
1103  * Function w83977af_interrupt (irq, dev_id, regs)
1104  *
1105  *    An interrupt from the chip has arrived. Time to do some work
1106  *
1107  */
1108 static irqreturn_t w83977af_interrupt(int irq, void *dev_id,
1109                                         struct pt_regs *regs)
1110 {
1111         struct net_device *dev = (struct net_device *) dev_id;
1112         struct w83977af_ir *self;
1113         __u8 set, icr, isr;
1114         int iobase;
1115
1116         if (!dev) {
1117                 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1118                         driver_name, irq);
1119                 return IRQ_NONE;
1120         }
1121         self = (struct w83977af_ir *) dev->priv;
1122
1123         iobase = self->io.fir_base;
1124
1125         /* Save current bank */
1126         set = inb(iobase+SSR);
1127         switch_bank(iobase, SET0);
1128
1129         icr = inb(iobase+ICR);
1130         isr = inb(iobase+ISR) & icr; /* Mask out the interesting ones */
1131
1132         outb(0, iobase+ICR); /* Disable interrupts */
1133
1134         if (isr) {
1135                 /* Dispatch interrupt handler for the current speed */
1136                 if (self->io.speed > PIO_MAX_SPEED )
1137                         icr = w83977af_fir_interrupt(self, isr);
1138                 else
1139                         icr = w83977af_sir_interrupt(self, isr);
1140         }
1141
1142         outb(icr, iobase+ICR);    /* Restore (new) interrupts */
1143         outb(set, iobase+SSR);    /* Restore bank register */
1144         return IRQ_RETVAL(isr);
1145 }
1146
1147 /*
1148  * Function w83977af_is_receiving (self)
1149  *
1150  *    Return TRUE is we are currently receiving a frame
1151  *
1152  */
1153 static int w83977af_is_receiving(struct w83977af_ir *self)
1154 {
1155         int status = FALSE;
1156         int iobase;
1157         __u8 set;
1158
1159         ASSERT(self != NULL, return FALSE;);
1160
1161         if (self->io.speed > 115200) {
1162                 iobase = self->io.fir_base;
1163
1164                 /* Check if rx FIFO is not empty */
1165                 set = inb(iobase+SSR);
1166                 switch_bank(iobase, SET2);
1167                 if ((inb(iobase+RXFDTH) & 0x3f) != 0) {
1168                         /* We are receiving something */
1169                         status =  TRUE;
1170                 }
1171                 outb(set, iobase+SSR);
1172         } else
1173                 status = (self->rx_buff.state != OUTSIDE_FRAME);
1174
1175         return status;
1176 }
1177
1178 /*
1179  * Function w83977af_net_open (dev)
1180  *
1181  *    Start the device
1182  *
1183  */
1184 static int w83977af_net_open(struct net_device *dev)
1185 {
1186         struct w83977af_ir *self;
1187         int iobase;
1188         char hwname[32];
1189         __u8 set;
1190
1191         IRDA_DEBUG(0, "%s()\n", __FUNCTION__ );
1192
1193         ASSERT(dev != NULL, return -1;);
1194         self = (struct w83977af_ir *) dev->priv;
1195
1196         ASSERT(self != NULL, return 0;);
1197
1198         iobase = self->io.fir_base;
1199
1200         if (request_irq(self->io.irq, w83977af_interrupt, 0, dev->name,
1201                         (void *) dev)) {
1202                 return -EAGAIN;
1203         }
1204         /*
1205          * Always allocate the DMA channel after the IRQ,
1206          * and clean up on failure.
1207          */
1208         if (request_dma(self->io.dma, dev->name)) {
1209                 free_irq(self->io.irq, self);
1210                 return -EAGAIN;
1211         }
1212
1213         /* Save current set */
1214         set = inb(iobase+SSR);
1215
1216         /* Enable some interrupts so we can receive frames again */
1217         switch_bank(iobase, SET0);
1218         if (self->io.speed > 115200) {
1219                 outb(ICR_EFSFI, iobase+ICR);
1220                 w83977af_dma_receive(self);
1221         } else
1222                 outb(ICR_ERBRI, iobase+ICR);
1223
1224         /* Restore bank register */
1225         outb(set, iobase+SSR);
1226
1227         /* Ready to play! */
1228         netif_start_queue(dev);
1229
1230         /* Give self a hardware name */
1231         sprintf(hwname, "w83977af @ 0x%03x", self->io.fir_base);
1232
1233         /*
1234          * Open new IrLAP layer instance, now that everything should be
1235          * initialized properly
1236          */
1237         self->irlap = irlap_open(dev, &self->qos, hwname);
1238
1239         return 0;
1240 }
1241
1242 /*
1243  * Function w83977af_net_close (dev)
1244  *
1245  *    Stop the device
1246  *
1247  */
1248 static int w83977af_net_close(struct net_device *dev)
1249 {
1250         struct w83977af_ir *self;
1251         int iobase;
1252         __u8 set;
1253
1254         IRDA_DEBUG(0, "%s()\n", __FUNCTION__ );
1255
1256         ASSERT(dev != NULL, return -1;);
1257
1258         self = (struct w83977af_ir *) dev->priv;
1259
1260         ASSERT(self != NULL, return 0;);
1261
1262         iobase = self->io.fir_base;
1263
1264         /* Stop device */
1265         netif_stop_queue(dev);
1266
1267         /* Stop and remove instance of IrLAP */
1268         if (self->irlap)
1269                 irlap_close(self->irlap);
1270         self->irlap = NULL;
1271
1272         disable_dma(self->io.dma);
1273
1274         /* Save current set */
1275         set = inb(iobase+SSR);
1276
1277         /* Disable interrupts */
1278         switch_bank(iobase, SET0);
1279         outb(0, iobase+ICR);
1280
1281         free_irq(self->io.irq, dev);
1282         free_dma(self->io.dma);
1283
1284         /* Restore bank register */
1285         outb(set, iobase+SSR);
1286
1287         return 0;
1288 }
1289
1290 /*
1291  * Function w83977af_net_ioctl (dev, rq, cmd)
1292  *
1293  *    Process IOCTL commands for this device
1294  *
1295  */
1296 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1297 {
1298         struct if_irda_req *irq = (struct if_irda_req *) rq;
1299         struct w83977af_ir *self;
1300         unsigned long flags;
1301         int ret = 0;
1302
1303         ASSERT(dev != NULL, return -1;);
1304
1305         self = dev->priv;
1306
1307         ASSERT(self != NULL, return -1;);
1308
1309         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__ , dev->name, cmd);
1310
1311         spin_lock_irqsave(&self->lock, flags);
1312
1313         switch (cmd) {
1314         case SIOCSBANDWIDTH: /* Set bandwidth */
1315                 if (!capable(CAP_NET_ADMIN)) {
1316                         ret = -EPERM;
1317                         goto out;
1318                 }
1319                 w83977af_change_speed(self, irq->ifr_baudrate);
1320                 break;
1321         case SIOCSMEDIABUSY: /* Set media busy */
1322                 if (!capable(CAP_NET_ADMIN)) {
1323                         ret = -EPERM;
1324                         goto out;
1325                 }
1326                 irda_device_set_media_busy(self->netdev, TRUE);
1327                 break;
1328         case SIOCGRECEIVING: /* Check if we are receiving right now */
1329                 irq->ifr_receiving = w83977af_is_receiving(self);
1330                 break;
1331         default:
1332                 ret = -EOPNOTSUPP;
1333         }
1334 out:
1335         spin_unlock_irqrestore(&self->lock, flags);
1336         return ret;
1337 }
1338
1339 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev)
1340 {
1341         struct w83977af_ir *self = (struct w83977af_ir *) dev->priv;
1342
1343         return &self->stats;
1344 }
1345
1346 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
1347 MODULE_DESCRIPTION("Winbond W83977AF IrDA Device Driver");
1348 MODULE_LICENSE("GPL");
1349
1350
1351 MODULE_PARM(qos_mtt_bits, "i");
1352 MODULE_PARM_DESC(qos_mtt_bits, "Mimimum Turn Time");
1353 MODULE_PARM(io, "1-4i");
1354 MODULE_PARM_DESC(io, "Base I/O addresses");
1355 MODULE_PARM(irq, "1-4i");
1356 MODULE_PARM_DESC(irq, "IRQ lines");
1357
1358 /*
1359  * Function init_module (void)
1360  *
1361  *
1362  *
1363  */
1364 module_init(w83977af_init);
1365
1366 /*
1367  * Function cleanup_module (void)
1368  *
1369  *
1370  *
1371  */
1372 module_exit(w83977af_cleanup);