1 /*******************************************************************************
4 Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 The full GNU General Public License is included in this distribution in the
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
30 /* Local prototypes */
31 static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
33 static void ixgb_shift_out_bits(struct ixgb_hw *hw,
35 static void ixgb_standby_eeprom(struct ixgb_hw *hw);
37 static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw);
39 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
41 /******************************************************************************
42 * Raises the EEPROM's clock input.
44 * hw - Struct containing variables accessed by shared code
45 * eecd_reg - EECD's current value
46 *****************************************************************************/
48 ixgb_raise_clock(struct ixgb_hw *hw, u32 * eecd_reg)
50 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
51 * wait 50 microseconds.
53 *eecd_reg = *eecd_reg | IXGB_EECD_SK;
54 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
59 /******************************************************************************
60 * Lowers the EEPROM's clock input.
62 * hw - Struct containing variables accessed by shared code
63 * eecd_reg - EECD's current value
64 *****************************************************************************/
66 ixgb_lower_clock(struct ixgb_hw *hw, u32 * eecd_reg)
68 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
69 * wait 50 microseconds.
71 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
72 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
77 /******************************************************************************
78 * Shift data bits out to the EEPROM.
80 * hw - Struct containing variables accessed by shared code
81 * data - data to send to the EEPROM
82 * count - number of bits to shift out
83 *****************************************************************************/
85 ixgb_shift_out_bits(struct ixgb_hw *hw, u16 data, u16 count)
90 /* We need to shift "count" bits out to the EEPROM. So, value in the
91 * "data" parameter will be shifted out to the EEPROM one bit at a time.
92 * In order to do this, "data" must be broken down into bits.
94 mask = 0x01 << (count - 1);
95 eecd_reg = IXGB_READ_REG(hw, EECD);
96 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
98 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
99 * and then raising and then lowering the clock (the SK bit controls
100 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM
101 * by setting "DI" to "0" and then raising and then lowering the clock.
103 eecd_reg &= ~IXGB_EECD_DI;
106 eecd_reg |= IXGB_EECD_DI;
108 IXGB_WRITE_REG(hw, EECD, eecd_reg);
112 ixgb_raise_clock(hw, &eecd_reg);
113 ixgb_lower_clock(hw, &eecd_reg);
119 /* We leave the "DI" bit set to "0" when we leave this routine. */
120 eecd_reg &= ~IXGB_EECD_DI;
121 IXGB_WRITE_REG(hw, EECD, eecd_reg);
125 /******************************************************************************
126 * Shift data bits in from the EEPROM
128 * hw - Struct containing variables accessed by shared code
129 *****************************************************************************/
131 ixgb_shift_in_bits(struct ixgb_hw *hw)
137 /* In order to read a register from the EEPROM, we need to shift 16 bits
138 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
139 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
140 * bit. During this "shifting in" process the "DI" bit should always be
144 eecd_reg = IXGB_READ_REG(hw, EECD);
146 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
149 for (i = 0; i < 16; i++) {
151 ixgb_raise_clock(hw, &eecd_reg);
153 eecd_reg = IXGB_READ_REG(hw, EECD);
155 eecd_reg &= ~(IXGB_EECD_DI);
156 if (eecd_reg & IXGB_EECD_DO)
159 ixgb_lower_clock(hw, &eecd_reg);
165 /******************************************************************************
166 * Prepares EEPROM for access
168 * hw - Struct containing variables accessed by shared code
170 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
171 * function should be called before issuing a command to the EEPROM.
172 *****************************************************************************/
174 ixgb_setup_eeprom(struct ixgb_hw *hw)
178 eecd_reg = IXGB_READ_REG(hw, EECD);
180 /* Clear SK and DI */
181 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
182 IXGB_WRITE_REG(hw, EECD, eecd_reg);
185 eecd_reg |= IXGB_EECD_CS;
186 IXGB_WRITE_REG(hw, EECD, eecd_reg);
190 /******************************************************************************
191 * Returns EEPROM to a "standby" state
193 * hw - Struct containing variables accessed by shared code
194 *****************************************************************************/
196 ixgb_standby_eeprom(struct ixgb_hw *hw)
200 eecd_reg = IXGB_READ_REG(hw, EECD);
203 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
204 IXGB_WRITE_REG(hw, EECD, eecd_reg);
208 eecd_reg |= IXGB_EECD_SK;
209 IXGB_WRITE_REG(hw, EECD, eecd_reg);
213 eecd_reg |= IXGB_EECD_CS;
214 IXGB_WRITE_REG(hw, EECD, eecd_reg);
218 eecd_reg &= ~IXGB_EECD_SK;
219 IXGB_WRITE_REG(hw, EECD, eecd_reg);
224 /******************************************************************************
225 * Raises then lowers the EEPROM's clock pin
227 * hw - Struct containing variables accessed by shared code
228 *****************************************************************************/
230 ixgb_clock_eeprom(struct ixgb_hw *hw)
234 eecd_reg = IXGB_READ_REG(hw, EECD);
236 /* Rising edge of clock */
237 eecd_reg |= IXGB_EECD_SK;
238 IXGB_WRITE_REG(hw, EECD, eecd_reg);
241 /* Falling edge of clock */
242 eecd_reg &= ~IXGB_EECD_SK;
243 IXGB_WRITE_REG(hw, EECD, eecd_reg);
248 /******************************************************************************
249 * Terminates a command by lowering the EEPROM's chip select pin
251 * hw - Struct containing variables accessed by shared code
252 *****************************************************************************/
254 ixgb_cleanup_eeprom(struct ixgb_hw *hw)
258 eecd_reg = IXGB_READ_REG(hw, EECD);
260 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
262 IXGB_WRITE_REG(hw, EECD, eecd_reg);
264 ixgb_clock_eeprom(hw);
268 /******************************************************************************
269 * Waits for the EEPROM to finish the current command.
271 * hw - Struct containing variables accessed by shared code
273 * The command is done when the EEPROM's data out pin goes high.
276 * TRUE: EEPROM data pin is high before timeout.
277 * FALSE: Time expired.
278 *****************************************************************************/
280 ixgb_wait_eeprom_command(struct ixgb_hw *hw)
285 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
286 * the command in question.
288 ixgb_standby_eeprom(hw);
290 /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM will
291 * signal that the command has been completed by raising the DO signal.
292 * If DO does not go high in 10 milliseconds, then error out.
294 for (i = 0; i < 200; i++) {
295 eecd_reg = IXGB_READ_REG(hw, EECD);
297 if (eecd_reg & IXGB_EECD_DO)
306 /******************************************************************************
307 * Verifies that the EEPROM has a valid checksum
309 * hw - Struct containing variables accessed by shared code
311 * Reads the first 64 16 bit words of the EEPROM and sums the values read.
312 * If the the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
316 * TRUE: Checksum is valid
317 * FALSE: Checksum is not valid.
318 *****************************************************************************/
320 ixgb_validate_eeprom_checksum(struct ixgb_hw * hw)
325 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
326 checksum += ixgb_read_eeprom(hw, i);
328 if (checksum == (u16) EEPROM_SUM)
334 /******************************************************************************
335 * Calculates the EEPROM checksum and writes it to the EEPROM
337 * hw - Struct containing variables accessed by shared code
339 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
340 * Writes the difference to word offset 63 of the EEPROM.
341 *****************************************************************************/
343 ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
348 for (i = 0; i < EEPROM_CHECKSUM_REG; i++)
349 checksum += ixgb_read_eeprom(hw, i);
351 checksum = (u16) EEPROM_SUM - checksum;
353 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
357 /******************************************************************************
358 * Writes a 16 bit word to a given offset in the EEPROM.
360 * hw - Struct containing variables accessed by shared code
361 * reg - offset within the EEPROM to be written to
362 * data - 16 bit word to be writen to the EEPROM
364 * If ixgb_update_eeprom_checksum is not called after this function, the
365 * EEPROM will most likely contain an invalid checksum.
367 *****************************************************************************/
369 ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
371 /* Prepare the EEPROM for writing */
372 ixgb_setup_eeprom(hw);
374 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
375 * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
377 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
378 ixgb_shift_out_bits(hw, 0, 4);
380 /* Prepare the EEPROM */
381 ixgb_standby_eeprom(hw);
383 /* Send the Write command (3-bit opcode + 6-bit addr) */
384 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
385 ixgb_shift_out_bits(hw, offset, 6);
388 ixgb_shift_out_bits(hw, data, 16);
390 ixgb_wait_eeprom_command(hw);
392 /* Recover from write */
393 ixgb_standby_eeprom(hw);
395 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
396 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
399 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
400 ixgb_shift_out_bits(hw, 0, 4);
402 /* Done with writing */
403 ixgb_cleanup_eeprom(hw);
408 /******************************************************************************
409 * Reads a 16 bit word from the EEPROM.
411 * hw - Struct containing variables accessed by shared code
412 * offset - offset of 16 bit word in the EEPROM to read
415 * The 16-bit value read from the eeprom
416 *****************************************************************************/
418 ixgb_read_eeprom(struct ixgb_hw * hw, u16 offset)
422 /* Prepare the EEPROM for reading */
423 ixgb_setup_eeprom(hw);
425 /* Send the READ command (opcode + addr) */
426 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
428 * We have a 64 word EEPROM, there are 6 address bits
430 ixgb_shift_out_bits(hw, offset, 6);
433 data = ixgb_shift_in_bits(hw);
435 /* End this read operation */
436 ixgb_standby_eeprom(hw);
441 /******************************************************************************
442 * Reads eeprom and stores data in shared structure.
443 * Validates eeprom checksum and eeprom signature.
445 * hw - Struct containing variables accessed by shared code
448 * TRUE: if eeprom read is successful
450 *****************************************************************************/
452 ixgb_get_eeprom_data(struct ixgb_hw * hw)
456 struct ixgb_ee_map_type *ee_map;
458 DEBUGFUNC("ixgb_get_eeprom_data");
460 ee_map = (struct ixgb_ee_map_type *) hw->eeprom;
462 DEBUGOUT("ixgb_ee: Reading eeprom data\n");
463 for (i = 0; i < IXGB_EEPROM_SIZE; i++) {
465 ee_data = ixgb_read_eeprom(hw, i);
467 hw->eeprom[i] = le16_to_cpu(ee_data);
470 if (checksum != (u16) EEPROM_SUM) {
471 DEBUGOUT("ixgb_ee: Checksum invalid.\n");
475 if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
476 != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
477 DEBUGOUT("ixgb_ee: Signature invalid.\n");
484 /******************************************************************************
485 * Local function to check if the eeprom signature is good
486 * If the eeprom signature is good, calls ixgb)get_eeprom_data.
488 * hw - Struct containing variables accessed by shared code
491 * TRUE: eeprom signature was good and the eeprom read was successful
493 ******************************************************************************/
495 ixgb_check_and_get_eeprom_data(struct ixgb_hw *hw)
497 struct ixgb_ee_map_type *ee_map =
498 (struct ixgb_ee_map_type *) hw->eeprom;
500 if ((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK))
501 == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) {
504 return ixgb_get_eeprom_data(hw);
508 /******************************************************************************
509 * return the mac address from EEPROM
511 * hw - Struct containing variables accessed by shared code
512 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
515 ******************************************************************************/
517 ixgb_get_ee_mac_addr(struct ixgb_hw *hw, u8 * mac_addr)
520 struct ixgb_ee_map_type *ee_map =
521 (struct ixgb_ee_map_type *) hw->eeprom;
523 DEBUGFUNC("ixgb_get_ee_mac_addr");
525 if (ixgb_check_and_get_eeprom_data(hw) == TRUE) {
526 for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) {
527 mac_addr[i] = ee_map->mac_addr[i];
528 DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]);
533 /******************************************************************************
534 * return the compatibility flags from EEPROM
536 * hw - Struct containing variables accessed by shared code
539 * compatibility flags if EEPROM contents are valid, 0 otherwise
540 ******************************************************************************/
542 ixgb_get_ee_compatibility(struct ixgb_hw *hw)
544 struct ixgb_ee_map_type *ee_map =
545 (struct ixgb_ee_map_type *) hw->eeprom;
547 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
548 return (ee_map->compatibility);
553 /******************************************************************************
554 * return the Printed Board Assembly number from EEPROM
556 * hw - Struct containing variables accessed by shared code
559 * PBA number if EEPROM contents are valid, 0 otherwise
560 ******************************************************************************/
562 ixgb_get_ee_pba_number(struct ixgb_hw * hw)
564 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
565 return (le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
566 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG]) << 16));
571 /******************************************************************************
572 * return the Initialization Control Word 1 from EEPROM
574 * hw - Struct containing variables accessed by shared code
577 * Initialization Control Word 1 if EEPROM contents are valid, 0 otherwise
578 ******************************************************************************/
580 ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw * hw)
582 struct ixgb_ee_map_type *ee_map =
583 (struct ixgb_ee_map_type *) hw->eeprom;
585 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
586 return (ee_map->init_ctrl_reg_1);
591 /******************************************************************************
592 * return the Initialization Control Word 2 from EEPROM
594 * hw - Struct containing variables accessed by shared code
597 * Initialization Control Word 2 if EEPROM contents are valid, 0 otherwise
598 ******************************************************************************/
600 ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw * hw)
602 struct ixgb_ee_map_type *ee_map =
603 (struct ixgb_ee_map_type *) hw->eeprom;
605 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
606 return (ee_map->init_ctrl_reg_2);
611 /******************************************************************************
612 * return the Subsystem Id from EEPROM
614 * hw - Struct containing variables accessed by shared code
617 * Subsystem Id if EEPROM contents are valid, 0 otherwise
618 ******************************************************************************/
620 ixgb_get_ee_subsystem_id(struct ixgb_hw * hw)
622 struct ixgb_ee_map_type *ee_map =
623 (struct ixgb_ee_map_type *) hw->eeprom;
625 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
626 return (ee_map->subsystem_id);
631 /******************************************************************************
632 * return the Sub Vendor Id from EEPROM
634 * hw - Struct containing variables accessed by shared code
637 * Sub Vendor Id if EEPROM contents are valid, 0 otherwise
638 ******************************************************************************/
640 ixgb_get_ee_subvendor_id(struct ixgb_hw * hw)
642 struct ixgb_ee_map_type *ee_map =
643 (struct ixgb_ee_map_type *) hw->eeprom;
645 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
646 return (ee_map->subvendor_id);
651 /******************************************************************************
652 * return the Device Id from EEPROM
654 * hw - Struct containing variables accessed by shared code
657 * Device Id if EEPROM contents are valid, 0 otherwise
658 ******************************************************************************/
660 ixgb_get_ee_device_id(struct ixgb_hw * hw)
662 struct ixgb_ee_map_type *ee_map =
663 (struct ixgb_ee_map_type *) hw->eeprom;
665 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
666 return (ee_map->device_id);
671 /******************************************************************************
672 * return the Vendor Id from EEPROM
674 * hw - Struct containing variables accessed by shared code
677 * Device Id if EEPROM contents are valid, 0 otherwise
678 ******************************************************************************/
680 ixgb_get_ee_vendor_id(struct ixgb_hw * hw)
682 struct ixgb_ee_map_type *ee_map =
683 (struct ixgb_ee_map_type *) hw->eeprom;
685 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
686 return (ee_map->vendor_id);
691 /******************************************************************************
692 * return the Software Defined Pins Register from EEPROM
694 * hw - Struct containing variables accessed by shared code
697 * SDP Register if EEPROM contents are valid, 0 otherwise
698 ******************************************************************************/
700 ixgb_get_ee_swdpins_reg(struct ixgb_hw * hw)
702 struct ixgb_ee_map_type *ee_map =
703 (struct ixgb_ee_map_type *) hw->eeprom;
705 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
706 return (ee_map->swdpins_reg);
711 /******************************************************************************
712 * return the D3 Power Management Bits from EEPROM
714 * hw - Struct containing variables accessed by shared code
717 * D3 Power Management Bits if EEPROM contents are valid, 0 otherwise
718 ******************************************************************************/
720 ixgb_get_ee_d3_power(struct ixgb_hw * hw)
722 struct ixgb_ee_map_type *ee_map =
723 (struct ixgb_ee_map_type *) hw->eeprom;
725 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
726 return (ee_map->d3_power);
731 /******************************************************************************
732 * return the D0 Power Management Bits from EEPROM
734 * hw - Struct containing variables accessed by shared code
737 * D0 Power Management Bits if EEPROM contents are valid, 0 otherwise
738 ******************************************************************************/
740 ixgb_get_ee_d0_power(struct ixgb_hw * hw)
742 struct ixgb_ee_map_type *ee_map =
743 (struct ixgb_ee_map_type *) hw->eeprom;
745 if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
746 return (ee_map->d0_power);