1 /*******************************************************************************
4 Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 The full GNU General Public License is included in this distribution in the
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #define IXGB_EEPROM_SIZE 64 /* Size in words */
33 #define IXGB_ETH_LENGTH_OF_ADDRESS 6
36 #define EEPROM_READ_OPCODE 0x6 /* EERPOM read opcode */
37 #define EEPROM_WRITE_OPCODE 0x5 /* EERPOM write opcode */
38 #define EEPROM_ERASE_OPCODE 0x7 /* EERPOM erase opcode */
39 #define EEPROM_EWEN_OPCODE 0x13 /* EERPOM erase/write enable */
40 #define EEPROM_EWDS_OPCODE 0x10 /* EERPOM erast/write disable */
42 /* EEPROM MAP (Word Offsets) */
43 #define EEPROM_IA_1_2_REG 0x0000
44 #define EEPROM_IA_3_4_REG 0x0001
45 #define EEPROM_IA_5_6_REG 0x0002
46 #define EEPROM_COMPATIBILITY_REG 0x0003
47 #define EEPROM_PBA_1_2_REG 0x0008
48 #define EEPROM_PBA_3_4_REG 0x0009
49 #define EEPROM_INIT_CONTROL1_REG 0x000A
50 #define EEPROM_SUBSYS_ID_REG 0x000B
51 #define EEPROM_SUBVEND_ID_REG 0x000C
52 #define EEPROM_DEVICE_ID_REG 0x000D
53 #define EEPROM_VENDOR_ID_REG 0x000E
54 #define EEPROM_INIT_CONTROL2_REG 0x000F
55 #define EEPROM_SWDPINS_REG 0x0020
56 #define EEPROM_CIRCUIT_CTRL_REG 0x0021
57 #define EEPROM_D0_D3_POWER_REG 0x0022
58 #define EEPROM_FLASH_VERSION 0x0032
59 #define EEPROM_CHECKSUM_REG 0x003F
61 /* Mask bits for fields in Word 0x0a of the EEPROM */
63 #define EEPROM_ICW1_SIGNATURE_MASK 0xC000
64 #define EEPROM_ICW1_SIGNATURE_VALID 0x4000
66 /* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
67 #define EEPROM_SUM 0xBABA
69 /* EEPROM Map Sizes (Byte Counts) */
72 /* EEPROM Map defines (WORD OFFSETS)*/
74 /* EEPROM structure */
75 struct ixgb_ee_map_type {
76 u8 mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
95 /* EEPROM Functions */
96 u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
98 boolean_t ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
100 void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
102 void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
104 #endif /* IXGB_EE_H */