1 /* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */
3 Written/copyright 1993-1998 by Donald Becker.
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100/NE2500) ethercards.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
19 - alignment problem with 1.3.* kernel and some minor changes.
20 Thomas Bogendoerfer (tsbogend@bigbug.franken.de):
21 - added support for Linux/Alpha, but removed most of it, because
22 it worked only for the PCI chip.
23 - added hook for the 32bit lance driver
24 - added PCnetPCI II (79C970A) to chip table
25 Paul Gortmaker (gpg109@rsphy1.anu.edu.au):
26 - hopefully fix above so Linux/Alpha can use ISA cards too.
27 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb
28 v1.12 10/27/97 Module support -djb
29 v1.14 2/3/98 Module support modified, made PCI support optional -djb
30 v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed
31 before unregister_netdev() which caused NULL pointer
32 reference later in the chain (in rtnetlink_fill_ifinfo())
33 -- Mika Kuoppala <miku@iki.fi>
35 Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from
36 the 2.1 version of the old driver - Alan Cox
38 Get rid of check_region, check kmalloc return in lance_probe1
39 Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001
41 Reworked detection, added support for Racal InterLan EtherBlaster cards
42 Vesselin Kostadinov <vesok at yahoo dot com > - 22/4/2004
45 static const char version[] = "lance.c:v1.15ac 1999/11/13 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n";
47 #include <linux/module.h>
48 #include <linux/kernel.h>
49 #include <linux/string.h>
50 #include <linux/errno.h>
51 #include <linux/ioport.h>
52 #include <linux/slab.h>
53 #include <linux/interrupt.h>
54 #include <linux/pci.h>
55 #include <linux/init.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/skbuff.h>
60 #include <asm/bitops.h>
64 static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
65 static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options);
66 static int __init do_lance_probe(struct net_device *dev);
81 { //Racal InterLan EtherBlaster
89 static int lance_debug = LANCE_DEBUG;
91 static int lance_debug = 1;
97 I. Board Compatibility
99 This device driver is designed for the AMD 79C960, the "PCnet-ISA
100 single-chip ethernet controller for ISA". This chip is used in a wide
101 variety of boards from vendors such as Allied Telesis, HP, Kingston,
102 and Boca. This driver is also intended to work with older AMD 7990
103 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
104 I use the name LANCE to refer to all of the AMD chips, even though it properly
105 refers only to the original 7990.
107 II. Board-specific settings
109 The driver is designed to work the boards that use the faster
110 bus-master mode, rather than in shared memory mode. (Only older designs
111 have on-board buffer memory needed to support the slower shared memory mode.)
113 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
114 channel. This driver probes the likely base addresses:
115 {0x300, 0x320, 0x340, 0x360}.
116 After the board is found it generates a DMA-timeout interrupt and uses
117 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
118 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
119 probed for by enabling each free DMA channel in turn and checking if
120 initialization succeeds.
122 The HP-J2405A board is an exception: with this board it is easy to read the
123 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
124 _know_ the base address -- that field is for writing the EEPROM.)
126 III. Driver operation
129 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
130 the base and length of the data buffer, along with status bits. The length
131 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
132 the buffer length (rather than being directly the buffer length) for
133 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
134 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
135 needlessly uses extra space and reduces the chance that an upper layer will
136 be able to reorder queued Tx packets based on priority. Decreasing the number
137 of entries makes it more difficult to achieve back-to-back packet transmission
138 and increases the chance that Rx ring will overflow. (Consider the worst case
139 of receiving back-to-back minimum-sized packets.)
141 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
142 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
143 avoid the administrative overhead. For the Rx side this avoids dynamically
144 allocating full-sized buffers "just in case", at the expense of a
145 memory-to-memory data copy for each packet received. For most systems this
146 is a good tradeoff: the Rx buffer will always be in low memory, the copy
147 is inexpensive, and it primes the cache for later packet processing. For Tx
148 the buffers are only used when needed as low-memory bounce buffers.
150 IIIB. 16M memory limitations.
151 For the ISA bus master mode all structures used directly by the LANCE,
152 the initialization block, Rx and Tx rings, and data buffers, must be
153 accessible from the ISA bus, i.e. in the lower 16M of real memory.
154 This is a problem for current Linux kernels on >16M machines. The network
155 devices are initialized after memory initialization, and the kernel doles out
156 memory from the top of memory downward. The current solution is to have a
157 special network initialization routine that's called before memory
158 initialization; this will eventually be generalized for all network devices.
159 As mentioned before, low-memory "bounce-buffers" are used when needed.
161 IIIC. Synchronization
162 The driver runs as two independent, single-threaded flows of control. One
163 is the send-packet routine, which enforces single-threaded use by the
164 dev->tbusy flag. The other thread is the interrupt handler, which is single
165 threaded by the hardware and other software.
167 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
168 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
169 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
170 the 'lp->tx_full' flag.
172 The interrupt handler has exclusive control over the Rx ring and records stats
173 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
174 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
175 stats.) After reaping the stats, it marks the queue entry as empty by setting
176 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
177 tx_full and tbusy flags.
181 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
182 Reasonable default values are 16 Tx buffers, and 16 Rx buffers.
183 That translates to 4 and 4 (16 == 2^^4).
184 This is a compile-time option for efficiency.
186 #ifndef LANCE_LOG_TX_BUFFERS
187 #define LANCE_LOG_TX_BUFFERS 4
188 #define LANCE_LOG_RX_BUFFERS 4
191 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
192 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
193 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
195 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
196 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
197 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
199 #define PKT_BUF_SZ 1544
201 /* Offsets from base I/O address. */
202 #define LANCE_DATA 0x10
203 #define LANCE_ADDR 0x12
204 #define LANCE_RESET 0x14
205 #define LANCE_BUS_IF 0x16
206 #define LANCE_TOTAL_SIZE 0x18
208 #define TX_TIMEOUT 20
210 /* The LANCE Rx and Tx ring descriptors. */
211 struct lance_rx_head {
213 s16 buf_length; /* This length is 2s complement (negative)! */
214 s16 msg_length; /* This length is "normal". */
217 struct lance_tx_head {
219 s16 length; /* Length is 2s complement (negative)! */
223 /* The LANCE initialization block, described in databook. */
224 struct lance_init_block {
225 u16 mode; /* Pre-set mode (reg. 15) */
226 u8 phys_addr[6]; /* Physical ethernet address */
227 u32 filter[2]; /* Multicast filter (unused). */
228 /* Receive and transmit ring base, along with extra bits. */
229 u32 rx_ring; /* Tx and Rx ring base pointers */
233 struct lance_private {
234 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */
235 struct lance_rx_head rx_ring[RX_RING_SIZE];
236 struct lance_tx_head tx_ring[TX_RING_SIZE];
237 struct lance_init_block init_block;
239 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
240 struct sk_buff* tx_skbuff[TX_RING_SIZE];
241 /* The addresses of receive-in-place skbuffs. */
242 struct sk_buff* rx_skbuff[RX_RING_SIZE];
243 unsigned long rx_buffs; /* Address of Rx and Tx buffers. */
244 /* Tx low-memory "bounce buffer" address. */
245 char (*tx_bounce_buffs)[PKT_BUF_SZ];
246 int cur_rx, cur_tx; /* The next free ring entry */
247 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
249 struct net_device_stats stats;
250 unsigned char chip_version; /* See lance_chip_type. */
254 #define LANCE_MUST_PAD 0x00000001
255 #define LANCE_ENABLE_AUTOSELECT 0x00000002
256 #define LANCE_MUST_REINIT_RING 0x00000004
257 #define LANCE_MUST_UNRESET 0x00000008
258 #define LANCE_HAS_MISSED_FRAME 0x00000010
260 /* A mapping from the chip ID number to the part number and features.
261 These are from the datasheets -- in real life the '970 version
262 reportedly has the same ID as the '965. */
263 static struct lance_chip_type {
268 {0x0000, "LANCE 7990", /* Ancient lance chip. */
269 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
270 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
271 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
272 LANCE_HAS_MISSED_FRAME},
273 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
274 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
275 LANCE_HAS_MISSED_FRAME},
276 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
277 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
278 LANCE_HAS_MISSED_FRAME},
279 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
281 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
282 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
283 LANCE_HAS_MISSED_FRAME},
284 {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */
285 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
286 LANCE_HAS_MISSED_FRAME},
287 {0x0, "PCnet (unknown)",
288 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
289 LANCE_HAS_MISSED_FRAME},
292 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6};
295 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
296 Assume yes until we know the memory size. */
297 static unsigned char lance_need_isa_bounce_buffers = 1;
299 static int lance_open(struct net_device *dev);
300 static void lance_init_ring(struct net_device *dev, int mode);
301 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev);
302 static int lance_rx(struct net_device *dev);
303 static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs);
304 static int lance_close(struct net_device *dev);
305 static struct net_device_stats *lance_get_stats(struct net_device *dev);
306 static void set_multicast_list(struct net_device *dev);
307 static void lance_tx_timeout (struct net_device *dev);
311 static void cleanup_card(struct net_device *dev)
313 struct lance_private *lp = dev->priv;
316 release_region(dev->base_addr, LANCE_TOTAL_SIZE);
317 kfree(lp->tx_bounce_buffs);
318 kfree((void*)lp->rx_buffs);
323 #define MAX_CARDS 8 /* Max number of interfaces (cards) per module */
325 static struct net_device *dev_lance[MAX_CARDS];
326 static int io[MAX_CARDS];
327 static int dma[MAX_CARDS];
328 static int irq[MAX_CARDS];
330 MODULE_PARM(io, "1-" __MODULE_STRING(MAX_CARDS) "i");
331 MODULE_PARM(dma, "1-" __MODULE_STRING(MAX_CARDS) "i");
332 MODULE_PARM(irq, "1-" __MODULE_STRING(MAX_CARDS) "i");
333 MODULE_PARM(lance_debug, "i");
334 MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required");
335 MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)");
336 MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)");
337 MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)");
339 int init_module(void)
341 struct net_device *dev;
342 int this_dev, found = 0;
344 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
345 if (io[this_dev] == 0) {
346 if (this_dev != 0) /* only complain once */
348 printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n");
351 dev = alloc_etherdev(0);
354 dev->irq = irq[this_dev];
355 dev->base_addr = io[this_dev];
356 dev->dma = dma[this_dev];
357 if (do_lance_probe(dev) == 0) {
358 if (register_netdev(dev) == 0) {
359 dev_lance[found++] = dev;
372 void cleanup_module(void)
376 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
377 struct net_device *dev = dev_lance[this_dev];
379 unregister_netdev(dev);
386 MODULE_LICENSE("GPL");
389 /* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other
390 board probes now that kmalloc() can allocate ISA DMA-able regions.
391 This also allows the LANCE driver to be used as a module.
393 static int __init do_lance_probe(struct net_device *dev)
397 if (high_memory <= phys_to_virt(16*1024*1024))
398 lance_need_isa_bounce_buffers = 0;
400 for (port = lance_portlist; *port; port++) {
402 struct resource *r = request_region(ioaddr, LANCE_TOTAL_SIZE,
406 /* Detect the card with minimal I/O reads */
407 char offset14 = inb(ioaddr + 14);
409 for (card = 0; card < NUM_CARDS; ++card)
410 if (cards[card].id_offset14 == offset14)
412 if (card < NUM_CARDS) {/*yes, the first byte matches*/
413 char offset15 = inb(ioaddr + 15);
414 for (card = 0; card < NUM_CARDS; ++card)
415 if ((cards[card].id_offset14 == offset14) &&
416 (cards[card].id_offset15 == offset15))
419 if (card < NUM_CARDS) { /*Signature OK*/
420 result = lance_probe1(dev, ioaddr, 0, 0);
422 struct lance_private *lp = dev->priv;
423 int ver = lp->chip_version;
425 r->name = chip_table[ver].name;
429 release_region(ioaddr, LANCE_TOTAL_SIZE);
435 struct net_device * __init lance_probe(int unit)
437 struct net_device *dev = alloc_etherdev(0);
441 return ERR_PTR(-ENODEV);
443 sprintf(dev->name, "eth%d", unit);
444 netdev_boot_setup_check(dev);
446 err = do_lance_probe(dev);
449 err = register_netdev(dev);
460 static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options)
462 struct lance_private *lp;
463 long dma_channels; /* Mark spuriously-busy DMA channels */
464 int i, reset_val, lance_version;
465 const char *chipname;
466 /* Flags for specific chips or boards. */
467 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
468 int hp_builtin = 0; /* HP on-board ethernet. */
469 static int did_version; /* Already printed version info. */
473 /* First we look for special cases.
474 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
475 There are two HP versions, check the BIOS for the configuration port.
476 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
478 if (isa_readw(0x000f0102) == 0x5048) {
479 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
480 int hp_port = (isa_readl(0x000f00f1) & 1) ? 0x499 : 0x99;
481 /* We can have boards other than the built-in! Verify this is on-board. */
482 if ((inb(hp_port) & 0xc0) == 0x80
483 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
484 hp_builtin = hp_port;
486 /* We also recognize the HP Vectra on-board here, but check below. */
487 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
488 && inb(ioaddr+2) == 0x09);
490 /* Reset the LANCE. */
491 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
493 /* The Un-Reset needed is only needed for the real NE2100, and will
494 confuse the HP board. */
496 outw(reset_val, ioaddr+LANCE_RESET);
498 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
499 if (inw(ioaddr+LANCE_DATA) != 0x0004)
502 /* Get the version of the chip. */
503 outw(88, ioaddr+LANCE_ADDR);
504 if (inw(ioaddr+LANCE_ADDR) != 88) {
506 } else { /* Good, it's a newer chip. */
507 int chip_version = inw(ioaddr+LANCE_DATA);
508 outw(89, ioaddr+LANCE_ADDR);
509 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
511 printk(" LANCE chip version is %#x.\n", chip_version);
512 if ((chip_version & 0xfff) != 0x003)
514 chip_version = (chip_version >> 12) & 0xffff;
515 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
516 if (chip_table[lance_version].id_number == chip_version)
521 /* We can't allocate dev->priv from alloc_etherdev() because it must
522 a ISA DMA-able region. */
523 SET_MODULE_OWNER(dev);
524 chipname = chip_table[lance_version].name;
525 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
527 /* There is a 16 byte station address PROM at the base address.
528 The first six bytes are the station address. */
529 for (i = 0; i < 6; i++)
530 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
532 dev->base_addr = ioaddr;
533 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
535 lp = kmalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);
538 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
539 memset(lp, 0, sizeof(*lp));
542 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
543 GFP_DMA | GFP_KERNEL);
546 if (lance_need_isa_bounce_buffers) {
547 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,
548 GFP_DMA | GFP_KERNEL);
549 if (!lp->tx_bounce_buffs)
552 lp->tx_bounce_buffs = NULL;
554 lp->chip_version = lance_version;
555 spin_lock_init(&lp->devlock);
557 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
558 for (i = 0; i < 6; i++)
559 lp->init_block.phys_addr[i] = dev->dev_addr[i];
560 lp->init_block.filter[0] = 0x00000000;
561 lp->init_block.filter[1] = 0x00000000;
562 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
563 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
565 outw(0x0001, ioaddr+LANCE_ADDR);
566 inw(ioaddr+LANCE_ADDR);
567 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
568 outw(0x0002, ioaddr+LANCE_ADDR);
569 inw(ioaddr+LANCE_ADDR);
570 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
571 outw(0x0000, ioaddr+LANCE_ADDR);
572 inw(ioaddr+LANCE_ADDR);
574 if (irq) { /* Set iff PCI card. */
575 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
577 } else if (hp_builtin) {
578 static const char dma_tbl[4] = {3, 5, 6, 0};
579 static const char irq_tbl[4] = {3, 4, 5, 9};
580 unsigned char port_val = inb(hp_builtin);
581 dev->dma = dma_tbl[(port_val >> 4) & 3];
582 dev->irq = irq_tbl[(port_val >> 2) & 3];
583 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
584 } else if (hpJ2405A) {
585 static const char dma_tbl[4] = {3, 5, 6, 7};
586 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
587 short reset_val = inw(ioaddr+LANCE_RESET);
588 dev->dma = dma_tbl[(reset_val >> 2) & 3];
589 dev->irq = irq_tbl[(reset_val >> 4) & 7];
590 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
591 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
593 outw(8, ioaddr+LANCE_ADDR);
594 bus_info = inw(ioaddr+LANCE_BUS_IF);
595 dev->dma = bus_info & 0x07;
596 dev->irq = (bus_info >> 4) & 0x0F;
598 /* The DMA channel may be passed in PARAM1. */
599 if (dev->mem_start & 0x07)
600 dev->dma = dev->mem_start & 0x07;
604 /* Read the DMA channel status register, so that we can avoid
605 stuck DMA channels in the DMA detection below. */
606 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
607 (inb(DMA2_STAT_REG) & 0xf0);
611 printk(" assigned IRQ %d", dev->irq);
612 else if (lance_version != 0) { /* 7990 boards need DMA detection first. */
613 unsigned long irq_mask;
615 /* To auto-IRQ we enable the initialization-done and DMA error
616 interrupts. For ISA boards we get a DMA error, but VLB and PCI
618 irq_mask = probe_irq_on();
620 /* Trigger an initialization just for the interrupt. */
621 outw(0x0041, ioaddr+LANCE_DATA);
624 dev->irq = probe_irq_off(irq_mask);
626 printk(", probed IRQ %d", dev->irq);
628 printk(", failed to detect IRQ line.\n");
632 /* Check for the initialization done bit, 0x0100, which means
633 that we don't need a DMA channel. */
634 if (inw(ioaddr+LANCE_DATA) & 0x0100)
639 printk(", no DMA needed.\n");
640 } else if (dev->dma) {
641 if (request_dma(dev->dma, chipname)) {
642 printk("DMA %d allocation failed.\n", dev->dma);
645 printk(", assigned DMA %d.\n", dev->dma);
646 } else { /* OK, we have to auto-DMA. */
647 for (i = 0; i < 4; i++) {
648 static const char dmas[] = { 5, 6, 7, 3 };
652 /* Don't enable a permanently busy DMA channel, or the machine
654 if (test_bit(dma, &dma_channels))
656 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
657 if (request_dma(dma, chipname))
660 flags=claim_dma_lock();
661 set_dma_mode(dma, DMA_MODE_CASCADE);
663 release_dma_lock(flags);
665 /* Trigger an initialization. */
666 outw(0x0001, ioaddr+LANCE_DATA);
667 for (boguscnt = 100; boguscnt > 0; --boguscnt)
668 if (inw(ioaddr+LANCE_DATA) & 0x0900)
670 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
672 printk(", DMA %d.\n", dev->dma);
675 flags=claim_dma_lock();
677 release_dma_lock(flags);
681 if (i == 4) { /* Failure: bail. */
682 printk("DMA detection failed.\n");
687 if (lance_version == 0 && dev->irq == 0) {
688 /* We may auto-IRQ now that we have a DMA channel. */
689 /* Trigger an initialization just for the interrupt. */
690 unsigned long irq_mask;
692 irq_mask = probe_irq_on();
693 outw(0x0041, ioaddr+LANCE_DATA);
696 dev->irq = probe_irq_off(irq_mask);
698 printk(" Failed to detect the 7990 IRQ line.\n");
701 printk(" Auto-IRQ detected IRQ%d.\n", dev->irq);
704 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
705 /* Turn on auto-select of media (10baseT or BNC) so that the user
706 can watch the LEDs even if the board isn't opened. */
707 outw(0x0002, ioaddr+LANCE_ADDR);
708 /* Don't touch 10base2 power bit. */
709 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
712 if (lance_debug > 0 && did_version++ == 0)
715 /* The LANCE-specific entries in the device structure. */
716 dev->open = lance_open;
717 dev->hard_start_xmit = lance_start_xmit;
718 dev->stop = lance_close;
719 dev->get_stats = lance_get_stats;
720 dev->set_multicast_list = set_multicast_list;
721 dev->tx_timeout = lance_tx_timeout;
722 dev->watchdog_timeo = TX_TIMEOUT;
729 kfree(lp->tx_bounce_buffs);
731 kfree((void*)lp->rx_buffs);
739 lance_open(struct net_device *dev)
741 struct lance_private *lp = dev->priv;
742 int ioaddr = dev->base_addr;
746 request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
750 /* We used to allocate DMA here, but that was silly.
751 DMA lines can't be shared! We now permanently allocate them. */
753 /* Reset the LANCE */
754 inw(ioaddr+LANCE_RESET);
756 /* The DMA controller is used as a no-operation slave, "cascade mode". */
758 unsigned long flags=claim_dma_lock();
759 enable_dma(dev->dma);
760 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
761 release_dma_lock(flags);
764 /* Un-Reset the LANCE, needed only for the NE2100. */
765 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
766 outw(0, ioaddr+LANCE_RESET);
768 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
769 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
770 outw(0x0002, ioaddr+LANCE_ADDR);
771 /* Only touch autoselect bit. */
772 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
776 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
777 dev->name, dev->irq, dev->dma,
778 (u32) isa_virt_to_bus(lp->tx_ring),
779 (u32) isa_virt_to_bus(lp->rx_ring),
780 (u32) isa_virt_to_bus(&lp->init_block));
782 lance_init_ring(dev, GFP_KERNEL);
783 /* Re-initialize the LANCE, and start it when done. */
784 outw(0x0001, ioaddr+LANCE_ADDR);
785 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
786 outw(0x0002, ioaddr+LANCE_ADDR);
787 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
789 outw(0x0004, ioaddr+LANCE_ADDR);
790 outw(0x0915, ioaddr+LANCE_DATA);
792 outw(0x0000, ioaddr+LANCE_ADDR);
793 outw(0x0001, ioaddr+LANCE_DATA);
795 netif_start_queue (dev);
799 if (inw(ioaddr+LANCE_DATA) & 0x0100)
802 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
803 * reports that doing so triggers a bug in the '974.
805 outw(0x0042, ioaddr+LANCE_DATA);
808 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
809 dev->name, i, (u32) isa_virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
811 return 0; /* Always succeed */
814 /* The LANCE has been halted for one reason or another (busmaster memory
815 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
816 etc.). Modern LANCE variants always reload their ring-buffer
817 configuration when restarted, so we must reinitialize our ring
818 context before restarting. As part of this reinitialization,
819 find all packets still on the Tx ring and pretend that they had been
820 sent (in effect, drop the packets on the floor) - the higher-level
821 protocols will time out and retransmit. It'd be better to shuffle
822 these skbs to a temp list and then actually re-Tx them after
823 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
827 lance_purge_ring(struct net_device *dev)
829 struct lance_private *lp = dev->priv;
832 /* Free all the skbuffs in the Rx and Tx queues. */
833 for (i = 0; i < RX_RING_SIZE; i++) {
834 struct sk_buff *skb = lp->rx_skbuff[i];
835 lp->rx_skbuff[i] = 0;
836 lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */
838 dev_kfree_skb_any(skb);
840 for (i = 0; i < TX_RING_SIZE; i++) {
841 if (lp->tx_skbuff[i]) {
842 dev_kfree_skb_any(lp->tx_skbuff[i]);
843 lp->tx_skbuff[i] = NULL;
849 /* Initialize the LANCE Rx and Tx rings. */
851 lance_init_ring(struct net_device *dev, int gfp)
853 struct lance_private *lp = dev->priv;
856 lp->cur_rx = lp->cur_tx = 0;
857 lp->dirty_rx = lp->dirty_tx = 0;
859 for (i = 0; i < RX_RING_SIZE; i++) {
863 skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp);
864 lp->rx_skbuff[i] = skb;
869 rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp);
871 lp->rx_ring[i].base = 0;
873 lp->rx_ring[i].base = (u32)isa_virt_to_bus(rx_buff) | 0x80000000;
874 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
876 /* The Tx buffer address is filled in as needed, but we do need to clear
877 the upper ownership bit. */
878 for (i = 0; i < TX_RING_SIZE; i++) {
879 lp->tx_skbuff[i] = 0;
880 lp->tx_ring[i].base = 0;
883 lp->init_block.mode = 0x0000;
884 for (i = 0; i < 6; i++)
885 lp->init_block.phys_addr[i] = dev->dev_addr[i];
886 lp->init_block.filter[0] = 0x00000000;
887 lp->init_block.filter[1] = 0x00000000;
888 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
889 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
893 lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit)
895 struct lance_private *lp = dev->priv;
898 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
899 lance_purge_ring(dev);
900 lance_init_ring(dev, GFP_ATOMIC);
902 outw(0x0000, dev->base_addr + LANCE_ADDR);
903 outw(csr0_bits, dev->base_addr + LANCE_DATA);
907 static void lance_tx_timeout (struct net_device *dev)
909 struct lance_private *lp = (struct lance_private *) dev->priv;
910 int ioaddr = dev->base_addr;
912 outw (0, ioaddr + LANCE_ADDR);
913 printk ("%s: transmit timed out, status %4.4x, resetting.\n",
914 dev->name, inw (ioaddr + LANCE_DATA));
915 outw (0x0004, ioaddr + LANCE_DATA);
916 lp->stats.tx_errors++;
917 #ifndef final_version
918 if (lance_debug > 3) {
920 printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
921 lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "",
923 for (i = 0; i < RX_RING_SIZE; i++)
924 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
925 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
926 lp->rx_ring[i].msg_length);
927 for (i = 0; i < TX_RING_SIZE; i++)
928 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
929 lp->tx_ring[i].base, -lp->tx_ring[i].length,
930 lp->tx_ring[i].misc);
934 lance_restart (dev, 0x0043, 1);
936 dev->trans_start = jiffies;
937 netif_wake_queue (dev);
941 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
943 struct lance_private *lp = dev->priv;
944 int ioaddr = dev->base_addr;
948 spin_lock_irqsave(&lp->devlock, flags);
950 if (lance_debug > 3) {
951 outw(0x0000, ioaddr+LANCE_ADDR);
952 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
953 inw(ioaddr+LANCE_DATA));
954 outw(0x0000, ioaddr+LANCE_DATA);
957 /* Fill in a Tx ring entry */
959 /* Mask to ring buffer boundary. */
960 entry = lp->cur_tx & TX_RING_MOD_MASK;
962 /* Caution: the write order is important here, set the base address
963 with the "ownership" bits last. */
965 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
966 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
967 if (skb->len < ETH_ZLEN) {
968 skb = skb_padto(skb, ETH_ZLEN);
971 lp->tx_ring[entry].length = -ETH_ZLEN;
974 lp->tx_ring[entry].length = -skb->len;
976 lp->tx_ring[entry].length = -skb->len;
978 lp->tx_ring[entry].misc = 0x0000;
980 lp->stats.tx_bytes += skb->len;
982 /* If any part of this buffer is >16M we must copy it to a low-memory
984 if ((u32)isa_virt_to_bus(skb->data) + skb->len > 0x01000000) {
986 printk("%s: bouncing a high-memory packet (%#x).\n",
987 dev->name, (u32)isa_virt_to_bus(skb->data));
988 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
989 lp->tx_ring[entry].base =
990 ((u32)isa_virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
993 lp->tx_skbuff[entry] = skb;
994 lp->tx_ring[entry].base = ((u32)isa_virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
998 /* Trigger an immediate send poll. */
999 outw(0x0000, ioaddr+LANCE_ADDR);
1000 outw(0x0048, ioaddr+LANCE_DATA);
1002 dev->trans_start = jiffies;
1004 if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE)
1005 netif_stop_queue(dev);
1008 spin_unlock_irqrestore(&lp->devlock, flags);
1012 /* The LANCE interrupt handler. */
1014 lance_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1016 struct net_device *dev = dev_id;
1017 struct lance_private *lp;
1018 int csr0, ioaddr, boguscnt=10;
1022 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
1026 ioaddr = dev->base_addr;
1029 spin_lock (&lp->devlock);
1031 outw(0x00, dev->base_addr + LANCE_ADDR);
1032 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
1033 && --boguscnt >= 0) {
1034 /* Acknowledge all of the current interrupt sources ASAP. */
1035 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
1039 if (lance_debug > 5)
1040 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1041 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
1043 if (csr0 & 0x0400) /* Rx interrupt */
1046 if (csr0 & 0x0200) { /* Tx-done interrupt */
1047 int dirty_tx = lp->dirty_tx;
1049 while (dirty_tx < lp->cur_tx) {
1050 int entry = dirty_tx & TX_RING_MOD_MASK;
1051 int status = lp->tx_ring[entry].base;
1054 break; /* It still hasn't been Txed */
1056 lp->tx_ring[entry].base = 0;
1058 if (status & 0x40000000) {
1059 /* There was an major error, log it. */
1060 int err_status = lp->tx_ring[entry].misc;
1061 lp->stats.tx_errors++;
1062 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
1063 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
1064 if (err_status & 0x1000) lp->stats.tx_window_errors++;
1065 if (err_status & 0x4000) {
1066 /* Ackk! On FIFO errors the Tx unit is turned off! */
1067 lp->stats.tx_fifo_errors++;
1068 /* Remove this verbosity later! */
1069 printk("%s: Tx FIFO error! Status %4.4x.\n",
1071 /* Restart the chip. */
1075 if (status & 0x18000000)
1076 lp->stats.collisions++;
1077 lp->stats.tx_packets++;
1080 /* We must free the original skb if it's not a data-only copy
1081 in the bounce buffer. */
1082 if (lp->tx_skbuff[entry]) {
1083 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
1084 lp->tx_skbuff[entry] = 0;
1089 #ifndef final_version
1090 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1091 printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n",
1092 dirty_tx, lp->cur_tx,
1093 netif_queue_stopped(dev) ? "yes" : "no");
1094 dirty_tx += TX_RING_SIZE;
1098 /* if the ring is no longer full, accept more packets */
1099 if (netif_queue_stopped(dev) &&
1100 dirty_tx > lp->cur_tx - TX_RING_SIZE + 2)
1101 netif_wake_queue (dev);
1103 lp->dirty_tx = dirty_tx;
1106 /* Log misc errors. */
1107 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1108 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
1109 if (csr0 & 0x0800) {
1110 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1112 /* Restart the chip. */
1117 /* stop the chip to clear the error condition, then restart */
1118 outw(0x0000, dev->base_addr + LANCE_ADDR);
1119 outw(0x0004, dev->base_addr + LANCE_DATA);
1120 lance_restart(dev, 0x0002, 0);
1124 /* Clear any other interrupt, and set interrupt enable. */
1125 outw(0x0000, dev->base_addr + LANCE_ADDR);
1126 outw(0x7940, dev->base_addr + LANCE_DATA);
1128 if (lance_debug > 4)
1129 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1130 dev->name, inw(ioaddr + LANCE_ADDR),
1131 inw(dev->base_addr + LANCE_DATA));
1133 spin_unlock (&lp->devlock);
1138 lance_rx(struct net_device *dev)
1140 struct lance_private *lp = dev->priv;
1141 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1144 /* If we own the next entry, it's a new packet. Send it up. */
1145 while (lp->rx_ring[entry].base >= 0) {
1146 int status = lp->rx_ring[entry].base >> 24;
1148 if (status != 0x03) { /* There was an error. */
1149 /* There is a tricky error noted by John Murphy,
1150 <murf@perftech.com> to Russ Nelson: Even with full-sized
1151 buffers it's possible for a jabber packet to use two
1152 buffers, with only the last correctly noting the error. */
1153 if (status & 0x01) /* Only count a general error at the */
1154 lp->stats.rx_errors++; /* end of a packet.*/
1155 if (status & 0x20) lp->stats.rx_frame_errors++;
1156 if (status & 0x10) lp->stats.rx_over_errors++;
1157 if (status & 0x08) lp->stats.rx_crc_errors++;
1158 if (status & 0x04) lp->stats.rx_fifo_errors++;
1159 lp->rx_ring[entry].base &= 0x03ffffff;
1163 /* Malloc up new buffer, compatible with net3. */
1164 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1165 struct sk_buff *skb;
1169 printk("%s: Runt packet!\n",dev->name);
1170 lp->stats.rx_errors++;
1174 skb = dev_alloc_skb(pkt_len+2);
1177 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1178 for (i=0; i < RX_RING_SIZE; i++)
1179 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1182 if (i > RX_RING_SIZE -2)
1184 lp->stats.rx_dropped++;
1185 lp->rx_ring[entry].base |= 0x80000000;
1191 skb_reserve(skb,2); /* 16 byte align */
1192 skb_put(skb,pkt_len); /* Make room */
1193 eth_copy_and_sum(skb,
1194 (unsigned char *)isa_bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
1196 skb->protocol=eth_type_trans(skb,dev);
1198 dev->last_rx = jiffies;
1199 lp->stats.rx_packets++;
1200 lp->stats.rx_bytes+=pkt_len;
1203 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1204 of QNX reports that some revs of the 79C965 clear it. */
1205 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1206 lp->rx_ring[entry].base |= 0x80000000;
1207 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1210 /* We should check that at least two ring entries are free. If not,
1211 we should free one and mark stats->rx_dropped++. */
1217 lance_close(struct net_device *dev)
1219 int ioaddr = dev->base_addr;
1220 struct lance_private *lp = dev->priv;
1222 netif_stop_queue (dev);
1224 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1225 outw(112, ioaddr+LANCE_ADDR);
1226 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1228 outw(0, ioaddr+LANCE_ADDR);
1230 if (lance_debug > 1)
1231 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1232 dev->name, inw(ioaddr+LANCE_DATA));
1234 /* We stop the LANCE here -- it occasionally polls
1235 memory if we don't. */
1236 outw(0x0004, ioaddr+LANCE_DATA);
1240 unsigned long flags=claim_dma_lock();
1241 disable_dma(dev->dma);
1242 release_dma_lock(flags);
1244 free_irq(dev->irq, dev);
1246 lance_purge_ring(dev);
1251 static struct net_device_stats *lance_get_stats(struct net_device *dev)
1253 struct lance_private *lp = dev->priv;
1255 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1256 short ioaddr = dev->base_addr;
1258 unsigned long flags;
1260 spin_lock_irqsave(&lp->devlock, flags);
1261 saved_addr = inw(ioaddr+LANCE_ADDR);
1262 outw(112, ioaddr+LANCE_ADDR);
1263 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1264 outw(saved_addr, ioaddr+LANCE_ADDR);
1265 spin_unlock_irqrestore(&lp->devlock, flags);
1271 /* Set or clear the multicast filter for this adaptor.
1274 static void set_multicast_list(struct net_device *dev)
1276 short ioaddr = dev->base_addr;
1278 outw(0, ioaddr+LANCE_ADDR);
1279 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1281 if (dev->flags&IFF_PROMISC) {
1282 /* Log any net taps. */
1283 printk("%s: Promiscuous mode enabled.\n", dev->name);
1284 outw(15, ioaddr+LANCE_ADDR);
1285 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1287 short multicast_table[4];
1289 int num_addrs=dev->mc_count;
1290 if(dev->flags&IFF_ALLMULTI)
1292 /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */
1293 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1294 for (i = 0; i < 4; i++) {
1295 outw(8 + i, ioaddr+LANCE_ADDR);
1296 outw(multicast_table[i], ioaddr+LANCE_DATA);
1298 outw(15, ioaddr+LANCE_ADDR);
1299 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1302 lance_restart(dev, 0x0142, 0); /* Resume normal operation */