1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
148 #include <pcmcia/version.h>
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
155 #include <asm/uaccess.h>
157 #include <asm/system.h>
158 #include <asm/bitops.h>
160 /* ----------------------------------------------------------------------------
162 ---------------------------------------------------------------------------- */
164 #define ETHER_ADDR_LEN ETH_ALEN
165 /* 6 bytes in an Ethernet Address */
166 #define MACE_LADRF_LEN 8
167 /* 8 bytes in Logical Address Filter */
169 /* Loop Control Defines */
170 #define MACE_MAX_IR_ITERATIONS 10
171 #define MACE_MAX_RX_ITERATIONS 12
173 TBD: Dean brought this up, and I assumed the hardware would
176 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
177 non-zero when the isr exits. We may not get another interrupt
178 to process the remaining packets for some time.
182 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
183 which manages the interface between the MACE and the PCMCIA bus. It
184 also includes buffer management for the 32K x 8 SRAM to control up to
185 four transmit and 12 receive frames at a time.
187 #define AM2150_MAX_TX_FRAMES 4
188 #define AM2150_MAX_RX_FRAMES 12
190 /* Am2150 Ethernet Card I/O Mapping */
191 #define AM2150_RCV 0x00
192 #define AM2150_XMT 0x04
193 #define AM2150_XMT_SKIP 0x09
194 #define AM2150_RCV_NEXT 0x0A
195 #define AM2150_RCV_FRAME_COUNT 0x0B
196 #define AM2150_MACE_BANK 0x0C
197 #define AM2150_MACE_BASE 0x10
200 #define MACE_RCVFIFO 0
201 #define MACE_XMTFIFO 1
207 #define MACE_FIFOFC 7
211 #define MACE_BIUCC 11
212 #define MACE_FIFOCC 12
213 #define MACE_MACCC 13
214 #define MACE_PLSCC 14
215 #define MACE_PHYCC 15
216 #define MACE_CHIPIDL 16
217 #define MACE_CHIPIDH 17
220 #define MACE_LADRF 20
226 #define MACE_RNTPC 26
227 #define MACE_RCVCC 27
234 #define MACE_XMTRC_EXDEF 0x80
235 #define MACE_XMTRC_XMTRC 0x0F
237 #define MACE_XMTFS_XMTSV 0x80
238 #define MACE_XMTFS_UFLO 0x40
239 #define MACE_XMTFS_LCOL 0x20
240 #define MACE_XMTFS_MORE 0x10
241 #define MACE_XMTFS_ONE 0x08
242 #define MACE_XMTFS_DEFER 0x04
243 #define MACE_XMTFS_LCAR 0x02
244 #define MACE_XMTFS_RTRY 0x01
246 #define MACE_RCVFS_RCVSTS 0xF000
247 #define MACE_RCVFS_OFLO 0x8000
248 #define MACE_RCVFS_CLSN 0x4000
249 #define MACE_RCVFS_FRAM 0x2000
250 #define MACE_RCVFS_FCS 0x1000
252 #define MACE_FIFOFC_RCVFC 0xF0
253 #define MACE_FIFOFC_XMTFC 0x0F
255 #define MACE_IR_JAB 0x80
256 #define MACE_IR_BABL 0x40
257 #define MACE_IR_CERR 0x20
258 #define MACE_IR_RCVCCO 0x10
259 #define MACE_IR_RNTPCO 0x08
260 #define MACE_IR_MPCO 0x04
261 #define MACE_IR_RCVINT 0x02
262 #define MACE_IR_XMTINT 0x01
264 #define MACE_MACCC_PROM 0x80
265 #define MACE_MACCC_DXMT2PD 0x40
266 #define MACE_MACCC_EMBA 0x20
267 #define MACE_MACCC_RESERVED 0x10
268 #define MACE_MACCC_DRCVPA 0x08
269 #define MACE_MACCC_DRCVBC 0x04
270 #define MACE_MACCC_ENXMT 0x02
271 #define MACE_MACCC_ENRCV 0x01
273 #define MACE_PHYCC_LNKFL 0x80
274 #define MACE_PHYCC_DLNKTST 0x40
275 #define MACE_PHYCC_REVPOL 0x20
276 #define MACE_PHYCC_DAPC 0x10
277 #define MACE_PHYCC_LRT 0x08
278 #define MACE_PHYCC_ASEL 0x04
279 #define MACE_PHYCC_RWAKE 0x02
280 #define MACE_PHYCC_AWAKE 0x01
282 #define MACE_IAC_ADDRCHG 0x80
283 #define MACE_IAC_PHYADDR 0x04
284 #define MACE_IAC_LOGADDR 0x02
286 #define MACE_UTR_RTRE 0x80
287 #define MACE_UTR_RTRD 0x40
288 #define MACE_UTR_RPA 0x20
289 #define MACE_UTR_FCOLL 0x10
290 #define MACE_UTR_RCVFCSE 0x08
291 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
292 #define MACE_UTR_LOOP_NO_MENDEC 0x04
293 #define MACE_UTR_LOOP_EXTERNAL 0x02
294 #define MACE_UTR_LOOP_NONE 0x00
295 #define MACE_UTR_RESERVED 0x01
297 /* Switch MACE register bank (only 0 and 1 are valid) */
298 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
300 #define MACE_IMR_DEFAULT \
311 #undef MACE_IMR_DEFAULT
312 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
314 #define TX_TIMEOUT ((400*HZ)/1000)
316 /* ----------------------------------------------------------------------------
318 ---------------------------------------------------------------------------- */
320 typedef struct _mace_statistics {
335 /* RFS1--Receive Status (RCVSTS) */
341 /* RFS2--Runt Packet Count (RNTPC) */
344 /* RFS3--Receive Collision Count (RCVCC) */
365 typedef struct _mace_private {
368 struct net_device_stats linux_stats; /* Linux statistics counters */
369 mace_statistics mace_stats; /* MACE chip statistics counters */
371 /* restore_multicast_list() state variables */
372 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
373 int multicast_num_addrs;
375 char tx_free_frames; /* Number of free transmit frame buffers */
376 char tx_irq_disabled; /* MACE TX interrupt disabled */
378 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
381 /* ----------------------------------------------------------------------------
382 Private Global Variables
383 ---------------------------------------------------------------------------- */
386 static char rcsid[] =
387 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
388 static char *version =
389 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
392 static dev_info_t dev_info="nmclan_cs";
393 static dev_link_t *dev_list;
395 static char *if_names[]={
396 "Auto", "10baseT", "BNC",
399 /* ----------------------------------------------------------------------------
401 These are the parameters that can be set during loading with
403 ---------------------------------------------------------------------------- */
405 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
406 MODULE_LICENSE("GPL");
408 #define INT_MODULE_PARM(n, v) static int n = v; MODULE_PARM(n, "i")
410 static int irq_list[4] = { -1 };
411 MODULE_PARM(irq_list, "1-4i");
413 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
414 INT_MODULE_PARM(if_port, 0);
415 /* Bit map of interrupts to choose from */
416 INT_MODULE_PARM(irq_mask, 0xdeb8);
419 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
420 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
422 #define DEBUG(n, args...)
425 /* ----------------------------------------------------------------------------
427 ---------------------------------------------------------------------------- */
429 static void nmclan_config(dev_link_t *link);
430 static void nmclan_release(dev_link_t *link);
431 static int nmclan_event(event_t event, int priority,
432 event_callback_args_t *args);
434 static void nmclan_reset(struct net_device *dev);
435 static int mace_config(struct net_device *dev, struct ifmap *map);
436 static int mace_open(struct net_device *dev);
437 static int mace_close(struct net_device *dev);
438 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
439 static void mace_tx_timeout(struct net_device *dev);
440 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
441 static struct net_device_stats *mace_get_stats(struct net_device *dev);
442 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
443 static void restore_multicast_list(struct net_device *dev);
444 static void set_multicast_list(struct net_device *dev);
445 static struct ethtool_ops netdev_ethtool_ops;
448 static dev_link_t *nmclan_attach(void);
449 static void nmclan_detach(dev_link_t *);
451 /* ----------------------------------------------------------------------------
453 Creates an "instance" of the driver, allocating local data
454 structures for one device. The device is registered with Card
456 ---------------------------------------------------------------------------- */
458 static dev_link_t *nmclan_attach(void)
462 struct net_device *dev;
463 client_reg_t client_reg;
466 DEBUG(0, "nmclan_attach()\n");
467 DEBUG(1, "%s\n", rcsid);
469 /* Create new ethernet device */
470 dev = alloc_etherdev(sizeof(mace_private));
473 lp = netdev_priv(dev);
477 spin_lock_init(&lp->bank_lock);
478 link->io.NumPorts1 = 32;
479 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
480 link->io.IOAddrLines = 5;
481 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
482 link->irq.IRQInfo1 = IRQ_INFO2_VALID|IRQ_LEVEL_ID;
483 if (irq_list[0] == -1)
484 link->irq.IRQInfo2 = irq_mask;
486 for (i = 0; i < 4; i++)
487 link->irq.IRQInfo2 |= 1 << irq_list[i];
488 link->irq.Handler = &mace_interrupt;
489 link->irq.Instance = dev;
490 link->conf.Attributes = CONF_ENABLE_IRQ;
492 link->conf.IntType = INT_MEMORY_AND_IO;
493 link->conf.ConfigIndex = 1;
494 link->conf.Present = PRESENT_OPTION;
496 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
498 SET_MODULE_OWNER(dev);
499 dev->hard_start_xmit = &mace_start_xmit;
500 dev->set_config = &mace_config;
501 dev->get_stats = &mace_get_stats;
502 dev->set_multicast_list = &set_multicast_list;
503 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
504 dev->open = &mace_open;
505 dev->stop = &mace_close;
506 #ifdef HAVE_TX_TIMEOUT
507 dev->tx_timeout = mace_tx_timeout;
508 dev->watchdog_timeo = TX_TIMEOUT;
511 /* Register with Card Services */
512 link->next = dev_list;
514 client_reg.dev_info = &dev_info;
515 client_reg.Attributes = INFO_IO_CLIENT | INFO_CARD_SHARE;
516 client_reg.EventMask =
517 CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL |
518 CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET |
519 CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME;
520 client_reg.event_handler = &nmclan_event;
521 client_reg.Version = 0x0210;
522 client_reg.event_callback_args.client_data = link;
523 ret = pcmcia_register_client(&link->handle, &client_reg);
525 cs_error(link->handle, RegisterClient, ret);
531 } /* nmclan_attach */
533 /* ----------------------------------------------------------------------------
535 This deletes a driver "instance". The device is de-registered
536 with Card Services. If it has been released, all local data
537 structures are freed. Otherwise, the structures will be freed
538 when the device is released.
539 ---------------------------------------------------------------------------- */
541 static void nmclan_detach(dev_link_t *link)
543 struct net_device *dev = link->priv;
546 DEBUG(0, "nmclan_detach(0x%p)\n", link);
548 /* Locate device structure */
549 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
550 if (*linkp == link) break;
554 if (link->state & DEV_CONFIG)
555 nmclan_release(link);
558 pcmcia_deregister_client(link->handle);
560 /* Unlink device structure, free bits */
563 unregister_netdev(dev);
565 } /* nmclan_detach */
567 /* ----------------------------------------------------------------------------
569 Reads a MACE register. This is bank independent; however, the
570 caller must ensure that this call is not interruptable. We are
571 assuming that during normal operation, the MACE is always in
573 ---------------------------------------------------------------------------- */
574 static int mace_read(mace_private *lp, ioaddr_t ioaddr, int reg)
580 case 0: /* register 0-15 */
581 data = inb(ioaddr + AM2150_MACE_BASE + reg);
583 case 1: /* register 16-31 */
584 spin_lock_irqsave(&lp->bank_lock, flags);
586 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
588 spin_unlock_irqrestore(&lp->bank_lock, flags);
591 return (data & 0xFF);
594 /* ----------------------------------------------------------------------------
596 Writes to a MACE register. This is bank independent; however,
597 the caller must ensure that this call is not interruptable. We
598 are assuming that during normal operation, the MACE is always in
600 ---------------------------------------------------------------------------- */
601 static void mace_write(mace_private *lp, ioaddr_t ioaddr, int reg, int data)
606 case 0: /* register 0-15 */
607 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
609 case 1: /* register 16-31 */
610 spin_lock_irqsave(&lp->bank_lock, flags);
612 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
614 spin_unlock_irqrestore(&lp->bank_lock, flags);
619 /* ----------------------------------------------------------------------------
621 Resets the MACE chip.
622 ---------------------------------------------------------------------------- */
623 static int mace_init(mace_private *lp, ioaddr_t ioaddr, char *enet_addr)
628 /* MACE Software reset */
629 mace_write(lp, ioaddr, MACE_BIUCC, 1);
630 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
631 /* Wait for reset bit to be cleared automatically after <= 200ns */;
634 printk(KERN_ERR "mace: reset failed, card removed ?\n");
639 mace_write(lp, ioaddr, MACE_BIUCC, 0);
641 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
642 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
644 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
645 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
648 * Bit 2-1 PORTSEL[1-0] Port Select.
651 * 10 DAI Port (reserved in Am2150)
653 * For this card, only the first two are valid.
654 * So, PLSCC should be set to
657 * Or just set ASEL in PHYCC below!
661 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
664 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
667 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
668 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
669 and the MACE device will automatically select the operating media
674 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
675 /* Poll ADDRCHG bit */
677 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
681 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
685 /* Set PADR register */
686 for (i = 0; i < ETHER_ADDR_LEN; i++)
687 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
689 /* MAC Configuration Control Register should be written last */
690 /* Let set_multicast_list set this. */
691 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
692 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
696 /* ----------------------------------------------------------------------------
698 This routine is scheduled to run after a CARD_INSERTION event
699 is received, to configure the PCMCIA socket, and to make the
700 ethernet device available to the system.
701 ---------------------------------------------------------------------------- */
703 #define CS_CHECK(fn, ret) \
704 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
706 static void nmclan_config(dev_link_t *link)
708 client_handle_t handle = link->handle;
709 struct net_device *dev = link->priv;
710 mace_private *lp = netdev_priv(dev);
714 int i, last_ret, last_fn;
717 DEBUG(0, "nmclan_config(0x%p)\n", link);
719 tuple.Attributes = 0;
720 tuple.TupleData = buf;
721 tuple.TupleDataMax = 64;
722 tuple.TupleOffset = 0;
723 tuple.DesiredTuple = CISTPL_CONFIG;
724 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
725 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
726 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
727 link->conf.ConfigBase = parse.config.base;
730 link->state |= DEV_CONFIG;
732 CS_CHECK(RequestIO, pcmcia_request_io(handle, &link->io));
733 CS_CHECK(RequestIRQ, pcmcia_request_irq(handle, &link->irq));
734 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(handle, &link->conf));
735 dev->irq = link->irq.AssignedIRQ;
736 dev->base_addr = link->io.BasePort1;
738 ioaddr = dev->base_addr;
740 /* Read the ethernet address from the CIS. */
741 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
742 tuple.TupleData = buf;
743 tuple.TupleDataMax = 64;
744 tuple.TupleOffset = 0;
745 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
746 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
747 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
749 /* Verify configuration by reading the MACE ID. */
753 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
754 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
755 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
756 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
759 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
760 " be 0x40 0x?9\n", sig[0], sig[1]);
761 link->state &= ~DEV_CONFIG_PENDING;
766 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
769 /* The if_port symbol can be set when the module is loaded */
771 dev->if_port = if_port;
773 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
775 link->dev = &lp->node;
776 link->state &= ~DEV_CONFIG_PENDING;
778 i = register_netdev(dev);
780 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
785 strcpy(lp->node.dev_name, dev->name);
787 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
788 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
789 for (i = 0; i < 6; i++)
790 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
794 cs_error(link->handle, last_fn, last_ret);
796 nmclan_release(link);
799 } /* nmclan_config */
801 /* ----------------------------------------------------------------------------
803 After a card is removed, nmclan_release() will unregister the
804 net device, and release the PCMCIA configuration. If the device
805 is still open, this will be postponed until it is closed.
806 ---------------------------------------------------------------------------- */
807 static void nmclan_release(dev_link_t *link)
810 DEBUG(0, "nmclan_release(0x%p)\n", link);
812 pcmcia_release_configuration(link->handle);
813 pcmcia_release_io(link->handle, &link->io);
814 pcmcia_release_irq(link->handle, &link->irq);
816 link->state &= ~DEV_CONFIG;
819 /* ----------------------------------------------------------------------------
821 The card status event handler. Mostly, this schedules other
822 stuff to run after an event is received. A CARD_REMOVAL event
823 also sets some flags to discourage the net drivers from trying
824 to talk to the card any more.
825 ---------------------------------------------------------------------------- */
826 static int nmclan_event(event_t event, int priority,
827 event_callback_args_t *args)
829 dev_link_t *link = args->client_data;
830 struct net_device *dev = link->priv;
832 DEBUG(1, "nmclan_event(0x%06x)\n", event);
835 case CS_EVENT_CARD_REMOVAL:
836 link->state &= ~DEV_PRESENT;
837 if (link->state & DEV_CONFIG) {
838 netif_device_detach(dev);
839 nmclan_release(link);
842 case CS_EVENT_CARD_INSERTION:
843 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
846 case CS_EVENT_PM_SUSPEND:
847 link->state |= DEV_SUSPEND;
848 /* Fall through... */
849 case CS_EVENT_RESET_PHYSICAL:
850 if (link->state & DEV_CONFIG) {
852 netif_device_detach(dev);
853 pcmcia_release_configuration(link->handle);
856 case CS_EVENT_PM_RESUME:
857 link->state &= ~DEV_SUSPEND;
858 /* Fall through... */
859 case CS_EVENT_CARD_RESET:
860 if (link->state & DEV_CONFIG) {
861 pcmcia_request_configuration(link->handle, &link->conf);
864 netif_device_attach(dev);
868 case CS_EVENT_RESET_REQUEST:
875 /* ----------------------------------------------------------------------------
877 Reset and restore all of the Xilinx and MACE registers.
878 ---------------------------------------------------------------------------- */
879 static void nmclan_reset(struct net_device *dev)
881 mace_private *lp = netdev_priv(dev);
884 dev_link_t *link = &lp->link;
888 /* Save original COR value */
890 reg.Action = CS_READ;
891 reg.Offset = CISREG_COR;
893 pcmcia_access_configuration_register(link->handle, ®);
894 OrigCorValue = reg.Value;
897 reg.Action = CS_WRITE;
898 reg.Offset = CISREG_COR;
899 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
901 reg.Value = COR_SOFT_RESET;
902 pcmcia_access_configuration_register(link->handle, ®);
903 /* Need to wait for 20 ms for PCMCIA to finish reset. */
905 /* Restore original COR configuration index */
906 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
907 pcmcia_access_configuration_register(link->handle, ®);
908 /* Xilinx is now completely reset along with the MACE chip. */
909 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
911 #endif /* #if RESET_XILINX */
913 /* Xilinx is now completely reset along with the MACE chip. */
914 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
916 /* Reinitialize the MACE chip for operation. */
917 mace_init(lp, dev->base_addr, dev->dev_addr);
918 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
920 /* Restore the multicast list and enable TX and RX. */
921 restore_multicast_list(dev);
924 /* ----------------------------------------------------------------------------
926 [Someone tell me what this is supposed to do? Is if_port a defined
927 standard? If so, there should be defines to indicate 1=10Base-T,
928 2=10Base-2, etc. including limited automatic detection.]
929 ---------------------------------------------------------------------------- */
930 static int mace_config(struct net_device *dev, struct ifmap *map)
932 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
933 if (map->port <= 2) {
934 dev->if_port = map->port;
935 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
936 if_names[dev->if_port]);
943 /* ----------------------------------------------------------------------------
946 ---------------------------------------------------------------------------- */
947 static int mace_open(struct net_device *dev)
949 ioaddr_t ioaddr = dev->base_addr;
950 mace_private *lp = netdev_priv(dev);
951 dev_link_t *link = &lp->link;
960 netif_start_queue(dev);
963 return 0; /* Always succeed */
966 /* ----------------------------------------------------------------------------
968 Closes device driver.
969 ---------------------------------------------------------------------------- */
970 static int mace_close(struct net_device *dev)
972 ioaddr_t ioaddr = dev->base_addr;
973 mace_private *lp = netdev_priv(dev);
974 dev_link_t *link = &lp->link;
976 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
978 /* Mask off all interrupts from the MACE chip. */
979 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
982 netif_stop_queue(dev);
987 static void netdev_get_drvinfo(struct net_device *dev,
988 struct ethtool_drvinfo *info)
990 strcpy(info->driver, DRV_NAME);
991 strcpy(info->version, DRV_VERSION);
992 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
996 static u32 netdev_get_msglevel(struct net_device *dev)
1001 static void netdev_set_msglevel(struct net_device *dev, u32 level)
1005 #endif /* PCMCIA_DEBUG */
1007 static struct ethtool_ops netdev_ethtool_ops = {
1008 .get_drvinfo = netdev_get_drvinfo,
1010 .get_msglevel = netdev_get_msglevel,
1011 .set_msglevel = netdev_set_msglevel,
1012 #endif /* PCMCIA_DEBUG */
1015 /* ----------------------------------------------------------------------------
1017 This routine begins the packet transmit function. When completed,
1018 it will generate a transmit interrupt.
1020 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
1021 returns 0, the "packet is now solely the responsibility of the
1022 driver." If _start_xmit returns non-zero, the "transmission
1023 failed, put skb back into a list."
1024 ---------------------------------------------------------------------------- */
1026 static void mace_tx_timeout(struct net_device *dev)
1028 mace_private *lp = netdev_priv(dev);
1029 dev_link_t *link = &lp->link;
1031 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
1032 #if RESET_ON_TIMEOUT
1033 printk("resetting card\n");
1034 pcmcia_reset_card(link->handle, NULL);
1035 #else /* #if RESET_ON_TIMEOUT */
1036 printk("NOT resetting card\n");
1037 #endif /* #if RESET_ON_TIMEOUT */
1038 dev->trans_start = jiffies;
1039 netif_wake_queue(dev);
1042 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
1044 mace_private *lp = netdev_priv(dev);
1045 ioaddr_t ioaddr = dev->base_addr;
1047 netif_stop_queue(dev);
1049 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
1050 dev->name, (long)skb->len);
1052 #if (!TX_INTERRUPTABLE)
1053 /* Disable MACE TX interrupts. */
1054 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
1055 ioaddr + AM2150_MACE_BASE + MACE_IMR);
1056 lp->tx_irq_disabled=1;
1057 #endif /* #if (!TX_INTERRUPTABLE) */
1060 /* This block must not be interrupted by another transmit request!
1061 mace_tx_timeout will take care of timer-based retransmissions from
1062 the upper layers. The interrupt handler is guaranteed never to
1063 service a transmit interrupt while we are in here.
1066 lp->linux_stats.tx_bytes += skb->len;
1067 lp->tx_free_frames--;
1069 /* WARNING: Write the _exact_ number of bytes written in the header! */
1070 /* Put out the word header [must be an outw()] . . . */
1071 outw(skb->len, ioaddr + AM2150_XMT);
1072 /* . . . and the packet [may be any combination of outw() and outb()] */
1073 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
1075 /* Odd byte transfer */
1076 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
1079 dev->trans_start = jiffies;
1082 if (lp->tx_free_frames > 0)
1083 netif_start_queue(dev);
1084 #endif /* #if MULTI_TX */
1087 #if (!TX_INTERRUPTABLE)
1088 /* Re-enable MACE TX interrupts. */
1089 lp->tx_irq_disabled=0;
1090 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1091 #endif /* #if (!TX_INTERRUPTABLE) */
1096 } /* mace_start_xmit */
1098 /* ----------------------------------------------------------------------------
1100 The interrupt handler.
1101 ---------------------------------------------------------------------------- */
1102 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1104 struct net_device *dev = (struct net_device *) dev_id;
1105 mace_private *lp = netdev_priv(dev);
1106 ioaddr_t ioaddr = dev->base_addr;
1108 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1111 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1116 if (lp->tx_irq_disabled) {
1118 (lp->tx_irq_disabled?
1119 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1120 "[isr=%02X, imr=%02X]\n":
1121 KERN_NOTICE "%s: Re-entering the interrupt handler "
1122 "[isr=%02X, imr=%02X]\n"),
1124 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1125 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1127 /* WARNING: MACE_IR has been read! */
1131 if (!netif_device_present(dev)) {
1132 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1137 /* WARNING: MACE_IR is a READ/CLEAR port! */
1138 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1140 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1142 if (status & MACE_IR_RCVINT) {
1143 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1146 if (status & MACE_IR_XMTINT) {
1147 unsigned char fifofc;
1148 unsigned char xmtrc;
1149 unsigned char xmtfs;
1151 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1152 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1153 lp->linux_stats.tx_errors++;
1154 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1157 /* Transmit Retry Count (XMTRC, reg 4) */
1158 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1159 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1160 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1163 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1164 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1166 lp->mace_stats.xmtsv++;
1168 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1169 if (xmtfs & MACE_XMTFS_UFLO) {
1170 /* Underflow. Indicates that the Transmit FIFO emptied before
1171 the end of frame was reached. */
1172 lp->mace_stats.uflo++;
1174 if (xmtfs & MACE_XMTFS_LCOL) {
1175 /* Late Collision */
1176 lp->mace_stats.lcol++;
1178 if (xmtfs & MACE_XMTFS_MORE) {
1179 /* MORE than one retry was needed */
1180 lp->mace_stats.more++;
1182 if (xmtfs & MACE_XMTFS_ONE) {
1183 /* Exactly ONE retry occurred */
1184 lp->mace_stats.one++;
1186 if (xmtfs & MACE_XMTFS_DEFER) {
1187 /* Transmission was defered */
1188 lp->mace_stats.defer++;
1190 if (xmtfs & MACE_XMTFS_LCAR) {
1191 /* Loss of carrier */
1192 lp->mace_stats.lcar++;
1194 if (xmtfs & MACE_XMTFS_RTRY) {
1195 /* Retry error: transmit aborted after 16 attempts */
1196 lp->mace_stats.rtry++;
1198 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1200 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1202 lp->linux_stats.tx_packets++;
1203 lp->tx_free_frames++;
1204 netif_wake_queue(dev);
1205 } /* if (status & MACE_IR_XMTINT) */
1207 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1208 if (status & MACE_IR_JAB) {
1209 /* Jabber Error. Excessive transmit duration (20-150ms). */
1210 lp->mace_stats.jab++;
1212 if (status & MACE_IR_BABL) {
1213 /* Babble Error. >1518 bytes transmitted. */
1214 lp->mace_stats.babl++;
1216 if (status & MACE_IR_CERR) {
1217 /* Collision Error. CERR indicates the absence of the
1218 Signal Quality Error Test message after a packet
1220 lp->mace_stats.cerr++;
1222 if (status & MACE_IR_RCVCCO) {
1223 /* Receive Collision Count Overflow; */
1224 lp->mace_stats.rcvcco++;
1226 if (status & MACE_IR_RNTPCO) {
1227 /* Runt Packet Count Overflow */
1228 lp->mace_stats.rntpco++;
1230 if (status & MACE_IR_MPCO) {
1231 /* Missed Packet Count Overflow */
1232 lp->mace_stats.mpco++;
1234 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1236 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1239 } /* mace_interrupt */
1241 /* ----------------------------------------------------------------------------
1244 ---------------------------------------------------------------------------- */
1245 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1247 mace_private *lp = netdev_priv(dev);
1248 ioaddr_t ioaddr = dev->base_addr;
1249 unsigned char rx_framecnt;
1250 unsigned short rx_status;
1253 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1254 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1257 rx_status = inw(ioaddr + AM2150_RCV);
1259 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1260 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1262 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1263 lp->linux_stats.rx_errors++;
1264 if (rx_status & MACE_RCVFS_OFLO) {
1265 lp->mace_stats.oflo++;
1267 if (rx_status & MACE_RCVFS_CLSN) {
1268 lp->mace_stats.clsn++;
1270 if (rx_status & MACE_RCVFS_FRAM) {
1271 lp->mace_stats.fram++;
1273 if (rx_status & MACE_RCVFS_FCS) {
1274 lp->mace_stats.fcs++;
1277 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1278 /* Auto Strip is off, always subtract 4 */
1279 struct sk_buff *skb;
1281 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1282 /* runt packet count */
1283 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1284 /* rcv collision count */
1286 DEBUG(3, " receiving packet size 0x%X rx_status"
1287 " 0x%X.\n", pkt_len, rx_status);
1289 skb = dev_alloc_skb(pkt_len+2);
1294 skb_reserve(skb, 2);
1295 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1297 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1298 skb->protocol = eth_type_trans(skb, dev);
1300 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1302 dev->last_rx = jiffies;
1303 lp->linux_stats.rx_packets++;
1304 lp->linux_stats.rx_bytes += skb->len;
1305 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1308 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1309 " %d.\n", dev->name, pkt_len);
1310 lp->linux_stats.rx_dropped++;
1313 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1319 /* ----------------------------------------------------------------------------
1321 ---------------------------------------------------------------------------- */
1322 static void pr_linux_stats(struct net_device_stats *pstats)
1324 DEBUG(2, "pr_linux_stats\n");
1325 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1326 (long)pstats->rx_packets, (long)pstats->tx_packets);
1327 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1328 (long)pstats->rx_errors, (long)pstats->tx_errors);
1329 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1330 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1331 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1332 (long)pstats->multicast, (long)pstats->collisions);
1334 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1335 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1336 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1337 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1338 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1339 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1341 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1342 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1343 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1344 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1345 DEBUG(2, " tx_window_errors=%ld\n",
1346 (long)pstats->tx_window_errors);
1347 } /* pr_linux_stats */
1349 /* ----------------------------------------------------------------------------
1351 ---------------------------------------------------------------------------- */
1352 static void pr_mace_stats(mace_statistics *pstats)
1354 DEBUG(2, "pr_mace_stats\n");
1356 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1357 pstats->xmtsv, pstats->uflo);
1358 DEBUG(2, " lcol=%-7d more=%d\n",
1359 pstats->lcol, pstats->more);
1360 DEBUG(2, " one=%-7d defer=%d\n",
1361 pstats->one, pstats->defer);
1362 DEBUG(2, " lcar=%-7d rtry=%d\n",
1363 pstats->lcar, pstats->rtry);
1366 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1367 pstats->exdef, pstats->xmtrc);
1369 /* RFS1--Receive Status (RCVSTS) */
1370 DEBUG(2, " oflo=%-7d clsn=%d\n",
1371 pstats->oflo, pstats->clsn);
1372 DEBUG(2, " fram=%-7d fcs=%d\n",
1373 pstats->fram, pstats->fcs);
1375 /* RFS2--Runt Packet Count (RNTPC) */
1376 /* RFS3--Receive Collision Count (RCVCC) */
1377 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1378 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1381 DEBUG(2, " jab=%-7d babl=%d\n",
1382 pstats->jab, pstats->babl);
1383 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1384 pstats->cerr, pstats->rcvcco);
1385 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1386 pstats->rntpco, pstats->mpco);
1389 DEBUG(2, " mpc=%d\n", pstats->mpc);
1392 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1395 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1397 } /* pr_mace_stats */
1399 /* ----------------------------------------------------------------------------
1401 Update statistics. We change to register window 1, so this
1402 should be run single-threaded if the device is active. This is
1403 expected to be a rare operation, and it's simpler for the rest
1404 of the driver to assume that window 0 is always valid rather
1405 than use a special window-state variable.
1407 oflo & uflo should _never_ occur since it would mean the Xilinx
1408 was not able to transfer data between the MACE FIFO and the
1409 card's SRAM fast enough. If this happens, something is
1410 seriously wrong with the hardware.
1411 ---------------------------------------------------------------------------- */
1412 static void update_stats(ioaddr_t ioaddr, struct net_device *dev)
1414 mace_private *lp = netdev_priv(dev);
1416 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1417 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1418 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1419 /* At this point, mace_stats is fully updated for this call.
1420 We may now update the linux_stats. */
1422 /* The MACE has no equivalent for linux_stats field which are commented
1425 /* lp->linux_stats.multicast; */
1426 lp->linux_stats.collisions =
1427 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1428 /* Collision: The MACE may retry sending a packet 15 times
1429 before giving up. The retry count is in XMTRC.
1430 Does each retry constitute a collision?
1431 If so, why doesn't the RCVCC record these collisions? */
1433 /* detailed rx_errors: */
1434 lp->linux_stats.rx_length_errors =
1435 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1436 /* lp->linux_stats.rx_over_errors */
1437 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1438 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1439 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1440 lp->linux_stats.rx_missed_errors =
1441 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1443 /* detailed tx_errors */
1444 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1445 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1446 /* LCAR usually results from bad cabling. */
1447 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1448 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1449 /* lp->linux_stats.tx_window_errors; */
1452 } /* update_stats */
1454 /* ----------------------------------------------------------------------------
1456 Gathers ethernet statistics from the MACE chip.
1457 ---------------------------------------------------------------------------- */
1458 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1460 mace_private *lp = netdev_priv(dev);
1462 update_stats(dev->base_addr, dev);
1464 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1465 pr_linux_stats(&lp->linux_stats);
1466 pr_mace_stats(&lp->mace_stats);
1468 return &lp->linux_stats;
1469 } /* net_device_stats */
1471 /* ----------------------------------------------------------------------------
1473 Modified from Am79C90 data sheet.
1474 ---------------------------------------------------------------------------- */
1476 #if BROKEN_MULTICAST
1478 static void updateCRC(int *CRC, int bit)
1485 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1486 CRC generator polynomial. */
1490 /* shift CRC and control bit (CRC[32]) */
1491 for (j = 32; j > 0; j--)
1495 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1497 for (j = 0; j < 32; j++)
1501 /* ----------------------------------------------------------------------------
1503 Build logical address filter.
1504 Modified from Am79C90 data sheet.
1507 ladrf: logical address filter (contents initialized to 0)
1508 adr: ethernet address
1509 ---------------------------------------------------------------------------- */
1510 static void BuildLAF(int *ladrf, int *adr)
1512 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1514 int i, byte; /* temporary array indices */
1515 int hashcode; /* the output object */
1519 for (byte = 0; byte < 6; byte++)
1520 for (i = 0; i < 8; i++)
1521 updateCRC(CRC, (adr[byte] >> i) & 1);
1524 for (i = 0; i < 6; i++)
1525 hashcode = (hashcode << 1) + CRC[i];
1527 byte = hashcode >> 3;
1528 ladrf[byte] |= (1 << (hashcode & 7));
1532 printk(KERN_DEBUG " adr =");
1533 for (i = 0; i < 6; i++)
1534 printk(" %02X", adr[i]);
1535 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1537 for (i = 0; i < 8; i++)
1538 printk(" %02X", ladrf[i]);
1544 /* ----------------------------------------------------------------------------
1545 restore_multicast_list
1546 Restores the multicast filter for MACE chip to the last
1547 set_multicast_list() call.
1552 ---------------------------------------------------------------------------- */
1553 static void restore_multicast_list(struct net_device *dev)
1555 mace_private *lp = netdev_priv(dev);
1556 int num_addrs = lp->multicast_num_addrs;
1557 int *ladrf = lp->multicast_ladrf;
1558 ioaddr_t ioaddr = dev->base_addr;
1561 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1562 dev->name, num_addrs);
1564 if (num_addrs > 0) {
1566 DEBUG(1, "Attempt to restore multicast list detected.\n");
1568 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1569 /* Poll ADDRCHG bit */
1570 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1572 /* Set LADRF register */
1573 for (i = 0; i < MACE_LADRF_LEN; i++)
1574 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1576 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1577 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1579 } else if (num_addrs < 0) {
1581 /* Promiscuous mode: receive all packets */
1582 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1583 mace_write(lp, ioaddr, MACE_MACCC,
1584 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1590 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1591 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1594 } /* restore_multicast_list */
1596 /* ----------------------------------------------------------------------------
1598 Set or clear the multicast filter for this adaptor.
1601 num_addrs == -1 Promiscuous mode, receive all packets
1602 num_addrs == 0 Normal mode, clear multicast list
1603 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1604 best-effort filtering.
1608 ---------------------------------------------------------------------------- */
1610 static void set_multicast_list(struct net_device *dev)
1612 mace_private *lp = netdev_priv(dev);
1613 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1615 struct dev_mc_list *dmi = dev->mc_list;
1620 if (dev->mc_count != old) {
1621 old = dev->mc_count;
1622 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1628 /* Set multicast_num_addrs. */
1629 lp->multicast_num_addrs = dev->mc_count;
1631 /* Set multicast_ladrf. */
1632 if (num_addrs > 0) {
1633 /* Calculate multicast logical address filter */
1634 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1635 for (i = 0; i < dev->mc_count; i++) {
1636 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1638 BuildLAF(lp->multicast_ladrf, adr);
1642 restore_multicast_list(dev);
1644 } /* set_multicast_list */
1646 #endif /* BROKEN_MULTICAST */
1648 static void restore_multicast_list(struct net_device *dev)
1650 ioaddr_t ioaddr = dev->base_addr;
1651 mace_private *lp = netdev_priv(dev);
1653 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1654 lp->multicast_num_addrs);
1656 if (dev->flags & IFF_PROMISC) {
1657 /* Promiscuous mode: receive all packets */
1658 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1659 mace_write(lp, ioaddr, MACE_MACCC,
1660 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1664 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1665 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1667 } /* restore_multicast_list */
1669 static void set_multicast_list(struct net_device *dev)
1671 mace_private *lp = netdev_priv(dev);
1676 if (dev->mc_count != old) {
1677 old = dev->mc_count;
1678 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1684 lp->multicast_num_addrs = dev->mc_count;
1685 restore_multicast_list(dev);
1687 } /* set_multicast_list */
1689 static struct pcmcia_driver nmclan_cs_driver = {
1690 .owner = THIS_MODULE,
1692 .name = "nmclan_cs",
1694 .attach = nmclan_attach,
1695 .detach = nmclan_detach,
1698 static int __init init_nmclan_cs(void)
1700 return pcmcia_register_driver(&nmclan_cs_driver);
1703 static void __exit exit_nmclan_cs(void)
1705 pcmcia_unregister_driver(&nmclan_cs_driver);
1706 while (dev_list != NULL)
1707 nmclan_detach(dev_list);
1710 module_init(init_nmclan_cs);
1711 module_exit(exit_nmclan_cs);