1 /******************************************************************************
4 * Project: GEnesis, PCI Gigabit Ethernet Adapter
5 * Version: $Revision: 1.10 $
6 * Date: $Date: 2003/12/11 16:04:45 $
7 * Purpose: Second header file for driver and all other modules
9 ******************************************************************************/
11 /******************************************************************************
13 * (C)Copyright 1998-2002 SysKonnect GmbH.
14 * (C)Copyright 2002-2003 Marvell.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * The information in this file is provided "AS IS" without warranty.
23 ******************************************************************************/
25 /******************************************************************************
29 * This is the second include file of the driver, which includes all other
30 * neccessary files and defines all structures and constants used by the
31 * driver and the common modules.
33 * Include File Hierarchy:
37 ******************************************************************************/
39 #ifndef __INC_SKDRV2ND_H
40 #define __INC_SKDRV2ND_H
42 #include "h/skqueue.h"
43 #include "h/skgehwt.h"
44 #include "h/sktimer.h"
46 #include "h/skgepnmi.h"
49 #include "h/skgeinit.h"
51 #include "h/skgesirq.h"
54 #include "h/skgedrv.h"
56 #define SK_PCI_ISCOMPLIANT(result, pdev) { \
57 result = SK_FALSE; /* default */ \
59 if (pdev->vendor == 0x10b7) { \
60 /* Gigabit Ethernet Adapter (0x1700) */ \
61 if ((pdev->device == 0x1700)) { \
64 /* SysKonnect (0x1148) */ \
65 } else if (pdev->vendor == 0x1148) { \
66 /* SK-98xx Gigabit Ethernet Server Adapter (0x4300) */ \
67 /* SK-98xx V2.0 Gigabit Ethernet Adapter (0x4320) */ \
68 if ((pdev->device == 0x4300) || \
69 (pdev->device == 0x4320)) { \
72 /* D-Link (0x1186) */ \
73 } else if (pdev->vendor == 0x1186) { \
74 /* Gigabit Ethernet Adapter (0x4c00) */ \
75 if ((pdev->device == 0x4c00)) { \
78 /* Marvell (0x11ab) */ \
79 } else if (pdev->vendor == 0x11ab) { \
80 /* Gigabit Ethernet Adapter (0x4320) */ \
81 /* Gigabit Ethernet Adapter (0x4360) */ \
82 /* Gigabit Ethernet Adapter (0x4361) */ \
83 /* Belkin (0x5005) */ \
84 if ((pdev->device == 0x4320) || \
85 (pdev->device == 0x4360) || \
86 (pdev->device == 0x4361) || \
87 (pdev->device == 0x5005)) { \
91 } else if (pdev->vendor == 0x1371) { \
92 /* GigaCard Network Adapter (0x434e) */ \
93 if ((pdev->device == 0x434e)) { \
96 /* Linksys (0x1737) */ \
97 } else if (pdev->vendor == 0x1737) { \
98 /* Gigabit Network Adapter (0x1032) */ \
99 /* Gigabit Network Adapter (0x1064) */ \
100 if ((pdev->device == 0x1032) || \
101 (pdev->device == 0x1064)) { \
110 extern SK_MBUF *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
111 extern void SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
112 extern SK_U64 SkOsGetTime(SK_AC*);
113 extern int SkPciReadCfgDWord(SK_AC*, int, SK_U32*);
114 extern int SkPciReadCfgWord(SK_AC*, int, SK_U16*);
115 extern int SkPciReadCfgByte(SK_AC*, int, SK_U8*);
116 extern int SkPciWriteCfgDWord(SK_AC*, int, SK_U32);
117 extern int SkPciWriteCfgWord(SK_AC*, int, SK_U16);
118 extern int SkPciWriteCfgByte(SK_AC*, int, SK_U8);
119 extern int SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
121 #ifdef SK_DIAG_SUPPORT
122 extern int SkDrvEnterDiagMode(SK_AC *pAc);
123 extern int SkDrvLeaveDiagMode(SK_AC *pAc);
126 struct s_DrvRlmtMbuf {
127 SK_MBUF *pNext; /* Pointer to next RLMT Mbuf. */
128 SK_U8 *pData; /* Data buffer (virtually contig.). */
129 unsigned Size; /* Data buffer size. */
130 unsigned Length; /* Length of packet (<= Size). */
131 SK_U32 PortIdx; /* Receiving/transmitting port. */
132 #ifdef SK_RLMT_MBUF_PRIVATE
133 SK_RLMT_MBUF Rlmt; /* Private part for RLMT. */
134 #endif /* SK_RLMT_MBUF_PRIVATE */
135 struct sk_buff *pOs; /* Pointer to message block */
142 #if SK_TICKS_PER_SEC == 100
143 #define SK_PNMI_HUNDREDS_SEC(t) (t)
145 #define SK_PNMI_HUNDREDS_SEC(t) ((((unsigned long)t) * 100) / \
152 #define SkOsGetTimeCurrent(pAC, pUsec) {\
154 do_gettimeofday(&t);\
155 *pUsec = ((((t.tv_sec) * 1000000L)+t.tv_usec)/10000);\
162 #define SK_IOCTL_BASE (SIOCDEVPRIVATE)
163 #define SK_IOCTL_GETMIB (SK_IOCTL_BASE + 0)
164 #define SK_IOCTL_SETMIB (SK_IOCTL_BASE + 1)
165 #define SK_IOCTL_PRESETMIB (SK_IOCTL_BASE + 2)
166 #define SK_IOCTL_GEN (SK_IOCTL_BASE + 3)
167 #define SK_IOCTL_DIAG (SK_IOCTL_BASE + 4)
169 typedef struct s_IOCTL SK_GE_IOCTL;
178 * define sizes of descriptor rings in bytes
181 #define TX_RING_SIZE (8*1024)
182 #define RX_RING_SIZE (24*1024)
185 * Buffer size for ethernet packets
187 #define ETH_BUF_SIZE 1540
188 #define ETH_MAX_MTU 1514
189 #define ETH_MIN_MTU 60
190 #define ETH_MULTICAST_BIT 0x01
191 #define SK_JUMBO_MTU 9000
194 * transmit priority selects the queue: LOW=asynchron, HIGH=synchron
196 #define TX_PRIO_LOW 0
197 #define TX_PRIO_HIGH 1
200 * alignment of rx/tx descriptors
202 #define DESCR_ALIGN 64
205 * definitions for pnmi. TODO
207 #define SK_DRIVER_RESET(pAC, IoC) 0
208 #define SK_DRIVER_SENDEVENT(pAC, IoC) 0
209 #define SK_DRIVER_SELFTEST(pAC, IoC) 0
210 /* For get mtu you must add an own function */
211 #define SK_DRIVER_GET_MTU(pAc,IoC,i) 0
212 #define SK_DRIVER_SET_MTU(pAc,IoC,i,v) 0
213 #define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v) 0
216 ** Interim definition of SK_DRV_TIMER placed in this file until
217 ** common modules have boon finallized
219 #define SK_DRV_TIMER 11
220 #define SK_DRV_MODERATION_TIMER 1
221 #define SK_DRV_MODERATION_TIMER_LENGTH 1000000 /* 1 second */
222 #define SK_DRV_RX_CLEANUP_TIMER 2
223 #define SK_DRV_RX_CLEANUP_TIMER_LENGTH 1000000 /* 100 millisecs */
226 ** Definitions regarding transmitting frames
227 ** any calculating any checksum.
229 #define C_LEN_ETHERMAC_HEADER_DEST_ADDR 6
230 #define C_LEN_ETHERMAC_HEADER_SRC_ADDR 6
231 #define C_LEN_ETHERMAC_HEADER_LENTYPE 2
232 #define C_LEN_ETHERMAC_HEADER ( (C_LEN_ETHERMAC_HEADER_DEST_ADDR) + \
233 (C_LEN_ETHERMAC_HEADER_SRC_ADDR) + \
234 (C_LEN_ETHERMAC_HEADER_LENTYPE) )
236 #define C_LEN_ETHERMTU_MINSIZE 46
237 #define C_LEN_ETHERMTU_MAXSIZE_STD 1500
238 #define C_LEN_ETHERMTU_MAXSIZE_JUMBO 9000
240 #define C_LEN_ETHERNET_MINSIZE ( (C_LEN_ETHERMAC_HEADER) + \
241 (C_LEN_ETHERMTU_MINSIZE) )
243 #define C_OFFSET_IPHEADER C_LEN_ETHERMAC_HEADER
244 #define C_OFFSET_IPHEADER_IPPROTO 9
245 #define C_OFFSET_TCPHEADER_TCPCS 16
246 #define C_OFFSET_UDPHEADER_UDPCS 6
248 #define C_OFFSET_IPPROTO ( (C_LEN_ETHERMAC_HEADER) + \
249 (C_OFFSET_IPHEADER_IPPROTO) )
251 #define C_PROTO_ID_UDP 17 /* refer to RFC 790 or Stevens' */
252 #define C_PROTO_ID_TCP 6 /* TCP/IP illustrated for details */
254 /* TX and RX descriptors *****************************************************/
256 typedef struct s_RxD RXD; /* the receive descriptor */
259 volatile SK_U32 RBControl; /* Receive Buffer Control */
260 SK_U32 VNextRxd; /* Next receive descriptor,low dword */
261 SK_U32 VDataLow; /* Receive buffer Addr, low dword */
262 SK_U32 VDataHigh; /* Receive buffer Addr, high dword */
263 SK_U32 FrameStat; /* Receive Frame Status word */
264 SK_U32 TimeStamp; /* Time stamp from XMAC */
265 SK_U32 TcpSums; /* TCP Sum 2 / TCP Sum 1 */
266 SK_U32 TcpSumStarts; /* TCP Sum Start 2 / TCP Sum Start 1 */
267 RXD *pNextRxd; /* Pointer to next Rxd */
268 struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
271 typedef struct s_TxD TXD; /* the transmit descriptor */
274 volatile SK_U32 TBControl; /* Transmit Buffer Control */
275 SK_U32 VNextTxd; /* Next transmit descriptor,low dword */
276 SK_U32 VDataLow; /* Transmit Buffer Addr, low dword */
277 SK_U32 VDataHigh; /* Transmit Buffer Addr, high dword */
278 SK_U32 FrameStat; /* Transmit Frame Status Word */
279 SK_U32 TcpSumOfs; /* Reserved / TCP Sum Offset */
280 SK_U16 TcpSumSt; /* TCP Sum Start */
281 SK_U16 TcpSumWr; /* TCP Sum Write */
282 SK_U32 TcpReserved; /* not used */
283 TXD *pNextTxd; /* Pointer to next Txd */
284 struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
287 /* Used interrupt bits in the interrupts source register *********************/
289 #define DRIVER_IRQS ((IS_IRQ_SW) | \
290 (IS_R1_F) |(IS_R2_F) | \
291 (IS_XS1_F) |(IS_XA1_F) | \
292 (IS_XS2_F) |(IS_XA2_F))
294 #define SPECIAL_IRQS ((IS_HW_ERR) |(IS_I2C_READY) | \
295 (IS_EXT_REG) |(IS_TIMINT) | \
296 (IS_PA_TO_RX1) |(IS_PA_TO_RX2) | \
297 (IS_PA_TO_TX1) |(IS_PA_TO_TX2) | \
298 (IS_MAC1) |(IS_LNK_SYNC_M1)| \
299 (IS_MAC2) |(IS_LNK_SYNC_M2)| \
300 (IS_R1_C) |(IS_R2_C) | \
301 (IS_XS1_C) |(IS_XA1_C) | \
302 (IS_XS2_C) |(IS_XA2_C))
304 #define IRQ_MASK ((IS_IRQ_SW) | \
305 (IS_R1_B) |(IS_R1_F) |(IS_R2_B) |(IS_R2_F) | \
306 (IS_XS1_B) |(IS_XS1_F) |(IS_XA1_B)|(IS_XA1_F)| \
307 (IS_XS2_B) |(IS_XS2_F) |(IS_XA2_B)|(IS_XA2_F)| \
308 (IS_HW_ERR) |(IS_I2C_READY)| \
309 (IS_EXT_REG) |(IS_TIMINT) | \
310 (IS_PA_TO_RX1) |(IS_PA_TO_RX2)| \
311 (IS_PA_TO_TX1) |(IS_PA_TO_TX2)| \
312 (IS_MAC1) |(IS_MAC2) | \
313 (IS_R1_C) |(IS_R2_C) | \
314 (IS_XS1_C) |(IS_XA1_C) | \
315 (IS_XS2_C) |(IS_XA2_C))
317 #define IRQ_HWE_MASK (IS_ERR_MSK) /* enable all HW irqs */
319 typedef struct s_DevNet DEV_NET;
322 struct proc_dir_entry *proc;
330 typedef struct s_TxPort TX_PORT;
333 /* the transmit descriptor rings */
334 caddr_t pTxDescrRing; /* descriptor area memory */
335 SK_U64 VTxDescrRing; /* descr. area bus virt. addr. */
336 TXD *pTxdRingHead; /* Head of Tx rings */
337 TXD *pTxdRingTail; /* Tail of Tx rings */
338 TXD *pTxdRingPrev; /* descriptor sent previously */
339 int TxdRingFree; /* # of free entrys */
340 spinlock_t TxDesRingLock; /* serialize descriptor accesses */
341 caddr_t HwAddr; /* bmu registers address */
342 int PortIndex; /* index number of port (0 or 1) */
345 typedef struct s_RxPort RX_PORT;
348 /* the receive descriptor rings */
349 caddr_t pRxDescrRing; /* descriptor area memory */
350 SK_U64 VRxDescrRing; /* descr. area bus virt. addr. */
351 RXD *pRxdRingHead; /* Head of Rx rings */
352 RXD *pRxdRingTail; /* Tail of Rx rings */
353 RXD *pRxdRingPrev; /* descriptor given to BMU previously */
354 int RxdRingFree; /* # of free entrys */
355 spinlock_t RxDesRingLock; /* serialize descriptor accesses */
356 int RxFillLimit; /* limit for buffers in ring */
357 caddr_t HwAddr; /* bmu registers address */
358 int PortIndex; /* index number of port (0 or 1) */
361 /* Definitions needed for interrupt moderation *******************************/
363 #define IRQ_EOF_AS_TX ((IS_XA1_F) | (IS_XA2_F))
364 #define IRQ_EOF_SY_TX ((IS_XS1_F) | (IS_XS2_F))
365 #define IRQ_MASK_TX_ONLY ((IRQ_EOF_AS_TX)| (IRQ_EOF_SY_TX))
366 #define IRQ_MASK_RX_ONLY ((IS_R1_F) | (IS_R2_F))
367 #define IRQ_MASK_SP_ONLY (SPECIAL_IRQS)
368 #define IRQ_MASK_TX_RX ((IRQ_MASK_TX_ONLY)| (IRQ_MASK_RX_ONLY))
369 #define IRQ_MASK_SP_RX ((SPECIAL_IRQS) | (IRQ_MASK_RX_ONLY))
370 #define IRQ_MASK_SP_TX ((SPECIAL_IRQS) | (IRQ_MASK_TX_ONLY))
371 #define IRQ_MASK_RX_TX_SP ((SPECIAL_IRQS) | (IRQ_MASK_TX_RX))
373 #define C_INT_MOD_NONE 1
374 #define C_INT_MOD_STATIC 2
375 #define C_INT_MOD_DYNAMIC 4
377 #define C_CLK_FREQ_GENESIS 53215000 /* shorter: 53.125 MHz */
378 #define C_CLK_FREQ_YUKON 78215000 /* shorter: 78.125 MHz */
380 #define C_INTS_PER_SEC_DEFAULT 2000
381 #define C_INT_MOD_ENABLE_PERCENTAGE 50 /* if higher 50% enable */
382 #define C_INT_MOD_DISABLE_PERCENTAGE 50 /* if lower 50% disable */
383 #define C_INT_MOD_IPS_LOWER_RANGE 30
384 #define C_INT_MOD_IPS_UPPER_RANGE 40000
387 typedef struct s_DynIrqModInfo DIM_INFO;
388 struct s_DynIrqModInfo {
389 unsigned long PrevTimeVal;
390 unsigned int PrevSysLoad;
391 unsigned int PrevUsedTime;
392 unsigned int PrevTotalTime;
393 int PrevUsedDescrRatio;
394 int NbrProcessedDescr;
395 SK_U64 PrevPort0RxIntrCts;
396 SK_U64 PrevPort1RxIntrCts;
397 SK_U64 PrevPort0TxIntrCts;
398 SK_U64 PrevPort1TxIntrCts;
399 SK_BOOL ModJustEnabled; /* Moderation just enabled yes/no */
401 int MaxModIntsPerSec; /* Moderation Threshold */
402 int MaxModIntsPerSecUpperLimit; /* Upper limit for DIM */
403 int MaxModIntsPerSecLowerLimit; /* Lower limit for DIM */
405 long MaskIrqModeration; /* ModIrqType (eg. 'TxRx') */
406 SK_BOOL DisplayStats; /* Stats yes/no */
407 SK_BOOL AutoSizing; /* Resize DIM-timer on/off */
408 int IntModTypeSelect; /* EnableIntMod (eg. 'dynamic') */
410 SK_TIMER ModTimer; /* just some timer */
413 typedef struct s_PerStrm PER_STRM;
415 #define SK_ALLOC_IRQ 0x00000001
417 #ifdef SK_DIAG_SUPPORT
418 #define DIAG_ACTIVE 1
419 #define DIAG_NOTACTIVE 0
422 /****************************************************************************
423 * Per board structure / Adapter Context structure:
424 * Allocated within attach(9e) and freed within detach(9e).
425 * Contains all 'per device' necessary handles, flags, locks etc.:
428 SK_GEINIT GIni; /* GE init struct */
429 SK_PNMI Pnmi; /* PNMI data struct */
430 SK_VPD vpd; /* vpd data struct */
431 SK_QUEUE Event; /* Event queue */
432 SK_HWT Hwt; /* Hardware Timer control struct */
433 SK_TIMCTRL Tim; /* Software Timer control struct */
434 SK_I2C I2c; /* I2C relevant data structure */
435 SK_ADDR Addr; /* for Address module */
436 SK_CSUM Csum; /* for checksum module */
437 SK_RLMT Rlmt; /* for rlmt module */
438 spinlock_t SlowPathLock; /* Normal IRQ lock */
439 SK_PNMI_STRUCT_DATA PnmiStruct; /* structure to get all Pnmi-Data */
440 int RlmtMode; /* link check mode to set */
441 int RlmtNets; /* Number of nets */
443 SK_IOC IoBase; /* register set of adapter */
444 int BoardLevel; /* level of active hw init (0-2) */
445 char DeviceStr[80]; /* adapter string from vpd */
446 SK_U32 AllocFlag; /* flag allocation of resources */
447 struct pci_dev *PciDev; /* for access to pci config space */
448 SK_U32 PciDevId; /* pci device id */
449 struct SK_NET_DEVICE *dev[2]; /* pointer to device struct */
450 char Name[30]; /* driver name */
451 struct SK_NET_DEVICE *Next; /* link all devices (for clearing) */
452 int RxBufSize; /* length of receive buffers */
453 struct net_device_stats stats; /* linux 'netstat -i' statistics */
454 int Index; /* internal board index number */
456 /* adapter RAM sizes for queues of active port */
457 int RxQueueSize; /* memory used for receive queue */
458 int TxSQueueSize; /* memory used for sync. tx queue */
459 int TxAQueueSize; /* memory used for async. tx queue */
461 int PromiscCount; /* promiscuous mode counter */
462 int AllMultiCount; /* allmulticast mode counter */
463 int MulticCount; /* number of different MC */
464 /* addresses for this board */
465 /* (may be more than HW can)*/
467 int HWRevision; /* Hardware revision */
468 int ActivePort; /* the active XMAC port */
469 int MaxPorts; /* number of activated ports */
470 int TxDescrPerRing; /* # of descriptors per tx ring */
471 int RxDescrPerRing; /* # of descriptors per rx ring */
473 caddr_t pDescrMem; /* Pointer to the descriptor area */
474 dma_addr_t pDescrMemDMA; /* PCI DMA address of area */
476 /* the port structures with descriptor rings */
477 TX_PORT TxPort[SK_MAX_MACS][2];
478 RX_PORT RxPort[SK_MAX_MACS];
480 unsigned int CsOfs1; /* for checksum calculation */
481 unsigned int CsOfs2; /* for checksum calculation */
482 SK_U32 CsOfs; /* for checksum calculation */
484 SK_BOOL CheckQueue; /* check event queue soon */
485 SK_TIMER DrvCleanupTimer;/* to check for pending descriptors */
486 DIM_INFO DynIrqModInfo; /* all data related to DIM */
491 int ChipsetType; /* Chipset family type
492 * 0 == Genesis family support
493 * 1 == Yukon family support
495 #ifdef SK_DIAG_SUPPORT
496 SK_U32 DiagModeActive; /* is diag active? */
497 SK_BOOL DiagFlowCtrl; /* for control purposes */
498 SK_PNMI_STRUCT_DATA PnmiBackup; /* backup structure for all Pnmi-Data */
499 SK_BOOL WasIfUp[SK_MAX_MACS]; /* for OpenClose while
500 * DIAG is busy with NIC
507 #endif /* __INC_SKDRV2ND_H */