drivers/net/skfp/pcmplc.c

   1 /******************************************************************************
   2  *
   3  *      (C)Copyright 1998,1999 SysKonnect,
   4  *      a business unit of Schneider & Koch & Co. Datensysteme GmbH.
   5  *
   6  *      See the file "skfddi.c" for further information.
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      The information in this file is provided "AS IS" without warranty.
  14  *
  15  ******************************************************************************/
  16
  17 /*
  18         PCM
  19         Physical Connection Management
  20 */
  21
  22 /*
  23  * Hardware independent state machine implemantation
  24  * The following external SMT functions are referenced :
  25  *
  26  *              queue_event()
  27  *              smt_timer_start()
  28  *              smt_timer_stop()
  29  *
  30  *      The following external HW dependent functions are referenced :
  31  *              sm_pm_control()
  32  *              sm_ph_linestate()
  33  *              sm_pm_ls_latch()
  34  *
  35  *      The following HW dependent events are required :
  36  *              PC_QLS
  37  *              PC_ILS
  38  *              PC_HLS
  39  *              PC_MLS
  40  *              PC_NSE
  41  *              PC_LEM
  42  *
  43  */
  44
  45
  46 #include "h/types.h"
  47 #include "h/fddi.h"
  48 #include "h/smc.h"
  49 #include "h/supern_2.h"
  50 #define KERNEL
  51 #include "h/smtstate.h"
  52
  53 #ifndef lint
  54 static const char ID_sccs[] = "@(#)pcmplc.c     2.55 99/08/05 (C) SK " ;
  55 #endif
  56
  57 #ifdef  FDDI_MIB
  58 extern int snmp_fddi_trap(
  59 #ifdef  ANSIC
  60 struct s_smc    * smc, int  type, int  index
  61 #endif
  62 );
  63 #endif
  64 #ifdef  CONCENTRATOR
  65 extern int plc_is_installed(
  66 #ifdef  ANSIC
  67 struct s_smc *smc ,
  68 int p
  69 #endif
  70 ) ;
  71 #endif
  72 /*
  73  * FSM Macros
  74  */
  75 #define AFLAG           (0x20)
  76 #define GO_STATE(x)     (mib->fddiPORTPCMState = (x)|AFLAG)
  77 #define ACTIONS_DONE()  (mib->fddiPORTPCMState &= ~AFLAG)
  78 #define ACTIONS(x)      (x|AFLAG)
  79
  80 /*
  81  * PCM states
  82  */
  83 #define PC0_OFF                 0
  84 #define PC1_BREAK               1
  85 #define PC2_TRACE               2
  86 #define PC3_CONNECT             3
  87 #define PC4_NEXT                4
  88 #define PC5_SIGNAL              5
  89 #define PC6_JOIN                6
  90 #define PC7_VERIFY              7
  91 #define PC8_ACTIVE              8
  92 #define PC9_MAINT               9
  93
  94 #ifdef  DEBUG
  95 /*
  96  * symbolic state names
  97  */
  98 static const char * const pcm_states[] =  {
  99         "PC0_OFF","PC1_BREAK","PC2_TRACE","PC3_CONNECT","PC4_NEXT",
 100         "PC5_SIGNAL","PC6_JOIN","PC7_VERIFY","PC8_ACTIVE","PC9_MAINT"
 101 } ;
 102
 103 /*
 104  * symbolic event names
 105  */
 106 static const char * const pcm_events[] = {
 107         "NONE","PC_START","PC_STOP","PC_LOOP","PC_JOIN","PC_SIGNAL",
 108         "PC_REJECT","PC_MAINT","PC_TRACE","PC_PDR",
 109         "PC_ENABLE","PC_DISABLE",
 110         "PC_QLS","PC_ILS","PC_MLS","PC_HLS","PC_LS_PDR","PC_LS_NONE",
 111         "PC_TIMEOUT_TB_MAX","PC_TIMEOUT_TB_MIN",
 112         "PC_TIMEOUT_C_MIN","PC_TIMEOUT_T_OUT",
 113         "PC_TIMEOUT_TL_MIN","PC_TIMEOUT_T_NEXT","PC_TIMEOUT_LCT",
 114         "PC_NSE","PC_LEM"
 115 } ;
 116 #endif
 117
 118 #ifdef  MOT_ELM
 119 /*
 120  * PCL-S control register
 121  * this register in the PLC-S controls the scrambling parameters
 122  */
 123 #define PLCS_CONTROL_C_U        0
 124 #define PLCS_CONTROL_C_S        (PL_C_SDOFF_ENABLE | PL_C_SDON_ENABLE | \
 125                                  PL_C_CIPHER_ENABLE)
 126 #define PLCS_FASSERT_U          0
 127 #define PLCS_FASSERT_S          0xFd76  /* 52.0 us */
 128 #define PLCS_FDEASSERT_U        0
 129 #define PLCS_FDEASSERT_S        0
 130 #else   /* nMOT_ELM */
 131 /*
 132  * PCL-S control register
 133  * this register in the PLC-S controls the scrambling parameters
 134  * can be patched for ANSI compliance if standard changes
 135  */
 136 static const u_char plcs_control_c_u[17] = "PLC_CNTRL_C_U=\0\0" ;
 137 static const u_char plcs_control_c_s[17] = "PLC_CNTRL_C_S=\01\02" ;
 138
 139 #define PLCS_CONTROL_C_U (plcs_control_c_u[14] | (plcs_control_c_u[15]<<8))
 140 #define PLCS_CONTROL_C_S (plcs_control_c_s[14] | (plcs_control_c_s[15]<<8))
 141 #endif  /* nMOT_ELM */
 142
 143 /*
 144  * external vars
 145  */
 146 /* struct definition see 'cmtdef.h' (also used by CFM) */
 147
 148 #define PS_OFF          0
 149 #define PS_BIT3         1
 150 #define PS_BIT4         2
 151 #define PS_BIT7         3
 152 #define PS_LCT          4
 153 #define PS_BIT8         5
 154 #define PS_JOIN         6
 155 #define PS_ACTIVE       7
 156
 157 #define LCT_LEM_MAX     255
 158
 159 /*
 160  * PLC timing parameter
 161  */
 162
 163 #define PLC_MS(m)       ((int)((0x10000L-(m*100000L/2048))))
 164 #define SLOW_TL_MIN     PLC_MS(6)
 165 #define SLOW_C_MIN      PLC_MS(10)
 166
 167 static  const struct plt {
 168         int     timer ;                 /* relative plc timer address */
 169         int     para ;                  /* default timing parameters */
 170 } pltm[] = {
 171         { PL_C_MIN, SLOW_C_MIN },       /* min t. to remain Connect State */
 172         { PL_TL_MIN, SLOW_TL_MIN },     /* min t. to transmit a Line State */
 173         { PL_TB_MIN, TP_TB_MIN },       /* min break time */
 174         { PL_T_OUT, TP_T_OUT },         /* Signaling timeout */
 175         { PL_LC_LENGTH, TP_LC_LENGTH }, /* Link Confidence Test Time */
 176         { PL_T_SCRUB, TP_T_SCRUB },     /* Scrub Time == MAC TVX time ! */
 177         { PL_NS_MAX, TP_NS_MAX },       /* max t. that noise is tolerated */
 178         { 0,0 }
 179 } ;
 180
 181 /*
 182  * interrupt mask
 183  */
 184 #ifdef  SUPERNET_3
 185 /*
 186  * Do we need the EBUF error during signaling, too, to detect SUPERNET_3
 187  * PLL bug?
 188  */
 189 static int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
 190                         PL_PCM_ENABLED | PL_SELF_TEST | PL_EBUF_ERR;
 191 #else   /* SUPERNET_3 */
 192 /*
 193  * We do NOT need the elasticity buffer error during signaling.
 194  */
 195 static int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
 196                         PL_PCM_ENABLED | PL_SELF_TEST ;
 197 #endif  /* SUPERNET_3 */
 198 static int plc_imsk_act = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
 199                         PL_PCM_ENABLED | PL_SELF_TEST | PL_EBUF_ERR;
 200
 201 /* external functions */
 202 void    all_selection_criteria ();
 203
 204 /* internal functions */
 205 static void pcm_fsm() ;
 206 static void pc_rcode_actions() ;
 207 static void pc_tcode_actions() ;
 208 static void reset_lem_struct() ;
 209 static void plc_init() ;
 210 static void sm_ph_lem_start() ;
 211 static void sm_ph_lem_stop() ;
 212 static void sm_ph_linestate() ;
 213 static void real_init_plc() ;
 214
 215 /*
 216  * SMT timer interface
 217  *      start PCM timer 0
 218  */
 219 static void start_pcm_timer0(smc,value,event,phy)
 220 struct s_smc *smc ;
 221 u_long value;
 222 int event;
 223 struct s_phy *phy;
 224 {
 225         phy->timer0_exp = FALSE ;       /* clear timer event flag */
 226         smt_timer_start(smc,&phy->pcm_timer0,value,
 227                 EV_TOKEN(EVENT_PCM+phy->np,event)) ;
 228 }
 229 /*
 230  * SMT timer interface
 231  *      stop PCM timer 0
 232  */
 233 static void stop_pcm_timer0(smc,phy)
 234 struct s_smc *smc ;
 235 struct s_phy *phy;
 236 {
 237         if (phy->pcm_timer0.tm_active)
 238                 smt_timer_stop(smc,&phy->pcm_timer0) ;
 239 }
 240
 241 /*
 242         init PCM state machine (called by driver)
 243         clear all PCM vars and flags
 244 */
 245 void pcm_init(smc)
 246 struct s_smc *smc ;
 247 {
 248         int             i ;
 249         int             np ;
 250         struct s_phy    *phy ;
 251         struct fddi_mib_p       *mib ;
 252
 253         for (np = 0,phy = smc->y ; np < NUMPHYS ; np++,phy++) {
 254                 /* Indicates the type of PHY being used */
 255                 mib = phy->mib ;
 256                 mib->fddiPORTPCMState = ACTIONS(PC0_OFF) ;
 257                 phy->np = np ;
 258                 switch (smc->s.sas) {
 259 #ifdef  CONCENTRATOR
 260                 case SMT_SAS :
 261                         mib->fddiPORTMy_Type = (np == PS) ? TS : TM ;
 262                         break ;
 263                 case SMT_DAS :
 264                         mib->fddiPORTMy_Type = (np == PA) ? TA :
 265                                         (np == PB) ? TB : TM ;
 266                         break ;
 267                 case SMT_NAC :
 268                         mib->fddiPORTMy_Type = TM ;
 269                         break;
 270 #else
 271                 case SMT_SAS :
 272                         mib->fddiPORTMy_Type = (np == PS) ? TS : TNONE ;
 273                         mib->fddiPORTHardwarePresent = (np == PS) ? TRUE :
 274                                         FALSE ;
 275 #ifndef SUPERNET_3
 276                         smc->y[PA].mib->fddiPORTPCMState = PC0_OFF ;
 277 #else
 278                         smc->y[PB].mib->fddiPORTPCMState = PC0_OFF ;
 279 #endif
 280                         break ;
 281                 case SMT_DAS :
 282                         mib->fddiPORTMy_Type = (np == PB) ? TB : TA ;
 283                         break ;
 284 #endif
 285                 }
 286                 /*
 287                  * set PMD-type
 288                  */
 289                 phy->pmd_scramble = 0 ;
 290                 switch (phy->pmd_type[PMD_SK_PMD]) {
 291                 case 'P' :
 292                         mib->fddiPORTPMDClass = MIB_PMDCLASS_MULTI ;
 293                         break ;
 294                 case 'L' :
 295                         mib->fddiPORTPMDClass = MIB_PMDCLASS_LCF ;
 296                         break ;
 297                 case 'D' :
 298                         mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
 299                         break ;
 300                 case 'S' :
 301                         mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
 302                         phy->pmd_scramble = TRUE ;
 303                         break ;
 304                 case 'U' :
 305                         mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
 306                         phy->pmd_scramble = TRUE ;
 307                         break ;
 308                 case '1' :
 309                         mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE1 ;
 310                         break ;
 311                 case '2' :
 312                         mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE2 ;
 313                         break ;
 314                 case '3' :
 315                         mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE2 ;
 316                         break ;
 317                 case '4' :
 318                         mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE1 ;
 319                         break ;
 320                 case 'H' :
 321                         mib->fddiPORTPMDClass = MIB_PMDCLASS_UNKNOWN ;
 322                         break ;
 323                 case 'I' :
 324                         mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
 325                         break ;
 326                 case 'G' :
 327                         mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
 328                         break ;
 329                 default:
 330                         mib->fddiPORTPMDClass = MIB_PMDCLASS_UNKNOWN ;
 331                         break ;
 332                 }
 333                 /*
 334                  * A and B port can be on primary and secondary path
 335                  */
 336                 switch (mib->fddiPORTMy_Type) {
 337                 case TA :
 338                         mib->fddiPORTAvailablePaths |= MIB_PATH_S ;
 339                         mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
 340                         mib->fddiPORTRequestedPaths[2] =
 341                                 MIB_P_PATH_LOCAL |
 342                                 MIB_P_PATH_CON_ALTER |
 343                                 MIB_P_PATH_SEC_PREFER ;
 344                         mib->fddiPORTRequestedPaths[3] =
 345                                 MIB_P_PATH_LOCAL |
 346                                 MIB_P_PATH_CON_ALTER |
 347                                 MIB_P_PATH_SEC_PREFER |
 348                                 MIB_P_PATH_THRU ;
 349                         break ;
 350                 case TB :
 351                         mib->fddiPORTAvailablePaths |= MIB_PATH_S ;
 352                         mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
 353                         mib->fddiPORTRequestedPaths[2] =
 354                                 MIB_P_PATH_LOCAL |
 355                                 MIB_P_PATH_PRIM_PREFER ;
 356                         mib->fddiPORTRequestedPaths[3] =
 357                                 MIB_P_PATH_LOCAL |
 358                                 MIB_P_PATH_PRIM_PREFER |
 359                                 MIB_P_PATH_CON_PREFER |
 360                                 MIB_P_PATH_THRU ;
 361                         break ;
 362                 case TS :
 363                         mib->fddiPORTAvailablePaths |= MIB_PATH_S ;
 364                         mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
 365                         mib->fddiPORTRequestedPaths[2] =
 366                                 MIB_P_PATH_LOCAL |
 367                                 MIB_P_PATH_CON_ALTER |
 368                                 MIB_P_PATH_PRIM_PREFER ;
 369                         mib->fddiPORTRequestedPaths[3] =
 370                                 MIB_P_PATH_LOCAL |
 371                                 MIB_P_PATH_CON_ALTER |
 372                                 MIB_P_PATH_PRIM_PREFER ;
 373                         break ;
 374                 case TM :
 375                         mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
 376                         mib->fddiPORTRequestedPaths[2] =
 377                                 MIB_P_PATH_LOCAL |
 378                                 MIB_P_PATH_SEC_ALTER |
 379                                 MIB_P_PATH_PRIM_ALTER ;
 380                         mib->fddiPORTRequestedPaths[3] = 0 ;
 381                         break ;
 382                 }
 383
 384                 phy->pc_lem_fail = FALSE ;
 385                 mib->fddiPORTPCMStateX = mib->fddiPORTPCMState ;
 386                 mib->fddiPORTLCTFail_Ct = 0 ;
 387                 mib->fddiPORTBS_Flag = 0 ;
 388                 mib->fddiPORTCurrentPath = MIB_PATH_ISOLATED ;
 389                 mib->fddiPORTNeighborType = TNONE ;
 390                 phy->ls_flag = 0 ;
 391                 phy->rc_flag = 0 ;
 392                 phy->tc_flag = 0 ;
 393                 phy->td_flag = 0 ;
 394                 if (np >= PM)
 395                         phy->phy_name = '0' + np - PM ;
 396                 else
 397                         phy->phy_name = 'A' + np ;
 398                 phy->wc_flag = FALSE ;          /* set by SMT */
 399                 memset((char *)&phy->lem,0,sizeof(struct lem_counter)) ;
 400                 reset_lem_struct(phy) ;
 401                 memset((char *)&phy->plc,0,sizeof(struct s_plc)) ;
 402                 phy->plc.p_state = PS_OFF ;
 403                 for (i = 0 ; i < NUMBITS ; i++) {
 404                         phy->t_next[i] = 0 ;
 405                 }
 406         }
 407         real_init_plc(smc) ;
 408 }
 409
 410 void init_plc(smc)
 411 struct s_smc *smc ;
 412 {
 413         SK_UNUSED(smc) ;
 414
 415         /*
 416          * dummy
 417          * this is an obsolete public entry point that has to remain
 418          * for compat. It is used by various drivers.
 419          * the work is now done in real_init_plc()
 420          * which is called from pcm_init() ;
 421          */
 422 }
 423
 424 static void real_init_plc(smc)
 425 struct s_smc *smc ;
 426 {
 427         int     p ;
 428
 429         for (p = 0 ; p < NUMPHYS ; p++)
 430                 plc_init(smc,p) ;
 431 }
 432
 433 static void plc_init(smc,p)
 434 struct s_smc *smc ;
 435 int p;
 436 {
 437         int     i ;
 438 #ifndef MOT_ELM
 439         int     rev ;   /* Revision of PLC-x */
 440 #endif  /* MOT_ELM */
 441
 442         /* transit PCM state machine to MAINT state */
 443         outpw(PLC(p,PL_CNTRL_B),0) ;
 444         outpw(PLC(p,PL_CNTRL_B),PL_PCM_STOP) ;
 445         outpw(PLC(p,PL_CNTRL_A),0) ;
 446
 447         /*
 448          * if PLC-S then set control register C
 449          */
 450 #ifndef MOT_ELM
 451         rev = inpw(PLC(p,PL_STATUS_A)) & PLC_REV_MASK ;
 452         if (rev != PLC_REVISION_A)
 453 #endif  /* MOT_ELM */
 454         {
 455                 if (smc->y[p].pmd_scramble) {
 456                         outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_S) ;
 457 #ifdef  MOT_ELM
 458                         outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_S) ;
 459                         outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_S) ;
 460 #endif  /* MOT_ELM */
 461                 }
 462                 else {
 463                         outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_U) ;
 464 #ifdef  MOT_ELM
 465                         outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_U) ;
 466                         outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_U) ;
 467 #endif  /* MOT_ELM */
 468                 }
 469         }
 470
 471         /*
 472          * set timer register
 473          */
 474         for ( i = 0 ; pltm[i].timer; i++)       /* set timer parameter reg */
 475                 outpw(PLC(p,pltm[i].timer),pltm[i].para) ;
 476
 477         (void)inpw(PLC(p,PL_INTR_EVENT)) ;      /* clear interrupt event reg */
 478         plc_clear_irq(smc,p) ;
 479         outpw(PLC(p,PL_INTR_MASK),plc_imsk_na); /* enable non active irq's */
 480
 481         /*
 482          * if PCM is configured for class s, it will NOT go to the
 483          * REMOVE state if offline (page 3-36;)
 484          * in the concentrator, all inactive PHYS always must be in
 485          * the remove state
 486          * there's no real need to use this feature at all ..
 487          */
 488 #ifndef CONCENTRATOR
 489         if ((smc->s.sas == SMT_SAS) && (p == PS)) {
 490                 outpw(PLC(p,PL_CNTRL_B),PL_CLASS_S) ;
 491         }
 492 #endif
 493 }
 494
 495 /*
 496  * control PCM state machine
 497  */
 498 static void plc_go_state(smc,p,state)
 499 struct s_smc *smc ;
 500 int p;
 501 int state;
 502 {
 503         HW_PTR port ;
 504         int val ;
 505
 506         SK_UNUSED(smc) ;
 507
 508         port = (HW_PTR) (PLC(p,PL_CNTRL_B)) ;
 509         val = inpw(port) & ~(PL_PCM_CNTRL | PL_MAINT) ;
 510         outpw(port,val) ;
 511         outpw(port,val | state) ;
 512 }
 513
 514 /*
 515  * read current line state (called by ECM & PCM)
 516  */
 517 int sm_pm_get_ls(smc,phy)
 518 struct s_smc *smc ;
 519 int phy;
 520 {
 521         int     state ;
 522
 523 #ifdef  CONCENTRATOR
 524         if (!plc_is_installed(smc,phy))
 525                 return(PC_QLS) ;
 526 #endif
 527
 528         state = inpw(PLC(phy,PL_STATUS_A)) & PL_LINE_ST ;
 529         switch(state) {
 530         case PL_L_QLS:
 531                 state = PC_QLS ;
 532                 break ;
 533         case PL_L_MLS:
 534                 state = PC_MLS ;
 535                 break ;
 536         case PL_L_HLS:
 537                 state = PC_HLS ;
 538                 break ;
 539         case PL_L_ILS4:
 540         case PL_L_ILS16:
 541                 state = PC_ILS ;
 542                 break ;
 543         case PL_L_ALS:
 544                 state = PC_LS_PDR ;
 545                 break ;
 546         default :
 547                 state = PC_LS_NONE ;
 548         }
 549         return(state) ;
 550 }
 551
 552 static int plc_send_bits(smc,phy,len)
 553 struct s_smc *smc ;
 554 struct s_phy *phy;
 555 int len;
 556 {
 557         int np = phy->np ;              /* PHY index */
 558         int     n ;
 559         int     i ;
 560
 561         SK_UNUSED(smc) ;
 562
 563         /* create bit vector */
 564         for (i = len-1,n = 0 ; i >= 0 ; i--) {
 565                 n = (n<<1) | phy->t_val[phy->bitn+i] ;
 566         }
 567         if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {
 568 #if     0
 569                 printf("PL_PCM_SIGNAL is set\n") ;
 570 #endif
 571                 return(1) ;
 572         }
 573         /* write bit[n] & length = 1 to regs */
 574         outpw(PLC(np,PL_VECTOR_LEN),len-1) ;    /* len=nr-1 */
 575         outpw(PLC(np,PL_XMIT_VECTOR),n) ;
 576 #ifdef  DEBUG
 577 #if 1
 578 #ifdef  DEBUG_BRD
 579         if (smc->debug.d_plc & 0x80)
 580 #else
 581         if (debug.d_plc & 0x80)
 582 #endif
 583                 printf("SIGNALING bit %d .. %d\n",phy->bitn,phy->bitn+len-1) ;
 584 #endif
 585 #endif
 586         return(0) ;
 587 }
 588
 589 /*
 590  * config plc muxes
 591  */
 592 void plc_config_mux(smc,mux)
 593 struct s_smc *smc ;
 594 int mux ;
 595 {
 596         if (smc->s.sas != SMT_DAS)
 597                 return ;
 598         if (mux == MUX_WRAPB) {
 599                 SETMASK(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL,PL_CONFIG_CNTRL) ;
 600                 SETMASK(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP,PL_SC_REM_LOOP) ;
 601         }
 602         else {
 603                 CLEAR(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL) ;
 604                 CLEAR(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP) ;
 605         }
 606         CLEAR(PLC(PB,PL_CNTRL_B),PL_CONFIG_CNTRL) ;
 607         CLEAR(PLC(PB,PL_CNTRL_A),PL_SC_REM_LOOP) ;
 608 }
 609
 610 /*
 611         PCM state machine
 612         called by dispatcher  & fddi_init() (driver)
 613         do
 614                 display state change
 615                 process event
 616         until SM is stable
 617 */
 618 void pcm(smc,np,event)
 619 struct s_smc *smc ;
 620 const int np;
 621 int event;
 622 {
 623         int     state ;
 624         int     oldstate ;
 625         struct s_phy    *phy ;
 626         struct fddi_mib_p       *mib ;
 627
 628 #ifndef CONCENTRATOR
 629         /*
 630          * ignore 2nd PHY if SAS
 631          */
 632         if ((np != PS) && (smc->s.sas == SMT_SAS))
 633                 return ;
 634 #endif
 635         phy = &smc->y[np] ;
 636         mib = phy->mib ;
 637         oldstate = mib->fddiPORTPCMState ;
 638         do {
 639                 DB_PCM("PCM %c: state %s",
 640                         phy->phy_name,
 641                         (mib->fddiPORTPCMState & AFLAG) ? "ACTIONS " : "") ;
 642                 DB_PCM("%s, event %s\n",
 643                         pcm_states[mib->fddiPORTPCMState & ~AFLAG],
 644                         pcm_events[event]) ;
 645                 state = mib->fddiPORTPCMState ;
 646                 pcm_fsm(smc,phy,event) ;
 647                 event = 0 ;
 648         } while (state != mib->fddiPORTPCMState) ;
 649         /*
 650          * because the PLC does the bit signaling for us,
 651          * we're always in SIGNAL state
 652          * the MIB want's to see CONNECT
 653          * we therefore fake an entry in the MIB
 654          */
 655         if (state == PC5_SIGNAL)
 656                 mib->fddiPORTPCMStateX = PC3_CONNECT ;
 657         else
 658                 mib->fddiPORTPCMStateX = state ;
 659
 660 #ifndef SLIM_SMT
 661         /*
 662          * path change
 663          */
 664         if (    mib->fddiPORTPCMState != oldstate &&
 665                 ((oldstate == PC8_ACTIVE) || (mib->fddiPORTPCMState == PC8_ACTIVE))) {
 666                 smt_srf_event(smc,SMT_EVENT_PORT_PATH_CHANGE,
 667                         (int) (INDEX_PORT+ phy->np),0) ;
 668         }
 669 #endif
 670
 671 #ifdef FDDI_MIB
 672         /* check whether a snmp-trap has to be sent */
 673
 674         if ( mib->fddiPORTPCMState != oldstate ) {
 675                 /* a real state change took place */
 676                 DB_SNMP ("PCM from %d to %d\n", oldstate, mib->fddiPORTPCMState);
 677                 if ( mib->fddiPORTPCMState == PC0_OFF ) {
 678                         /* send first trap */
 679                         snmp_fddi_trap (smc, 1, (int) mib->fddiPORTIndex );
 680                 } else if ( oldstate == PC0_OFF ) {
 681                         /* send second trap */
 682                         snmp_fddi_trap (smc, 2, (int) mib->fddiPORTIndex );
 683                 } else if ( mib->fddiPORTPCMState != PC2_TRACE &&
 684                         oldstate == PC8_ACTIVE ) {
 685                         /* send third trap */
 686                         snmp_fddi_trap (smc, 3, (int) mib->fddiPORTIndex );
 687                 } else if ( mib->fddiPORTPCMState == PC8_ACTIVE ) {
 688                         /* send fourth trap */
 689                         snmp_fddi_trap (smc, 4, (int) mib->fddiPORTIndex );
 690                 }
 691         }
 692 #endif
 693
 694         pcm_state_change(smc,np,state) ;
 695 }
 696
 697 /*
 698  * PCM state machine
 699  */
 700 static void pcm_fsm(smc,phy,cmd)
 701 struct s_smc *smc ;
 702 struct s_phy *phy;
 703 int cmd;
 704 {
 705         int     i ;
 706         int     np = phy->np ;          /* PHY index */
 707         struct s_plc    *plc ;
 708         struct fddi_mib_p       *mib ;
 709 #ifndef MOT_ELM
 710         u_short plc_rev ;               /* Revision of the plc */
 711 #endif  /* nMOT_ELM */
 712
 713         plc = &phy->plc ;
 714         mib = phy->mib ;
 715
 716         /*
 717          * general transitions independent of state
 718          */
 719         switch (cmd) {
 720         case PC_STOP :
 721                 /*PC00-PC80*/
 722                 if (mib->fddiPORTPCMState != PC9_MAINT) {
 723                         GO_STATE(PC0_OFF) ;
 724                         AIX_EVENT(smc, (u_long) FDDI_RING_STATUS, (u_long)
 725                                 FDDI_PORT_EVENT, (u_long) FDDI_PORT_STOP,
 726                                 smt_get_port_event_word(smc));
 727                 }
 728                 return ;
 729         case PC_START :
 730                 /*PC01-PC81*/
 731                 if (mib->fddiPORTPCMState != PC9_MAINT)
 732                         GO_STATE(PC1_BREAK) ;
 733                 return ;
 734         case PC_DISABLE :
 735                 /* PC09-PC99 */
 736                 GO_STATE(PC9_MAINT) ;
 737                 AIX_EVENT(smc, (u_long) FDDI_RING_STATUS, (u_long)
 738                         FDDI_PORT_EVENT, (u_long) FDDI_PORT_DISABLED,
 739                         smt_get_port_event_word(smc));
 740                 return ;
 741         case PC_TIMEOUT_LCT :
 742                 /* if long or extended LCT */
 743                 stop_pcm_timer0(smc,phy) ;
 744                 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
 745                 /* end of LCT is indicate by PCM_CODE (initiate PCM event) */
 746                 return ;
 747         }
 748
 749         switch(mib->fddiPORTPCMState) {
 750         case ACTIONS(PC0_OFF) :
 751                 stop_pcm_timer0(smc,phy) ;
 752                 outpw(PLC(np,PL_CNTRL_A),0) ;
 753                 CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
 754                 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
 755                 sm_ph_lem_stop(smc,np) ;                /* disable LEM */
 756                 phy->cf_loop = FALSE ;
 757                 phy->cf_join = FALSE ;
 758                 queue_event(smc,EVENT_CFM,CF_JOIN+np) ;
 759                 plc_go_state(smc,np,PL_PCM_STOP) ;
 760                 mib->fddiPORTConnectState = PCM_DISABLED ;
 761                 ACTIONS_DONE() ;
 762                 break ;
 763         case PC0_OFF:
 764                 /*PC09*/
 765                 if (cmd == PC_MAINT) {
 766                         GO_STATE(PC9_MAINT) ;
 767                         break ;
 768                 }
 769                 break ;
 770         case ACTIONS(PC1_BREAK) :
 771                 /* Stop the LCT timer if we came from Signal state */
 772                 stop_pcm_timer0(smc,phy) ;
 773                 ACTIONS_DONE() ;
 774                 plc_go_state(smc,np,0) ;
 775                 CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
 776                 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
 777                 sm_ph_lem_stop(smc,np) ;                /* disable LEM */
 778                 /*
 779                  * if vector is already loaded, go to OFF to clear PCM_SIGNAL
 780                  */
 781 #if     0
 782                 if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {
 783                         plc_go_state(smc,np,PL_PCM_STOP) ;
 784                         /* TB_MIN ? */
 785                 }
 786 #endif
 787                 /*
 788                  * Go to OFF state in any case.
 789                  */
 790                 plc_go_state(smc,np,PL_PCM_STOP) ;
 791
 792                 if (mib->fddiPORTPC_Withhold == PC_WH_NONE)
 793                         mib->fddiPORTConnectState = PCM_CONNECTING ;
 794                 phy->cf_loop = FALSE ;
 795                 phy->cf_join = FALSE ;
 796                 queue_event(smc,EVENT_CFM,CF_JOIN+np) ;
 797                 phy->ls_flag = FALSE ;
 798                 phy->pc_mode = PM_NONE ;        /* needed by CFM */
 799                 phy->bitn = 0 ;                 /* bit signaling start bit */
 800                 for (i = 0 ; i < 3 ; i++)
 801                         pc_tcode_actions(smc,i,phy) ;
 802
 803                 /* Set the non-active interrupt mask register */
 804                 outpw(PLC(np,PL_INTR_MASK),plc_imsk_na) ;
 805
 806                 /*
 807                  * If the LCT was stopped. There might be a
 808                  * PCM_CODE interrupt event present.
 809                  * This must be cleared.
 810                  */
 811                 (void)inpw(PLC(np,PL_INTR_EVENT)) ;
 812 #ifndef MOT_ELM
 813                 /* Get the plc revision for revision dependent code */
 814                 plc_rev = inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK ;
 815
 816                 if (plc_rev != PLC_REV_SN3)
 817 #endif  /* MOT_ELM */
 818                 {
 819                         /*
 820                          * No supernet III PLC, so set Xmit verctor and
 821                          * length BEFORE starting the state machine.
 822                          */
 823                         if (plc_send_bits(smc,phy,3)) {
 824                                 return ;
 825                         }
 826                 }
 827
 828                 /*
 829                  * Now give the Start command.
 830                  * - The start command shall be done before setting the bits
 831                  *   to be signaled. (In PLC-S description and PLCS in SN3.
 832                  * - The start command shall be issued AFTER setting the
 833                  *   XMIT vector and the XMIT length register.
 834                  *
 835                  * We do it exactly according this specs for the old PLC and
 836                  * the new PLCS inside the SN3.
 837                  * For the usual PLCS we try it the way it is done for the
 838                  * old PLC and set the XMIT registers again, if the PLC is
 839                  * not in SIGNAL state. This is done according to an PLCS
 840                  * errata workaround.
 841                  */
 842
 843                 plc_go_state(smc,np,PL_PCM_START) ;
 844
 845                 /*
 846                  * workaround for PLC-S eng. sample errata
 847                  */
 848 #ifdef  MOT_ELM
 849                 if (!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
 850 #else   /* nMOT_ELM */
 851                 if (((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) !=
 852                         PLC_REVISION_A) &&
 853                         !(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
 854 #endif  /* nMOT_ELM */
 855                 {
 856                         /*
 857                          * Set register again (PLCS errata) or the first time
 858                          * (new SN3 PLCS).
 859                          */
 860                         (void) plc_send_bits(smc,phy,3) ;
 861                 }
 862                 /*
 863                  * end of workaround
 864                  */
 865
 866                 GO_STATE(PC5_SIGNAL) ;
 867                 plc->p_state = PS_BIT3 ;
 868                 plc->p_bits = 3 ;
 869                 plc->p_start = 0 ;
 870
 871                 break ;
 872         case PC1_BREAK :
 873                 break ;
 874         case ACTIONS(PC2_TRACE) :
 875                 plc_go_state(smc,np,PL_PCM_TRACE) ;
 876                 ACTIONS_DONE() ;
 877                 break ;
 878         case PC2_TRACE :
 879                 break ;
 880
 881         case PC3_CONNECT :      /* these states are done by hardware */
 882         case PC4_NEXT :
 883                 break ;
 884
 885         case ACTIONS(PC5_SIGNAL) :
 886                 ACTIONS_DONE() ;
 887         case PC5_SIGNAL :
 888                 if ((cmd != PC_SIGNAL) && (cmd != PC_TIMEOUT_LCT))
 889                         break ;
 890                 switch (plc->p_state) {
 891                 case PS_BIT3 :
 892                         for (i = 0 ; i <= 2 ; i++)
 893                                 pc_rcode_actions(smc,i,phy) ;
 894                         pc_tcode_actions(smc,3,phy) ;
 895                         plc->p_state = PS_BIT4 ;
 896                         plc->p_bits = 1 ;
 897                         plc->p_start = 3 ;
 898                         phy->bitn = 3 ;
 899                         if (plc_send_bits(smc,phy,1)) {
 900                                 return ;
 901                         }
 902                         break ;
 903                 case PS_BIT4 :
 904                         pc_rcode_actions(smc,3,phy) ;
 905                         for (i = 4 ; i <= 6 ; i++)
 906                                 pc_tcode_actions(smc,i,phy) ;
 907                         plc->p_state = PS_BIT7 ;
 908                         plc->p_bits = 3 ;
 909                         plc->p_start = 4 ;
 910                         phy->bitn = 4 ;
 911                         if (plc_send_bits(smc,phy,3)) {
 912                                 return ;
 913                         }
 914                         break ;
 915                 case PS_BIT7 :
 916                         for (i = 3 ; i <= 6 ; i++)
 917                                 pc_rcode_actions(smc,i,phy) ;
 918                         plc->p_state = PS_LCT ;
 919                         plc->p_bits = 0 ;
 920                         plc->p_start = 7 ;
 921                         phy->bitn = 7 ;
 922                 sm_ph_lem_start(smc,np,(int)smc->s.lct_short) ; /* enable LEM */
 923                         /* start LCT */
 924                         i = inpw(PLC(np,PL_CNTRL_B)) & ~PL_PC_LOOP ;
 925                         outpw(PLC(np,PL_CNTRL_B),i) ;   /* must be cleared */
 926                         outpw(PLC(np,PL_CNTRL_B),i | PL_RLBP) ;
 927                         break ;
 928                 case PS_LCT :
 929                         /* check for local LCT failure */
 930                         pc_tcode_actions(smc,7,phy) ;
 931                         /*
 932                          * set tval[7]
 933                          */
 934                         plc->p_state = PS_BIT8 ;
 935                         plc->p_bits = 1 ;
 936                         plc->p_start = 7 ;
 937                         phy->bitn = 7 ;
 938                         if (plc_send_bits(smc,phy,1)) {
 939                                 return ;
 940                         }
 941                         break ;
 942                 case PS_BIT8 :
 943                         /* check for remote LCT failure */
 944                         pc_rcode_actions(smc,7,phy) ;
 945                         if (phy->t_val[7] || phy->r_val[7]) {
 946                                 plc_go_state(smc,np,PL_PCM_STOP) ;
 947                                 GO_STATE(PC1_BREAK) ;
 948                                 break ;
 949                         }
 950                         for (i = 8 ; i <= 9 ; i++)
 951                                 pc_tcode_actions(smc,i,phy) ;
 952                         plc->p_state = PS_JOIN ;
 953                         plc->p_bits = 2 ;
 954                         plc->p_start = 8 ;
 955                         phy->bitn = 8 ;
 956                         if (plc_send_bits(smc,phy,2)) {
 957                                 return ;
 958                         }
 959                         break ;
 960                 case PS_JOIN :
 961                         for (i = 8 ; i <= 9 ; i++)
 962                                 pc_rcode_actions(smc,i,phy) ;
 963                         plc->p_state = PS_ACTIVE ;
 964                         GO_STATE(PC6_JOIN) ;
 965                         break ;
 966                 }
 967                 break ;
 968
 969         case ACTIONS(PC6_JOIN) :
 970                 /*
 971                  * prevent mux error when going from WRAP_A to WRAP_B
 972                  */
 973                 if (smc->s.sas == SMT_DAS && np == PB &&
 974                         (smc->y[PA].pc_mode == PM_TREE ||
 975                          smc->y[PB].pc_mode == PM_TREE)) {
 976                         SETMASK(PLC(np,PL_CNTRL_A),
 977                                 PL_SC_REM_LOOP,PL_SC_REM_LOOP) ;
 978                         SETMASK(PLC(np,PL_CNTRL_B),
 979                                 PL_CONFIG_CNTRL,PL_CONFIG_CNTRL) ;
 980                 }
 981                 SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;
 982                 SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;
 983                 ACTIONS_DONE() ;
 984                 cmd = 0 ;
 985                 /* fall thru */
 986         case PC6_JOIN :
 987                 switch (plc->p_state) {
 988                 case PS_ACTIVE:
 989                         /*PC88b*/
 990                         if (!phy->cf_join) {
 991                                 phy->cf_join = TRUE ;
 992                                 queue_event(smc,EVENT_CFM,CF_JOIN+np) ; ;
 993                         }
 994                         if (cmd == PC_JOIN)
 995                                 GO_STATE(PC8_ACTIVE) ;
 996                         /*PC82*/
 997                         if (cmd == PC_TRACE) {
 998                                 GO_STATE(PC2_TRACE) ;
 999                                 break ;
1000                         }
1001                         break ;
1002                 }
1003                 break ;
1004
1005         case PC7_VERIFY :
1006                 break ;
1007
1008         case ACTIONS(PC8_ACTIVE) :
1009                 /*
1010                  * start LEM for SMT
1011                  */
1012                 sm_ph_lem_start(smc,(int)phy->np,LCT_LEM_MAX) ;
1013
1014                 phy->tr_flag = FALSE ;
1015                 mib->fddiPORTConnectState = PCM_ACTIVE ;
1016
1017                 /* Set the active interrupt mask register */
1018                 outpw(PLC(np,PL_INTR_MASK),plc_imsk_act) ;
1019
1020                 ACTIONS_DONE() ;
1021                 break ;
1022         case PC8_ACTIVE :
1023                 /*PC81 is done by PL_TNE_EXPIRED irq */
1024                 /*PC82*/
1025                 if (cmd == PC_TRACE) {
1026                         GO_STATE(PC2_TRACE) ;
1027                         break ;
1028                 }
1029                 /*PC88c: is done by TRACE_PROP irq */
1030
1031                 break ;
1032         case ACTIONS(PC9_MAINT) :
1033                 stop_pcm_timer0(smc,phy) ;
1034                 CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
1035                 CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
1036                 CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ; /* disable LEM int. */
1037                 sm_ph_lem_stop(smc,np) ;                /* disable LEM */
1038                 phy->cf_loop = FALSE ;
1039                 phy->cf_join = FALSE ;
1040                 queue_event(smc,EVENT_CFM,CF_JOIN+np) ;
1041                 plc_go_state(smc,np,PL_PCM_STOP) ;
1042                 mib->fddiPORTConnectState = PCM_DISABLED ;
1043                 SETMASK(PLC(np,PL_CNTRL_B),PL_MAINT,PL_MAINT) ;
1044                 sm_ph_linestate(smc,np,(int) MIB2LS(mib->fddiPORTMaint_LS)) ;
1045                 outpw(PLC(np,PL_CNTRL_A),PL_SC_BYPASS) ;
1046                 ACTIONS_DONE() ;
1047                 break ;
1048         case PC9_MAINT :
1049                 DB_PCMN(1,"PCM %c : MAINT\n",phy->phy_name,0) ;
1050                 /*PC90*/
1051                 if (cmd == PC_ENABLE) {
1052                         GO_STATE(PC0_OFF) ;
1053                         break ;
1054                 }
1055                 break ;
1056
1057         default:
1058                 SMT_PANIC(smc,SMT_E0118, SMT_E0118_MSG) ;
1059                 break ;
1060         }
1061 }
1062
1063 /*
1064  * force line state on a PHY output     (only in MAINT state)
1065  */
1066 static void sm_ph_linestate(smc,phy,ls)
1067 struct s_smc *smc ;
1068 int phy;
1069 int ls;
1070 {
1071         int     cntrl ;
1072
1073         SK_UNUSED(smc) ;
1074
1075         cntrl = (inpw(PLC(phy,PL_CNTRL_B)) & ~PL_MAINT_LS) |
1076                                                 PL_PCM_STOP | PL_MAINT ;
1077         switch(ls) {
1078         case PC_QLS:            /* Force Quiet */
1079                 cntrl |= PL_M_QUI0 ;
1080                 break ;
1081         case PC_MLS:            /* Force Master */
1082                 cntrl |= PL_M_MASTR ;
1083                 break ;
1084         case PC_HLS:            /* Force Halt */
1085                 cntrl |= PL_M_HALT ;
1086                 break ;
1087         default :
1088         case PC_ILS:            /* Force Idle */
1089                 cntrl |= PL_M_IDLE ;
1090                 break ;
1091         case PC_LS_PDR:         /* Enable repeat filter */
1092                 cntrl |= PL_M_TPDR ;
1093                 break ;
1094         }
1095         outpw(PLC(phy,PL_CNTRL_B),cntrl) ;
1096 }
1097
1098
1099 static void reset_lem_struct(phy)
1100 struct s_phy *phy;
1101 {
1102         struct lem_counter *lem = &phy->lem ;
1103
1104         phy->mib->fddiPORTLer_Estimate = 15 ;
1105         lem->lem_float_ber = 15 * 100 ;
1106 }
1107
1108 /*
1109  * link error monitor
1110  */
1111 static void lem_evaluate(smc,phy)
1112 struct s_smc *smc ;
1113 struct s_phy *phy;
1114 {
1115         int ber ;
1116         u_long errors ;
1117         struct lem_counter *lem = &phy->lem ;
1118         struct fddi_mib_p       *mib ;
1119         int                     cond ;
1120
1121         mib = phy->mib ;
1122
1123         if (!lem->lem_on)
1124                 return ;
1125
1126         errors = inpw(PLC(((int) phy->np),PL_LINK_ERR_CTR)) ;
1127         lem->lem_errors += errors ;
1128         mib->fddiPORTLem_Ct += errors ;
1129
1130         errors = lem->lem_errors ;
1131         /*
1132          * calculation is called on a intervall of 8 seconds
1133          *      -> this means, that one error in 8 sec. is one of 8*125*10E6
1134          *      the same as BER = 10E-9
1135          * Please note:
1136          *      -> 9 errors in 8 seconds mean:
1137          *         BER = 9 * 10E-9  and this is
1138          *          < 10E-8, so the limit of 10E-8 is not reached!
1139          */
1140
1141                 if (!errors)            ber = 15 ;
1142         else    if (errors <= 9)        ber = 9 ;
1143         else    if (errors <= 99)       ber = 8 ;
1144         else    if (errors <= 999)      ber = 7 ;
1145         else    if (errors <= 9999)     ber = 6 ;
1146         else    if (errors <= 99999)    ber = 5 ;
1147         else    if (errors <= 999999)   ber = 4 ;
1148         else    if (errors <= 9999999)  ber = 3 ;
1149         else    if (errors <= 99999999) ber = 2 ;
1150         else    if (errors <= 999999999) ber = 1 ;
1151         else                            ber = 0 ;
1152
1153         /*
1154          * weighted average
1155          */
1156         ber *= 100 ;
1157         lem->lem_float_ber = lem->lem_float_ber * 7 + ber * 3 ;
1158         lem->lem_float_ber /= 10 ;
1159         mib->fddiPORTLer_Estimate = lem->lem_float_ber / 100 ;
1160         if (mib->fddiPORTLer_Estimate < 4) {
1161                 mib->fddiPORTLer_Estimate = 4 ;
1162         }
1163
1164         if (lem->lem_errors) {
1165                 DB_PCMN(1,"LEM %c :\n",phy->np == PB? 'B' : 'A',0) ;
1166                 DB_PCMN(1,"errors      : %ld\n",lem->lem_errors,0) ;
1167                 DB_PCMN(1,"sum_errors  : %ld\n",mib->fddiPORTLem_Ct,0) ;
1168                 DB_PCMN(1,"current BER : 10E-%d\n",ber/100,0) ;
1169                 DB_PCMN(1,"float BER   : 10E-(%d/100)\n",lem->lem_float_ber,0) ;
1170                 DB_PCMN(1,"avg. BER    : 10E-%d\n",
1171                         mib->fddiPORTLer_Estimate,0) ;
1172         }
1173
1174         lem->lem_errors = 0L ;
1175
1176 #ifndef SLIM_SMT
1177         cond = (mib->fddiPORTLer_Estimate <= mib->fddiPORTLer_Alarm) ?
1178                 TRUE : FALSE ;
1179 #ifdef  SMT_EXT_CUTOFF
1180         smt_ler_alarm_check(smc,phy,cond) ;
1181 #endif  /* nSMT_EXT_CUTOFF */
1182         if (cond != mib->fddiPORTLerFlag) {
1183                 smt_srf_event(smc,SMT_COND_PORT_LER,
1184                         (int) (INDEX_PORT+ phy->np) ,cond) ;
1185         }
1186 #endif
1187
1188         if (    mib->fddiPORTLer_Estimate <= mib->fddiPORTLer_Cutoff) {
1189                 phy->pc_lem_fail = TRUE ;               /* flag */
1190                 mib->fddiPORTLem_Reject_Ct++ ;
1191                 /*
1192                  * "forgive 10e-2" if we cutoff so we can come
1193                  * up again ..
1194                  */
1195                 lem->lem_float_ber += 2*100 ;
1196
1197                 /*PC81b*/
1198 #ifdef  CONCENTRATOR
1199                 DB_PCMN(1,"PCM: LER cutoff on port %d cutoff %d\n",
1200                         phy->np, mib->fddiPORTLer_Cutoff) ;
1201 #endif
1202 #ifdef  SMT_EXT_CUTOFF
1203                 smt_port_off_event(smc,phy->np);
1204 #else   /* nSMT_EXT_CUTOFF */
1205                 queue_event(smc,(int)(EVENT_PCM+phy->np),PC_START) ;
1206 #endif  /* nSMT_EXT_CUTOFF */
1207         }
1208 }
1209
1210 /*
1211  * called by SMT to calculate LEM bit error rate
1212  */
1213 void sm_lem_evaluate(smc)
1214 struct s_smc *smc ;
1215 {
1216         int np ;
1217
1218         for (np = 0 ; np < NUMPHYS ; np++)
1219                 lem_evaluate(smc,&smc->y[np]) ;
1220 }
1221
1222 static void lem_check_lct(smc,phy)
1223 struct s_smc *smc ;
1224 struct s_phy    *phy ;
1225 {
1226         struct lem_counter      *lem = &phy->lem ;
1227         struct fddi_mib_p       *mib ;
1228         int errors ;
1229
1230         mib = phy->mib ;
1231
1232         phy->pc_lem_fail = FALSE ;              /* flag */
1233         errors = inpw(PLC(((int)phy->np),PL_LINK_ERR_CTR)) ;
1234         lem->lem_errors += errors ;
1235         mib->fddiPORTLem_Ct += errors ;
1236         if (lem->lem_errors) {
1237                 switch(phy->lc_test) {
1238                 case LC_SHORT:
1239                         if (lem->lem_errors >= smc->s.lct_short)
1240                                 phy->pc_lem_fail = TRUE ;
1241                         break ;
1242                 case LC_MEDIUM:
1243                         if (lem->lem_errors >= smc->s.lct_medium)
1244                                 phy->pc_lem_fail = TRUE ;
1245                         break ;
1246                 case LC_LONG:
1247                         if (lem->lem_errors >= smc->s.lct_long)
1248                                 phy->pc_lem_fail = TRUE ;
1249                         break ;
1250                 case LC_EXTENDED:
1251                         if (lem->lem_errors >= smc->s.lct_extended)
1252                                 phy->pc_lem_fail = TRUE ;
1253                         break ;
1254                 }
1255                 DB_PCMN(1," >>errors : %d\n",lem->lem_errors,0) ;
1256         }
1257         if (phy->pc_lem_fail) {
1258                 mib->fddiPORTLCTFail_Ct++ ;
1259                 mib->fddiPORTLem_Reject_Ct++ ;
1260         }
1261         else
1262                 mib->fddiPORTLCTFail_Ct = 0 ;
1263 }
1264
1265 /*
1266  * LEM functions
1267  */
1268 static void sm_ph_lem_start(smc,np,threshold)
1269 struct s_smc *smc ;
1270 int np;
1271 int threshold;
1272 {
1273         struct lem_counter *lem = &smc->y[np].lem ;
1274
1275         lem->lem_on = 1 ;
1276         lem->lem_errors = 0L ;
1277
1278         /* Do NOT reset mib->fddiPORTLer_Estimate here. It is called too
1279          * often.
1280          */
1281
1282         outpw(PLC(np,PL_LE_THRESHOLD),threshold) ;
1283         (void)inpw(PLC(np,PL_LINK_ERR_CTR)) ;   /* clear error counter */
1284
1285         /* enable LE INT */
1286         SETMASK(PLC(np,PL_INTR_MASK),PL_LE_CTR,PL_LE_CTR) ;
1287 }
1288
1289 static void sm_ph_lem_stop(smc,np)
1290 struct s_smc *smc ;
1291 int np;
1292 {
1293         struct lem_counter *lem = &smc->y[np].lem ;
1294
1295         lem->lem_on = 0 ;
1296         CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ;
1297 }
1298
1299 /* ARGSUSED */
1300 void sm_pm_ls_latch(smc,phy,on_off)
1301 struct s_smc *smc ;
1302 int phy;
1303 int on_off;             /* en- or disable ident. ls */
1304 {
1305         SK_UNUSED(smc) ;
1306
1307         phy = phy ; on_off = on_off ;
1308 }
1309
1310
1311 /*
1312  * PCM pseudo code
1313  * receive actions are called AFTER the bit n is received,
1314  * i.e. if pc_rcode_actions(5) is called, bit 6 is the next bit to be received
1315  */
1316
1317 /*
1318  * PCM pseudo code 5.1 .. 6.1
1319  */
1320 static void pc_rcode_actions(smc,bit,phy)
1321 struct s_smc *smc ;
1322 int bit;
1323 struct s_phy *phy;
1324 {
1325         struct fddi_mib_p       *mib ;
1326
1327         mib = phy->mib ;
1328
1329         DB_PCMN(1,"SIG rec %x %x: \n", bit,phy->r_val[bit] ) ;
1330         bit++ ;
1331
1332         switch(bit) {
1333         case 0:
1334         case 1:
1335         case 2:
1336                 break ;
1337         case 3 :
1338                 if (phy->r_val[1] == 0 && phy->r_val[2] == 0)
1339                         mib->fddiPORTNeighborType = TA ;
1340                 else if (phy->r_val[1] == 0 && phy->r_val[2] == 1)
1341                         mib->fddiPORTNeighborType = TB ;
1342                 else if (phy->r_val[1] == 1 && phy->r_val[2] == 0)
1343                         mib->fddiPORTNeighborType = TS ;
1344                 else if (phy->r_val[1] == 1 && phy->r_val[2] == 1)
1345                         mib->fddiPORTNeighborType = TM ;
1346                 break ;
1347         case 4:
1348                 if (mib->fddiPORTMy_Type == TM &&
1349                         mib->fddiPORTNeighborType == TM) {
1350                         DB_PCMN(1,"PCM %c : E100 withhold M-M\n",
1351                                 phy->phy_name,0) ;
1352                         mib->fddiPORTPC_Withhold = PC_WH_M_M ;
1353                         RS_SET(smc,RS_EVENT) ;
1354                 }
1355                 else if (phy->t_val[3] || phy->r_val[3]) {
1356                         mib->fddiPORTPC_Withhold = PC_WH_NONE ;
1357                         if (mib->fddiPORTMy_Type == TM ||
1358                             mib->fddiPORTNeighborType == TM)
1359                                 phy->pc_mode = PM_TREE ;
1360                         else
1361                                 phy->pc_mode = PM_PEER ;
1362
1363                         /* reevaluate the selection criteria (wc_flag) */
1364                         all_selection_criteria (smc);
1365
1366                         if (phy->wc_flag) {
1367                                 mib->fddiPORTPC_Withhold = PC_WH_PATH ;
1368                         }
1369                 }
1370                 else {
1371                         mib->fddiPORTPC_Withhold = PC_WH_OTHER ;
1372                         RS_SET(smc,RS_EVENT) ;
1373                         DB_PCMN(1,"PCM %c : E101 withhold other\n",
1374                                 phy->phy_name,0) ;
1375                 }
1376                 phy->twisted = ((mib->fddiPORTMy_Type != TS) &&
1377                                 (mib->fddiPORTMy_Type != TM) &&
1378                                 (mib->fddiPORTNeighborType ==
1379                                 mib->fddiPORTMy_Type)) ;
1380                 if (phy->twisted) {
1381                         DB_PCMN(1,"PCM %c : E102 !!! TWISTED !!!\n",
1382                                 phy->phy_name,0) ;
1383                 }
1384                 break ;
1385         case 5 :
1386                 break ;
1387         case 6:
1388                 if (phy->t_val[4] || phy->r_val[4]) {
1389                         if ((phy->t_val[4] && phy->t_val[5]) ||
1390                             (phy->r_val[4] && phy->r_val[5]) )
1391                                 phy->lc_test = LC_EXTENDED ;
1392                         else
1393                                 phy->lc_test = LC_LONG ;
1394                 }
1395                 else if (phy->t_val[5] || phy->r_val[5])
1396                         phy->lc_test = LC_MEDIUM ;
1397                 else
1398                         phy->lc_test = LC_SHORT ;
1399                 switch (phy->lc_test) {
1400                 case LC_SHORT :                         /* 50ms */
1401                         outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LENGTH ) ;
1402                         phy->t_next[7] = smc->s.pcm_lc_short ;
1403                         break ;
1404                 case LC_MEDIUM :                        /* 500ms */
1405                         outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LONGLN ) ;
1406                         phy->t_next[7] = smc->s.pcm_lc_medium ;
1407                         break ;
1408                 case LC_LONG :
1409                         SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;
1410                         phy->t_next[7] = smc->s.pcm_lc_long ;
1411                         break ;
1412                 case LC_EXTENDED :
1413                         SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;
1414                         phy->t_next[7] = smc->s.pcm_lc_extended ;
1415                         break ;
1416                 }
1417                 if (phy->t_next[7] > smc->s.pcm_lc_medium) {
1418                         start_pcm_timer0(smc,phy->t_next[7],PC_TIMEOUT_LCT,phy);
1419                 }
1420                 DB_PCMN(1,"LCT timer = %ld us\n", phy->t_next[7], 0) ;
1421                 phy->t_next[9] = smc->s.pcm_t_next_9 ;
1422                 break ;
1423         case 7:
1424                 if (phy->t_val[6]) {
1425                         phy->cf_loop = TRUE ;
1426                 }
1427                 phy->td_flag = TRUE ;
1428                 break ;
1429         case 8:
1430                 if (phy->t_val[7] || phy->r_val[7]) {
1431                         DB_PCMN(1,"PCM %c : E103 LCT fail %s\n",
1432                                 phy->phy_name,phy->t_val[7]? "local":"remote") ;
1433                         queue_event(smc,(int)(EVENT_PCM+phy->np),PC_START) ;
1434                 }
1435                 break ;
1436         case 9:
1437                 if (phy->t_val[8] || phy->r_val[8]) {
1438                         if (phy->t_val[8])
1439                                 phy->cf_loop = TRUE ;
1440                         phy->td_flag = TRUE ;
1441                 }
1442                 break ;
1443         case 10:
1444                 if (phy->r_val[9]) {
1445                         /* neighbor intends to have MAC on output */ ;
1446                         mib->fddiPORTMacIndicated.R_val = TRUE ;
1447                 }
1448                 else {
1449                         /* neighbor does not intend to have MAC on output */ ;
1450                         mib->fddiPORTMacIndicated.R_val = FALSE ;
1451                 }
1452                 break ;
1453         }
1454 }
1455
1456 /*
1457  * PCM pseudo code 5.1 .. 6.1
1458  */
1459 static void pc_tcode_actions(smc,bit,phy)
1460 struct s_smc *smc ;
1461 const int bit;
1462 struct s_phy *phy;
1463 {
1464         int     np = phy->np ;
1465         struct fddi_mib_p       *mib ;
1466
1467         mib = phy->mib ;
1468
1469         switch(bit) {
1470         case 0:
1471                 phy->t_val[0] = 0 ;             /* no escape used */
1472                 break ;
1473         case 1:
1474                 if (mib->fddiPORTMy_Type == TS || mib->fddiPORTMy_Type == TM)
1475                         phy->t_val[1] = 1 ;
1476                 else
1477                         phy->t_val[1] = 0 ;
1478                 break ;
1479         case 2 :
1480                 if (mib->fddiPORTMy_Type == TB || mib->fddiPORTMy_Type == TM)
1481                         phy->t_val[2] = 1 ;
1482                 else
1483                         phy->t_val[2] = 0 ;
1484                 break ;
1485         case 3:
1486                 {
1487                 int     type,ne ;
1488                 int     policy ;
1489
1490                 type = mib->fddiPORTMy_Type ;
1491                 ne = mib->fddiPORTNeighborType ;
1492                 policy = smc->mib.fddiSMTConnectionPolicy ;
1493
1494                 phy->t_val[3] = 1 ;     /* Accept connection */
1495                 switch (type) {
1496                 case TA :
1497                         if (
1498                                 ((policy & POLICY_AA) && ne == TA) ||
1499                                 ((policy & POLICY_AB) && ne == TB) ||
1500                                 ((policy & POLICY_AS) && ne == TS) ||
1501                                 ((policy & POLICY_AM) && ne == TM) )
1502                                 phy->t_val[3] = 0 ;     /* Reject */
1503                         break ;
1504                 case TB :
1505                         if (
1506                                 ((policy & POLICY_BA) && ne == TA) ||
1507                                 ((policy & POLICY_BB) && ne == TB) ||
1508                                 ((policy & POLICY_BS) && ne == TS) ||
1509                                 ((policy & POLICY_BM) && ne == TM) )
1510                                 phy->t_val[3] = 0 ;     /* Reject */
1511                         break ;
1512                 case TS :
1513                         if (
1514                                 ((policy & POLICY_SA) && ne == TA) ||
1515                                 ((policy & POLICY_SB) && ne == TB) ||
1516                                 ((policy & POLICY_SS) && ne == TS) ||
1517                                 ((policy & POLICY_SM) && ne == TM) )
1518                                 phy->t_val[3] = 0 ;     /* Reject */
1519                         break ;
1520                 case TM :
1521                         if (    ne == TM ||
1522                                 ((policy & POLICY_MA) && ne == TA) ||
1523                                 ((policy & POLICY_MB) && ne == TB) ||
1524                                 ((policy & POLICY_MS) && ne == TS) ||
1525                                 ((policy & POLICY_MM) && ne == TM) )
1526                                 phy->t_val[3] = 0 ;     /* Reject */
1527                         break ;
1528                 }
1529 #ifndef SLIM_SMT
1530                 /*
1531                  * detect undesirable connection attempt event
1532                  */
1533                 if (    (type == TA && ne == TA ) ||
1534                         (type == TA && ne == TS ) ||
1535                         (type == TB && ne == TB ) ||
1536                         (type == TB && ne == TS ) ||
1537                         (type == TS && ne == TA ) ||
1538                         (type == TS && ne == TB ) ) {
1539                         smt_srf_event(smc,SMT_EVENT_PORT_CONNECTION,
1540                                 (int) (INDEX_PORT+ phy->np) ,0) ;
1541                 }
1542 #endif
1543                 }
1544                 break ;
1545         case 4:
1546                 if (mib->fddiPORTPC_Withhold == PC_WH_NONE) {
1547                         if (phy->pc_lem_fail) {
1548                                 phy->t_val[4] = 1 ;     /* long */
1549                                 phy->t_val[5] = 0 ;
1550                         }
1551                         else {
1552                                 phy->t_val[4] = 0 ;
1553                                 if (mib->fddiPORTLCTFail_Ct > 0)
1554                                         phy->t_val[5] = 1 ;     /* medium */
1555                                 else
1556                                         phy->t_val[5] = 0 ;     /* short */
1557
1558                                 /*
1559                                  * Implementers choice: use medium
1560                                  * instead of short when undesired
1561                                  * connection attempt is made.
1562                                  */
1563                                 if (phy->wc_flag)
1564                                         phy->t_val[5] = 1 ;     /* medium */
1565                         }
1566                         mib->fddiPORTConnectState = PCM_CONNECTING ;
1567                 }
1568                 else {
1569                         mib->fddiPORTConnectState = PCM_STANDBY ;
1570                         phy->t_val[4] = 1 ;     /* extended */
1571                         phy->t_val[5] = 1 ;
1572                 }
1573                 break ;
1574         case 5:
1575                 break ;
1576         case 6:
1577                 /* we do NOT have a MAC for LCT */
1578                 phy->t_val[6] = 0 ;
1579                 break ;
1580         case 7:
1581                 phy->cf_loop = FALSE ;
1582                 lem_check_lct(smc,phy) ;
1583                 if (phy->pc_lem_fail) {
1584                         DB_PCMN(1,"PCM %c : E104 LCT failed\n",
1585                                 phy->phy_name,0) ;
1586                         phy->t_val[7] = 1 ;
1587                 }
1588                 else
1589                         phy->t_val[7] = 0 ;
1590                 break ;
1591         case 8:
1592                 phy->t_val[8] = 0 ;     /* Don't request MAC loopback */
1593                 break ;
1594         case 9:
1595                 phy->cf_loop = 0 ;
1596                 if ((mib->fddiPORTPC_Withhold != PC_WH_NONE) ||
1597                      ((smc->s.sas == SMT_DAS) && (phy->wc_flag))) {
1598                         queue_event(smc,EVENT_PCM+np,PC_START) ;
1599                         break ;
1600                 }
1601                 phy->t_val[9] = FALSE ;
1602                 switch (smc->s.sas) {
1603                 case SMT_DAS :
1604                         /*
1605                          * MAC intended on output
1606                          */
1607                         if (phy->pc_mode == PM_TREE) {
1608                                 if ((np == PB) || ((np == PA) &&
1609                                 (smc->y[PB].mib->fddiPORTConnectState !=
1610                                         PCM_ACTIVE)))
1611                                         phy->t_val[9] = TRUE ;
1612                         }
1613                         else {
1614                                 if (np == PB)
1615                                         phy->t_val[9] = TRUE ;
1616                         }
1617                         break ;
1618                 case SMT_SAS :
1619                         if (np == PS)
1620                                 phy->t_val[9] = TRUE ;
1621                         break ;
1622 #ifdef  CONCENTRATOR
1623                 case SMT_NAC :
1624                         /*
1625                          * MAC intended on output
1626                          */
1627                         if (np == PB)
1628                                 phy->t_val[9] = TRUE ;
1629                         break ;
1630 #endif
1631                 }
1632                 mib->fddiPORTMacIndicated.T_val = phy->t_val[9] ;
1633                 break ;
1634         }
1635         DB_PCMN(1,"SIG snd %x %x: \n", bit,phy->t_val[bit] ) ;
1636 }
1637
1638 /*
1639  * return status twisted (called by SMT)
1640  */
1641 int pcm_status_twisted(smc)
1642 struct s_smc *smc ;
1643 {
1644         int     twist = 0 ;
1645         if (smc->s.sas != SMT_DAS)
1646                 return(0) ;
1647         if (smc->y[PA].twisted && (smc->y[PA].mib->fddiPORTPCMState == PC8_ACTIVE))
1648                 twist |= 1 ;
1649         if (smc->y[PB].twisted && (smc->y[PB].mib->fddiPORTPCMState == PC8_ACTIVE))
1650                 twist |= 2 ;
1651         return(twist) ;
1652 }
1653
1654 /*
1655  * return status        (called by SMT)
1656  *      type
1657  *      state
1658  *      remote phy type
1659  *      remote mac yes/no
1660  */
1661 void pcm_status_state(smc,np,type,state,remote,mac)
1662 struct s_smc *smc ;
1663 int np;
1664 int *type;
1665 int *state;
1666 int *remote;
1667 int *mac;
1668 {
1669         struct s_phy    *phy = &smc->y[np] ;
1670         struct fddi_mib_p       *mib ;
1671
1672         mib = phy->mib ;
1673
1674         /* remote PHY type and MAC - set only if active */
1675         *mac = 0 ;
1676         *type = mib->fddiPORTMy_Type ;          /* our PHY type */
1677         *state = mib->fddiPORTConnectState ;
1678         *remote = mib->fddiPORTNeighborType ;
1679
1680         switch(mib->fddiPORTPCMState) {
1681         case PC8_ACTIVE :
1682                 *mac = mib->fddiPORTMacIndicated.R_val ;
1683                 break ;
1684         }
1685 }
1686
1687 /*
1688  * return rooted station status (called by SMT)
1689  */
1690 int pcm_rooted_station(smc)
1691 struct s_smc *smc ;
1692 {
1693         int     n ;
1694
1695         for (n = 0 ; n < NUMPHYS ; n++) {
1696                 if (smc->y[n].mib->fddiPORTPCMState == PC8_ACTIVE &&
1697                     smc->y[n].mib->fddiPORTNeighborType == TM)
1698                         return(0) ;
1699         }
1700         return(1) ;
1701 }
1702
1703 /*
1704  * Interrupt actions for PLC & PCM events
1705  */
1706 void plc_irq(smc,np,cmd)
1707 struct s_smc *smc ;
1708 int np;                 /* PHY index */
1709 unsigned int cmd;
1710 {
1711         struct s_phy *phy = &smc->y[np] ;
1712         struct s_plc *plc = &phy->plc ;
1713         int             n ;
1714 #ifdef  SUPERNET_3
1715         int             corr_mask ;
1716 #endif  /* SUPERNET_3 */
1717         int             i ;
1718
1719         if (np >= smc->s.numphys) {
1720                 plc->soft_err++ ;
1721                 return ;
1722         }
1723         if (cmd & PL_EBUF_ERR) {        /* elastic buff. det. over-|underflow*/
1724                 /*
1725                  * Check whether the SRF Condition occurred.
1726                  */
1727                 if (!plc->ebuf_cont && phy->mib->fddiPORTPCMState == PC8_ACTIVE){
1728                         /*
1729                          * This is the real Elasticity Error.
1730                          * More than one in a row are treated as a
1731                          * single one.
1732                          * Only count this in the active state.
1733                          */
1734                         phy->mib->fddiPORTEBError_Ct ++ ;
1735
1736                 }
1737
1738                 plc->ebuf_err++ ;
1739                 if (plc->ebuf_cont <= 1000) {
1740                         /*
1741                          * Prevent counter from being wrapped after
1742                          * hanging years in that interrupt.
1743                          */
1744                         plc->ebuf_cont++ ;      /* Ebuf continous error */
1745                 }
1746
1747 #ifdef  SUPERNET_3
1748                 if (plc->ebuf_cont == 1000 &&
1749                         ((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) ==
1750                         PLC_REV_SN3)) {
1751                         /*
1752                          * This interrupt remeained high for at least
1753                          * 1000 consecutive interrupt calls.
1754                          *
1755                          * This is caused by a hardware error of the
1756                          * ORION part of the Supernet III chipset.
1757                          *
1758                          * Disable this bit from the mask.
1759                          */
1760                         corr_mask = (plc_imsk_na & ~PL_EBUF_ERR) ;
1761                         outpw(PLC(np,PL_INTR_MASK),corr_mask);
1762
1763                         /*
1764                          * Disconnect from the ring.
1765                          * Call the driver with the reset indication.
1766                          */
1767                         queue_event(smc,EVENT_ECM,EC_DISCONNECT) ;
1768
1769                         /*
1770                          * Make an error log entry.
1771                          */
1772                         SMT_ERR_LOG(smc,SMT_E0136, SMT_E0136_MSG) ;
1773
1774                         /*
1775                          * Indicate the Reset.
1776                          */
1777                         drv_reset_indication(smc) ;
1778                 }
1779 #endif  /* SUPERNET_3 */
1780         } else {
1781                 /* Reset the continous error variable */
1782                 plc->ebuf_cont = 0 ;    /* reset Ebuf continous error */
1783         }
1784         if (cmd & PL_PHYINV) {          /* physical layer invalid signal */
1785                 plc->phyinv++ ;
1786         }
1787         if (cmd & PL_VSYM_CTR) {        /* violation symbol counter has incr.*/
1788                 plc->vsym_ctr++ ;
1789         }
1790         if (cmd & PL_MINI_CTR) {        /* dep. on PLC_CNTRL_A's MINI_CTR_INT*/
1791                 plc->mini_ctr++ ;
1792         }
1793         if (cmd & PL_LE_CTR) {          /* link error event counter */
1794                 int     j ;
1795
1796                 /*
1797                  * note: PL_LINK_ERR_CTR MUST be read to clear it
1798                  */
1799                 j = inpw(PLC(np,PL_LE_THRESHOLD)) ;
1800                 i = inpw(PLC(np,PL_LINK_ERR_CTR)) ;
1801
1802                 if (i < j) {
1803                         /* wrapped around */
1804                         i += 256 ;
1805                 }
1806
1807                 if (phy->lem.lem_on) {
1808                         /* Note: Lem errors shall only be counted when
1809                          * link is ACTIVE or LCT is active.
1810                          */
1811                         phy->lem.lem_errors += i ;
1812                         phy->mib->fddiPORTLem_Ct += i ;
1813                 }
1814         }
1815         if (cmd & PL_TPC_EXPIRED) {     /* TPC timer reached zero */
1816                 if (plc->p_state == PS_LCT) {
1817                         /*
1818                          * end of LCT
1819                          */
1820                         ;
1821                 }
1822                 plc->tpc_exp++ ;
1823         }
1824         if (cmd & PL_LS_MATCH) {        /* LS == LS in PLC_CNTRL_B's MATCH_LS*/
1825                 switch (inpw(PLC(np,PL_CNTRL_B)) & PL_MATCH_LS) {
1826                 case PL_I_IDLE :        phy->curr_ls = PC_ILS ;         break ;
1827                 case PL_I_HALT :        phy->curr_ls = PC_HLS ;         break ;
1828                 case PL_I_MASTR :       phy->curr_ls = PC_MLS ;         break ;
1829                 case PL_I_QUIET :       phy->curr_ls = PC_QLS ;         break ;
1830                 }
1831         }
1832         if (cmd & PL_PCM_BREAK) {       /* PCM has entered the BREAK state */
1833                 int     reason;
1834
1835                 reason = inpw(PLC(np,PL_STATUS_B)) & PL_BREAK_REASON ;
1836
1837                 switch (reason) {
1838                 case PL_B_PCS :         plc->b_pcs++ ;  break ;
1839                 case PL_B_TPC :         plc->b_tpc++ ;  break ;
1840                 case PL_B_TNE :         plc->b_tne++ ;  break ;
1841                 case PL_B_QLS :         plc->b_qls++ ;  break ;
1842                 case PL_B_ILS :         plc->b_ils++ ;  break ;
1843                 case PL_B_HLS :         plc->b_hls++ ;  break ;
1844                 }
1845
1846                 /*jd 05-Aug-1999 changed: Bug #10419 */
1847                 DB_PCMN(1,"PLC %d: MDcF = %x\n", np, smc->e.DisconnectFlag);
1848                 if (smc->e.DisconnectFlag == FALSE) {
1849                         DB_PCMN(1,"PLC %d: restart (reason %x)\n", np, reason);
1850                         queue_event(smc,EVENT_PCM+np,PC_START) ;
1851                 }
1852                 else {
1853                         DB_PCMN(1,"PLC %d: NO!! restart (reason %x)\n", np, reason);
1854                 }
1855                 return ;
1856         }
1857         /*
1858          * If both CODE & ENABLE are set ignore enable
1859          */
1860         if (cmd & PL_PCM_CODE) { /* receive last sign.-bit | LCT complete */
1861                 queue_event(smc,EVENT_PCM+np,PC_SIGNAL) ;
1862                 n = inpw(PLC(np,PL_RCV_VECTOR)) ;
1863                 for (i = 0 ; i < plc->p_bits ; i++) {
1864                         phy->r_val[plc->p_start+i] = n & 1 ;
1865                         n >>= 1 ;
1866                 }
1867         }
1868         else if (cmd & PL_PCM_ENABLED) { /* asserted SC_JOIN, scrub.completed*/
1869                 queue_event(smc,EVENT_PCM+np,PC_JOIN) ;
1870         }
1871         if (cmd & PL_TRACE_PROP) {      /* MLS while PC8_ACTIV || PC2_TRACE */
1872                 /*PC22b*/
1873                 if (!phy->tr_flag) {
1874                         DB_PCMN(1,"PCM : irq TRACE_PROP %d %d\n",
1875                                 np,smc->mib.fddiSMTECMState) ;
1876                         phy->tr_flag = TRUE ;
1877                         smc->e.trace_prop |= ENTITY_BIT(ENTITY_PHY(np)) ;
1878                         queue_event(smc,EVENT_ECM,EC_TRACE_PROP) ;
1879                 }
1880         }
1881         /*
1882          * filter PLC glitch ???
1883          * QLS || HLS only while in PC2_TRACE state
1884          */
1885         if ((cmd & PL_SELF_TEST) && (phy->mib->fddiPORTPCMState == PC2_TRACE)) {
1886                 /*PC22a*/
1887                 if (smc->e.path_test == PT_PASSED) {
1888                         DB_PCMN(1,"PCM : state = %s %d\n", get_pcmstate(smc,np),
1889                                 phy->mib->fddiPORTPCMState) ;
1890
1891                         smc->e.path_test = PT_PENDING ;
1892                         queue_event(smc,EVENT_ECM,EC_PATH_TEST) ;
1893                 }
1894         }
1895         if (cmd & PL_TNE_EXPIRED) {     /* TNE: length of noise events */
1896                 /* break_required (TNE > NS_Max) */
1897                 if (phy->mib->fddiPORTPCMState == PC8_ACTIVE) {
1898                         if (!phy->tr_flag) {
1899                            DB_PCMN(1,"PCM %c : PC81 %s\n",phy->phy_name,"NSE");
1900                            queue_event(smc,EVENT_PCM+np,PC_START) ;
1901                            return ;
1902                         }
1903                 }
1904         }
1905 #if     0
1906         if (cmd & PL_NP_ERR) {          /* NP has requested to r/w an inv reg*/
1907                 /*
1908                  * It's a bug by AMD
1909                  */
1910                 plc->np_err++ ;
1911         }
1912         /* pin inactiv (GND) */
1913         if (cmd & PL_PARITY_ERR) {      /* p. error dedected on TX9-0 inp */
1914                 plc->parity_err++ ;
1915         }
1916         if (cmd & PL_LSDO) {            /* carrier detected */
1917                 ;
1918         }
1919 #endif
1920 }
1921
1922 void pcm_set_lct_short(smc,n)
1923 struct s_smc *smc ;
1924 int n ;
1925 {
1926         if (n <= 0 || n > 1000)
1927                 return ;
1928         smc->s.lct_short = n ;
1929 }
1930
1931 #ifdef  DEBUG
1932 /*
1933  * fill state struct
1934  */
1935 void pcm_get_state(smc,state)
1936 struct s_smc *smc ;
1937 struct smt_state *state ;
1938 {
1939         struct s_phy    *phy ;
1940         struct pcm_state *pcs ;
1941         int     i ;
1942         int     ii ;
1943         short   rbits ;
1944         short   tbits ;
1945         struct fddi_mib_p       *mib ;
1946
1947         for (i = 0, phy = smc->y, pcs = state->pcm_state ; i < NUMPHYS ;
1948                 i++ , phy++, pcs++ ) {
1949                 mib = phy->mib ;
1950                 pcs->pcm_type = (u_char) mib->fddiPORTMy_Type ;
1951                 pcs->pcm_state = (u_char) mib->fddiPORTPCMState ;
1952                 pcs->pcm_mode = phy->pc_mode ;
1953                 pcs->pcm_neighbor = (u_char) mib->fddiPORTNeighborType ;
1954                 pcs->pcm_bsf = mib->fddiPORTBS_Flag ;
1955                 pcs->pcm_lsf = phy->ls_flag ;
1956                 pcs->pcm_lct_fail = (u_char) mib->fddiPORTLCTFail_Ct ;
1957                 pcs->pcm_ls_rx = LS2MIB(sm_pm_get_ls(smc,i)) ;
1958                 for (ii = 0, rbits = tbits = 0 ; ii < NUMBITS ; ii++) {
1959                         rbits <<= 1 ;
1960                         tbits <<= 1 ;
1961                         if (phy->r_val[NUMBITS-1-ii])
1962                                 rbits |= 1 ;
1963                         if (phy->t_val[NUMBITS-1-ii])
1964                                 tbits |= 1 ;
1965                 }
1966                 pcs->pcm_r_val = rbits ;
1967                 pcs->pcm_t_val = tbits ;
1968         }
1969 }
1970
1971 int get_pcm_state(smc,np)
1972 struct s_smc *smc ;
1973 int np;
1974 {
1975         int pcs ;
1976
1977         SK_UNUSED(smc) ;
1978
1979         switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {
1980                 case PL_PC0 :   pcs = PC_STOP ;         break ;
1981                 case PL_PC1 :   pcs = PC_START ;        break ;
1982                 case PL_PC2 :   pcs = PC_TRACE ;        break ;
1983                 case PL_PC3 :   pcs = PC_SIGNAL ;       break ;
1984                 case PL_PC4 :   pcs = PC_SIGNAL ;       break ;
1985                 case PL_PC5 :   pcs = PC_SIGNAL ;       break ;
1986                 case PL_PC6 :   pcs = PC_JOIN ;         break ;
1987                 case PL_PC7 :   pcs = PC_JOIN ;         break ;
1988                 case PL_PC8 :   pcs = PC_ENABLE ;       break ;
1989                 case PL_PC9 :   pcs = PC_MAINT ;        break ;
1990                 default :       pcs = PC_DISABLE ;      break ;
1991         }
1992         return(pcs) ;
1993 }
1994
1995 char *get_linestate(smc,np)
1996 struct s_smc *smc ;
1997 int np;
1998 {
1999         char *ls = "" ;
2000
2001         SK_UNUSED(smc) ;
2002
2003         switch (inpw(PLC(np,PL_STATUS_A)) & PL_LINE_ST) {
2004                 case PL_L_NLS : ls = "NOISE" ;  break ;
2005                 case PL_L_ALS : ls = "ACTIV" ;  break ;
2006                 case PL_L_UND : ls = "UNDEF" ;  break ;
2007                 case PL_L_ILS4: ls = "ILS 4" ;  break ;
2008                 case PL_L_QLS : ls = "QLS" ;    break ;
2009                 case PL_L_MLS : ls = "MLS" ;    break ;
2010                 case PL_L_HLS : ls = "HLS" ;    break ;
2011                 case PL_L_ILS16:ls = "ILS16" ;  break ;
2012 #ifdef  lint
2013                 default:        ls = "unknown" ; break ;
2014 #endif
2015         }
2016         return(ls) ;
2017 }
2018
2019 char *get_pcmstate(smc,np)
2020 struct s_smc *smc ;
2021 int np;
2022 {
2023         char *pcs ;
2024
2025         SK_UNUSED(smc) ;
2026
2027         switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {
2028                 case PL_PC0 :   pcs = "OFF" ;           break ;
2029                 case PL_PC1 :   pcs = "BREAK" ;         break ;
2030                 case PL_PC2 :   pcs = "TRACE" ;         break ;
2031                 case PL_PC3 :   pcs = "CONNECT";        break ;
2032                 case PL_PC4 :   pcs = "NEXT" ;          break ;
2033                 case PL_PC5 :   pcs = "SIGNAL" ;        break ;
2034                 case PL_PC6 :   pcs = "JOIN" ;          break ;
2035                 case PL_PC7 :   pcs = "VERIFY" ;        break ;
2036                 case PL_PC8 :   pcs = "ACTIV" ;         break ;
2037                 case PL_PC9 :   pcs = "MAINT" ;         break ;
2038                 default :       pcs = "UNKNOWN" ;       break ;
2039         }
2040         return(pcs) ;
2041 }
2042
2043 void list_phy(smc)
2044 struct s_smc *smc ;
2045 {
2046         struct s_plc *plc ;
2047         int np ;
2048
2049         for (np = 0 ; np < NUMPHYS ; np++) {
2050                 plc  = &smc->y[np].plc ;
2051                 printf("PHY %d:\tERRORS\t\t\tBREAK_REASONS\t\tSTATES:\n",np) ;
2052                 printf("\tsoft_error: %ld \t\tPC_Start : %ld\n",
2053                                                 plc->soft_err,plc->b_pcs);
2054                 printf("\tparity_err: %ld \t\tTPC exp. : %ld\t\tLine: %s\n",
2055                         plc->parity_err,plc->b_tpc,get_linestate(smc,np)) ;
2056                 printf("\tebuf_error: %ld \t\tTNE exp. : %ld\n",
2057                                                 plc->ebuf_err,plc->b_tne) ;
2058                 printf("\tphyinvalid: %ld \t\tQLS det. : %ld\t\tPCM : %s\n",
2059                         plc->phyinv,plc->b_qls,get_pcmstate(smc,np)) ;
2060                 printf("\tviosym_ctr: %ld \t\tILS det. : %ld\n",
2061                                                 plc->vsym_ctr,plc->b_ils)  ;
2062                 printf("\tmingap_ctr: %ld \t\tHLS det. : %ld\n",
2063                                                 plc->mini_ctr,plc->b_hls) ;
2064                 printf("\tnodepr_err: %ld\n",plc->np_err) ;
2065                 printf("\tTPC_exp : %ld\n",plc->tpc_exp) ;
2066                 printf("\tLEM_err : %ld\n",smc->y[np].lem.lem_errors) ;
2067         }
2068 }
2069
2070
2071 #ifdef  CONCENTRATOR
2072 void pcm_lem_dump(smc)
2073 struct s_smc *smc ;
2074 {
2075         int             i ;
2076         struct s_phy    *phy ;
2077         struct fddi_mib_p       *mib ;
2078
2079         char            *entostring() ;
2080
2081         printf("PHY     errors  BER\n") ;
2082         printf("----------------------\n") ;
2083         for (i = 0,phy = smc->y ; i < NUMPHYS ; i++,phy++) {
2084                 if (!plc_is_installed(smc,i))
2085                         continue ;
2086                 mib = phy->mib ;
2087                 printf("%s\t%ld\t10E-%d\n",
2088                         entostring(smc,ENTITY_PHY(i)),
2089                         mib->fddiPORTLem_Ct,
2090                         mib->fddiPORTLer_Estimate) ;
2091         }
2092 }
2093 #endif
2094 #endif