1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
4 Maintained by Jeff Garzik <jgarzik@pobox.com>
5 Copyright 2000,2001 The Linux Kernel Team
6 Written/copyright 1994-2001 by Donald Becker.
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
11 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
12 for more information on this driver, or visit the project
13 Web page at http://sourceforge.net/projects/tulip/
17 #include <linux/config.h>
19 #define DRV_NAME "tulip"
20 #ifdef CONFIG_TULIP_NAPI
21 #define DRV_VERSION "1.1.13-NAPI" /* Keep at least for test */
23 #define DRV_VERSION "1.1.13"
25 #define DRV_RELDATE "May 11, 2002"
28 #include <linux/module.h>
29 #include <linux/pci.h>
31 #include <linux/init.h>
32 #include <linux/etherdevice.h>
33 #include <linux/delay.h>
34 #include <linux/mii.h>
35 #include <linux/ethtool.h>
36 #include <linux/crc32.h>
37 #include <asm/unaligned.h>
38 #include <asm/uaccess.h>
44 static char version[] __devinitdata =
45 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
48 /* A few user-configurable values. */
50 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
51 static unsigned int max_interrupt_work = 25;
54 /* Used to pass the full-duplex flag, etc. */
55 static int full_duplex[MAX_UNITS];
56 static int options[MAX_UNITS];
57 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
59 /* The possible media types that can be set in options[] are: */
60 const char * const medianame[32] = {
61 "10baseT", "10base2", "AUI", "100baseTx",
62 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
63 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
64 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
65 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
66 "","","","", "","","","", "","","","Transceiver reset",
69 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
70 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
71 || defined(__sparc_) || defined(__ia64__) \
72 || defined(__sh__) || defined(__mips__)
73 static int rx_copybreak = 1518;
75 static int rx_copybreak = 100;
79 Set the bus performance register.
80 Typical: Set 16 longword cache alignment, no burst limit.
81 Cache alignment bits 15:14 Burst length 13:8
82 0000 No alignment 0x00000000 unlimited 0800 8 longwords
83 4000 8 longwords 0100 1 longword 1000 16 longwords
84 8000 16 longwords 0200 2 longwords 2000 32 longwords
85 C000 32 longwords 0400 4 longwords
86 Warning: many older 486 systems are broken and require setting 0x00A04800
87 8 longword cache alignment, 8 longword burst.
88 ToDo: Non-Intel setting could be better.
91 #if defined(__alpha__) || defined(__ia64__)
92 static int csr0 = 0x01A00000 | 0xE000;
93 #elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
94 static int csr0 = 0x01A00000 | 0x8000;
95 #elif defined(__sparc__) || defined(__hppa__)
96 /* The UltraSparc PCI controllers will disconnect at every 64-byte
97 * crossing anyways so it makes no sense to tell Tulip to burst
100 static int csr0 = 0x01A00000 | 0x9000;
101 #elif defined(__arm__) || defined(__sh__)
102 static int csr0 = 0x01A00000 | 0x4800;
103 #elif defined(__mips__)
104 static int csr0 = 0x00200000 | 0x4000;
106 #warning Processor architecture undefined!
107 static int csr0 = 0x00A00000 | 0x4800;
110 /* Operational parameters that usually are not changed. */
111 /* Time in jiffies before concluding the transmitter is hung. */
112 #define TX_TIMEOUT (4*HZ)
115 MODULE_AUTHOR("The Linux Kernel Team");
116 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
117 MODULE_LICENSE("GPL");
118 MODULE_VERSION(DRV_VERSION);
119 module_param(tulip_debug, int, 0);
120 module_param(max_interrupt_work, int, 0);
121 module_param(rx_copybreak, int, 0);
122 module_param(csr0, int, 0);
123 module_param_array(options, int, NULL, 0);
124 module_param_array(full_duplex, int, NULL, 0);
126 #define PFX DRV_NAME ": "
129 int tulip_debug = TULIP_DEBUG;
137 * This table use during operation for capabilities and media timer.
139 * It is indexed via the values in 'enum chips'
142 struct tulip_chip_table tulip_tbl[] = {
143 { }, /* placeholder for array, slot unused currently */
144 { }, /* placeholder for array, slot unused currently */
147 { "Digital DS21140 Tulip", 128, 0x0001ebef,
148 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
150 /* DC21142, DC21143 */
151 { "Digital DS21143 Tulip", 128, 0x0801fbff,
152 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
153 | HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
156 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
157 HAS_MII | HAS_PNICNWAY, pnic_timer },
160 { "Macronix 98713 PMAC", 128, 0x0001ebef,
161 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
164 { "Macronix 98715 PMAC", 256, 0x0001ebef,
165 HAS_MEDIA_TABLE, mxic_timer },
168 { "Macronix 98725 PMAC", 256, 0x0001ebef,
169 HAS_MEDIA_TABLE, mxic_timer },
172 { "ASIX AX88140", 128, 0x0001fbff,
173 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
174 | IS_ASIX, tulip_timer },
177 { "Lite-On PNIC-II", 256, 0x0801fbff,
178 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer },
181 { "ADMtek Comet", 256, 0x0001abef,
182 HAS_MII | MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer },
185 { "Compex 9881 PMAC", 128, 0x0001ebef,
186 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
189 { "Intel DS21145 Tulip", 128, 0x0801fbff,
190 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
191 | HAS_NWAY | HAS_PCI_MWI, t21142_timer },
194 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
195 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
199 { "Conexant LANfinity", 256, 0x0001ebef,
200 HAS_MII | HAS_ACPI, tulip_timer },
203 { "ULi M5261/M5263", 128, 0x0001ebef,
204 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI, tulip_timer },
208 static struct pci_device_id tulip_pci_tbl[] = {
209 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
210 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
211 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
212 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
213 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
214 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
215 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
216 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
217 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
218 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
219 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
220 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
222 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
224 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
228 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
229 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
230 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
231 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
232 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
233 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
234 { 0x1186, 0x1541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
235 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
236 { 0x1186, 0x1591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
237 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
238 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
239 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
240 { 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
241 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
242 { 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */
243 { 0x10b9, 0x5263, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */
244 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
245 { } /* terminate list */
247 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
250 /* A full-duplex map for media types. */
251 const char tulip_media_cap[32] =
252 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
254 static void tulip_tx_timeout(struct net_device *dev);
255 static void tulip_init_ring(struct net_device *dev);
256 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
257 static int tulip_open(struct net_device *dev);
258 static int tulip_close(struct net_device *dev);
259 static void tulip_up(struct net_device *dev);
260 static void tulip_down(struct net_device *dev);
261 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
262 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
263 static void set_rx_mode(struct net_device *dev);
264 #ifdef CONFIG_NET_POLL_CONTROLLER
265 static void poll_tulip(struct net_device *dev);
268 static void tulip_set_power_state (struct tulip_private *tp,
269 int sleep, int snooze)
271 if (tp->flags & HAS_ACPI) {
273 pci_read_config_dword (tp->pdev, CFDD, &tmp);
274 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
276 newtmp |= CFDD_Sleep;
278 newtmp |= CFDD_Snooze;
280 pci_write_config_dword (tp->pdev, CFDD, newtmp);
286 static void tulip_up(struct net_device *dev)
288 struct tulip_private *tp = netdev_priv(dev);
289 void __iomem *ioaddr = tp->base_addr;
290 int next_tick = 3*HZ;
293 /* Wake the chip from sleep/snooze mode. */
294 tulip_set_power_state (tp, 0, 0);
296 /* On some chip revs we must set the MII/SYM port before the reset!? */
297 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
298 iowrite32(0x00040000, ioaddr + CSR6);
300 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
301 iowrite32(0x00000001, ioaddr + CSR0);
305 Wait the specified 50 PCI cycles after a reset by initializing
306 Tx and Rx queues and the address filter list. */
307 iowrite32(tp->csr0, ioaddr + CSR0);
311 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
313 iowrite32(tp->rx_ring_dma, ioaddr + CSR3);
314 iowrite32(tp->tx_ring_dma, ioaddr + CSR4);
315 tp->cur_rx = tp->cur_tx = 0;
316 tp->dirty_rx = tp->dirty_tx = 0;
318 if (tp->flags & MC_HASH_ONLY) {
319 u32 addr_low = le32_to_cpu(get_unaligned((u32 *)dev->dev_addr));
320 u32 addr_high = le16_to_cpu(get_unaligned((u16 *)(dev->dev_addr+4)));
321 if (tp->chip_id == AX88140) {
322 iowrite32(0, ioaddr + CSR13);
323 iowrite32(addr_low, ioaddr + CSR14);
324 iowrite32(1, ioaddr + CSR13);
325 iowrite32(addr_high, ioaddr + CSR14);
326 } else if (tp->flags & COMET_MAC_ADDR) {
327 iowrite32(addr_low, ioaddr + 0xA4);
328 iowrite32(addr_high, ioaddr + 0xA8);
329 iowrite32(0, ioaddr + 0xAC);
330 iowrite32(0, ioaddr + 0xB0);
333 /* This is set_rx_mode(), but without starting the transmitter. */
334 u16 *eaddrs = (u16 *)dev->dev_addr;
335 u16 *setup_frm = &tp->setup_frame[15*6];
338 /* 21140 bug: you must add the broadcast address. */
339 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
340 /* Fill the final entry of the table with our physical address. */
341 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
342 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
343 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
345 mapping = pci_map_single(tp->pdev, tp->setup_frame,
346 sizeof(tp->setup_frame),
348 tp->tx_buffers[tp->cur_tx].skb = NULL;
349 tp->tx_buffers[tp->cur_tx].mapping = mapping;
351 /* Put the setup frame on the Tx list. */
352 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
353 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
354 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
359 tp->saved_if_port = dev->if_port;
360 if (dev->if_port == 0)
361 dev->if_port = tp->default_port;
363 /* Allow selecting a default media. */
365 if (tp->mtable == NULL)
368 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
369 (dev->if_port == 12 ? 0 : dev->if_port);
370 for (i = 0; i < tp->mtable->leafcount; i++)
371 if (tp->mtable->mleaf[i].media == looking_for) {
372 printk(KERN_INFO "%s: Using user-specified media %s.\n",
373 dev->name, medianame[dev->if_port]);
377 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
378 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
379 for (i = 0; i < tp->mtable->leafcount; i++)
380 if (tp->mtable->mleaf[i].media == looking_for) {
381 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
382 dev->name, medianame[looking_for]);
386 /* Start sensing first non-full-duplex media. */
387 for (i = tp->mtable->leafcount - 1;
388 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
397 if (tp->chip_id == DC21143 &&
398 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
399 /* We must reset the media CSRs when we force-select MII mode. */
400 iowrite32(0x0000, ioaddr + CSR13);
401 iowrite32(0x0000, ioaddr + CSR14);
402 iowrite32(0x0008, ioaddr + CSR15);
404 tulip_select_media(dev, 1);
405 } else if (tp->chip_id == DC21142) {
407 tulip_select_media(dev, 1);
409 printk(KERN_INFO "%s: Using MII transceiver %d, status "
411 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
412 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
413 tp->csr6 = csr6_mask_hdcap;
415 iowrite32(0x0000, ioaddr + CSR13);
416 iowrite32(0x0000, ioaddr + CSR14);
418 t21142_start_nway(dev);
419 } else if (tp->chip_id == PNIC2) {
420 /* for initial startup advertise 10/100 Full and Half */
421 tp->sym_advertise = 0x01E0;
422 /* enable autonegotiate end interrupt */
423 iowrite32(ioread32(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
424 iowrite32(ioread32(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
425 pnic2_start_nway(dev);
426 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
429 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
430 iowrite32(0x0001, ioaddr + CSR15);
431 } else if (ioread32(ioaddr + CSR5) & TPLnkPass)
434 /* Start with 10mbps to do autonegotiation. */
435 iowrite32(0x32, ioaddr + CSR12);
436 tp->csr6 = 0x00420000;
437 iowrite32(0x0001B078, ioaddr + 0xB8);
438 iowrite32(0x0201B078, ioaddr + 0xB8);
441 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
442 && ! tp->medialock) {
444 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
445 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
446 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
447 /* Provided by BOLO, Macronix - 12/10/1998. */
449 tp->csr6 = 0x01a80200;
450 iowrite32(0x0f370000 | ioread16(ioaddr + 0x80), ioaddr + 0x80);
451 iowrite32(0x11000 | ioread16(ioaddr + 0xa0), ioaddr + 0xa0);
452 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
453 /* Enable automatic Tx underrun recovery. */
454 iowrite32(ioread32(ioaddr + 0x88) | 1, ioaddr + 0x88);
455 dev->if_port = tp->mii_cnt ? 11 : 0;
456 tp->csr6 = 0x00040000;
457 } else if (tp->chip_id == AX88140) {
458 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
460 tulip_select_media(dev, 1);
462 /* Start the chip's Tx to process setup frame. */
466 iowrite32(tp->csr6 | TxOn, ioaddr + CSR6);
468 /* Enable interrupts by setting the interrupt mask. */
469 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
470 iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
471 tulip_start_rxtx(tp);
472 iowrite32(0, ioaddr + CSR2); /* Rx poll demand */
474 if (tulip_debug > 2) {
475 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
476 dev->name, ioread32(ioaddr + CSR0), ioread32(ioaddr + CSR5),
477 ioread32(ioaddr + CSR6));
480 /* Set the timer to switch to check for link beat and perhaps switch
481 to an alternate media type. */
482 tp->timer.expires = RUN_AT(next_tick);
483 add_timer(&tp->timer);
484 #ifdef CONFIG_TULIP_NAPI
485 init_timer(&tp->oom_timer);
486 tp->oom_timer.data = (unsigned long)dev;
487 tp->oom_timer.function = oom_timer;
492 tulip_open(struct net_device *dev)
496 if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev)))
499 tulip_init_ring (dev);
503 netif_start_queue (dev);
509 static void tulip_tx_timeout(struct net_device *dev)
511 struct tulip_private *tp = netdev_priv(dev);
512 void __iomem *ioaddr = tp->base_addr;
515 spin_lock_irqsave (&tp->lock, flags);
517 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
518 /* Do nothing -- the media monitor should handle this. */
520 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
522 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
523 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
524 || tp->chip_id == DM910X || tp->chip_id == ULI526X) {
525 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
526 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
527 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12),
528 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15));
529 if ( ! tp->medialock && tp->mtable) {
532 while (tp->cur_index >= 0
533 && (tulip_media_cap[tp->mtable->mleaf[tp->cur_index].media]
535 if (--tp->cur_index < 0) {
536 /* We start again, but should instead look for default. */
537 tp->cur_index = tp->mtable->leafcount - 1;
539 tulip_select_media(dev, 0);
540 printk(KERN_WARNING "%s: transmit timed out, switching to %s "
541 "media.\n", dev->name, medianame[dev->if_port]);
543 } else if (tp->chip_id == PNIC2) {
544 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
545 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
546 dev->name, (int)ioread32(ioaddr + CSR5), (int)ioread32(ioaddr + CSR6),
547 (int)ioread32(ioaddr + CSR7), (int)ioread32(ioaddr + CSR12));
549 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
550 "%8.8x, resetting...\n",
551 dev->name, ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12));
555 #if defined(way_too_many_messages)
556 if (tulip_debug > 3) {
558 for (i = 0; i < RX_RING_SIZE; i++) {
559 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
561 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
562 "%2.2x %2.2x %2.2x.\n",
563 i, (unsigned int)tp->rx_ring[i].status,
564 (unsigned int)tp->rx_ring[i].length,
565 (unsigned int)tp->rx_ring[i].buffer1,
566 (unsigned int)tp->rx_ring[i].buffer2,
567 buf[0], buf[1], buf[2]);
568 for (j = 0; buf[j] != 0xee && j < 1600; j++)
569 if (j < 100) printk(" %2.2x", buf[j]);
570 printk(" j=%d.\n", j);
572 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
573 for (i = 0; i < RX_RING_SIZE; i++)
574 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
575 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
576 for (i = 0; i < TX_RING_SIZE; i++)
577 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
582 /* Stop and restart the chip's Tx processes . */
584 tulip_restart_rxtx(tp);
585 /* Trigger an immediate transmit demand. */
586 iowrite32(0, ioaddr + CSR1);
588 tp->stats.tx_errors++;
590 spin_unlock_irqrestore (&tp->lock, flags);
591 dev->trans_start = jiffies;
592 netif_wake_queue (dev);
596 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
597 static void tulip_init_ring(struct net_device *dev)
599 struct tulip_private *tp = netdev_priv(dev);
606 for (i = 0; i < RX_RING_SIZE; i++) {
607 tp->rx_ring[i].status = 0x00000000;
608 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
609 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
610 tp->rx_buffers[i].skb = NULL;
611 tp->rx_buffers[i].mapping = 0;
613 /* Mark the last entry as wrapping the ring. */
614 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
615 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
617 for (i = 0; i < RX_RING_SIZE; i++) {
620 /* Note the receive buffer must be longword aligned.
621 dev_alloc_skb() provides 16 byte alignment. But do *not*
622 use skb_reserve() to align the IP header! */
623 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
624 tp->rx_buffers[i].skb = skb;
627 mapping = pci_map_single(tp->pdev, skb->tail,
628 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
629 tp->rx_buffers[i].mapping = mapping;
630 skb->dev = dev; /* Mark as being used by this device. */
631 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
632 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
634 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
636 /* The Tx buffer descriptor is filled in as needed, but we
637 do need to clear the ownership bit. */
638 for (i = 0; i < TX_RING_SIZE; i++) {
639 tp->tx_buffers[i].skb = NULL;
640 tp->tx_buffers[i].mapping = 0;
641 tp->tx_ring[i].status = 0x00000000;
642 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
644 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
648 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
650 struct tulip_private *tp = netdev_priv(dev);
655 spin_lock_irq(&tp->lock);
657 /* Calculate the next Tx descriptor entry. */
658 entry = tp->cur_tx % TX_RING_SIZE;
660 tp->tx_buffers[entry].skb = skb;
661 mapping = pci_map_single(tp->pdev, skb->data,
662 skb->len, PCI_DMA_TODEVICE);
663 tp->tx_buffers[entry].mapping = mapping;
664 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
666 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
667 flag = 0x60000000; /* No interrupt */
668 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
669 flag = 0xe0000000; /* Tx-done intr. */
670 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
671 flag = 0x60000000; /* No Tx-done intr. */
672 } else { /* Leave room for set_rx_mode() to fill entries. */
673 flag = 0xe0000000; /* Tx-done intr. */
674 netif_stop_queue(dev);
676 if (entry == TX_RING_SIZE-1)
677 flag = 0xe0000000 | DESC_RING_WRAP;
679 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
680 /* if we were using Transmit Automatic Polling, we would need a
682 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
687 /* Trigger an immediate transmit demand. */
688 iowrite32(0, tp->base_addr + CSR1);
690 spin_unlock_irq(&tp->lock);
692 dev->trans_start = jiffies;
697 static void tulip_clean_tx_ring(struct tulip_private *tp)
699 unsigned int dirty_tx;
701 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
703 int entry = dirty_tx % TX_RING_SIZE;
704 int status = le32_to_cpu(tp->tx_ring[entry].status);
707 tp->stats.tx_errors++; /* It wasn't Txed */
708 tp->tx_ring[entry].status = 0;
711 /* Check for Tx filter setup frames. */
712 if (tp->tx_buffers[entry].skb == NULL) {
713 /* test because dummy frames not mapped */
714 if (tp->tx_buffers[entry].mapping)
715 pci_unmap_single(tp->pdev,
716 tp->tx_buffers[entry].mapping,
717 sizeof(tp->setup_frame),
722 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
723 tp->tx_buffers[entry].skb->len,
726 /* Free the original skb. */
727 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
728 tp->tx_buffers[entry].skb = NULL;
729 tp->tx_buffers[entry].mapping = 0;
733 static void tulip_down (struct net_device *dev)
735 struct tulip_private *tp = netdev_priv(dev);
736 void __iomem *ioaddr = tp->base_addr;
739 del_timer_sync (&tp->timer);
740 #ifdef CONFIG_TULIP_NAPI
741 del_timer_sync (&tp->oom_timer);
743 spin_lock_irqsave (&tp->lock, flags);
745 /* Disable interrupts by clearing the interrupt mask. */
746 iowrite32 (0x00000000, ioaddr + CSR7);
748 /* Stop the Tx and Rx processes. */
751 /* prepare receive buffers */
752 tulip_refill_rx(dev);
754 /* release any unconsumed transmit buffers */
755 tulip_clean_tx_ring(tp);
757 if (ioread32 (ioaddr + CSR6) != 0xffffffff)
758 tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff;
760 spin_unlock_irqrestore (&tp->lock, flags);
762 init_timer(&tp->timer);
763 tp->timer.data = (unsigned long)dev;
764 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
766 dev->if_port = tp->saved_if_port;
768 /* Leave the driver in snooze, not sleep, mode. */
769 tulip_set_power_state (tp, 0, 1);
773 static int tulip_close (struct net_device *dev)
775 struct tulip_private *tp = netdev_priv(dev);
776 void __iomem *ioaddr = tp->base_addr;
779 netif_stop_queue (dev);
784 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
785 dev->name, ioread32 (ioaddr + CSR5));
787 free_irq (dev->irq, dev);
789 /* Free all the skbuffs in the Rx queue. */
790 for (i = 0; i < RX_RING_SIZE; i++) {
791 struct sk_buff *skb = tp->rx_buffers[i].skb;
792 dma_addr_t mapping = tp->rx_buffers[i].mapping;
794 tp->rx_buffers[i].skb = NULL;
795 tp->rx_buffers[i].mapping = 0;
797 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
798 tp->rx_ring[i].length = 0;
799 tp->rx_ring[i].buffer1 = 0xBADF00D0; /* An invalid address. */
801 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
806 for (i = 0; i < TX_RING_SIZE; i++) {
807 struct sk_buff *skb = tp->tx_buffers[i].skb;
810 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
811 skb->len, PCI_DMA_TODEVICE);
814 tp->tx_buffers[i].skb = NULL;
815 tp->tx_buffers[i].mapping = 0;
821 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
823 struct tulip_private *tp = netdev_priv(dev);
824 void __iomem *ioaddr = tp->base_addr;
826 if (netif_running(dev)) {
829 spin_lock_irqsave (&tp->lock, flags);
831 tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
833 spin_unlock_irqrestore(&tp->lock, flags);
840 static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
842 struct tulip_private *np = netdev_priv(dev);
843 strcpy(info->driver, DRV_NAME);
844 strcpy(info->version, DRV_VERSION);
845 strcpy(info->bus_info, pci_name(np->pdev));
848 static struct ethtool_ops ops = {
849 .get_drvinfo = tulip_get_drvinfo
852 /* Provide ioctl() calls to examine the MII xcvr state. */
853 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
855 struct tulip_private *tp = netdev_priv(dev);
856 void __iomem *ioaddr = tp->base_addr;
857 struct mii_ioctl_data *data = if_mii(rq);
858 const unsigned int phy_idx = 0;
859 int phy = tp->phys[phy_idx] & 0x1f;
860 unsigned int regnum = data->reg_num;
863 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
866 else if (tp->flags & HAS_NWAY)
868 else if (tp->chip_id == COMET)
873 case SIOCGMIIREG: /* Read MII PHY register. */
874 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
875 int csr12 = ioread32 (ioaddr + CSR12);
876 int csr14 = ioread32 (ioaddr + CSR14);
879 if (((csr14<<5) & 0x1000) ||
880 (dev->if_port == 5 && tp->nwayset))
881 data->val_out = 0x1000;
883 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
884 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
889 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
890 ((csr12&0x06) == 6 ? 0 : 4);
891 data->val_out |= 0x6048;
894 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
896 ((ioread32(ioaddr + CSR6) >> 3) & 0x0040) +
897 ((csr14 >> 1) & 0x20) + 1;
898 data->val_out |= ((csr14 >> 9) & 0x03C0);
900 case 5: data->val_out = tp->lpar; break;
901 default: data->val_out = 0; break;
904 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
908 case SIOCSMIIREG: /* Write MII PHY register. */
909 if (!capable (CAP_NET_ADMIN))
913 if (data->phy_id == phy) {
914 u16 value = data->val_in;
916 case 0: /* Check for autonegotiation on or reset. */
917 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
918 if (tp->full_duplex_lock)
919 tp->full_duplex = (value & 0x0100) ? 1 : 0;
922 tp->advertising[phy_idx] =
923 tp->mii_advertise = data->val_in;
927 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
928 u16 value = data->val_in;
930 if ((value & 0x1200) == 0x1200) {
931 if (tp->chip_id == PNIC2) {
932 pnic2_start_nway (dev);
934 t21142_start_nway (dev);
937 } else if (regnum == 4)
938 tp->sym_advertise = value;
940 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
951 /* Set or clear the multicast filter for this adaptor.
952 Note that we only use exclusion around actually queueing the
953 new frame, not around filling tp->setup_frame. This is non-deterministic
954 when re-entered but still correct. */
957 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
959 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
961 struct tulip_private *tp = netdev_priv(dev);
963 struct dev_mc_list *mclist;
967 memset(hash_table, 0, sizeof(hash_table));
968 set_bit_le(255, hash_table); /* Broadcast entry */
969 /* This should work on big-endian machines as well. */
970 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
971 i++, mclist = mclist->next) {
972 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
974 set_bit_le(index, hash_table);
977 for (i = 0; i < 32; i++) {
978 *setup_frm++ = hash_table[i];
979 *setup_frm++ = hash_table[i];
981 setup_frm = &tp->setup_frame[13*6];
983 /* Fill the final entry with our physical address. */
984 eaddrs = (u16 *)dev->dev_addr;
985 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
986 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
987 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
990 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
992 struct tulip_private *tp = netdev_priv(dev);
993 struct dev_mc_list *mclist;
997 /* We have <= 14 addresses so we can use the wonderful
998 16 address perfect filtering of the Tulip. */
999 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1000 i++, mclist = mclist->next) {
1001 eaddrs = (u16 *)mclist->dmi_addr;
1002 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1003 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1004 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1006 /* Fill the unused entries with the broadcast address. */
1007 memset(setup_frm, 0xff, (15-i)*12);
1008 setup_frm = &tp->setup_frame[15*6];
1010 /* Fill the final entry with our physical address. */
1011 eaddrs = (u16 *)dev->dev_addr;
1012 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1013 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1014 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1018 static void set_rx_mode(struct net_device *dev)
1020 struct tulip_private *tp = netdev_priv(dev);
1021 void __iomem *ioaddr = tp->base_addr;
1024 csr6 = ioread32(ioaddr + CSR6) & ~0x00D5;
1026 tp->csr6 &= ~0x00D5;
1027 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1028 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1029 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1030 /* Unconditionally log net taps. */
1031 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1032 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1033 /* Too many to filter well -- accept all multicasts. */
1034 tp->csr6 |= AcceptAllMulticast;
1035 csr6 |= AcceptAllMulticast;
1036 } else if (tp->flags & MC_HASH_ONLY) {
1037 /* Some work-alikes have only a 64-entry hash filter table. */
1038 /* Should verify correctness on big-endian/__powerpc__ */
1039 struct dev_mc_list *mclist;
1041 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1042 tp->csr6 |= AcceptAllMulticast;
1043 csr6 |= AcceptAllMulticast;
1045 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1047 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1048 i++, mclist = mclist->next) {
1049 if (tp->flags & COMET_MAC_ADDR)
1050 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1052 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1054 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
1055 if (tulip_debug > 2) {
1056 printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
1057 "%2.2x:%2.2x:%2.2x %8.8x bit %d.\n", dev->name,
1058 mclist->dmi_addr[0], mclist->dmi_addr[1],
1059 mclist->dmi_addr[2], mclist->dmi_addr[3],
1060 mclist->dmi_addr[4], mclist->dmi_addr[5],
1061 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1064 if (mc_filter[0] == tp->mc_filter[0] &&
1065 mc_filter[1] == tp->mc_filter[1])
1067 else if (tp->flags & IS_ASIX) {
1068 iowrite32(2, ioaddr + CSR13);
1069 iowrite32(mc_filter[0], ioaddr + CSR14);
1070 iowrite32(3, ioaddr + CSR13);
1071 iowrite32(mc_filter[1], ioaddr + CSR14);
1072 } else if (tp->flags & COMET_MAC_ADDR) {
1073 iowrite32(mc_filter[0], ioaddr + 0xAC);
1074 iowrite32(mc_filter[1], ioaddr + 0xB0);
1076 tp->mc_filter[0] = mc_filter[0];
1077 tp->mc_filter[1] = mc_filter[1];
1080 unsigned long flags;
1081 u32 tx_flags = 0x08000000 | 192;
1083 /* Note that only the low-address shortword of setup_frame is valid!
1084 The values are doubled for big-endian architectures. */
1085 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1086 build_setup_frame_hash(tp->setup_frame, dev);
1087 tx_flags = 0x08400000 | 192;
1089 build_setup_frame_perfect(tp->setup_frame, dev);
1092 spin_lock_irqsave(&tp->lock, flags);
1094 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1095 /* Same setup recently queued, we need not add it. */
1100 /* Now add this frame to the Tx list. */
1102 entry = tp->cur_tx++ % TX_RING_SIZE;
1105 /* Avoid a chip errata by prefixing a dummy entry. */
1106 tp->tx_buffers[entry].skb = NULL;
1107 tp->tx_buffers[entry].mapping = 0;
1108 tp->tx_ring[entry].length =
1109 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1110 tp->tx_ring[entry].buffer1 = 0;
1111 /* Must set DescOwned later to avoid race with chip */
1113 entry = tp->cur_tx++ % TX_RING_SIZE;
1116 tp->tx_buffers[entry].skb = NULL;
1117 tp->tx_buffers[entry].mapping =
1118 pci_map_single(tp->pdev, tp->setup_frame,
1119 sizeof(tp->setup_frame),
1121 /* Put the setup frame on the Tx list. */
1122 if (entry == TX_RING_SIZE-1)
1123 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1124 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1125 tp->tx_ring[entry].buffer1 =
1126 cpu_to_le32(tp->tx_buffers[entry].mapping);
1127 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1129 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1130 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1131 netif_stop_queue(dev);
1133 /* Trigger an immediate transmit demand. */
1134 iowrite32(0, ioaddr + CSR1);
1137 spin_unlock_irqrestore(&tp->lock, flags);
1140 iowrite32(csr6, ioaddr + CSR6);
1143 #ifdef CONFIG_TULIP_MWI
1144 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1145 struct net_device *dev)
1147 struct tulip_private *tp = netdev_priv(dev);
1152 if (tulip_debug > 3)
1153 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pci_name(pdev));
1155 tp->csr0 = csr0 = 0;
1157 /* if we have any cache line size at all, we can do MRM */
1160 /* ...and barring hardware bugs, MWI */
1161 if (!(tp->chip_id == DC21143 && tp->revision == 65))
1164 /* set or disable MWI in the standard PCI command bit.
1165 * Check for the case where mwi is desired but not available
1167 if (csr0 & MWI) pci_set_mwi(pdev);
1168 else pci_clear_mwi(pdev);
1170 /* read result from hardware (in case bit refused to enable) */
1171 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1172 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1175 /* if cache line size hardwired to zero, no MWI */
1176 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1177 if ((csr0 & MWI) && (cache == 0)) {
1179 pci_clear_mwi(pdev);
1182 /* assign per-cacheline-size cache alignment and
1183 * burst length values
1187 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1190 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1193 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1200 /* if we have a good cache line size, we by now have a good
1201 * csr0, so save it and exit
1206 /* we don't have a good csr0 or cache line size, disable MWI */
1208 pci_clear_mwi(pdev);
1212 /* sane defaults for burst length and cache alignment
1213 * originally from de4x5 driver
1215 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1219 if (tulip_debug > 2)
1220 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1221 pci_name(pdev), cache, csr0);
1226 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1227 * is the DM910X and the on chip ULi devices
1230 static int tulip_uli_dm_quirk(struct pci_dev *pdev)
1232 if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
1234 if (pdev->vendor == 0x10b9 && pdev->device == 0x5261)
1236 if (pdev->vendor == 0x10b9 && pdev->device == 0x5263)
1241 static int __devinit tulip_init_one (struct pci_dev *pdev,
1242 const struct pci_device_id *ent)
1244 struct tulip_private *tp;
1245 /* See note below on the multiport cards. */
1246 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1247 static struct pci_device_id early_486_chipsets[] = {
1248 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1249 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1252 static int last_irq;
1253 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1257 unsigned char *ee_data;
1258 struct net_device *dev;
1259 void __iomem *ioaddr;
1260 static int board_idx = -1;
1261 int chip_idx = ent->driver_data;
1262 const char *chip_name = tulip_tbl[chip_idx].chip_name;
1263 unsigned int eeprom_missing = 0;
1264 unsigned int force_csr0 = 0;
1267 static int did_version; /* Already printed version info. */
1268 if (tulip_debug > 0 && did_version++ == 0)
1269 printk (KERN_INFO "%s", version);
1275 * Lan media wire a tulip chip to a wan interface. Needs a very
1276 * different driver (lmc driver)
1279 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1280 printk (KERN_ERR PFX "skipping LMC card.\n");
1285 * Early DM9100's need software CRC and the DMFE driver
1288 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1291 /* Read Chip revision */
1292 pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
1293 if(dev_rev < 0x02000030)
1295 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1301 * Looks for early PCI chipsets where people report hangs
1302 * without the workarounds being on.
1305 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1306 aligned. Aries might need this too. The Saturn errata are not
1307 pretty reading but thankfully it's an old 486 chipset.
1309 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1313 if (pci_dev_present(early_486_chipsets)) {
1314 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1318 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1319 if (chip_idx == AX88140) {
1320 if ((csr0 & 0x3f00) == 0)
1324 /* PNIC doesn't have MWI/MRL/MRM... */
1325 if (chip_idx == LC82C168)
1326 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1328 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1329 if (tulip_uli_dm_quirk(pdev)) {
1330 csr0 &= ~0x01f100ff;
1331 #if defined(__sparc__)
1332 csr0 = (csr0 & ~0xff00) | 0xe000;
1336 * And back to business
1339 i = pci_enable_device(pdev);
1341 printk (KERN_ERR PFX
1342 "Cannot enable tulip board #%d, aborting\n",
1349 /* alloc_etherdev ensures aligned and zeroed private structures */
1350 dev = alloc_etherdev (sizeof (*tp));
1352 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1356 SET_MODULE_OWNER(dev);
1357 SET_NETDEV_DEV(dev, &pdev->dev);
1358 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1359 printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
1360 "aborting\n", pci_name(pdev),
1361 pci_resource_len (pdev, 0),
1362 pci_resource_start (pdev, 0));
1363 goto err_out_free_netdev;
1366 /* grab all resources from both PIO and MMIO regions, as we
1367 * don't want anyone else messing around with our hardware */
1368 if (pci_request_regions (pdev, "tulip"))
1369 goto err_out_free_netdev;
1372 ioaddr = pci_iomap(pdev, 1, tulip_tbl[chip_idx].io_size);
1374 ioaddr = pci_iomap(pdev, 0, tulip_tbl[chip_idx].io_size);
1377 goto err_out_free_res;
1379 pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
1382 * initialize private data structure 'tp'
1383 * it is zeroed and aligned in alloc_etherdev
1385 tp = netdev_priv(dev);
1387 tp->rx_ring = pci_alloc_consistent(pdev,
1388 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1389 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1392 goto err_out_mtable;
1393 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1394 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1396 tp->chip_id = chip_idx;
1397 tp->flags = tulip_tbl[chip_idx].flags;
1399 tp->base_addr = ioaddr;
1400 tp->revision = chip_rev;
1402 spin_lock_init(&tp->lock);
1403 spin_lock_init(&tp->mii_lock);
1404 init_timer(&tp->timer);
1405 tp->timer.data = (unsigned long)dev;
1406 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1408 dev->base_addr = (unsigned long)ioaddr;
1410 #ifdef CONFIG_TULIP_MWI
1411 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1412 tulip_mwi_config (pdev, dev);
1414 /* MWI is broken for DC21143 rev 65... */
1415 if (chip_idx == DC21143 && chip_rev == 65)
1419 /* Stop the chip's Tx and Rx processes. */
1420 tulip_stop_rxtx(tp);
1422 pci_set_master(pdev);
1425 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) {
1426 switch (pdev->subsystem_device) {
1435 tp->flags |= HAS_SWAPPED_SEEPROM | NEEDS_FAKE_MEDIA_TABLE;
1436 chip_name = "GSC DS21140 Tulip";
1441 /* Clear the missed-packet counter. */
1442 ioread32(ioaddr + CSR8);
1444 /* The station address ROM is read byte serially. The register must
1445 be polled, waiting for the value to be read bit serially from the
1448 ee_data = tp->eeprom;
1450 if (chip_idx == LC82C168) {
1451 for (i = 0; i < 3; i++) {
1452 int value, boguscnt = 100000;
1453 iowrite32(0x600 | i, ioaddr + 0x98);
1455 value = ioread32(ioaddr + CSR9);
1456 while (value < 0 && --boguscnt > 0);
1457 put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
1458 sum += value & 0xffff;
1460 } else if (chip_idx == COMET) {
1461 /* No need to read the EEPROM. */
1462 put_unaligned(cpu_to_le32(ioread32(ioaddr + 0xA4)), (u32 *)dev->dev_addr);
1463 put_unaligned(cpu_to_le16(ioread32(ioaddr + 0xA8)), (u16 *)(dev->dev_addr + 4));
1464 for (i = 0; i < 6; i ++)
1465 sum += dev->dev_addr[i];
1467 /* A serial EEPROM interface, we read now and sort it out later. */
1469 int ee_addr_size = tulip_read_eeprom(dev, 0xff, 8) & 0x40000 ? 8 : 6;
1471 for (i = 0; i < sizeof(tp->eeprom); i+=2) {
1472 u16 data = tulip_read_eeprom(dev, i/2, ee_addr_size);
1473 ee_data[i] = data & 0xff;
1474 ee_data[i + 1] = data >> 8;
1477 /* DEC now has a specification (see Notes) but early board makers
1478 just put the address in the first EEPROM locations. */
1479 /* This does memcmp(ee_data, ee_data+16, 8) */
1480 for (i = 0; i < 8; i ++)
1481 if (ee_data[i] != ee_data[16+i])
1483 if (chip_idx == CONEXANT) {
1484 /* Check that the tuple type and length is correct. */
1485 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1487 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1489 sa_offset = 2; /* Grrr, damn Matrox boards. */
1492 #ifdef CONFIG_DDB5476
1493 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
1494 /* DDB5476 MAC address in first EEPROM locations. */
1496 /* No media table either */
1497 tp->flags &= ~HAS_MEDIA_TABLE;
1500 #ifdef CONFIG_DDB5477
1501 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
1502 /* DDB5477 MAC address in first EEPROM locations. */
1504 /* No media table either */
1505 tp->flags &= ~HAS_MEDIA_TABLE;
1508 #ifdef CONFIG_MIPS_COBALT
1509 if ((pdev->bus->number == 0) &&
1510 ((PCI_SLOT(pdev->devfn) == 7) ||
1511 (PCI_SLOT(pdev->devfn) == 12))) {
1512 /* Cobalt MAC address in first EEPROM locations. */
1514 /* No media table either */
1515 tp->flags &= ~HAS_MEDIA_TABLE;
1519 /* Check to see if we have a broken srom */
1520 if (ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1521 /* pci_vendor_id and subsystem_id are swapped */
1522 ee_data[0] = ee_data[2];
1523 ee_data[1] = ee_data[3];
1527 /* HSC-PCI boards need to be byte-swaped and shifted
1528 * up 1 word. This shift needs to happen at the end
1529 * of the MAC first because of the 2 byte overlap.
1531 for (i = 4; i >= 0; i -= 2) {
1532 ee_data[17 + i + 3] = ee_data[17 + i];
1533 ee_data[16 + i + 5] = ee_data[16 + i];
1538 for (i = 0; i < 6; i ++) {
1539 dev->dev_addr[i] = ee_data[i + sa_offset];
1540 sum += ee_data[i + sa_offset];
1543 /* Lite-On boards have the address byte-swapped. */
1544 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0 || dev->dev_addr[0] == 0x02)
1545 && dev->dev_addr[1] == 0x00)
1546 for (i = 0; i < 6; i+=2) {
1547 char tmp = dev->dev_addr[i];
1548 dev->dev_addr[i] = dev->dev_addr[i+1];
1549 dev->dev_addr[i+1] = tmp;
1551 /* On the Zynx 315 Etherarray and other multiport boards only the
1552 first Tulip has an EEPROM.
1553 On Sparc systems the mac address is held in the OBP property
1554 "local-mac-address".
1555 The addresses of the subsequent ports are derived from the first.
1556 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1557 that here as well. */
1558 if (sum == 0 || sum == 6*0xff) {
1559 #if defined(__sparc__)
1560 struct pcidev_cookie *pcp = pdev->sysdata;
1563 for (i = 0; i < 5; i++)
1564 dev->dev_addr[i] = last_phys_addr[i];
1565 dev->dev_addr[i] = last_phys_addr[i] + 1;
1566 #if defined(__sparc__)
1567 if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
1568 "local-mac-address") == 6) {
1569 prom_getproperty(pcp->prom_node, "local-mac-address",
1573 #if defined(__i386__) /* Patch up x86 BIOS bug. */
1579 for (i = 0; i < 6; i++)
1580 last_phys_addr[i] = dev->dev_addr[i];
1584 /* The lower four bits are the media type. */
1585 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1586 if (options[board_idx] & MEDIA_MASK)
1587 tp->default_port = options[board_idx] & MEDIA_MASK;
1588 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1589 tp->full_duplex = 1;
1590 if (mtu[board_idx] > 0)
1591 dev->mtu = mtu[board_idx];
1593 if (dev->mem_start & MEDIA_MASK)
1594 tp->default_port = dev->mem_start & MEDIA_MASK;
1595 if (tp->default_port) {
1596 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1597 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1599 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1600 tp->full_duplex = 1;
1602 if (tp->full_duplex)
1603 tp->full_duplex_lock = 1;
1605 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1606 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1607 tp->mii_advertise = media2advert[tp->default_port - 9];
1608 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1611 if (tp->flags & HAS_MEDIA_TABLE) {
1612 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1613 tulip_parse_eeprom(dev);
1614 strcpy(dev->name, "eth%d"); /* un-hack */
1617 if ((tp->flags & ALWAYS_CHECK_MII) ||
1618 (tp->mtable && tp->mtable->has_mii) ||
1619 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1620 if (tp->mtable && tp->mtable->has_mii) {
1621 for (i = 0; i < tp->mtable->leafcount; i++)
1622 if (tp->mtable->mleaf[i].media == 11) {
1624 tp->saved_if_port = dev->if_port;
1625 tulip_select_media(dev, 2);
1626 dev->if_port = tp->saved_if_port;
1631 /* Find the connected MII xcvrs.
1632 Doing this in open() would allow detecting external xcvrs
1633 later, but takes much time. */
1634 tulip_find_mii (dev, board_idx);
1637 /* The Tulip-specific entries in the device structure. */
1638 dev->open = tulip_open;
1639 dev->hard_start_xmit = tulip_start_xmit;
1640 dev->tx_timeout = tulip_tx_timeout;
1641 dev->watchdog_timeo = TX_TIMEOUT;
1642 #ifdef CONFIG_TULIP_NAPI
1643 dev->poll = tulip_poll;
1646 dev->stop = tulip_close;
1647 dev->get_stats = tulip_get_stats;
1648 dev->do_ioctl = private_ioctl;
1649 dev->set_multicast_list = set_rx_mode;
1650 #ifdef CONFIG_NET_POLL_CONTROLLER
1651 dev->poll_controller = &poll_tulip;
1653 SET_ETHTOOL_OPS(dev, &ops);
1655 if (register_netdev(dev))
1656 goto err_out_free_ring;
1658 printk(KERN_INFO "%s: %s rev %d at %p,",
1659 dev->name, chip_name, chip_rev, ioaddr);
1660 pci_set_drvdata(pdev, dev);
1663 printk(" EEPROM not present,");
1664 for (i = 0; i < 6; i++)
1665 printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
1666 printk(", IRQ %d.\n", irq);
1668 if (tp->chip_id == PNIC2)
1669 tp->link_change = pnic2_lnk_change;
1670 else if (tp->flags & HAS_NWAY)
1671 tp->link_change = t21142_lnk_change;
1672 else if (tp->flags & HAS_PNICNWAY)
1673 tp->link_change = pnic_lnk_change;
1675 /* Reset the xcvr interface and turn on heartbeat. */
1682 iowrite32(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1685 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1686 iowrite32(csr6_mask_defstate, ioaddr + CSR6);
1687 iowrite32(0x0000, ioaddr + CSR13);
1688 iowrite32(0x0000, ioaddr + CSR14);
1689 iowrite32(csr6_mask_hdcap, ioaddr + CSR6);
1691 t21142_start_nway(dev);
1694 /* just do a reset for sanity sake */
1695 iowrite32(0x0000, ioaddr + CSR13);
1696 iowrite32(0x0000, ioaddr + CSR14);
1699 if ( ! tp->mii_cnt) {
1702 iowrite32(csr6_ttm | csr6_ca, ioaddr + CSR6);
1703 iowrite32(0x30, ioaddr + CSR12);
1704 iowrite32(0x0001F078, ioaddr + CSR6);
1705 iowrite32(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1710 iowrite32(0x00000000, ioaddr + CSR6);
1711 iowrite32(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1712 iowrite32(0x00000001, ioaddr + CSR13);
1716 iowrite32(0x01a80000, ioaddr + CSR6);
1717 iowrite32(0xFFFFFFFF, ioaddr + CSR14);
1718 iowrite32(0x00001000, ioaddr + CSR12);
1721 /* No initialization necessary. */
1725 /* put the chip in snooze mode until opened */
1726 tulip_set_power_state (tp, 0, 1);
1731 pci_free_consistent (pdev,
1732 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1733 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1734 tp->rx_ring, tp->rx_ring_dma);
1739 pci_iounmap(pdev, ioaddr);
1742 pci_release_regions (pdev);
1744 err_out_free_netdev:
1752 static int tulip_suspend (struct pci_dev *pdev, u32 state)
1754 struct net_device *dev = pci_get_drvdata(pdev);
1756 if (dev && netif_running (dev) && netif_device_present (dev)) {
1757 netif_device_detach (dev);
1759 /* pci_power_off(pdev, -1); */
1765 static int tulip_resume(struct pci_dev *pdev)
1767 struct net_device *dev = pci_get_drvdata(pdev);
1769 if (dev && netif_running (dev) && !netif_device_present (dev)) {
1771 pci_enable_device (pdev);
1773 /* pci_power_on(pdev); */
1775 netif_device_attach (dev);
1780 #endif /* CONFIG_PM */
1783 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1785 struct net_device *dev = pci_get_drvdata (pdev);
1786 struct tulip_private *tp;
1791 tp = netdev_priv(dev);
1792 unregister_netdev(dev);
1793 pci_free_consistent (pdev,
1794 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1795 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1796 tp->rx_ring, tp->rx_ring_dma);
1799 pci_iounmap(pdev, tp->base_addr);
1801 pci_release_regions (pdev);
1802 pci_set_drvdata (pdev, NULL);
1804 /* pci_power_off (pdev, -1); */
1807 #ifdef CONFIG_NET_POLL_CONTROLLER
1809 * Polling 'interrupt' - used by things like netconsole to send skbs
1810 * without having to re-enable interrupts. It's not called while
1811 * the interrupt routine is executing.
1814 static void poll_tulip (struct net_device *dev)
1816 /* disable_irq here is not very nice, but with the lockless
1817 interrupt handler we have no other choice. */
1818 disable_irq(dev->irq);
1819 tulip_interrupt (dev->irq, dev, NULL);
1820 enable_irq(dev->irq);
1824 static struct pci_driver tulip_driver = {
1826 .id_table = tulip_pci_tbl,
1827 .probe = tulip_init_one,
1828 .remove = __devexit_p(tulip_remove_one),
1830 .suspend = tulip_suspend,
1831 .resume = tulip_resume,
1832 #endif /* CONFIG_PM */
1836 static int __init tulip_init (void)
1839 printk (KERN_INFO "%s", version);
1842 /* copy module parms into globals */
1843 tulip_rx_copybreak = rx_copybreak;
1844 tulip_max_interrupt_work = max_interrupt_work;
1846 /* probe for and init boards */
1847 return pci_module_init (&tulip_driver);
1851 static void __exit tulip_cleanup (void)
1853 pci_unregister_driver (&tulip_driver);
1857 module_init(tulip_init);
1858 module_exit(tulip_cleanup);