2 * FarSync X21 driver for Linux
4 * Actually sync driver for X.21, V.35 and V.24 on FarSync T-series cards
6 * Copyright (C) 2001 FarSite Communications Ltd.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
14 * Author: R.J.Dunlop <bob.dunlop@farsite.co.uk>
16 * For the most part this file only contains structures and information
17 * that is visible to applications outside the driver. Shared memory
18 * layout etc is internal to the driver and described within farsync.c.
19 * Overlap exists in that the values used for some fields within the
20 * ioctl interface extend into the cards firmware interface so values in
21 * this file may not be changed arbitrarily.
26 * The project name for this driver is Oscar. The driver is intended to be
27 * used with the FarSite T-Series cards (T2P & T4P) running in the high
28 * speed frame shifter mode. This is sometimes referred to as X.21 mode
29 * which is a complete misnomer as the card continues to support V.24 and
30 * V.35 as well as X.21.
32 * A short common prefix is useful for routines within the driver to avoid
33 * conflict with other similar drivers and I chosen to use "fst_" for this
34 * purpose (FarSite T-series).
36 #define FST_NAME "fst" /* In debug/info etc */
37 #define FST_DEV_NAME "farsync" /* For misc interfaces */
40 /* User version number
42 * This version number is incremented with each official release of the
43 * package and is a simplified number for normal user reference.
44 * Individual files are tracked by the version control system and may
45 * have individual versions (or IDs) that move much faster than the
46 * the release version as individual updates are tracked.
48 #define FST_USER_VERSION "0.09"
51 /* Ioctl call command values
53 * The first three private ioctls are used by the sync-PPP module,
54 * allowing a little room for expansion we start our numbering at 10.
56 #define FSTWRITE (SIOCDEVPRIVATE+10)
57 #define FSTCPURESET (SIOCDEVPRIVATE+11)
58 #define FSTCPURELEASE (SIOCDEVPRIVATE+12)
59 #define FSTGETCONF (SIOCDEVPRIVATE+13)
60 #define FSTSETCONF (SIOCDEVPRIVATE+14)
65 * Used to write a block of data (firmware etc) before the card is running
70 unsigned char data[0];
74 /* FSTCPURESET and FSTCPURELEASE
76 * These take no additional data.
77 * FSTCPURESET forces the cards CPU into a reset state and holds it there.
78 * FSTCPURELEASE releases the CPU from this reset state allowing it to run,
79 * the reset vector should be setup before this ioctl is run.
82 /* FSTGETCONF and FSTSETCONF
84 * Get and set a card/ports configuration.
85 * In order to allow selective setting of items and for the kernel to
86 * indicate a partial status response the first field "valid" is a bitmask
87 * indicating which other fields in the structure are valid.
88 * Many of the field names in this structure match those used in the
89 * firmware shared memory configuration interface and come originally from
90 * the NT header file Smc.h
92 * When used with FSTGETCONF this structure should be zeroed before use.
93 * This is to allow for possible future expansion when some of the fields
94 * might be used to indicate a different (expanded) structure.
97 unsigned int valid; /* Bits of structure that are valid */
98 unsigned int nports; /* Number of serial ports */
99 unsigned int type; /* Type index of card */
100 unsigned int state; /* State of card */
101 unsigned int index; /* Index of port ioctl was issued on */
102 unsigned int smcFirmwareVersion;
103 unsigned short lineInterface; /* Physical interface type */
104 unsigned char proto; /* Line protocol */
105 unsigned char internalClock; /* 1 => internal clock, 0 => external */
106 unsigned int lineSpeed; /* Speed in bps */
107 unsigned int v24IpSts; /* V.24 control input status */
108 unsigned int v24OpSts; /* V.24 control output status */
109 unsigned short clockStatus; /* lsb: 0=> present, 1=> absent */
110 unsigned short cableStatus; /* lsb: 0=> present, 1=> absent */
111 unsigned short cardMode; /* lsb: LED id mode */
112 unsigned short debug; /* Debug flags */
115 /* "valid" bitmask */
116 #define FSTVAL_NONE 0x00000000 /* Nothing valid (firmware not running).
117 * Slight misnomer. In fact nports,
118 * type, state and index will be set
119 * based on hardware detected.
121 #define FSTVAL_OMODEM 0x0000001F /* First 5 bits correspond to the
122 * output status bits defined for
125 #define FSTVAL_SPEED 0x00000020 /* internalClock, lineSpeed, clockStatus
127 #define FSTVAL_CABLE 0x00000040 /* lineInterface, cableStatus */
128 #define FSTVAL_IMODEM 0x00000080 /* v24IpSts */
129 #define FSTVAL_CARD 0x00000100 /* nports, type, state, index,
132 #define FSTVAL_PROTO 0x00000200 /* proto */
133 #define FSTVAL_MODE 0x00000400 /* cardMode */
134 #define FSTVAL_DEBUG 0x80000000 /* debug */
135 #define FSTVAL_ALL 0x000007FF /* Note: does not include DEBUG flag */
138 #define FST_TYPE_NONE 0 /* Probably should never happen */
139 #define FST_TYPE_T2P 1 /* T2P X21 2 port card */
140 #define FST_TYPE_T4P 2 /* T4P X21 4 port card */
143 #define FST_UNINIT 0 /* Raw uninitialised state following
145 #define FST_RESET 1 /* Processor held in reset state */
146 #define FST_DOWNLOAD 2 /* Card being downloaded */
147 #define FST_STARTING 3 /* Released following download */
148 #define FST_RUNNING 4 /* Processor running */
149 #define FST_BADVERSION 5 /* Bad shared memory version detected */
150 #define FST_HALTED 6 /* Processor flagged a halt */
151 #define FST_IFAILED 7 /* Firmware issued initialisation failed
154 /* "lineInterface" */
160 #define FST_HDLC 1 /* Cisco compatible HDLC */
161 #define FST_PPP 2 /* Sync PPP */
162 #define FST_MONITOR 3 /* Monitor only (raw packet reception) */
163 #define FST_RAW 4 /* Two way raw packets */
164 #define FST_GEN_HDLC 5 /* Using "Generic HDLC" module */
166 /* "internalClock" */
170 /* "v24IpSts" bitmask */
171 #define IPSTS_CTS 0x00000001 /* Clear To Send (Indicate for X.21) */
172 #define IPSTS_INDICATE IPSTS_CTS
173 #define IPSTS_DSR 0x00000002 /* Data Set Ready (T2P Port A) */
174 #define IPSTS_DCD 0x00000004 /* Data Carrier Detect */
175 #define IPSTS_RI 0x00000008 /* Ring Indicator (T2P Port A) */
176 #define IPSTS_TMI 0x00000010 /* Test Mode Indicator (Not Supported)*/
178 /* "v24OpSts" bitmask */
179 #define OPSTS_RTS 0x00000001 /* Request To Send (Control for X.21) */
180 #define OPSTS_CONTROL OPSTS_RTS
181 #define OPSTS_DTR 0x00000002 /* Data Terminal Ready */
182 #define OPSTS_DSRS 0x00000004 /* Data Signalling Rate Select (Not
184 #define OPSTS_SS 0x00000008 /* Select Standby (Not Supported) */
185 #define OPSTS_LL 0x00000010 /* Maintenance Test (Not Supported) */
187 /* "cardMode" bitmask */
188 #define CARD_MODE_IDENTIFY 0x0001
193 * These should only be enabled for development kernels, production code
194 * should define FST_DEBUG=0 in order to exclude the code.
195 * Setting FST_DEBUG=1 will include all the debug code but in a disabled
196 * state, use the FSTSETCONF ioctl to enable specific debug actions, or
197 * FST_DEBUG can be set to prime the debug selection.
199 #define FST_DEBUG 0x0000
202 extern int fst_debug_mask; /* Bit mask of actions to debug, bits
203 * listed below. Note: Bit 0 is used
204 * to trigger the inclusion of this
205 * code, without enabling any actions.
207 #define DBG_INIT 0x0002 /* Card detection and initialisation */
208 #define DBG_OPEN 0x0004 /* Open and close sequences */
209 #define DBG_PCI 0x0008 /* PCI config operations */
210 #define DBG_IOCTL 0x0010 /* Ioctls and other config */
211 #define DBG_INTR 0x0020 /* Interrupt routines (be careful) */
212 #define DBG_TX 0x0040 /* Packet transmission */
213 #define DBG_RX 0x0080 /* Packet reception */
214 #define DBG_CMD 0x0100 /* Port command issuing */
216 #define DBG_ASS 0xFFFF /* Assert like statements. Code that
217 * should never be reached, if you see
218 * one of these then I've been an ass
220 #endif /* FST_DEBUG */