drivers/net/wireless/atmel.c

   1 /*** -*- linux-c -*- **********************************************************
   2
   3      Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
   4
   5         Copyright 2000-2001 ATMEL Corporation.
   6         Copyright 2003-2004 Simon Kelley.
   7
   8     This code was developed from version 2.1.1 of the Atmel drivers,
   9     released by Atmel corp. under the GPL in December 2002. It also
  10     includes code from the Linux aironet drivers (C) Benjamin Reed,
  11     and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
  12     extensions, (C) Jean Tourrilhes.
  13
  14     The firmware module for reading the MAC address of the card comes from
  15     net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
  16     by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
  17     This file contains the module in binary form and, under the terms
  18     of the GPL, in source form. The source is located at the end of the file.
  19
  20     This program is free software; you can redistribute it and/or modify
  21     it under the terms of the GNU General Public License as published by
  22     the Free Software Foundation; either version 2 of the License, or
  23     (at your option) any later version.
  24
  25     This software is distributed in the hope that it will be useful,
  26     but WITHOUT ANY WARRANTY; without even the implied warranty of
  27     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28     GNU General Public License for more details.
  29
  30     You should have received a copy of the GNU General Public License
  31     along with Atmel wireless lan drivers; if not, write to the Free Software
  32     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  33
  34     For all queries about this code, please contact the current author,
  35     Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
  36
  37     Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
  38     hardware used during development of this driver.
  39
  40 ******************************************************************************/
  41
  42 #include <linux/config.h>
  43 #include <linux/init.h>
  44
  45 #include <linux/kernel.h>
  46 #include <linux/sched.h>
  47 #include <linux/ptrace.h>
  48 #include <linux/slab.h>
  49 #include <linux/string.h>
  50 #include <linux/ctype.h>
  51 #include <linux/timer.h>
  52 #include <asm/io.h>
  53 #include <asm/system.h>
  54 #include <asm/uaccess.h>
  55 #include <linux/module.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/etherdevice.h>
  58 #include <linux/skbuff.h>
  59 #include <linux/if_arp.h>
  60 #include <linux/ioport.h>
  61 #include <linux/fcntl.h>
  62 #include <linux/delay.h>
  63 #include <linux/wireless.h>
  64 #include <net/iw_handler.h>
  65 #include <linux/byteorder/generic.h>
  66 #include <linux/crc32.h>
  67 #include <linux/proc_fs.h>
  68 #include <linux/device.h>
  69 #include <linux/moduleparam.h>
  70 #include <linux/firmware.h>
  71 #include "ieee802_11.h"
  72 #include "atmel.h"
  73
  74 #define DRIVER_MAJOR 0
  75 #define DRIVER_MINOR 96
  76
  77 MODULE_AUTHOR("Simon Kelley");
  78 MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
  79 MODULE_LICENSE("GPL");
  80 MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
  81
  82 /* The name of the firmware file to be loaded
  83    over-rides any automatic selection */
  84 static char *firmware = NULL;
  85 module_param(firmware, charp, 0);
  86
  87 /* table of firmware file names */
  88 static struct {
  89         AtmelFWType fw_type;
  90         const char *fw_file;
  91         const char *fw_file_ext;
  92 } fw_table[] = {
  93         { ATMEL_FW_TYPE_502,      "atmel_at76c502",      "bin" },
  94         { ATMEL_FW_TYPE_502D,     "atmel_at76c502d",     "bin" },
  95         { ATMEL_FW_TYPE_502E,     "atmel_at76c502e",     "bin" },
  96         { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" },
  97         { ATMEL_FW_TYPE_504,      "atmel_at76c504",      "bin" },
  98         { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" },
  99         { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" },
 100         { ATMEL_FW_TYPE_506,      "atmel_at76c506",      "bin" },
 101         { ATMEL_FW_TYPE_NONE,      NULL,                  NULL }
 102 };
 103
 104 #define MAX_SSID_LENGTH 32
 105 #define MGMT_JIFFIES (256 * HZ / 100)
 106
 107 #define MAX_BSS_ENTRIES 64
 108
 109 /* registers */
 110 #define GCR  0x00    //      (SIR0)  General Configuration Register
 111 #define BSR  0x02    //      (SIR1)  Bank Switching Select Register
 112 #define AR   0x04
 113 #define DR   0x08
 114 #define MR1  0x12    //      Mirror Register 1
 115 #define MR2  0x14    //      Mirror Register 2
 116 #define MR3  0x16    //      Mirror Register 3
 117 #define MR4  0x18    //      Mirror Register 4
 118
 119 #define GPR1                            0x0c
 120 #define GPR2                            0x0e
 121 #define GPR3                            0x10
 122 //
 123 // Constants for the GCR register.
 124 //
 125 #define GCR_REMAP     0x0400          // Remap internal SRAM to 0
 126 #define GCR_SWRES     0x0080          // BIU reset (ARM and PAI are NOT reset)
 127 #define GCR_CORES     0x0060          // Core Reset (ARM and PAI are reset)
 128 #define GCR_ENINT     0x0002          // Enable Interrupts
 129 #define GCR_ACKINT    0x0008          // Acknowledge Interrupts
 130
 131 #define BSS_SRAM      0x0200          // AMBA module selection --> SRAM
 132 #define BSS_IRAM      0x0100          // AMBA module selection --> IRAM
 133 //
 134 // Constants for the MR registers.
 135 //
 136 #define MAC_INIT_COMPLETE       0x0001        // MAC init has been completed
 137 #define MAC_BOOT_COMPLETE       0x0010        // MAC boot has been completed
 138 #define MAC_INIT_OK             0x0002        // MAC boot has been completed
 139
 140 #define C80211_SUBTYPE_MGMT_ASS_REQUEST                 0x00
 141 #define C80211_SUBTYPE_MGMT_ASS_RESPONSE                0x10
 142 #define C80211_SUBTYPE_MGMT_REASS_REQUEST               0x20
 143 #define C80211_SUBTYPE_MGMT_REASS_RESPONSE              0x30
 144 #define C80211_SUBTYPE_MGMT_ProbeRequest                0x40
 145 #define C80211_SUBTYPE_MGMT_ProbeResponse               0x50
 146 #define C80211_SUBTYPE_MGMT_BEACON                      0x80
 147 #define C80211_SUBTYPE_MGMT_ATIM                        0x90
 148 #define C80211_SUBTYPE_MGMT_DISASSOSIATION              0xA0
 149 #define C80211_SUBTYPE_MGMT_Authentication              0xB0
 150 #define C80211_SUBTYPE_MGMT_Deauthentication    0xC0
 151
 152 #define C80211_MGMT_AAN_OPENSYSTEM              0x0000
 153 #define C80211_MGMT_AAN_SHAREDKEY               0x0001
 154
 155 #define C80211_MGMT_CAPABILITY_ESS              0x0001  // see 802.11 p.58
 156 #define C80211_MGMT_CAPABILITY_IBSS             0x0002  //      - " -
 157 #define C80211_MGMT_CAPABILITY_CFPollable       0x0004  //      - " -
 158 #define C80211_MGMT_CAPABILITY_CFPollRequest    0x0008  //      - " -
 159 #define C80211_MGMT_CAPABILITY_Privacy          0x0010  //      - " -
 160
 161 #define C80211_MGMT_SC_Success                  0
 162 #define C80211_MGMT_SC_Unspecified              1
 163 #define C80211_MGMT_SC_SupportCapabilities      10
 164 #define C80211_MGMT_SC_ReassDenied              11
 165 #define C80211_MGMT_SC_AssDenied                12
 166 #define C80211_MGMT_SC_AuthAlgNotSupported      13
 167 #define C80211_MGMT_SC_AuthTransSeqNumError     14
 168 #define C80211_MGMT_SC_AuthRejectChallenge      15
 169 #define C80211_MGMT_SC_AuthRejectTimeout        16
 170 #define C80211_MGMT_SC_AssDeniedHandleAP        17
 171 #define C80211_MGMT_SC_AssDeniedBSSRate         18
 172
 173 #define C80211_MGMT_ElementID_SSID              0
 174 #define C80211_MGMT_ElementID_SupportedRates    1
 175 #define C80211_MGMT_ElementID_ChallengeText     16
 176 #define C80211_MGMT_CAPABILITY_ShortPreamble    0x0020
 177
 178 #define MIB_MAX_DATA_BYTES    212
 179 #define MIB_HEADER_SIZE       4    /* first four fields */
 180
 181 struct get_set_mib {
 182         u8 type;
 183         u8 size;
 184         u8 index;
 185         u8 reserved;
 186         u8 data[MIB_MAX_DATA_BYTES];
 187 };
 188
 189 struct rx_desc {
 190         u32          Next;
 191         u16          MsduPos;
 192         u16          MsduSize;
 193
 194         u8           State;
 195         u8           Status;
 196         u8           Rate;
 197         u8           Rssi;
 198         u8           LinkQuality;
 199         u8           PreambleType;
 200         u16          Duration;
 201         u32          RxTime;
 202
 203 };
 204
 205 #define RX_DESC_FLAG_VALID       0x80
 206 #define RX_DESC_FLAG_CONSUMED    0x40
 207 #define RX_DESC_FLAG_IDLE        0x00
 208
 209 #define RX_STATUS_SUCCESS        0x00
 210
 211 #define RX_DESC_MSDU_POS_OFFSET      4
 212 #define RX_DESC_MSDU_SIZE_OFFSET     6
 213 #define RX_DESC_FLAGS_OFFSET         8
 214 #define RX_DESC_STATUS_OFFSET        9
 215 #define RX_DESC_RSSI_OFFSET          11
 216 #define RX_DESC_LINK_QUALITY_OFFSET  12
 217 #define RX_DESC_PREAMBLE_TYPE_OFFSET 13
 218 #define RX_DESC_DURATION_OFFSET      14
 219 #define RX_DESC_RX_TIME_OFFSET       16
 220
 221
 222 struct tx_desc {
 223         u32       NextDescriptor;
 224         u16       TxStartOfFrame;
 225         u16       TxLength;
 226
 227         u8        TxState;
 228         u8        TxStatus;
 229         u8        RetryCount;
 230
 231         u8        TxRate;
 232
 233         u8        KeyIndex;
 234         u8        ChiperType;
 235         u8        ChipreLength;
 236         u8        Reserved1;
 237
 238         u8        Reserved;
 239         u8        PacketType;
 240         u16       HostTxLength;
 241
 242 };
 243
 244
 245 #define TX_DESC_NEXT_OFFSET          0
 246 #define TX_DESC_POS_OFFSET           4
 247 #define TX_DESC_SIZE_OFFSET          6
 248 #define TX_DESC_FLAGS_OFFSET         8
 249 #define TX_DESC_STATUS_OFFSET        9
 250 #define TX_DESC_RETRY_OFFSET         10
 251 #define TX_DESC_RATE_OFFSET          11
 252 #define TX_DESC_KEY_INDEX_OFFSET     12
 253 #define TX_DESC_CIPHER_TYPE_OFFSET   13
 254 #define TX_DESC_CIPHER_LENGTH_OFFSET 14
 255 #define TX_DESC_PACKET_TYPE_OFFSET   17
 256 #define TX_DESC_HOST_LENGTH_OFFSET   18
 257
 258
 259
 260 ///////////////////////////////////////////////////////
 261 // Host-MAC interface
 262 ///////////////////////////////////////////////////////
 263
 264 #define TX_STATUS_SUCCESS       0x00
 265
 266 #define TX_FIRM_OWN             0x80
 267 #define TX_DONE                 0x40
 268
 269
 270 #define TX_ERROR                0x01
 271
 272 #define TX_PACKET_TYPE_DATA     0x01
 273 #define TX_PACKET_TYPE_MGMT     0x02
 274
 275 #define ISR_EMPTY               0x00        // no bits set in ISR
 276 #define ISR_TxCOMPLETE          0x01        // packet transmitted
 277 #define ISR_RxCOMPLETE          0x02        // packet received
 278 #define ISR_RxFRAMELOST         0x04        // Rx Frame lost
 279 #define ISR_FATAL_ERROR         0x08        // Fatal error
 280 #define ISR_COMMAND_COMPLETE    0x10        // command completed
 281 #define ISR_OUT_OF_RANGE        0x20        // command completed
 282 #define ISR_IBSS_MERGE          0x40        // (4.1.2.30): IBSS merge
 283 #define ISR_GENERIC_IRQ         0x80
 284
 285
 286 #define Local_Mib_Type          0x01
 287 #define Mac_Address_Mib_Type    0x02
 288 #define Mac_Mib_Type            0x03
 289 #define Statistics_Mib_Type     0x04
 290 #define Mac_Mgmt_Mib_Type       0x05
 291 #define Mac_Wep_Mib_Type        0x06
 292 #define Phy_Mib_Type            0x07
 293 #define Multi_Domain_MIB        0x08
 294
 295 #define MAC_MGMT_MIB_CUR_BSSID_POS            14
 296 #define MAC_MIB_FRAG_THRESHOLD_POS            8
 297 #define MAC_MIB_RTS_THRESHOLD_POS             10
 298 #define MAC_MIB_SHORT_RETRY_POS               16
 299 #define MAC_MIB_LONG_RETRY_POS                17
 300 #define MAC_MIB_SHORT_RETRY_LIMIT_POS         16
 301 #define MAC_MGMT_MIB_BEACON_PER_POS           0
 302 #define MAC_MGMT_MIB_STATION_ID_POS           6
 303 #define MAC_MGMT_MIB_CUR_PRIVACY_POS          11
 304 #define MAC_MGMT_MIB_CUR_BSSID_POS            14
 305 #define MAC_MGMT_MIB_PS_MODE_POS              53
 306 #define MAC_MGMT_MIB_LISTEN_INTERVAL_POS      54
 307 #define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
 308 #define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED     57
 309 #define PHY_MIB_CHANNEL_POS                   14
 310 #define PHY_MIB_RATE_SET_POS                  20
 311 #define PHY_MIB_REG_DOMAIN_POS                26
 312 #define LOCAL_MIB_AUTO_TX_RATE_POS            3
 313 #define LOCAL_MIB_SSID_SIZE                   5
 314 #define LOCAL_MIB_TX_PROMISCUOUS_POS          6
 315 #define LOCAL_MIB_TX_MGMT_RATE_POS            7
 316 #define LOCAL_MIB_TX_CONTROL_RATE_POS         8
 317 #define LOCAL_MIB_PREAMBLE_TYPE               9
 318 #define MAC_ADDR_MIB_MAC_ADDR_POS             0
 319
 320
 321 #define         CMD_Set_MIB_Vars              0x01
 322 #define         CMD_Get_MIB_Vars              0x02
 323 #define         CMD_Scan                      0x03
 324 #define         CMD_Join                      0x04
 325 #define         CMD_Start                     0x05
 326 #define         CMD_EnableRadio               0x06
 327 #define         CMD_DisableRadio              0x07
 328 #define         CMD_SiteSurvey                0x0B
 329
 330 #define         CMD_STATUS_IDLE                   0x00
 331 #define         CMD_STATUS_COMPLETE               0x01
 332 #define         CMD_STATUS_UNKNOWN                0x02
 333 #define         CMD_STATUS_INVALID_PARAMETER      0x03
 334 #define         CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
 335 #define         CMD_STATUS_TIME_OUT               0x07
 336 #define         CMD_STATUS_IN_PROGRESS            0x08
 337 #define         CMD_STATUS_REJECTED_RADIO_OFF     0x09
 338 #define         CMD_STATUS_HOST_ERROR             0xFF
 339 #define         CMD_STATUS_BUSY                   0xFE
 340
 341
 342 #define CMD_BLOCK_COMMAND_OFFSET        0
 343 #define CMD_BLOCK_STATUS_OFFSET         1
 344 #define CMD_BLOCK_PARAMETERS_OFFSET     4
 345
 346 #define SCAN_OPTIONS_SITE_SURVEY        0x80
 347
 348 #define MGMT_FRAME_BODY_OFFSET          24
 349 #define MAX_AUTHENTICATION_RETRIES      3
 350 #define MAX_ASSOCIATION_RETRIES         3
 351
 352 #define AUTHENTICATION_RESPONSE_TIME_OUT  1000
 353
 354 #define MAX_WIRELESS_BODY  2316 /* mtu is 2312, CRC is 4 */
 355 #define LOOP_RETRY_LIMIT   500000
 356
 357 #define ACTIVE_MODE     1
 358 #define PS_MODE         2
 359
 360 #define MAX_ENCRYPTION_KEYS 4
 361 #define MAX_ENCRYPTION_KEY_SIZE 40
 362
 363 ///////////////////////////////////////////////////////////////////////////
 364 // 802.11 related definitions
 365 ///////////////////////////////////////////////////////////////////////////
 366
 367 //
 368 // Regulatory Domains
 369 //
 370
 371 #define REG_DOMAIN_FCC          0x10    //Channels      1-11    USA
 372 #define REG_DOMAIN_DOC          0x20    //Channel       1-11    Canada
 373 #define REG_DOMAIN_ETSI         0x30    //Channel       1-13    Europe (ex Spain/France)
 374 #define REG_DOMAIN_SPAIN        0x31    //Channel       10-11   Spain
 375 #define REG_DOMAIN_FRANCE       0x32    //Channel       10-13   France
 376 #define REG_DOMAIN_MKK          0x40    //Channel       14      Japan
 377 #define REG_DOMAIN_MKK1         0x41    //Channel       1-14    Japan(MKK1)
 378 #define REG_DOMAIN_ISRAEL       0x50    //Channel       3-9     ISRAEL
 379
 380 #define BSS_TYPE_AD_HOC         1
 381 #define BSS_TYPE_INFRASTRUCTURE 2
 382
 383 #define SCAN_TYPE_ACTIVE        0
 384 #define SCAN_TYPE_PASSIVE       1
 385
 386 #define LONG_PREAMBLE           0
 387 #define SHORT_PREAMBLE          1
 388 #define AUTO_PREAMBLE           2
 389
 390 #define DATA_FRAME_WS_HEADER_SIZE   30
 391
 392 /* promiscuous mode control */
 393 #define PROM_MODE_OFF                   0x0
 394 #define PROM_MODE_UNKNOWN               0x1
 395 #define PROM_MODE_CRC_FAILED            0x2
 396 #define PROM_MODE_DUPLICATED            0x4
 397 #define PROM_MODE_MGMT                  0x8
 398 #define PROM_MODE_CTRL                  0x10
 399 #define PROM_MODE_BAD_PROTOCOL          0x20
 400
 401
 402 #define IFACE_INT_STATUS_OFFSET         0
 403 #define IFACE_INT_MASK_OFFSET           1
 404 #define IFACE_LOCKOUT_HOST_OFFSET       2
 405 #define IFACE_LOCKOUT_MAC_OFFSET        3
 406 #define IFACE_FUNC_CTRL_OFFSET          28
 407 #define IFACE_MAC_STAT_OFFSET           30
 408 #define IFACE_GENERIC_INT_TYPE_OFFSET   32
 409
 410 #define CIPHER_SUITE_NONE     0
 411 #define CIPHER_SUITE_WEP_64   1
 412 #define CIPHER_SUITE_TKIP     2
 413 #define CIPHER_SUITE_AES      3
 414 #define CIPHER_SUITE_CCX      4
 415 #define CIPHER_SUITE_WEP_128  5
 416
 417 //
 418 // IFACE MACROS & definitions
 419 //
 420 //
 421
 422 // FuncCtrl field:
 423 //
 424 #define FUNC_CTRL_TxENABLE              0x10
 425 #define FUNC_CTRL_RxENABLE              0x20
 426 #define FUNC_CTRL_INIT_COMPLETE         0x01
 427
 428 /* A stub firmware image which reads the MAC address from NVRAM on the card.
 429    For copyright information and source see the end of this file. */
 430 static u8 mac_reader[] = {
 431         0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea,
 432         0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea,
 433         0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
 434         0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5,
 435         0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5,
 436         0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1,
 437         0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb,
 438         0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb,
 439         0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5,
 440         0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea,
 441         0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
 442         0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
 443         0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
 444         0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
 445         0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2,
 446         0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3,
 447         0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,
 448         0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5,
 449         0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5,
 450         0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5,
 451         0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3,
 452         0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5,
 453         0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,
 454         0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
 455         0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
 456         0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1,
 457         0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2,
 458         0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb,
 459         0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb,
 460         0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb,
 461         0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3,
 462         0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5,
 463         0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3,
 464         0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a,
 465         0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5,
 466         0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3,
 467         0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3,
 468         0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3,
 469         0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2,
 470         0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb,
 471         0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02,
 472         0x00,0x01,0x00,0x02
 473 };
 474
 475 struct atmel_private {
 476         void *card; /* Bus dependent stucture varies for PCcard */
 477         int (*present_callback)(void *); /* And callback which uses it */
 478         char firmware_id[32];
 479         AtmelFWType firmware_type;
 480         u8 *firmware;
 481         int firmware_length;
 482         struct timer_list management_timer;
 483         struct net_device *dev;
 484         struct device *sys_dev;
 485         struct iw_statistics wstats;
 486         struct net_device_stats stats;  // device stats
 487         spinlock_t irqlock, timerlock;  // spinlocks
 488         enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
 489         enum {
 490                 CARD_TYPE_PARALLEL_FLASH,
 491                 CARD_TYPE_SPI_FLASH,
 492                 CARD_TYPE_EEPROM
 493         } card_type;
 494         int do_rx_crc; /* If we need to CRC incoming packets */
 495         int probe_crc; /* set if we don't yet know */
 496         int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
 497         u16 rx_desc_head;
 498         u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
 499         u16 tx_free_mem, tx_buff_head, tx_buff_tail;
 500
 501         u16 frag_seq, frag_len, frag_no;
 502         u8 frag_source[6];
 503
 504         u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
 505         u8 group_cipher_suite, pairwise_cipher_suite;
 506         u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
 507         int wep_key_len[MAX_ENCRYPTION_KEYS];
 508         int use_wpa, radio_on_broken; /* firmware dependent stuff. */
 509
 510         u16 host_info_base;
 511         struct host_info_struct {
 512                 /* NB this is matched to the hardware, don't change. */
 513                 u8 volatile int_status;
 514                 u8 volatile int_mask;
 515                 u8 volatile lockout_host;
 516                 u8 volatile lockout_mac;
 517
 518                 u16 tx_buff_pos;
 519                 u16 tx_buff_size;
 520                 u16 tx_desc_pos;
 521                 u16 tx_desc_count;
 522
 523                 u16 rx_buff_pos;
 524                 u16 rx_buff_size;
 525                 u16 rx_desc_pos;
 526                 u16 rx_desc_count;
 527
 528                 u16 build_version;
 529                 u16 command_pos;
 530
 531                 u16 major_version;
 532                 u16 minor_version;
 533
 534                 u16 func_ctrl;
 535                 u16 mac_status;
 536                 u16 generic_IRQ_type;
 537                 u8  reserved[2];
 538         } host_info;
 539
 540         enum {
 541                 STATION_STATE_SCANNING,
 542                 STATION_STATE_JOINNING,
 543                 STATION_STATE_AUTHENTICATING,
 544                 STATION_STATE_ASSOCIATING,
 545                 STATION_STATE_READY,
 546                 STATION_STATE_REASSOCIATING,
 547                 STATION_STATE_DOWN,
 548                 STATION_STATE_MGMT_ERROR
 549         } station_state;
 550
 551         int operating_mode, power_mode;
 552         time_t last_qual;
 553         int beacons_this_sec;
 554         int channel;
 555         int reg_domain, config_reg_domain;
 556         int tx_rate;
 557         int auto_tx_rate;
 558         int rts_threshold;
 559         int frag_threshold;
 560         int long_retry, short_retry;
 561         int preamble;
 562         int default_beacon_period, beacon_period, listen_interval;
 563         int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
 564         int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
 565         enum {
 566                 SITE_SURVEY_IDLE,
 567                 SITE_SURVEY_IN_PROGRESS,
 568                 SITE_SURVEY_COMPLETED
 569         } site_survey_state;
 570         time_t last_survey;
 571
 572         int station_was_associated, station_is_associated;
 573         int fast_scan;
 574
 575         struct bss_info {
 576                 int channel;
 577                 int SSIDsize;
 578                 int RSSI;
 579                 int UsingWEP;
 580                 int preamble;
 581                 int beacon_period;
 582                 int BSStype;
 583                 u8 BSSID[6];
 584                 u8 SSID[MAX_SSID_LENGTH];
 585         } BSSinfo[MAX_BSS_ENTRIES];
 586         int BSS_list_entries, current_BSS;
 587         int connect_to_any_BSS;
 588         int SSID_size, new_SSID_size;
 589         u8 CurrentBSSID[6], BSSID[6];
 590         u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
 591         u64 last_beacon_timestamp;
 592         u8 rx_buf[MAX_WIRELESS_BODY];
 593
 594 };
 595
 596 static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16};
 597
 598 static const struct {
 599         int reg_domain;
 600         int min, max;
 601         char *name;
 602 } channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
 603                       { REG_DOMAIN_DOC, 1, 11, "Canada" },
 604                       { REG_DOMAIN_ETSI, 1, 13, "Europe" },
 605                       { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
 606                       { REG_DOMAIN_FRANCE, 10, 13, "France" },
 607                       { REG_DOMAIN_MKK, 14, 14, "MKK" },
 608                       { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
 609                       { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
 610
 611 static void build_wpa_mib(struct atmel_private *priv);
 612 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 613 static void atmel_copy_to_card(struct net_device *dev, u16 dest, unsigned char *src, u16 len);
 614 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest, u16 src, u16 len);
 615 static void atmel_set_gcr(struct net_device *dev, u16 mask);
 616 static void atmel_clear_gcr(struct net_device *dev, u16 mask);
 617 static int atmel_lock_mac(struct atmel_private *priv);
 618 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
 619 static void atmel_command_irq(struct atmel_private *priv);
 620 static int atmel_validate_channel(struct atmel_private *priv, int channel);
 621 static void atmel_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header,
 622                                    u16 frame_len, u8 rssi);
 623 static void atmel_management_timer(u_long a);
 624 static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size);
 625 static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size);
 626 static void atmel_transmit_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header,
 627                                             u8 *body, int body_len);
 628
 629 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
 630 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data);
 631 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index, u16 data);
 632 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len);
 633 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len);
 634 static void atmel_scan(struct atmel_private *priv, int specific_ssid);
 635 static void atmel_join_bss(struct atmel_private *priv, int bss_index);
 636 static void atmel_smooth_qual(struct atmel_private *priv);
 637 static void atmel_writeAR(struct net_device *dev, u16 data);
 638 static int probe_atmel_card(struct net_device *dev);
 639 static int reset_atmel_card(struct net_device *dev );
 640 static void atmel_enter_state(struct atmel_private *priv, int new_state);
 641 int atmel_open (struct net_device *dev);
 642
 643 static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
 644 {
 645         return priv->host_info_base + offset;
 646 }
 647
 648 static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
 649 {
 650         return priv->host_info.command_pos + offset;
 651 }
 652
 653 static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16  desc)
 654 {
 655         return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
 656 }
 657
 658 static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16  desc)
 659 {
 660         return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
 661 }
 662
 663 static inline u8 atmel_read8(struct net_device *dev, u16 offset)
 664 {
 665         return inb(dev->base_addr + offset);
 666 }
 667
 668 static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
 669 {
 670         outb(data, dev->base_addr + offset);
 671 }
 672
 673 static inline u16 atmel_read16(struct net_device *dev, u16 offset)
 674 {
 675         return inw(dev->base_addr + offset);
 676 }
 677
 678 static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
 679 {
 680         outw(data, dev->base_addr + offset);
 681 }
 682
 683 static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
 684 {
 685         atmel_writeAR(priv->dev, pos);
 686         return atmel_read8(priv->dev, DR);
 687 }
 688
 689 static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
 690 {
 691         atmel_writeAR(priv->dev, pos);
 692         atmel_write8(priv->dev, DR, data);
 693 }
 694
 695 static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
 696 {
 697         atmel_writeAR(priv->dev, pos);
 698         return atmel_read16(priv->dev, DR);
 699 }
 700
 701 static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
 702 {
 703         atmel_writeAR(priv->dev, pos);
 704         atmel_write16(priv->dev, DR, data);
 705 }
 706
 707 static const struct iw_handler_def atmel_handler_def;
 708
 709 static void tx_done_irq(struct atmel_private *priv)
 710 {
 711         int i;
 712
 713         for (i = 0;
 714              atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
 715                      i < priv->host_info.tx_desc_count;
 716              i++) {
 717
 718                 u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
 719                 u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
 720                 u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
 721
 722                 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
 723
 724                 priv->tx_free_mem += msdu_size;
 725                 priv->tx_desc_free++;
 726
 727                 if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
 728                         priv->tx_buff_head = 0;
 729                 else
 730                         priv->tx_buff_head += msdu_size;
 731
 732                 if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
 733                         priv->tx_desc_head++ ;
 734                 else
 735                         priv->tx_desc_head = 0;
 736
 737                 if (type == TX_PACKET_TYPE_DATA) {
 738                         if (status == TX_STATUS_SUCCESS)
 739                                 priv->stats.tx_packets++;
 740                         else
 741                                 priv->stats.tx_errors++;
 742                         netif_wake_queue(priv->dev);
 743                 }
 744         }
 745 }
 746
 747 static u16 find_tx_buff(struct atmel_private *priv, u16 len)
 748 {
 749         u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
 750
 751         if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
 752                 return 0;
 753
 754         if (bottom_free >= len)
 755                 return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
 756
 757         if (priv->tx_free_mem - bottom_free >= len) {
 758                 priv->tx_buff_tail = 0;
 759                 return priv->host_info.tx_buff_pos;
 760         }
 761
 762         return 0;
 763 }
 764
 765 static void tx_update_descriptor(struct atmel_private *priv, int is_bcast, u16 len, u16 buff, u8 type)
 766 {
 767         atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
 768         atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
 769         if (!priv->use_wpa)
 770                 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
 771         atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
 772         atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
 773         atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
 774         if (priv->use_wpa) {
 775                 int cipher_type, cipher_length;
 776                 if (is_bcast) {
 777                         cipher_type = priv->group_cipher_suite;
 778                         if (cipher_type == CIPHER_SUITE_WEP_64 ||
 779                             cipher_type == CIPHER_SUITE_WEP_128 )
 780                                 cipher_length = 8;
 781                         else if (cipher_type == CIPHER_SUITE_TKIP)
 782                                 cipher_length = 12;
 783                         else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
 784                                  priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
 785                                 cipher_type = priv->pairwise_cipher_suite;
 786                                 cipher_length = 8;
 787                         } else {
 788                                 cipher_type = CIPHER_SUITE_NONE;
 789                                 cipher_length = 0;
 790                         }
 791                 } else {
 792                         cipher_type = priv->pairwise_cipher_suite;
 793                         if (cipher_type == CIPHER_SUITE_WEP_64 ||
 794                             cipher_type == CIPHER_SUITE_WEP_128 )
 795                                 cipher_length = 8;
 796                         else if (cipher_type == CIPHER_SUITE_TKIP)
 797                                 cipher_length = 12;
 798                         else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
 799                                  priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
 800                                 cipher_type = priv->group_cipher_suite;
 801                                 cipher_length = 8;
 802                         } else {
 803                                 cipher_type = CIPHER_SUITE_NONE;
 804                                 cipher_length = 0;
 805                         }
 806                 }
 807
 808                 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
 809                             cipher_type);
 810                 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
 811                             cipher_length);
 812         }
 813         atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
 814         atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
 815         if (priv->tx_desc_previous != priv->tx_desc_tail)
 816                 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
 817         priv->tx_desc_previous = priv->tx_desc_tail;
 818         if (priv->tx_desc_tail < (priv->host_info.tx_desc_count -1 ))
 819                 priv->tx_desc_tail++;
 820         else
 821                 priv->tx_desc_tail = 0;
 822         priv->tx_desc_free--;
 823         priv->tx_free_mem -= len;
 824
 825 }
 826
 827 static int start_tx (struct sk_buff *skb, struct net_device *dev)
 828 {
 829         struct atmel_private *priv = netdev_priv(dev);
 830         struct ieee802_11_hdr header;
 831         unsigned long flags;
 832         u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
 833         u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
 834
 835         if (priv->card && priv->present_callback &&
 836             !(*priv->present_callback)(priv->card)) {
 837                 priv->stats.tx_errors++;
 838                 dev_kfree_skb(skb);
 839                 return 0;
 840         }
 841
 842         if (priv->station_state != STATION_STATE_READY) {
 843                 priv->stats.tx_errors++;
 844                 dev_kfree_skb(skb);
 845                 return 0;
 846         }
 847
 848         /* first ensure the timer func cannot run */
 849         spin_lock_bh(&priv->timerlock);
 850         /* then stop the hardware ISR */
 851         spin_lock_irqsave(&priv->irqlock, flags);
 852         /* nb doing the above in the opposite order will deadlock */
 853
 854         /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
 855            12 first bytes (containing DA/SA) and put them in the appropriate fields of
 856            the Wireless Header. Thus the packet length is then the initial + 18 (+30-12) */
 857
 858         if (!(buff = find_tx_buff(priv, len + 18))) {
 859                 priv->stats.tx_dropped++;
 860                 spin_unlock_irqrestore(&priv->irqlock, flags);
 861                 spin_unlock_bh(&priv->timerlock);
 862                 netif_stop_queue(dev);
 863                 return 1;
 864         }
 865
 866         frame_ctl = IEEE802_11_FTYPE_DATA;
 867         header.duration_id = 0;
 868         header.seq_ctl = 0;
 869         if (priv->wep_is_on)
 870                 frame_ctl |= IEEE802_11_FCTL_WEP;
 871         if (priv->operating_mode == IW_MODE_ADHOC) {
 872                 memcpy(&header.addr1, skb->data, 6);
 873                 memcpy(&header.addr2, dev->dev_addr, 6);
 874                 memcpy(&header.addr3, priv->BSSID, 6);
 875         } else {
 876                 frame_ctl |= IEEE802_11_FCTL_TODS;
 877                 memcpy(&header.addr1, priv->CurrentBSSID, 6);
 878                 memcpy(&header.addr2, dev->dev_addr, 6);
 879                 memcpy(&header.addr3, skb->data, 6);
 880         }
 881
 882         if (priv->use_wpa)
 883                 memcpy(&header.addr4, SNAP_RFC1024, 6);
 884
 885         header.frame_ctl = cpu_to_le16(frame_ctl);
 886         /* Copy the wireless header into the card */
 887         atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
 888         /* Copy the packet sans its 802.3 header addresses which have been replaced */
 889         atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
 890         priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
 891
 892         /* low bit of first byte of destination tells us if broadcast */
 893         tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
 894         dev->trans_start = jiffies;
 895         priv->stats.tx_bytes += len;
 896
 897         spin_unlock_irqrestore(&priv->irqlock, flags);
 898         spin_unlock_bh(&priv->timerlock);
 899         dev_kfree_skb(skb);
 900
 901         return 0;
 902 }
 903
 904 static void atmel_transmit_management_frame(struct atmel_private *priv,
 905                                             struct ieee802_11_hdr *header,
 906                                             u8 *body, int body_len)
 907 {
 908         u16 buff;
 909         int len =  MGMT_FRAME_BODY_OFFSET + body_len;
 910
 911         if (!(buff = find_tx_buff(priv, len)))
 912                 return;
 913
 914         atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
 915         atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
 916         priv->tx_buff_tail += len;
 917         tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
 918 }
 919
 920 static void fast_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *header,
 921                          u16 msdu_size, u16 rx_packet_loc, u32 crc)
 922 {
 923         /* fast path: unfragmented packet copy directly into skbuf */
 924         u8 mac4[6];
 925         struct sk_buff  *skb;
 926         unsigned char *skbp;
 927
 928         /* get the final, mac 4 header field, this tells us encapsulation */
 929         atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
 930         msdu_size -= 6;
 931
 932         if (priv->do_rx_crc) {
 933                 crc = crc32_le(crc, mac4, 6);
 934                 msdu_size -= 4;
 935         }
 936
 937         if (!(skb = dev_alloc_skb(msdu_size + 14))) {
 938                 priv->stats.rx_dropped++;
 939                 return;
 940         }
 941
 942         skb_reserve(skb, 2);
 943         skbp = skb_put(skb, msdu_size + 12);
 944         atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
 945
 946         if (priv->do_rx_crc) {
 947                 u32 netcrc;
 948                 crc = crc32_le(crc, skbp + 12, msdu_size);
 949                 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
 950                 if ((crc ^ 0xffffffff) != netcrc) {
 951                         priv->stats.rx_crc_errors++;
 952                         dev_kfree_skb(skb);
 953                         return;
 954                 }
 955         }
 956
 957         memcpy(skbp, header->addr1, 6); /* destination address */
 958         if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS)
 959                 memcpy(&skbp[6], header->addr3, 6);
 960         else
 961                 memcpy(&skbp[6], header->addr2, 6); /* source address */
 962
 963         priv->dev->last_rx=jiffies;
 964         skb->dev = priv->dev;
 965         skb->protocol = eth_type_trans(skb, priv->dev);
 966         skb->ip_summed = CHECKSUM_NONE;
 967         netif_rx(skb);
 968         priv->stats.rx_bytes += 12 + msdu_size;
 969         priv->stats.rx_packets++;
 970 }
 971
 972 /* Test to see if the packet in card memory at packet_loc has a valid CRC
 973    It doesn't matter that this is slow: it is only used to proble the first few packets. */
 974 static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
 975 {
 976         int i = msdu_size - 4;
 977         u32 netcrc, crc = 0xffffffff;
 978
 979         if (msdu_size < 4)
 980                 return 0;
 981
 982         atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
 983
 984         atmel_writeAR(priv->dev, packet_loc);
 985         while (i--) {
 986                 u8 octet = atmel_read8(priv->dev, DR);
 987                 crc = crc32_le(crc, &octet, 1);
 988         }
 989
 990         return (crc ^ 0xffffffff) == netcrc;
 991 }
 992
 993 static void frag_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *header,
 994                          u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no, u8 frag_no, int more_frags)
 995 {
 996         u8 mac4[6];
 997         u8 source[6];
 998         struct sk_buff *skb;
 999
1000         if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS)
1001                 memcpy(source, header->addr3, 6);
1002         else
1003                 memcpy(source, header->addr2, 6);
1004
1005         rx_packet_loc += 24; /* skip header */
1006
1007         if (priv->do_rx_crc)
1008                 msdu_size -= 4;
1009
1010         if (frag_no == 0) { /* first fragment */
1011                 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6);
1012                 msdu_size -= 6;
1013                 rx_packet_loc += 6;
1014
1015                 if (priv->do_rx_crc)
1016                         crc = crc32_le(crc, mac4, 6);
1017
1018                 priv->frag_seq = seq_no;
1019                 priv->frag_no = 1;
1020                 priv->frag_len = msdu_size;
1021                 memcpy(priv->frag_source, source, 6);
1022                 memcpy(&priv->rx_buf[6], source, 6);
1023                 memcpy(priv->rx_buf, header->addr1, 6);
1024
1025                 atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
1026
1027                 if (priv->do_rx_crc) {
1028                         u32 netcrc;
1029                         crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
1030                         atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1031                         if ((crc ^ 0xffffffff) != netcrc) {
1032                                 priv->stats.rx_crc_errors++;
1033                                 memset(priv->frag_source, 0xff, 6);
1034                         }
1035                 }
1036
1037         } else if (priv->frag_no == frag_no &&
1038                    priv->frag_seq == seq_no &&
1039                    memcmp(priv->frag_source, source, 6) == 0) {
1040
1041                 atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1042                                    rx_packet_loc, msdu_size);
1043                 if (priv->do_rx_crc) {
1044                         u32 netcrc;
1045                         crc = crc32_le(crc,
1046                                        &priv->rx_buf[12 + priv->frag_len],
1047                                        msdu_size);
1048                         atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1049                         if ((crc ^ 0xffffffff) != netcrc) {
1050                                 priv->stats.rx_crc_errors++;
1051                                 memset(priv->frag_source, 0xff, 6);
1052                                 more_frags = 1; /* don't send broken assembly */
1053                         }
1054                 }
1055
1056                 priv->frag_len += msdu_size;
1057                 priv->frag_no++;
1058
1059                 if (!more_frags) { /* last one */
1060                         memset(priv->frag_source, 0xff, 6);
1061                         if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
1062                                 priv->stats.rx_dropped++;
1063                         } else {
1064                                 skb_reserve(skb, 2);
1065                                 memcpy(skb_put(skb, priv->frag_len + 12),
1066                                        priv->rx_buf,
1067                                        priv->frag_len + 12);
1068                                 priv->dev->last_rx = jiffies;
1069                                 skb->dev = priv->dev;
1070                                 skb->protocol = eth_type_trans(skb, priv->dev);
1071                                 skb->ip_summed = CHECKSUM_NONE;
1072                                 netif_rx(skb);
1073                                 priv->stats.rx_bytes += priv->frag_len + 12;
1074                                 priv->stats.rx_packets++;
1075                         }
1076                 }
1077
1078         } else
1079                 priv->wstats.discard.fragment++;
1080 }
1081
1082 static void rx_done_irq(struct atmel_private *priv)
1083 {
1084         int i;
1085         struct ieee802_11_hdr header;
1086
1087         for (i = 0;
1088              atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1089                      i < priv->host_info.rx_desc_count;
1090              i++) {
1091
1092                 u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1093                 u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1094                 u32 crc = 0xffffffff;
1095
1096                 if (status != RX_STATUS_SUCCESS) {
1097                         if (status == 0xc1) /* determined by experiment */
1098                                 priv->wstats.discard.nwid++;
1099                         else
1100                                 priv->stats.rx_errors++;
1101                         goto next;
1102                 }
1103
1104                 msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1105                 rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
1106
1107                 if (msdu_size < 30) {
1108                         priv->stats.rx_errors++;
1109                         goto next;
1110                 }
1111
1112                 /* Get header as far as end of seq_ctl */
1113                 atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1114                 frame_ctl = le16_to_cpu(header.frame_ctl);
1115                 seq_control = le16_to_cpu(header.seq_ctl);
1116
1117                 /* probe for CRC use here if needed  once five packets have arrived with
1118                    the same crc status, we assume we know what's happening and stop probing */
1119                 if (priv->probe_crc) {
1120                         if (!priv->wep_is_on || !(frame_ctl & IEEE802_11_FCTL_WEP)) {
1121                                 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1122                         } else {
1123                                 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1124                         }
1125                         if (priv->do_rx_crc) {
1126                                 if (priv->crc_ok_cnt++ > 5)
1127                                         priv->probe_crc = 0;
1128                         } else {
1129                                 if (priv->crc_ko_cnt++ > 5)
1130                                         priv->probe_crc = 0;
1131                         }
1132                 }
1133
1134                 /* don't CRC header when WEP in use */
1135                 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE802_11_FCTL_WEP))) {
1136                         crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1137                 }
1138                 msdu_size -= 24; /* header */
1139
1140                 if ((frame_ctl & IEEE802_11_FCTL_FTYPE) == IEEE802_11_FTYPE_DATA) {
1141
1142                         int more_fragments = frame_ctl & IEEE802_11_FCTL_MOREFRAGS;
1143                         u8 packet_fragment_no = seq_control & IEEE802_11_SCTL_FRAG;
1144                         u16 packet_sequence_no = (seq_control & IEEE802_11_SCTL_SEQ) >> 4;
1145
1146                         if (!more_fragments && packet_fragment_no == 0 ) {
1147                                 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1148                         } else {
1149                                 frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1150                                              packet_sequence_no, packet_fragment_no, more_fragments);
1151                         }
1152                 }
1153
1154                 if ((frame_ctl & IEEE802_11_FCTL_FTYPE) == IEEE802_11_FTYPE_MGMT) {
1155                         /* copy rest of packet into buffer */
1156                         atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
1157
1158                         /* we use the same buffer for frag reassembly and control packets */
1159                         memset(priv->frag_source, 0xff, 6);
1160
1161                         if (priv->do_rx_crc) {
1162                                 /* last 4 octets is crc */
1163                                 msdu_size -= 4;
1164                                 crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1165                                 if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
1166                                         priv->stats.rx_crc_errors++;
1167                                         goto next;
1168                                 }
1169                         }
1170
1171                         atmel_management_frame(priv, &header, msdu_size,
1172                                                atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
1173                 }
1174
1175         next:
1176                 /* release descriptor */
1177                 atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1178
1179                 if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
1180                         priv->rx_desc_head++;
1181                 else
1182                         priv->rx_desc_head = 0;
1183         }
1184 }
1185
1186 static irqreturn_t service_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1187 {
1188         struct net_device *dev = (struct net_device *) dev_id;
1189         struct atmel_private *priv = netdev_priv(dev);
1190         u8 isr;
1191         int i = -1;
1192         static u8 irq_order[] = {
1193                 ISR_OUT_OF_RANGE,
1194                 ISR_RxCOMPLETE,
1195                 ISR_TxCOMPLETE,
1196                 ISR_RxFRAMELOST,
1197                 ISR_FATAL_ERROR,
1198                 ISR_COMMAND_COMPLETE,
1199                 ISR_IBSS_MERGE,
1200                 ISR_GENERIC_IRQ
1201         };
1202
1203
1204         if (priv->card && priv->present_callback &&
1205             !(*priv->present_callback)(priv->card))
1206                 return IRQ_HANDLED;
1207
1208         /* In this state upper-level code assumes it can mess with
1209            the card unhampered by interrupts which may change register state.
1210            Note that even though the card shouldn't generate interrupts
1211            the inturrupt line may be shared. This allows card setup
1212            to go on without disabling interrupts for a long time. */
1213         if (priv->station_state == STATION_STATE_DOWN)
1214                 return IRQ_NONE;
1215
1216         atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1217
1218         while (1) {
1219                 if (!atmel_lock_mac(priv)) {
1220                         /* failed to contact card */
1221                         printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1222                         return IRQ_HANDLED;
1223                 }
1224
1225                 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1226                 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1227
1228                 if (!isr) {
1229                         atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1230                         return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1231                 }
1232
1233                 atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
1234
1235                 for (i = 0; i < sizeof(irq_order)/sizeof(u8); i++)
1236                         if (isr & irq_order[i])
1237                                 break;
1238
1239                 if (!atmel_lock_mac(priv)) {
1240                         /* failed to contact card */
1241                         printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1242                         return IRQ_HANDLED;
1243                 }
1244
1245                 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1246                 isr ^= irq_order[i];
1247                 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1248                 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1249
1250                 switch (irq_order[i]) {
1251
1252                 case ISR_OUT_OF_RANGE:
1253                         if (priv->operating_mode == IW_MODE_INFRA &&
1254                             priv->station_state == STATION_STATE_READY) {
1255                                 priv->station_is_associated = 0;
1256                                 atmel_scan(priv, 1);
1257                         }
1258                         break;
1259
1260                 case ISR_RxFRAMELOST:
1261                         priv->wstats.discard.misc++;
1262                         /* fall through */
1263                 case ISR_RxCOMPLETE:
1264                         rx_done_irq(priv);
1265                         break;
1266
1267                 case ISR_TxCOMPLETE:
1268                         tx_done_irq(priv);
1269                         break;
1270
1271                 case ISR_FATAL_ERROR:
1272                         printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1273                         atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1274                         break;
1275
1276                 case ISR_COMMAND_COMPLETE:
1277                         atmel_command_irq(priv);
1278                         break;
1279
1280                 case ISR_IBSS_MERGE:
1281                         atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1282                                       priv->CurrentBSSID, 6);
1283                         /* The WPA stuff cares about the current AP address */
1284                         if (priv->use_wpa)
1285                                 build_wpa_mib(priv);
1286                         break;
1287                 case ISR_GENERIC_IRQ:
1288                         printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1289                         break;
1290                 }
1291         }
1292 }
1293
1294
1295 static struct net_device_stats *atmel_get_stats (struct net_device *dev)
1296 {
1297         struct atmel_private *priv = netdev_priv(dev);
1298         return &priv->stats;
1299 }
1300
1301 static struct iw_statistics *atmel_get_wireless_stats (struct net_device *dev)
1302 {
1303         struct atmel_private *priv = netdev_priv(dev);
1304
1305         /* update the link quality here in case we are seeing no beacons
1306            at all to drive the process */
1307         atmel_smooth_qual(priv);
1308
1309         priv->wstats.status = priv->station_state;
1310
1311         if (priv->operating_mode == IW_MODE_INFRA) {
1312                 if (priv->station_state != STATION_STATE_READY) {
1313                         priv->wstats.qual.qual = 0;
1314                         priv->wstats.qual.level = 0;
1315                         priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1316                                         | IW_QUAL_LEVEL_INVALID);
1317                 }
1318                 priv->wstats.qual.noise = 0;
1319                 priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1320         } else {
1321                 /* Quality levels cannot be determined in ad-hoc mode,
1322                    because we can 'hear' more that one remote station. */
1323                 priv->wstats.qual.qual = 0;
1324                 priv->wstats.qual.level = 0;
1325                 priv->wstats.qual.noise = 0;
1326                 priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1327                                         | IW_QUAL_LEVEL_INVALID
1328                                         | IW_QUAL_NOISE_INVALID;
1329                 priv->wstats.miss.beacon = 0;
1330         }
1331
1332         return (&priv->wstats);
1333 }
1334
1335 static int atmel_change_mtu(struct net_device *dev, int new_mtu)
1336 {
1337         if ((new_mtu < 68) || (new_mtu > 2312))
1338                 return -EINVAL;
1339         dev->mtu = new_mtu;
1340         return 0;
1341 }
1342
1343 static int atmel_set_mac_address(struct net_device *dev, void *p)
1344 {
1345         struct sockaddr *addr = p;
1346
1347         memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1348         return atmel_open(dev);
1349 }
1350
1351 EXPORT_SYMBOL(atmel_open);
1352
1353 int atmel_open (struct net_device *dev)
1354 {
1355         struct atmel_private *priv = netdev_priv(dev);
1356         int i, channel;
1357
1358         /* any scheduled timer is no longer needed and might screw things up.. */
1359         del_timer_sync(&priv->management_timer);
1360
1361         /* Interrupts will not touch the card once in this state... */
1362         priv->station_state = STATION_STATE_DOWN;
1363
1364         if (priv->new_SSID_size) {
1365                 memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1366                 priv->SSID_size = priv->new_SSID_size;
1367                 priv->new_SSID_size = 0;
1368         }
1369         priv->BSS_list_entries = 0;
1370
1371         priv->AuthenticationRequestRetryCnt = 0;
1372         priv->AssociationRequestRetryCnt = 0;
1373         priv->ReAssociationRequestRetryCnt = 0;
1374         priv->CurrentAuthentTransactionSeqNum = 0x0001;
1375         priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1376
1377         priv->site_survey_state = SITE_SURVEY_IDLE;
1378         priv->station_is_associated = 0;
1379
1380         if (!reset_atmel_card(dev))
1381                 return -EAGAIN;
1382
1383         if (priv->config_reg_domain) {
1384                 priv->reg_domain = priv->config_reg_domain;
1385                 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1386         } else {
1387                 priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
1388                 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1389                         if (priv->reg_domain == channel_table[i].reg_domain)
1390                                 break;
1391                 if (i == sizeof(channel_table)/sizeof(channel_table[0])) {
1392                         priv->reg_domain = REG_DOMAIN_MKK1;
1393                         printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
1394                 }
1395         }
1396
1397         if ((channel = atmel_validate_channel(priv, priv->channel)))
1398                 priv->channel = channel;
1399
1400         /* this moves station_state on.... */
1401         atmel_scan(priv, 1);
1402
1403         atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1404         return 0;
1405 }
1406
1407 static int atmel_close (struct net_device *dev)
1408 {
1409         struct atmel_private *priv = netdev_priv(dev);
1410
1411         atmel_enter_state(priv, STATION_STATE_DOWN);
1412
1413         if (priv->bus_type == BUS_TYPE_PCCARD)
1414                 atmel_write16(dev, GCR, 0x0060);
1415         atmel_write16(dev, GCR, 0x0040);
1416         return 0;
1417 }
1418
1419 static int atmel_validate_channel(struct atmel_private *priv, int channel)
1420 {
1421         /* check that channel is OK, if so return zero,
1422            else return suitable default channel */
1423         int i;
1424
1425         for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1426                 if (priv->reg_domain == channel_table[i].reg_domain) {
1427                         if (channel >= channel_table[i].min &&
1428                             channel <= channel_table[i].max)
1429                                 return 0;
1430                         else
1431                                 return channel_table[i].min;
1432                 }
1433         return 0;
1434 }
1435
1436 static int atmel_proc_output (char *buf, struct atmel_private *priv)
1437 {
1438         int i;
1439         char *p = buf;
1440         char *s, *r, *c;
1441
1442         p += sprintf(p, "Driver version:\t\t%d.%d\n", DRIVER_MAJOR, DRIVER_MINOR);
1443
1444         if (priv->station_state != STATION_STATE_DOWN) {
1445                 p += sprintf(p, "Firmware version:\t%d.%d build %d\nFirmware location:\t",
1446                              priv->host_info.major_version,
1447                              priv->host_info.minor_version,
1448                              priv->host_info.build_version);
1449
1450                 if (priv->card_type != CARD_TYPE_EEPROM)
1451                         p += sprintf(p, "on card\n");
1452                 else if (priv->firmware)
1453                         p += sprintf(p, "%s loaded by host\n", priv->firmware_id);
1454                 else
1455                         p += sprintf(p, "%s loaded by hotplug\n", priv->firmware_id);
1456
1457                 switch(priv->card_type) {
1458                 case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
1459                 case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
1460                 case CARD_TYPE_EEPROM: c = "EEPROM"; break;
1461                 default: c = "<unknown>";
1462                 }
1463
1464
1465                 r = "<unknown>";
1466                 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1467                         if (priv->reg_domain == channel_table[i].reg_domain)
1468                                 r = channel_table[i].name;
1469
1470                 p += sprintf(p, "MAC memory type:\t%s\n", c);
1471                 p += sprintf(p, "Regulatory domain:\t%s\n", r);
1472                 p += sprintf(p, "Host CRC checking:\t%s\n",
1473                              priv->do_rx_crc ? "On" : "Off");
1474                 p += sprintf(p, "WPA-capable firmware:\t%s\n",
1475                              priv->use_wpa ? "Yes" : "No");
1476         }
1477
1478         switch(priv->station_state) {
1479         case STATION_STATE_SCANNING: s = "Scanning"; break;
1480         case STATION_STATE_JOINNING: s = "Joining"; break;
1481         case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
1482         case STATION_STATE_ASSOCIATING: s = "Associating"; break;
1483         case STATION_STATE_READY: s = "Ready"; break;
1484         case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
1485         case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
1486         case STATION_STATE_DOWN: s = "Down"; break;
1487         default: s = "<unknown>";
1488         }
1489
1490         p += sprintf(p, "Current state:\t\t%s\n", s);
1491         return  p - buf;
1492 }
1493
1494 static int atmel_read_proc(char *page, char **start, off_t off,
1495                            int count, int *eof, void *data)
1496 {
1497         struct atmel_private *priv = data;
1498         int len = atmel_proc_output (page, priv);
1499         if (len <= off+count) *eof = 1;
1500         *start = page + off;
1501         len -= off;
1502         if (len>count) len = count;
1503         if (len<0) len = 0;
1504         return len;
1505 }
1506
1507 struct net_device *init_atmel_card( unsigned short irq, int port, const AtmelFWType fw_type,
1508                                     struct device *sys_dev, int (*card_present)(void *), void *card)
1509 {
1510         struct net_device *dev;
1511         struct atmel_private *priv;
1512         int rc;
1513
1514         /* Create the network device object. */
1515         dev = alloc_etherdev(sizeof(*priv));
1516         if (!dev) {
1517                 printk(KERN_ERR "atmel:  Couldn't alloc_etherdev\n");
1518                 return NULL;
1519         }
1520         if (dev_alloc_name(dev, dev->name) < 0) {
1521                 printk(KERN_ERR "atmel:  Couldn't get name!\n");
1522                 goto err_out_free;
1523         }
1524
1525         priv = netdev_priv(dev);
1526         priv->dev = dev;
1527         priv->sys_dev = sys_dev;
1528         priv->present_callback = card_present;
1529         priv->card = card;
1530         priv->firmware = NULL;
1531         priv->firmware_id[0] = '\0';
1532         priv->firmware_type = fw_type;
1533         if (firmware) /* module parameter */
1534                 strcpy(priv->firmware_id, firmware);
1535         priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1536         priv->station_state = STATION_STATE_DOWN;
1537         priv->do_rx_crc = 0;
1538         /* For PCMCIA cards, some chips need CRC, some don't
1539            so we have to probe. */
1540         if (priv->bus_type == BUS_TYPE_PCCARD) {
1541                 priv->probe_crc = 1;
1542                 priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1543         } else
1544                 priv->probe_crc = 0;
1545         memset(&priv->stats, 0, sizeof(priv->stats));
1546         memset(&priv->wstats, 0, sizeof(priv->wstats));
1547         priv->last_qual = jiffies;
1548         priv->last_beacon_timestamp = 0;
1549         memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1550         memset(priv->BSSID, 0, 6);
1551         priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1552         priv->station_was_associated = 0;
1553
1554         priv->last_survey = jiffies;
1555         priv->preamble = LONG_PREAMBLE;
1556         priv->operating_mode = IW_MODE_INFRA;
1557         priv->connect_to_any_BSS = 0;
1558         priv->config_reg_domain = 0;
1559         priv->reg_domain = 0;
1560         priv->tx_rate = 3;
1561         priv->auto_tx_rate = 1;
1562         priv->channel = 4;
1563         priv->power_mode = 0;
1564         priv->SSID[0] = '\0';
1565         priv->SSID_size = 0;
1566         priv->new_SSID_size = 0;
1567         priv->frag_threshold = 2346;
1568         priv->rts_threshold = 2347;
1569         priv->short_retry = 7;
1570         priv->long_retry = 4;
1571
1572         priv->wep_is_on = 0;
1573         priv->default_key = 0;
1574         priv->encryption_level = 0;
1575         priv->exclude_unencrypted = 0;
1576         priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1577         priv->use_wpa = 0;
1578         memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1579         memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1580
1581         priv->default_beacon_period = priv->beacon_period = 100;
1582         priv->listen_interval = 1;
1583
1584         init_timer(&priv->management_timer);
1585         spin_lock_init(&priv->irqlock);
1586         spin_lock_init(&priv->timerlock);
1587         priv->management_timer.function = atmel_management_timer;
1588         priv->management_timer.data = (unsigned long) dev;
1589
1590         dev->open = atmel_open;
1591         dev->stop = atmel_close;
1592         dev->change_mtu = atmel_change_mtu;
1593         dev->set_mac_address = atmel_set_mac_address;
1594         dev->hard_start_xmit = start_tx;
1595         dev->get_stats = atmel_get_stats;
1596         dev->get_wireless_stats = atmel_get_wireless_stats;
1597         dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def;
1598         dev->do_ioctl = atmel_ioctl;
1599         dev->irq = irq;
1600         dev->base_addr = port;
1601
1602         SET_NETDEV_DEV(dev, sys_dev);
1603
1604         if ((rc = request_irq(dev->irq, service_interrupt, SA_SHIRQ, dev->name, dev))) {
1605                 printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc );
1606                 goto err_out_free;
1607         }
1608
1609         if (priv->bus_type == BUS_TYPE_PCI &&
1610             !request_region( dev->base_addr, 64, dev->name )) {
1611                 goto err_out_irq;
1612         }
1613
1614         if (register_netdev(dev))
1615                 goto err_out_res;
1616
1617         if (!probe_atmel_card(dev)){
1618                 unregister_netdev(dev);
1619                 goto err_out_res;
1620         }
1621
1622         netif_carrier_off(dev);
1623
1624         create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv);
1625
1626         printk(KERN_INFO "%s: Atmel at76c50x wireless. Version %d.%d simon@thekelleys.org.uk\n",
1627                dev->name, DRIVER_MAJOR, DRIVER_MINOR);
1628
1629         SET_MODULE_OWNER(dev);
1630         return dev;
1631
1632  err_out_res:
1633         if (priv->bus_type == BUS_TYPE_PCI)
1634                 release_region( dev->base_addr, 64 );
1635  err_out_irq:
1636         free_irq(dev->irq, dev);
1637  err_out_free:
1638         free_netdev(dev);
1639         return NULL;
1640 }
1641
1642 EXPORT_SYMBOL(init_atmel_card);
1643
1644 void stop_atmel_card(struct net_device *dev, int freeres)
1645 {
1646         struct atmel_private *priv = netdev_priv(dev);
1647
1648         /* put a brick on it... */
1649         if (priv->bus_type == BUS_TYPE_PCCARD)
1650                 atmel_write16(dev, GCR, 0x0060);
1651         atmel_write16(dev, GCR, 0x0040);
1652
1653         del_timer_sync(&priv->management_timer);
1654         unregister_netdev(dev);
1655         remove_proc_entry("driver/atmel", NULL);
1656         free_irq(dev->irq, dev);
1657         if (priv->firmware)
1658                 kfree(priv->firmware);
1659         if (freeres) {
1660                 /* PCMCIA frees this stuff, so only for PCI */
1661                 release_region(dev->base_addr, 64);
1662         }
1663         free_netdev(dev);
1664 }
1665
1666 EXPORT_SYMBOL(stop_atmel_card);
1667
1668 static int atmel_set_essid(struct net_device *dev,
1669                            struct iw_request_info *info,
1670                            struct iw_point *dwrq,
1671                            char *extra)
1672 {
1673         struct atmel_private *priv = netdev_priv(dev);
1674
1675         /* Check if we asked for `any' */
1676         if(dwrq->flags == 0) {
1677                 priv->connect_to_any_BSS = 1;
1678         } else {
1679                 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1680
1681                 priv->connect_to_any_BSS = 0;
1682
1683                 /* Check the size of the string */
1684                 if (dwrq->length > MAX_SSID_LENGTH + 1)
1685                          return -E2BIG ;
1686                 if (index != 0)
1687                         return -EINVAL;
1688
1689                 memcpy(priv->new_SSID, extra, dwrq->length - 1);
1690                 priv->new_SSID_size = dwrq->length - 1;
1691         }
1692
1693         return -EINPROGRESS;
1694 }
1695
1696 static int atmel_get_essid(struct net_device *dev,
1697                            struct iw_request_info *info,
1698                            struct iw_point *dwrq,
1699                            char *extra)
1700 {
1701         struct atmel_private *priv = netdev_priv(dev);
1702
1703         /* Get the current SSID */
1704         if (priv->new_SSID_size != 0) {
1705                 memcpy(extra, priv->new_SSID, priv->new_SSID_size);
1706                 extra[priv->new_SSID_size] = '\0';
1707                 dwrq->length = priv->new_SSID_size + 1;
1708         } else {
1709                 memcpy(extra, priv->SSID, priv->SSID_size);
1710                 extra[priv->SSID_size] = '\0';
1711                 dwrq->length = priv->SSID_size + 1;
1712         }
1713
1714         dwrq->flags = !priv->connect_to_any_BSS; /* active */
1715
1716         return 0;
1717 }
1718
1719 static int atmel_get_wap(struct net_device *dev,
1720                          struct iw_request_info *info,
1721                          struct sockaddr *awrq,
1722                          char *extra)
1723 {
1724         struct atmel_private *priv = netdev_priv(dev);
1725         memcpy(awrq->sa_data, priv->CurrentBSSID, 6);
1726         awrq->sa_family = ARPHRD_ETHER;
1727
1728         return 0;
1729 }
1730
1731 static int atmel_set_encode(struct net_device *dev,
1732                             struct iw_request_info *info,
1733                             struct iw_point *dwrq,
1734                             char *extra)
1735 {
1736         struct atmel_private *priv = netdev_priv(dev);
1737
1738         /* Basic checking: do we have a key to set ?
1739          * Note : with the new API, it's impossible to get a NULL pointer.
1740          * Therefore, we need to check a key size == 0 instead.
1741          * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1742          * when no key is present (only change flags), but older versions
1743          * don't do it. - Jean II */
1744         if (dwrq->length > 0) {
1745                 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1746                 int current_index = priv->default_key;
1747                 /* Check the size of the key */
1748                 if (dwrq->length > 13) {
1749                         return -EINVAL;
1750                 }
1751                 /* Check the index (none -> use current) */
1752                 if (index < 0 || index >= 4)
1753                         index = current_index;
1754                 else
1755                         priv->default_key = index;
1756                 /* Set the length */
1757                 if (dwrq->length > 5)
1758                         priv->wep_key_len[index] = 13;
1759                 else
1760                         if (dwrq->length > 0)
1761                                 priv->wep_key_len[index] = 5;
1762                         else
1763                                 /* Disable the key */
1764                                 priv->wep_key_len[index] = 0;
1765                 /* Check if the key is not marked as invalid */
1766                 if(!(dwrq->flags & IW_ENCODE_NOKEY)) {
1767                         /* Cleanup */
1768                         memset(priv->wep_keys[index], 0, 13);
1769                         /* Copy the key in the driver */
1770                         memcpy(priv->wep_keys[index], extra, dwrq->length);
1771                 }
1772                 /* WE specify that if a valid key is set, encryption
1773                  * should be enabled (user may turn it off later)
1774                  * This is also how "iwconfig ethX key on" works */
1775                 if (index == current_index &&
1776                     priv->wep_key_len[index] > 0) {
1777                         priv->wep_is_on = 1;
1778                         priv->exclude_unencrypted = 1;
1779                         if (priv->wep_key_len[index] > 5) {
1780                                 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1781                                 priv->encryption_level = 2;
1782                         } else {
1783                                 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1784                                 priv->encryption_level = 1;
1785                         }
1786                 }
1787         } else {
1788                 /* Do we want to just set the transmit key index ? */
1789                 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1790                 if ( index>=0 && index < 4 ) {
1791                         priv->default_key = index;
1792                 } else
1793                         /* Don't complain if only change the mode */
1794                         if(!dwrq->flags & IW_ENCODE_MODE) {
1795                                 return -EINVAL;
1796                         }
1797         }
1798         /* Read the flags */
1799         if(dwrq->flags & IW_ENCODE_DISABLED) {
1800                 priv->wep_is_on = 0;
1801                 priv->encryption_level = 0;
1802                 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1803         } else {
1804                 priv->wep_is_on = 1;
1805                 if (priv->wep_key_len[priv->default_key] > 5) {
1806                         priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1807                         priv->encryption_level = 2;
1808                 } else {
1809                         priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1810                         priv->encryption_level = 1;
1811                 }
1812         }
1813         if(dwrq->flags & IW_ENCODE_RESTRICTED)
1814                 priv->exclude_unencrypted = 1;
1815         if(dwrq->flags & IW_ENCODE_OPEN)
1816                 priv->exclude_unencrypted = 0;
1817
1818         return -EINPROGRESS;            /* Call commit handler */
1819 }
1820
1821
1822 static int atmel_get_encode(struct net_device *dev,
1823                             struct iw_request_info *info,
1824                             struct iw_point *dwrq,
1825                             char *extra)
1826 {
1827         struct atmel_private *priv = netdev_priv(dev);
1828         int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1829
1830         if (!priv->wep_is_on)
1831                 dwrq->flags = IW_ENCODE_DISABLED;
1832         else if (priv->exclude_unencrypted)
1833                 dwrq->flags = IW_ENCODE_RESTRICTED;
1834         else
1835                 dwrq->flags = IW_ENCODE_OPEN;
1836
1837                 /* Which key do we want ? -1 -> tx index */
1838         if (index < 0 || index >= 4)
1839                 index = priv->default_key;
1840         dwrq->flags |= index + 1;
1841         /* Copy the key to the user buffer */
1842         dwrq->length = priv->wep_key_len[index];
1843         if (dwrq->length > 16) {
1844                 dwrq->length=0;
1845         } else {
1846                 memset(extra, 0, 16);
1847                 memcpy(extra, priv->wep_keys[index], dwrq->length);
1848         }
1849
1850         return 0;
1851 }
1852
1853 static int atmel_get_name(struct net_device *dev,
1854                           struct iw_request_info *info,
1855                           char *cwrq,
1856                           char *extra)
1857 {
1858         strcpy(cwrq, "IEEE 802.11-DS");
1859         return 0;
1860 }
1861
1862 static int atmel_set_rate(struct net_device *dev,
1863                           struct iw_request_info *info,
1864                           struct iw_param *vwrq,
1865                           char *extra)
1866 {
1867         struct atmel_private *priv = netdev_priv(dev);
1868
1869         if (vwrq->fixed == 0) {
1870                 priv->tx_rate = 3;
1871                 priv->auto_tx_rate = 1;
1872         } else {
1873                 priv->auto_tx_rate = 0;
1874
1875                 /* Which type of value ? */
1876                 if((vwrq->value < 4) && (vwrq->value >= 0)) {
1877                         /* Setting by rate index */
1878                 priv->tx_rate = vwrq->value;
1879                 } else {
1880                 /* Setting by frequency value */
1881                         switch (vwrq->value) {
1882                         case  1000000: priv->tx_rate = 0; break;
1883                         case  2000000: priv->tx_rate = 1; break;
1884                         case  5500000: priv->tx_rate = 2; break;
1885                         case 11000000: priv->tx_rate = 3; break;
1886                         default: return -EINVAL;
1887                         }
1888                 }
1889         }
1890
1891         return -EINPROGRESS;
1892 }
1893
1894 static int atmel_set_mode(struct net_device *dev,
1895                           struct iw_request_info *info,
1896                           __u32 *uwrq,
1897                           char *extra)
1898 {
1899         struct atmel_private *priv = netdev_priv(dev);
1900
1901         if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
1902                 return -EINVAL;
1903
1904         priv->operating_mode = *uwrq;
1905         return -EINPROGRESS;
1906 }
1907
1908 static int atmel_get_mode(struct net_device *dev,
1909                           struct iw_request_info *info,
1910                           __u32 *uwrq,
1911                           char *extra)
1912 {
1913         struct atmel_private *priv = netdev_priv(dev);
1914
1915         *uwrq = priv->operating_mode;
1916         return 0;
1917 }
1918
1919 static int atmel_get_rate(struct net_device *dev,
1920                          struct iw_request_info *info,
1921                          struct iw_param *vwrq,
1922                          char *extra)
1923 {
1924         struct atmel_private *priv = netdev_priv(dev);
1925
1926         if (priv->auto_tx_rate) {
1927                 vwrq->fixed = 0;
1928                 vwrq->value = 11000000;
1929         } else {
1930                 vwrq->fixed = 1;
1931                 switch(priv->tx_rate) {
1932                 case 0: vwrq->value =  1000000; break;
1933                 case 1: vwrq->value =  2000000; break;
1934                 case 2: vwrq->value =  5500000; break;
1935                 case 3: vwrq->value = 11000000; break;
1936                 }
1937         }
1938         return 0;
1939 }
1940
1941 static int atmel_set_power(struct net_device *dev,
1942                            struct iw_request_info *info,
1943                            struct iw_param *vwrq,
1944                            char *extra)
1945 {
1946         struct atmel_private *priv = netdev_priv(dev);
1947         priv->power_mode = vwrq->disabled ? 0 : 1;
1948         return -EINPROGRESS;
1949 }
1950
1951 static int atmel_get_power(struct net_device *dev,
1952                            struct iw_request_info *info,
1953                            struct iw_param *vwrq,
1954                            char *extra)
1955 {
1956         struct atmel_private *priv = netdev_priv(dev);
1957         vwrq->disabled = priv->power_mode ? 0 : 1;
1958         vwrq->flags = IW_POWER_ON;
1959         return 0;
1960 }
1961
1962 static int atmel_set_retry(struct net_device *dev,
1963                            struct iw_request_info *info,
1964                            struct iw_param *vwrq,
1965                            char *extra)
1966 {
1967         struct atmel_private *priv = netdev_priv(dev);
1968
1969         if(!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
1970                 if(vwrq->flags & IW_RETRY_MAX)
1971                         priv->long_retry = vwrq->value;
1972                 else if (vwrq->flags & IW_RETRY_MIN)
1973                         priv->short_retry = vwrq->value;
1974                 else {
1975                         /* No modifier : set both */
1976                         priv->long_retry = vwrq->value;
1977                         priv->short_retry = vwrq->value;
1978                 }
1979                 return -EINPROGRESS;
1980         }
1981
1982         return -EINVAL;
1983 }
1984
1985 static int atmel_get_retry(struct net_device *dev,
1986                            struct iw_request_info *info,
1987                            struct iw_param *vwrq,
1988                            char *extra)
1989 {
1990         struct atmel_private *priv = netdev_priv(dev);
1991
1992         vwrq->disabled = 0;      /* Can't be disabled */
1993
1994         /* Note : by default, display the min retry number */
1995         if((vwrq->flags & IW_RETRY_MAX)) {
1996                 vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
1997                 vwrq->value = priv->long_retry;
1998         } else {
1999                 vwrq->flags = IW_RETRY_LIMIT;
2000                 vwrq->value = priv->short_retry;
2001                 if(priv->long_retry != priv->short_retry)
2002                         vwrq->flags |= IW_RETRY_MIN;
2003         }
2004
2005         return 0;
2006 }
2007
2008 static int atmel_set_rts(struct net_device *dev,
2009                          struct iw_request_info *info,
2010                          struct iw_param *vwrq,
2011                          char *extra)
2012 {
2013         struct atmel_private *priv = netdev_priv(dev);
2014         int rthr = vwrq->value;
2015
2016         if(vwrq->disabled)
2017                 rthr = 2347;
2018         if((rthr < 0) || (rthr > 2347)) {
2019                 return -EINVAL;
2020         }
2021         priv->rts_threshold = rthr;
2022
2023         return -EINPROGRESS;            /* Call commit handler */
2024 }
2025
2026 static int atmel_get_rts(struct net_device *dev,
2027                          struct iw_request_info *info,
2028                          struct iw_param *vwrq,
2029                          char *extra)
2030 {
2031         struct atmel_private *priv = netdev_priv(dev);
2032
2033         vwrq->value = priv->rts_threshold;
2034         vwrq->disabled = (vwrq->value >= 2347);
2035         vwrq->fixed = 1;
2036
2037         return 0;
2038 }
2039
2040 static int atmel_set_frag(struct net_device *dev,
2041                           struct iw_request_info *info,
2042                           struct iw_param *vwrq,
2043                           char *extra)
2044 {
2045         struct atmel_private *priv = netdev_priv(dev);
2046         int fthr = vwrq->value;
2047
2048         if(vwrq->disabled)
2049                 fthr = 2346;
2050         if((fthr < 256) || (fthr > 2346)) {
2051                 return -EINVAL;
2052         }
2053         fthr &= ~0x1;   /* Get an even value - is it really needed ??? */
2054         priv->frag_threshold = fthr;
2055
2056         return -EINPROGRESS;            /* Call commit handler */
2057 }
2058
2059 static int atmel_get_frag(struct net_device *dev,
2060                           struct iw_request_info *info,
2061                           struct iw_param *vwrq,
2062                           char *extra)
2063 {
2064         struct atmel_private *priv = netdev_priv(dev);
2065
2066         vwrq->value = priv->frag_threshold;
2067         vwrq->disabled = (vwrq->value >= 2346);
2068         vwrq->fixed = 1;
2069
2070         return 0;
2071 }
2072
2073 static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
2074                                 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
2075
2076 static int atmel_set_freq(struct net_device *dev,
2077                           struct iw_request_info *info,
2078                           struct iw_freq *fwrq,
2079                           char *extra)
2080 {
2081         struct atmel_private *priv = netdev_priv(dev);
2082         int rc = -EINPROGRESS;          /* Call commit handler */
2083
2084         /* If setting by frequency, convert to a channel */
2085         if((fwrq->e == 1) &&
2086            (fwrq->m >= (int) 241200000) &&
2087            (fwrq->m <= (int) 248700000)) {
2088                 int f = fwrq->m / 100000;
2089                 int c = 0;
2090                 while((c < 14) && (f != frequency_list[c]))
2091                         c++;
2092                 /* Hack to fall through... */
2093                 fwrq->e = 0;
2094                 fwrq->m = c + 1;
2095         }
2096         /* Setting by channel number */
2097         if((fwrq->m > 1000) || (fwrq->e > 0))
2098                 rc = -EOPNOTSUPP;
2099         else {
2100                 int channel = fwrq->m;
2101                 if (atmel_validate_channel(priv, channel) == 0) {
2102                         priv->channel = channel;
2103                 } else {
2104                         rc = -EINVAL;
2105                 }
2106         }
2107         return rc;
2108 }
2109
2110 static int atmel_get_freq(struct net_device *dev,
2111                           struct iw_request_info *info,
2112                           struct iw_freq *fwrq,
2113                           char *extra)
2114 {
2115         struct atmel_private *priv = netdev_priv(dev);
2116
2117         fwrq->m = priv->channel;
2118         fwrq->e = 0;
2119         return 0;
2120 }
2121
2122 static int atmel_set_scan(struct net_device *dev,
2123                           struct iw_request_info *info,
2124                           struct iw_param *vwrq,
2125                           char *extra)
2126 {
2127         struct atmel_private *priv = netdev_priv(dev);
2128         unsigned long flags;
2129
2130         /* Note : you may have realised that, as this is a SET operation,
2131          * this is privileged and therefore a normal user can't
2132          * perform scanning.
2133          * This is not an error, while the device perform scanning,
2134          * traffic doesn't flow, so it's a perfect DoS...
2135          * Jean II */
2136
2137         if (priv->station_state == STATION_STATE_DOWN)
2138                 return -EAGAIN;
2139
2140         /* Timeout old surveys. */
2141         if ((jiffies - priv->last_survey) > (20 * HZ))
2142                 priv->site_survey_state = SITE_SURVEY_IDLE;
2143         priv->last_survey = jiffies;
2144
2145         /* Initiate a scan command */
2146         if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2147                 return -EBUSY;
2148
2149         del_timer_sync(&priv->management_timer);
2150         spin_lock_irqsave(&priv->irqlock, flags);
2151
2152         priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2153         priv->fast_scan = 0;
2154         atmel_scan(priv, 0);
2155         spin_unlock_irqrestore(&priv->irqlock, flags);
2156
2157         return 0;
2158 }
2159
2160 static int atmel_get_scan(struct net_device *dev,
2161                           struct iw_request_info *info,
2162                           struct iw_point *dwrq,
2163                           char *extra)
2164 {
2165         struct atmel_private *priv = netdev_priv(dev);
2166         int i;
2167         char *current_ev = extra;
2168         struct iw_event iwe;
2169
2170         if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2171                 return -EAGAIN;
2172
2173         for(i=0; i<priv->BSS_list_entries; i++) {
2174                 iwe.cmd = SIOCGIWAP;
2175                 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2176                 memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6);
2177                 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_ADDR_LEN);
2178
2179                 iwe.u.data.length =  priv->BSSinfo[i].SSIDsize;
2180                 if (iwe.u.data.length > 32)
2181                         iwe.u.data.length = 32;
2182                 iwe.cmd = SIOCGIWESSID;
2183                 iwe.u.data.flags = 1;
2184                 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, priv->BSSinfo[i].SSID);
2185
2186                 iwe.cmd = SIOCGIWMODE;
2187                 iwe.u.mode = priv->BSSinfo[i].BSStype;
2188                 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_UINT_LEN);
2189
2190                 iwe.cmd = SIOCGIWFREQ;
2191                 iwe.u.freq.m = priv->BSSinfo[i].channel;
2192                 iwe.u.freq.e = 0;
2193                 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_FREQ_LEN);
2194
2195                 iwe.cmd = SIOCGIWENCODE;
2196                 if (priv->BSSinfo[i].UsingWEP)
2197                         iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2198                 else
2199                         iwe.u.data.flags = IW_ENCODE_DISABLED;
2200                 iwe.u.data.length = 0;
2201                 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, NULL);
2202
2203         }
2204
2205         /* Length of data */
2206         dwrq->length = (current_ev - extra);
2207         dwrq->flags = 0;
2208
2209         return 0;
2210 }
2211
2212 static int atmel_get_range(struct net_device *dev,
2213                            struct iw_request_info *info,
2214                            struct iw_point *dwrq,
2215                            char *extra)
2216 {
2217         struct atmel_private *priv = netdev_priv(dev);
2218         struct iw_range *range = (struct iw_range *) extra;
2219         int k,i,j;
2220
2221         dwrq->length = sizeof(struct iw_range);
2222         memset(range, 0, sizeof(range));
2223         range->min_nwid = 0x0000;
2224         range->max_nwid = 0x0000;
2225         range->num_channels = 0;
2226         for (j = 0; j < sizeof(channel_table)/sizeof(channel_table[0]); j++)
2227                 if (priv->reg_domain == channel_table[j].reg_domain) {
2228                         range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2229                         break;
2230                 }
2231         if (range->num_channels != 0) {
2232                 for(k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
2233                         range->freq[k].i = i; /* List index */
2234                         range->freq[k].m = frequency_list[i-1] * 100000;
2235                         range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */
2236                 }
2237                 range->num_frequency = k;
2238         }
2239
2240         range->max_qual.qual = 100;
2241         range->max_qual.level = 100;
2242         range->max_qual.noise = 0;
2243         range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2244
2245         range->avg_qual.qual = 50;
2246         range->avg_qual.level = 50;
2247         range->avg_qual.noise = 0;
2248         range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2249
2250         range->sensitivity = 0;
2251
2252         range->bitrate[0] =  1000000;
2253         range->bitrate[1] =  2000000;
2254         range->bitrate[2] =  5500000;
2255         range->bitrate[3] = 11000000;
2256         range->num_bitrates = 4;
2257
2258         range->min_rts = 0;
2259         range->max_rts = 2347;
2260         range->min_frag = 256;
2261         range->max_frag = 2346;
2262
2263         range->encoding_size[0] = 5;
2264         range->encoding_size[1] = 13;
2265         range->num_encoding_sizes = 2;
2266         range->max_encoding_tokens = 4;
2267
2268         range->pmp_flags = IW_POWER_ON;
2269         range->pmt_flags = IW_POWER_ON;
2270         range->pm_capa = 0;
2271
2272         range->we_version_source = WIRELESS_EXT;
2273         range->we_version_compiled = WIRELESS_EXT;
2274         range->retry_capa = IW_RETRY_LIMIT ;
2275         range->retry_flags = IW_RETRY_LIMIT;
2276         range->r_time_flags = 0;
2277         range->min_retry = 1;
2278         range->max_retry = 65535;
2279
2280         return 0;
2281 }
2282
2283 static int atmel_set_wap(struct net_device *dev,
2284                          struct iw_request_info *info,
2285                          struct sockaddr *awrq,
2286                          char *extra)
2287 {
2288         struct atmel_private *priv = netdev_priv(dev);
2289         int i;
2290         static const u8 bcast[] = { 255, 255, 255, 255, 255, 255 };
2291         unsigned long flags;
2292
2293         if (awrq->sa_family != ARPHRD_ETHER)
2294                 return -EINVAL;
2295
2296         if (memcmp(bcast, awrq->sa_data, 6) == 0) {
2297                 del_timer_sync(&priv->management_timer);
2298                 spin_lock_irqsave(&priv->irqlock, flags);
2299                 atmel_scan(priv, 1);
2300                 spin_unlock_irqrestore(&priv->irqlock, flags);
2301                 return 0;
2302         }
2303
2304         for(i=0; i<priv->BSS_list_entries; i++) {
2305                 if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2306                         if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2307                                 return -EINVAL;
2308                         } else if  (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2309                                 return -EINVAL;
2310                         } else {
2311                                 del_timer_sync(&priv->management_timer);
2312                                 spin_lock_irqsave(&priv->irqlock, flags);
2313                                 atmel_join_bss(priv, i);
2314                                 spin_unlock_irqrestore(&priv->irqlock, flags);
2315                                 return 0;
2316                         }
2317                 }
2318         }
2319
2320         return -EINVAL;
2321 }
2322
2323 static int atmel_config_commit(struct net_device *dev,
2324                                struct iw_request_info *info,    /* NULL */
2325                                void *zwrq,                      /* NULL */
2326                                char *extra)                     /* NULL */
2327 {
2328         return atmel_open(dev);
2329 }
2330
2331 static const iw_handler         atmel_handler[] =
2332 {
2333         (iw_handler) atmel_config_commit,       /* SIOCSIWCOMMIT */
2334         (iw_handler) atmel_get_name,            /* SIOCGIWNAME */
2335         (iw_handler) NULL,                      /* SIOCSIWNWID */
2336         (iw_handler) NULL,                      /* SIOCGIWNWID */
2337         (iw_handler) atmel_set_freq,            /* SIOCSIWFREQ */
2338         (iw_handler) atmel_get_freq,            /* SIOCGIWFREQ */
2339         (iw_handler) atmel_set_mode,            /* SIOCSIWMODE */
2340         (iw_handler) atmel_get_mode,            /* SIOCGIWMODE */
2341         (iw_handler) NULL,                      /* SIOCSIWSENS */
2342         (iw_handler) NULL,                      /* SIOCGIWSENS */
2343         (iw_handler) NULL,                      /* SIOCSIWRANGE */
2344         (iw_handler) atmel_get_range,           /* SIOCGIWRANGE */
2345         (iw_handler) NULL,                      /* SIOCSIWPRIV */
2346         (iw_handler) NULL,                      /* SIOCGIWPRIV */
2347         (iw_handler) NULL,                      /* SIOCSIWSTATS */
2348         (iw_handler) NULL,                      /* SIOCGIWSTATS */
2349         (iw_handler) NULL,                      /* SIOCSIWSPY */
2350         (iw_handler) NULL,                      /* SIOCGIWSPY */
2351         (iw_handler) NULL,                      /* -- hole -- */
2352         (iw_handler) NULL,                      /* -- hole -- */
2353         (iw_handler) atmel_set_wap,             /* SIOCSIWAP */
2354         (iw_handler) atmel_get_wap,             /* SIOCGIWAP */
2355         (iw_handler) NULL,                      /* -- hole -- */
2356         (iw_handler) NULL,                      /* SIOCGIWAPLIST */
2357         (iw_handler) atmel_set_scan,            /* SIOCSIWSCAN */
2358         (iw_handler) atmel_get_scan,            /* SIOCGIWSCAN */
2359         (iw_handler) atmel_set_essid,           /* SIOCSIWESSID */
2360         (iw_handler) atmel_get_essid,           /* SIOCGIWESSID */
2361         (iw_handler) NULL,                      /* SIOCSIWNICKN */
2362         (iw_handler) NULL,                      /* SIOCGIWNICKN */
2363         (iw_handler) NULL,                      /* -- hole -- */
2364         (iw_handler) NULL,                      /* -- hole -- */
2365         (iw_handler) atmel_set_rate,            /* SIOCSIWRATE */
2366         (iw_handler) atmel_get_rate,            /* SIOCGIWRATE */
2367         (iw_handler) atmel_set_rts,             /* SIOCSIWRTS */
2368         (iw_handler) atmel_get_rts,             /* SIOCGIWRTS */
2369         (iw_handler) atmel_set_frag,            /* SIOCSIWFRAG */
2370         (iw_handler) atmel_get_frag,            /* SIOCGIWFRAG */
2371         (iw_handler) NULL,                      /* SIOCSIWTXPOW */
2372         (iw_handler) NULL,                      /* SIOCGIWTXPOW */
2373         (iw_handler) atmel_set_retry,           /* SIOCSIWRETRY */
2374         (iw_handler) atmel_get_retry,           /* SIOCGIWRETRY */
2375         (iw_handler) atmel_set_encode,          /* SIOCSIWENCODE */
2376         (iw_handler) atmel_get_encode,          /* SIOCGIWENCODE */
2377         (iw_handler) atmel_set_power,           /* SIOCSIWPOWER */
2378         (iw_handler) atmel_get_power,           /* SIOCGIWPOWER */
2379 };
2380
2381
2382 static const iw_handler         atmel_private_handler[] =
2383 {
2384         NULL,                           /* SIOCIWFIRSTPRIV */
2385 };
2386
2387 typedef struct atmel_priv_ioctl {
2388         char id[32];
2389         unsigned char __user *data;
2390         unsigned short len;
2391 } atmel_priv_ioctl;
2392
2393
2394 #define ATMELFWL SIOCIWFIRSTPRIV
2395 #define ATMELIDIFC ATMELFWL + 1
2396 #define ATMELRD ATMELFWL + 2
2397 #define ATMELMAGIC 0x51807
2398 #define REGDOMAINSZ 20
2399
2400 static const struct iw_priv_args atmel_private_args[] = {
2401 /*{ cmd,         set_args,                            get_args, name } */
2402   { ATMELFWL, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | sizeof (atmel_priv_ioctl), IW_PRIV_TYPE_NONE, "atmelfwl" },
2403   { ATMELIDIFC, IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "atmelidifc" },
2404   { ATMELRD, IW_PRIV_TYPE_CHAR | REGDOMAINSZ, IW_PRIV_TYPE_NONE, "regdomain" },
2405 };
2406
2407 static const struct iw_handler_def      atmel_handler_def =
2408 {
2409         .num_standard   = sizeof(atmel_handler)/sizeof(iw_handler),
2410         .num_private    = sizeof(atmel_private_handler)/sizeof(iw_handler),
2411         .num_private_args = sizeof(atmel_private_args)/sizeof(struct iw_priv_args),
2412         .standard       = (iw_handler *) atmel_handler,
2413         .private        = (iw_handler *) atmel_private_handler,
2414         .private_args   = (struct iw_priv_args *) atmel_private_args
2415 };
2416
2417 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2418 {
2419         int i, rc = 0;
2420         struct atmel_private *priv = netdev_priv(dev);
2421         atmel_priv_ioctl com;
2422         struct iwreq *wrq = (struct iwreq *) rq;
2423         unsigned char *new_firmware;
2424         char domain[REGDOMAINSZ+1];
2425
2426         switch (cmd) {
2427         case SIOCGIWPRIV:
2428                 if(wrq->u.data.pointer) {
2429                         /* Set the number of ioctl available */
2430                         wrq->u.data.length = sizeof(atmel_private_args) / sizeof(atmel_private_args[0]);
2431
2432                         /* Copy structure to the user buffer */
2433                         if (copy_to_user(wrq->u.data.pointer,
2434                                          (u_char *) atmel_private_args,
2435                                          sizeof(atmel_private_args)))
2436                                 rc = -EFAULT;
2437                 }
2438                 break;
2439
2440         case ATMELIDIFC:
2441                 wrq->u.param.value = ATMELMAGIC;
2442                 break;
2443
2444         case ATMELFWL:
2445                 if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2446                         rc = -EFAULT;
2447                         break;
2448                 }
2449
2450                 if (!capable(CAP_NET_ADMIN)) {
2451                         rc = -EPERM;
2452                         break;
2453                 }
2454
2455                 if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) {
2456                         rc = -ENOMEM;
2457                         break;
2458                 }
2459
2460                 if (copy_from_user(new_firmware, com.data, com.len)) {
2461                         kfree(new_firmware);
2462                         rc = -EFAULT;
2463                         break;
2464                 }
2465
2466                 if (priv->firmware)
2467                         kfree(priv->firmware);
2468
2469                 priv->firmware = new_firmware;
2470                 priv->firmware_length = com.len;
2471                 strncpy(priv->firmware_id, com.id, 31);
2472                 priv->firmware_id[31] = '\0';
2473                 break;
2474
2475         case ATMELRD:
2476                 if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2477                         rc = -EFAULT;
2478                         break;
2479                 }
2480
2481                 if (!capable(CAP_NET_ADMIN)) {
2482                         rc = -EPERM;
2483                         break;
2484                 }
2485
2486                 domain[REGDOMAINSZ] = 0;
2487                 rc = -EINVAL;
2488                 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) {
2489                         /* strcasecmp doesn't exist in the library */
2490                         char *a = channel_table[i].name;
2491                         char *b = domain;
2492                         while (*a) {
2493                                 char c1 = *a++;
2494                                 char c2 = *b++;
2495                                 if (tolower(c1) != tolower(c2))
2496                                         break;
2497                         }
2498                         if (!*a && !*b) {
2499                                 priv->config_reg_domain = channel_table[i].reg_domain;
2500                                 rc = 0;
2501                         }
2502                 }
2503
2504                 if (rc == 0 &&  priv->station_state != STATION_STATE_DOWN)
2505                         rc = atmel_open(dev);
2506                 break;
2507
2508         default:
2509                 rc = -EOPNOTSUPP;
2510         }
2511
2512         return rc;
2513 }
2514
2515 struct auth_body {
2516         u16 alg;
2517         u16 trans_seq;
2518         u16 status;
2519         u8 el_id;
2520         u8 chall_text_len;
2521         u8 chall_text[253];
2522 };
2523
2524 static void atmel_enter_state(struct atmel_private *priv, int new_state)
2525 {
2526         int old_state = priv->station_state;
2527
2528         if (new_state == old_state)
2529                 return;
2530
2531         priv->station_state = new_state;
2532
2533         if (new_state == STATION_STATE_READY) {
2534                 netif_start_queue(priv->dev);
2535                 netif_carrier_on(priv->dev);
2536         }
2537
2538         if (old_state == STATION_STATE_READY) {
2539                 netif_carrier_off(priv->dev);
2540                 if (netif_running(priv->dev))
2541                         netif_stop_queue(priv->dev);
2542                 priv->last_beacon_timestamp = 0;
2543         }
2544 }
2545
2546 static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2547 {
2548         struct {
2549                 u8 BSSID[6];
2550                 u8 SSID[MAX_SSID_LENGTH];
2551                 u8 scan_type;
2552                 u8 channel;
2553                 u16 BSS_type;
2554                 u16 min_channel_time;
2555                 u16 max_channel_time;
2556                 u8 options;
2557                 u8 SSID_size;
2558         } cmd;
2559
2560         memset(cmd.BSSID, 0xff, 6);
2561
2562         if (priv->fast_scan) {
2563                 cmd.SSID_size = priv->SSID_size;
2564                 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2565                 cmd.min_channel_time = cpu_to_le16(10);
2566                 cmd.max_channel_time = cpu_to_le16(50);
2567         } else {
2568                 priv->BSS_list_entries = 0;
2569                 cmd.SSID_size = 0;
2570                 cmd.min_channel_time = cpu_to_le16(10);
2571                 cmd.max_channel_time = cpu_to_le16(120);
2572         }
2573
2574         cmd.options = 0;
2575
2576         if (!specific_ssid)
2577                 cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
2578
2579         cmd.channel = (priv->channel & 0x7f);
2580         cmd.scan_type = SCAN_TYPE_ACTIVE;
2581         cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
2582                 BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
2583
2584         atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2585
2586         /* This must come after all hardware access to avoid being messed up
2587            by stuff happening in interrupt context after we leave STATE_DOWN */
2588         atmel_enter_state(priv, STATION_STATE_SCANNING);
2589 }
2590
2591 static void join(struct atmel_private *priv, int type)
2592 {
2593         struct {
2594                 u8 BSSID[6];
2595                 u8 SSID[MAX_SSID_LENGTH];
2596                 u8 BSS_type; /* this is a short in a scan command - weird */
2597                 u8 channel;
2598                 u16 timeout;
2599                 u8 SSID_size;
2600                 u8 reserved;
2601         } cmd;
2602
2603         cmd.SSID_size = priv->SSID_size;
2604         memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2605         memcpy(cmd.BSSID, priv->CurrentBSSID, 6);
2606         cmd.channel = (priv->channel & 0x7f);
2607         cmd.BSS_type = type;
2608         cmd.timeout = cpu_to_le16(2000);
2609
2610         atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
2611 }
2612
2613
2614 static void start(struct atmel_private *priv, int type)
2615 {
2616         struct {
2617                 u8 BSSID[6];
2618                 u8 SSID[MAX_SSID_LENGTH];
2619                 u8 BSS_type;
2620                 u8 channel;
2621                 u8 SSID_size;
2622                 u8 reserved[3];
2623         } cmd;
2624
2625         cmd.SSID_size = priv->SSID_size;
2626         memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2627         memcpy(cmd.BSSID, priv->BSSID, 6);
2628         cmd.BSS_type = type;
2629         cmd.channel = (priv->channel & 0x7f);
2630
2631         atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
2632 }
2633
2634 static void handle_beacon_probe(struct atmel_private *priv, u16 capability, u8 channel)
2635 {
2636         int rejoin = 0;
2637         int new = capability  & C80211_MGMT_CAPABILITY_ShortPreamble ?
2638                 SHORT_PREAMBLE : LONG_PREAMBLE;
2639
2640         if (priv->preamble != new) {
2641                 priv->preamble = new;
2642                 rejoin = 1;
2643                 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2644         }
2645
2646         if (priv->channel != channel) {
2647                 priv->channel = channel;
2648                 rejoin = 1;
2649                 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2650         }
2651
2652         if (rejoin) {
2653                 priv->station_is_associated = 0;
2654                 atmel_enter_state(priv, STATION_STATE_JOINNING);
2655
2656                 if (priv->operating_mode == IW_MODE_INFRA)
2657                         join(priv, BSS_TYPE_INFRASTRUCTURE);
2658                 else
2659                         join(priv, BSS_TYPE_AD_HOC);
2660         }
2661 }
2662
2663
2664 static void send_authentication_request(struct atmel_private *priv, u8 *challenge, int challenge_len)
2665 {
2666         struct ieee802_11_hdr header;
2667         struct auth_body auth;
2668
2669         header.frame_ctl = cpu_to_le16(IEEE802_11_FTYPE_MGMT | IEEE802_11_STYPE_AUTH);
2670         header.duration_id      = cpu_to_le16(0x8000);
2671         header.seq_ctl = 0;
2672         memcpy(header.addr1, priv->CurrentBSSID, 6);
2673         memcpy(header.addr2, priv->dev->dev_addr, 6);
2674         memcpy(header.addr3, priv->CurrentBSSID, 6);
2675
2676         if (priv->wep_is_on) {
2677                 auth.alg = cpu_to_le16(C80211_MGMT_AAN_SHAREDKEY);
2678                 /* no WEP for authentication frames with TrSeqNo 1 */
2679                 if (priv->CurrentAuthentTransactionSeqNum != 1)
2680                         header.frame_ctl |=  cpu_to_le16(IEEE802_11_FCTL_WEP);
2681         } else {
2682                 auth.alg = cpu_to_le16(C80211_MGMT_AAN_OPENSYSTEM);
2683         }
2684
2685         auth.status = 0;
2686         auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
2687         priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
2688         priv->CurrentAuthentTransactionSeqNum += 2;
2689
2690         if (challenge_len != 0) {
2691                 auth.el_id = 16; /* challenge_text */
2692                 auth.chall_text_len = challenge_len;
2693                 memcpy(auth.chall_text, challenge, challenge_len);
2694                 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2695         } else {
2696                 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2697         }
2698 }
2699
2700 static void send_association_request(struct atmel_private *priv, int is_reassoc)
2701 {
2702         u8 *ssid_el_p;
2703         int bodysize;
2704         struct ieee802_11_hdr header;
2705         struct ass_req_format {
2706                 u16 capability;
2707                 u16 listen_interval;
2708                 u8 ap[6]; /* nothing after here directly accessible */
2709                 u8 ssid_el_id;
2710                 u8 ssid_len;
2711                 u8 ssid[MAX_SSID_LENGTH];
2712                 u8 sup_rates_el_id;
2713                 u8 sup_rates_len;
2714                 u8 rates[4];
2715         } body;
2716
2717         header.frame_ctl = cpu_to_le16(IEEE802_11_FTYPE_MGMT |
2718                 (is_reassoc ? IEEE802_11_STYPE_REASSOC_REQ : IEEE802_11_STYPE_ASSOC_REQ));
2719         header.duration_id = cpu_to_le16(0x8000);
2720         header.seq_ctl = 0;
2721
2722         memcpy(header.addr1, priv->CurrentBSSID, 6);
2723         memcpy(header.addr2, priv->dev->dev_addr, 6);
2724         memcpy(header.addr3, priv->CurrentBSSID, 6);
2725
2726         body.capability = cpu_to_le16(C80211_MGMT_CAPABILITY_ESS);
2727         if (priv->wep_is_on)
2728                 body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_Privacy);
2729         if (priv->preamble == SHORT_PREAMBLE)
2730                 body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_ShortPreamble);
2731
2732         body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
2733
2734         /* current AP address - only in reassoc frame */
2735         if (is_reassoc) {
2736                 memcpy(body.ap,  priv->CurrentBSSID, 6);
2737                 ssid_el_p = (u8 *)&body.ssid_el_id;
2738                 bodysize = 18 + priv->SSID_size;
2739         } else {
2740                 ssid_el_p = (u8 *)&body.ap[0];
2741                 bodysize = 12 + priv->SSID_size;
2742         }
2743
2744         ssid_el_p[0]= C80211_MGMT_ElementID_SSID;
2745         ssid_el_p[1] = priv->SSID_size;
2746         memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
2747         ssid_el_p[2 + priv->SSID_size] = C80211_MGMT_ElementID_SupportedRates;
2748         ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */
2749         memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2750
2751         atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2752 }
2753
2754 static int is_frame_from_current_bss(struct atmel_private *priv, struct ieee802_11_hdr *header)
2755 {
2756         if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS)
2757                 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2758         else
2759                 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2760 }
2761
2762 static int retrieve_bss(struct atmel_private *priv)
2763 {
2764         int i;
2765         int max_rssi = -128;
2766         int max_index = -1;
2767
2768         if (priv->BSS_list_entries == 0)
2769                 return -1;
2770
2771         if (priv->connect_to_any_BSS) {
2772                 /* Select a BSS with the max-RSSI but of the same type and of the same WEP mode
2773                    and that it is not marked as 'bad' (i.e. we had previously failed to connect to
2774                    this BSS with the settings that we currently use) */
2775                 priv->current_BSS = 0;
2776                 for(i=0; i<priv->BSS_list_entries; i++) {
2777                         if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
2778                             ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
2779                              (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2780                             !(priv->BSSinfo[i].channel & 0x80)) {
2781                                 max_rssi = priv->BSSinfo[i].RSSI;
2782                                 priv->current_BSS = max_index = i;
2783                         }
2784
2785                 }
2786                 return max_index;
2787         }
2788
2789         for(i=0; i<priv->BSS_list_entries; i++) {
2790                 if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2791                     memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2792                     priv->operating_mode == priv->BSSinfo[i].BSStype &&
2793                     atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2794                         if (priv->BSSinfo[i].RSSI >= max_rssi) {
2795                                 max_rssi = priv->BSSinfo[i].RSSI;
2796                                 max_index = i;
2797                         }
2798                 }
2799         }
2800         return max_index;
2801 }
2802
2803
2804 static void store_bss_info(struct atmel_private *priv, struct ieee802_11_hdr *header,
2805                            u16 capability, u16 beacon_period, u8 channel, u8 rssi,
2806                            u8 ssid_len, u8 *ssid, int is_beacon)
2807 {
2808         u8 *bss = capability & C80211_MGMT_CAPABILITY_ESS ? header->addr2 : header->addr3;
2809         int i, index;
2810
2811         for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
2812                 if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0)
2813                         index = i;
2814
2815         /* If we process a probe and an entry from this BSS exists
2816            we will update the BSS entry with the info from this BSS.
2817            If we process a beacon we will only update RSSI */
2818
2819         if (index == -1) {
2820                 if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
2821                         return;
2822                 index = priv->BSS_list_entries++;
2823                 memcpy(priv->BSSinfo[index].BSSID, bss, 6);
2824                 priv->BSSinfo[index].RSSI = rssi;
2825         } else {
2826                 if (rssi > priv->BSSinfo[index].RSSI)
2827                         priv->BSSinfo[index].RSSI = rssi;
2828                 if (is_beacon)
2829                         return;
2830         }
2831
2832         priv->BSSinfo[index].channel = channel;
2833         priv->BSSinfo[index].beacon_period = beacon_period;
2834         priv->BSSinfo[index].UsingWEP = capability & C80211_MGMT_CAPABILITY_Privacy;
2835         memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
2836         priv->BSSinfo[index].SSIDsize = ssid_len;
2837
2838         if (capability & C80211_MGMT_CAPABILITY_IBSS)
2839                 priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
2840         else if (capability & C80211_MGMT_CAPABILITY_ESS)
2841                 priv->BSSinfo[index].BSStype =IW_MODE_INFRA;
2842
2843         priv->BSSinfo[index].preamble = capability  & C80211_MGMT_CAPABILITY_ShortPreamble ?
2844                 SHORT_PREAMBLE : LONG_PREAMBLE;
2845 }
2846
2847 static void authenticate(struct atmel_private *priv, u16 frame_len)
2848 {
2849         struct auth_body *auth = (struct auth_body *)priv->rx_buf;
2850         u16 status = le16_to_cpu(auth->status);
2851         u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
2852
2853         if (status == C80211_MGMT_SC_Success && !priv->wep_is_on) {
2854                 /* no WEP */
2855                 if (priv->station_was_associated) {
2856                         atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
2857                         send_association_request(priv, 1);
2858                         return;
2859                 } else {
2860                         atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
2861                         send_association_request(priv, 0);
2862                         return;
2863                 }
2864         }
2865
2866         if (status == C80211_MGMT_SC_Success && priv->wep_is_on) {
2867                 /* WEP */
2868                 if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
2869                         return;
2870
2871                 if (trans_seq_no == 0x0002 &&
2872                     auth->el_id == C80211_MGMT_ElementID_ChallengeText) {
2873                         send_authentication_request(priv, auth->chall_text, auth->chall_text_len);
2874                         return;
2875                 }
2876
2877                 if (trans_seq_no == 0x0004) {
2878                         if(priv->station_was_associated) {
2879                                 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
2880                                 send_association_request(priv, 1);
2881                                 return;
2882                         } else {
2883                                 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
2884                                 send_association_request(priv, 0);
2885                                 return;
2886                         }
2887                 }
2888         }
2889
2890         if (status == C80211_MGMT_SC_AuthAlgNotSupported && priv->connect_to_any_BSS) {
2891                 int bss_index;
2892
2893                 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
2894
2895                 if ((bss_index  = retrieve_bss(priv)) != -1) {
2896                         atmel_join_bss(priv, bss_index);
2897                         return;
2898                 }
2899         }
2900
2901
2902         priv->AuthenticationRequestRetryCnt = 0;
2903         atmel_enter_state(priv,  STATION_STATE_MGMT_ERROR);
2904         priv->station_is_associated = 0;
2905 }
2906
2907 static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
2908 {
2909         struct ass_resp_format {
2910                 u16 capability;
2911                 u16 status;
2912                 u16 ass_id;
2913                 u8 el_id;
2914                 u8 length;
2915                 u8 rates[4];
2916         } *ass_resp = (struct ass_resp_format *)priv->rx_buf;
2917
2918         u16 status = le16_to_cpu(ass_resp->status);
2919         u16 ass_id = le16_to_cpu(ass_resp->ass_id);
2920         u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
2921
2922         if (frame_len < 8 + rates_len)
2923                 return;
2924
2925         if (status == C80211_MGMT_SC_Success) {
2926                 if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE)
2927                         priv->AssociationRequestRetryCnt = 0;
2928                 else
2929                         priv->ReAssociationRequestRetryCnt = 0;
2930
2931                 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
2932                 atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
2933                 if (priv->power_mode == 0) {
2934                         priv->listen_interval = 1;
2935                         atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS,  ACTIVE_MODE);
2936                         atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
2937                 } else {
2938                         priv->listen_interval = 2;
2939                         atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS,  PS_MODE);
2940                         atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
2941                 }
2942
2943                 priv->station_is_associated = 1;
2944                 priv->station_was_associated = 1;
2945                 atmel_enter_state(priv, STATION_STATE_READY);
2946                 return;
2947         }
2948
2949         if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE &&
2950             status != C80211_MGMT_SC_AssDeniedBSSRate &&
2951             status != C80211_MGMT_SC_SupportCapabilities &&
2952             priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
2953                 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
2954                 priv->AssociationRequestRetryCnt++;
2955                 send_association_request(priv, 0);
2956                 return;
2957         }
2958
2959         if (subtype == C80211_SUBTYPE_MGMT_REASS_RESPONSE &&
2960             status != C80211_MGMT_SC_AssDeniedBSSRate &&
2961             status != C80211_MGMT_SC_SupportCapabilities &&
2962             priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
2963                 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
2964                 priv->ReAssociationRequestRetryCnt++;
2965                 send_association_request(priv, 1);
2966                 return;
2967         }
2968
2969         atmel_enter_state(priv,  STATION_STATE_MGMT_ERROR);
2970         priv->station_is_associated = 0;
2971
2972         if(priv->connect_to_any_BSS) {
2973                 int bss_index;
2974                 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
2975
2976                 if ((bss_index = retrieve_bss(priv)) != -1)
2977                         atmel_join_bss(priv, bss_index);
2978
2979         }
2980 }
2981
2982 void atmel_join_bss(struct atmel_private *priv, int bss_index)
2983 {
2984         struct bss_info *bss =  &priv->BSSinfo[bss_index];
2985
2986         memcpy(priv->CurrentBSSID, bss->BSSID, 6);
2987         memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
2988
2989         /* The WPA stuff cares about the current AP address */
2990         if (priv->use_wpa)
2991                 build_wpa_mib(priv);
2992
2993         /* When switching to AdHoc turn OFF Power Save if needed */
2994
2995         if (bss->BSStype == IW_MODE_ADHOC &&
2996             priv->operating_mode != IW_MODE_ADHOC &&
2997             priv->power_mode) {
2998                 priv->power_mode = 0;
2999                 priv->listen_interval = 1;
3000                 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS,  ACTIVE_MODE);
3001                 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3002         }
3003
3004         priv->operating_mode = bss->BSStype;
3005         priv->channel = bss->channel & 0x7f;
3006         priv->beacon_period = bss->beacon_period;
3007
3008         if (priv->preamble != bss->preamble) {
3009                 priv->preamble = bss->preamble;
3010                 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
3011         }
3012
3013         if (!priv->wep_is_on && bss->UsingWEP) {
3014                 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3015                 priv->station_is_associated = 0;
3016                 return;
3017         }
3018
3019         if (priv->wep_is_on && !bss->UsingWEP) {
3020                 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3021                 priv->station_is_associated = 0;
3022                 return;
3023         }
3024
3025         atmel_enter_state(priv, STATION_STATE_JOINNING);
3026
3027         if (priv->operating_mode == IW_MODE_INFRA)
3028                 join(priv, BSS_TYPE_INFRASTRUCTURE);
3029         else
3030                 join(priv, BSS_TYPE_AD_HOC);
3031 }
3032
3033
3034 static void restart_search(struct atmel_private *priv)
3035 {
3036         int bss_index;
3037
3038         if (!priv->connect_to_any_BSS) {
3039                 atmel_scan(priv, 1);
3040         } else {
3041                 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3042
3043                 if ((bss_index = retrieve_bss(priv)) != -1)
3044                         atmel_join_bss(priv, bss_index);
3045                 else
3046                         atmel_scan(priv, 0);
3047
3048         }
3049 }
3050
3051 static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3052 {
3053         u8 old = priv->wstats.qual.level;
3054         u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3055
3056         switch (priv->firmware_type) {
3057                 case ATMEL_FW_TYPE_502E:
3058                         max_rssi = 63; /* 502-rmfd-reve max by experiment */
3059                         break;
3060                 default:
3061                         break;
3062         }
3063
3064         rssi = rssi * 100 / max_rssi;
3065         if((rssi + old) % 2)
3066                 priv->wstats.qual.level =  ((rssi + old)/2) + 1;
3067         else
3068                 priv->wstats.qual.level =  ((rssi + old)/2);
3069         priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3070         priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3071 }
3072
3073 static void atmel_smooth_qual(struct atmel_private *priv)
3074 {
3075         unsigned long time_diff = (jiffies - priv->last_qual)/HZ;
3076         while (time_diff--) {
3077                 priv->last_qual += HZ;
3078                 priv->wstats.qual.qual = priv->wstats.qual.qual/2;
3079                 priv->wstats.qual.qual +=
3080                         priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3081                 priv->beacons_this_sec = 0;
3082         }
3083         priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3084         priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3085 }
3086
3087 /* deals with incoming managment frames. */
3088 static void atmel_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header,
3089                       u16 frame_len, u8 rssi)
3090 {
3091         u16 subtype;
3092
3093         switch (subtype = le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_STYPE) {
3094         case C80211_SUBTYPE_MGMT_BEACON :
3095         case C80211_SUBTYPE_MGMT_ProbeResponse:
3096
3097                 /* beacon frame has multiple variable-length fields -
3098                    never let an engineer loose with a data structure design. */
3099                 {
3100                         struct beacon_format {
3101                                 u64 timestamp;
3102                                 u16 interval;
3103                                 u16 capability;
3104                                 u8 ssid_el_id;
3105                                 u8 ssid_length;
3106                                 /* ssid here */
3107                                 u8 rates_el_id;
3108                                 u8 rates_length;
3109                                 /* rates here */
3110                                 u8 ds_el_id;
3111                                 u8 ds_length;
3112                                 /* ds here */
3113                         } *beacon = (struct beacon_format *)priv->rx_buf;
3114
3115                         u8 channel, rates_length, ssid_length;
3116                         u64 timestamp = le64_to_cpu(beacon->timestamp);
3117                         u16 beacon_interval = le16_to_cpu(beacon->interval);
3118                         u16 capability = le16_to_cpu(beacon->capability);
3119                         u8 *beaconp = priv->rx_buf;
3120                         ssid_length = beacon->ssid_length;
3121                         /* this blows chunks. */
3122                         if (frame_len < 14 || frame_len < ssid_length + 15)
3123                                 return;
3124                         rates_length = beaconp[beacon->ssid_length + 15];
3125                         if (frame_len < ssid_length + rates_length + 18)
3126                                 return;
3127                         if (ssid_length >  MAX_SSID_LENGTH)
3128                                 return;
3129                         channel = beaconp[ssid_length + rates_length + 18];
3130
3131                         if (priv->station_state == STATION_STATE_READY) {
3132                                 smooth_rssi(priv, rssi);
3133                                 if (is_frame_from_current_bss(priv, header)) {
3134                                         priv->beacons_this_sec++;
3135                                         atmel_smooth_qual(priv);
3136                                         if (priv->last_beacon_timestamp) {
3137                                                 /* Note truncate this to 32 bits - kernel can't divide a long long */
3138                                                 u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3139                                                 int beacons = beacon_delay / (beacon_interval * 1000);
3140                                                 if (beacons > 1)
3141                                                         priv->wstats.miss.beacon += beacons - 1;
3142                                         }
3143                                         priv->last_beacon_timestamp = timestamp;
3144                                         handle_beacon_probe(priv, capability, channel);
3145                                 }
3146                         }
3147
3148                         if (priv->station_state == STATION_STATE_SCANNING )
3149                                 store_bss_info(priv, header, capability, beacon_interval, channel,
3150                                                rssi, ssid_length, &beacon->rates_el_id,
3151                                                subtype == C80211_SUBTYPE_MGMT_BEACON) ;
3152                 }
3153                 break;
3154
3155         case C80211_SUBTYPE_MGMT_Authentication:
3156
3157                 if (priv->station_state == STATION_STATE_AUTHENTICATING)
3158                         authenticate(priv, frame_len);
3159
3160                 break;
3161
3162         case C80211_SUBTYPE_MGMT_ASS_RESPONSE:
3163         case C80211_SUBTYPE_MGMT_REASS_RESPONSE:
3164
3165                 if (priv->station_state == STATION_STATE_ASSOCIATING ||
3166                     priv->station_state == STATION_STATE_REASSOCIATING)
3167                         associate(priv, frame_len, subtype);
3168
3169                 break;
3170
3171         case C80211_SUBTYPE_MGMT_DISASSOSIATION:
3172                 if (priv->station_is_associated &&
3173                     priv->operating_mode == IW_MODE_INFRA &&
3174                     is_frame_from_current_bss(priv, header)) {
3175                         priv->station_was_associated = 0;
3176                         priv->station_is_associated = 0;
3177
3178                         atmel_enter_state(priv, STATION_STATE_JOINNING);
3179                         join(priv, BSS_TYPE_INFRASTRUCTURE);
3180                 }
3181
3182                 break;
3183
3184         case C80211_SUBTYPE_MGMT_Deauthentication:
3185                 if (priv->operating_mode == IW_MODE_INFRA &&
3186                     is_frame_from_current_bss(priv, header)) {
3187                         priv->station_was_associated = 0;
3188
3189                         atmel_enter_state(priv, STATION_STATE_JOINNING);
3190                         join(priv, BSS_TYPE_INFRASTRUCTURE);
3191                 }
3192
3193                 break;
3194         }
3195 }
3196
3197 /* run when timer expires */
3198 static void atmel_management_timer(u_long a)
3199 {
3200   struct net_device *dev = (struct net_device *) a;
3201   struct atmel_private *priv = netdev_priv(dev);
3202   unsigned long flags;
3203
3204   /* Check if the card has been yanked. */
3205   if (priv->card && priv->present_callback &&
3206       !(*priv->present_callback)(priv->card))
3207           return;
3208
3209   spin_lock_irqsave(&priv->irqlock, flags);
3210
3211   switch (priv->station_state) {
3212
3213   case STATION_STATE_AUTHENTICATING:
3214           if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3215                   atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3216                   priv->station_is_associated = 0;
3217                   priv->AuthenticationRequestRetryCnt = 0;
3218                   restart_search(priv);
3219           } else {
3220                   priv->AuthenticationRequestRetryCnt++;
3221                   priv->CurrentAuthentTransactionSeqNum = 0x0001;
3222                   mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3223                   send_authentication_request(priv, NULL, 0);
3224           }
3225
3226           break;
3227
3228   case STATION_STATE_ASSOCIATING:
3229           if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3230                   atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3231                   priv->station_is_associated = 0;
3232                   priv->AssociationRequestRetryCnt = 0;
3233                   restart_search(priv);
3234           } else {
3235                   priv->AssociationRequestRetryCnt++;
3236                   mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3237                   send_association_request(priv, 0);
3238           }
3239
3240           break;
3241
3242   case STATION_STATE_REASSOCIATING:
3243           if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3244                   atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3245                   priv->station_is_associated = 0;
3246                   priv->ReAssociationRequestRetryCnt = 0;
3247                   restart_search(priv);
3248           } else {
3249                   priv->ReAssociationRequestRetryCnt++;
3250                   mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3251                   send_association_request(priv, 1);
3252           }
3253
3254           break;
3255
3256   default:
3257           break;
3258   }
3259
3260   spin_unlock_irqrestore(&priv->irqlock, flags);
3261 }
3262
3263 static void atmel_command_irq(struct atmel_private *priv)
3264 {
3265         u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3266         u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3267         int fast_scan;
3268
3269         if (status == CMD_STATUS_IDLE ||
3270             status == CMD_STATUS_IN_PROGRESS)
3271                 return;
3272
3273         switch (command){
3274
3275         case CMD_Start:
3276                 if (status == CMD_STATUS_COMPLETE) {
3277                         priv->station_was_associated = priv->station_is_associated;
3278                         atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3279                                       (u8 *)priv->CurrentBSSID, 6);
3280                         atmel_enter_state(priv, STATION_STATE_READY);
3281                 }
3282                 break;
3283
3284         case CMD_Scan:
3285                 fast_scan = priv->fast_scan;
3286                 priv->fast_scan = 0;
3287
3288                 if (status != CMD_STATUS_COMPLETE) {
3289                         atmel_scan(priv, 1);
3290                 } else {
3291                         int bss_index = retrieve_bss(priv);
3292                         if (bss_index != -1) {
3293                                 atmel_join_bss(priv, bss_index);
3294                         } else if (priv->operating_mode == IW_MODE_ADHOC &&
3295                                    priv->SSID_size != 0) {
3296                                 start(priv, BSS_TYPE_AD_HOC);
3297                         } else {
3298                                 priv->fast_scan = !fast_scan;
3299                                 atmel_scan(priv, 1);
3300                         }
3301                         priv->site_survey_state = SITE_SURVEY_COMPLETED;
3302                 }
3303                 break;
3304
3305         case CMD_SiteSurvey:
3306                 priv->fast_scan = 0;
3307
3308                 if (status != CMD_STATUS_COMPLETE)
3309                         return;
3310
3311                 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3312                 if (priv->station_is_associated) {
3313                         atmel_enter_state(priv, STATION_STATE_READY);
3314                 } else {
3315                         atmel_scan(priv, 1);
3316                 }
3317                 break;
3318
3319         case CMD_Join:
3320                 if (status == CMD_STATUS_COMPLETE) {
3321                         if (priv->operating_mode == IW_MODE_ADHOC) {
3322                                 priv->station_was_associated = priv->station_is_associated;
3323                                 atmel_enter_state(priv, STATION_STATE_READY);
3324                         } else {
3325                                 priv->AuthenticationRequestRetryCnt = 0;
3326                                 atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
3327
3328                                 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3329                                 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3330                                 send_authentication_request(priv, NULL, 0);
3331                         }
3332                         return;
3333                 }
3334
3335                 atmel_scan(priv, 1);
3336
3337         }
3338 }
3339
3340 static int atmel_wakeup_firmware(struct atmel_private *priv)
3341 {
3342         struct host_info_struct *iface = &priv->host_info;
3343         u16 mr1, mr3;
3344         int i;
3345
3346         if (priv->card_type == CARD_TYPE_SPI_FLASH)
3347                 atmel_set_gcr(priv->dev, GCR_REMAP);
3348
3349         /* wake up on-board processor */
3350         atmel_clear_gcr(priv->dev, 0x0040);
3351         atmel_write16(priv->dev, BSR, BSS_SRAM);
3352
3353         if (priv->card_type == CARD_TYPE_SPI_FLASH)
3354                 mdelay(100);
3355
3356         /* and wait for it */
3357         for (i =  LOOP_RETRY_LIMIT; i; i--) {
3358                 mr1 = atmel_read16(priv->dev, MR1);
3359                 mr3 = atmel_read16(priv->dev, MR3);
3360
3361                 if (mr3 & MAC_BOOT_COMPLETE)
3362                         break;
3363                 if (mr1 & MAC_BOOT_COMPLETE &&
3364                     priv->bus_type == BUS_TYPE_PCCARD)
3365                         break;
3366         }
3367
3368         if (i == 0) {
3369                 printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3370                 return 0;
3371         }
3372
3373         if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3374                 printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3375                 return 0;
3376         }
3377
3378         /* now check for completion of MAC initialization through
3379            the FunCtrl field of the IFACE, poll MR1 to detect completion of
3380            MAC initialization, check completion status, set interrupt mask,
3381            enables interrupts and calls Tx and Rx initialization functions */
3382
3383         atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
3384
3385         for (i =  LOOP_RETRY_LIMIT; i; i--) {
3386                 mr1 = atmel_read16(priv->dev, MR1);
3387                 mr3 = atmel_read16(priv->dev, MR3);
3388
3389                 if (mr3 & MAC_INIT_COMPLETE)
3390                         break;
3391                 if (mr1 & MAC_INIT_COMPLETE &&
3392                     priv->bus_type == BUS_TYPE_PCCARD)
3393                         break;
3394         }
3395
3396         if (i == 0) {
3397                 printk(KERN_ALERT "%s: MAC failed to initialise.\n", priv->dev->name);
3398                 return 0;
3399         }
3400
3401         /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3402         if ((mr3 & MAC_INIT_COMPLETE) &&
3403             !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3404                 printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3405                 return 0;
3406         }
3407         if ((mr1 & MAC_INIT_COMPLETE) &&
3408             !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3409                 printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3410                 return 0;
3411         }
3412
3413         atmel_copy_to_host(priv->dev, (unsigned char *)iface,
3414                            priv->host_info_base, sizeof(*iface));
3415
3416         iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3417         iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3418         iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3419         iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3420         iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3421         iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3422         iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3423         iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3424         iface->build_version = le16_to_cpu(iface->build_version);
3425         iface->command_pos = le16_to_cpu(iface->command_pos);
3426         iface->major_version = le16_to_cpu(iface->major_version);
3427         iface->minor_version = le16_to_cpu(iface->minor_version);
3428         iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3429         iface->mac_status = le16_to_cpu(iface->mac_status);
3430
3431         return 1;
3432 }
3433
3434 /* determine type of memory and MAC address */
3435 static int probe_atmel_card(struct net_device *dev)
3436 {
3437         int rc = 0;
3438         struct atmel_private *priv = netdev_priv(dev);
3439
3440         /* reset pccard */
3441         if (priv->bus_type == BUS_TYPE_PCCARD)
3442                 atmel_write16(dev, GCR, 0x0060);
3443
3444         atmel_write16(dev, GCR, 0x0040);
3445         mdelay(500);
3446
3447         if (atmel_read16(dev, MR2) == 0) {
3448                 /* No stored firmware so load a small stub which just
3449                    tells us the MAC address */
3450                 int i;
3451                 priv->card_type = CARD_TYPE_EEPROM;
3452                 atmel_write16(dev, BSR, BSS_IRAM);
3453                 atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3454                 atmel_set_gcr(dev, GCR_REMAP);
3455                 atmel_clear_gcr(priv->dev, 0x0040);
3456                 atmel_write16(dev, BSR, BSS_SRAM);
3457                 for (i =  LOOP_RETRY_LIMIT; i; i--)
3458                         if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3459                                 break;
3460                 if (i == 0) {
3461                         printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3462                 } else {
3463                         atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3464                         /* got address, now squash it again until the network
3465                            interface is opened */
3466                         if (priv->bus_type == BUS_TYPE_PCCARD)
3467                                 atmel_write16(dev, GCR, 0x0060);
3468                         atmel_write16(dev, GCR, 0x0040);
3469                         rc = 1;
3470                 }
3471         } else if (atmel_read16(dev, MR4) == 0) {
3472                 /* Mac address easy in this case. */
3473                 priv->card_type = CARD_TYPE_PARALLEL_FLASH;
3474                 atmel_write16(dev,  BSR, 1);
3475                 atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3476                 atmel_write16(dev,  BSR, 0x200);
3477                 rc = 1;
3478         } else {
3479                 /* Standard firmware in flash, boot it up and ask
3480                    for the Mac Address */
3481                 priv->card_type = CARD_TYPE_SPI_FLASH;
3482                 if (atmel_wakeup_firmware(priv)) {
3483                         atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
3484
3485                         /* got address, now squash it again until the network
3486                            interface is opened */
3487                         if (priv->bus_type == BUS_TYPE_PCCARD)
3488                                 atmel_write16(dev, GCR, 0x0060);
3489                         atmel_write16(dev, GCR, 0x0040);
3490                         rc = 1;
3491                 }
3492         }
3493
3494         if (rc) {
3495                 if (dev->dev_addr[0] == 0xFF) {
3496                         u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00};
3497                         printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3498                         memcpy(dev->dev_addr, default_mac, 6);
3499                 }
3500                 printk(KERN_INFO "%s: MAC address %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
3501                        dev->name,
3502                        dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
3503                        dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5] );
3504
3505         }
3506
3507         return rc;
3508 }
3509
3510 static void build_wep_mib(struct atmel_private *priv)
3511 /* Move the encyption information on the MIB structure.
3512    This routine is for the pre-WPA firmware: later firmware has
3513    a different format MIB and a different routine. */
3514 {
3515         struct { /* NB this is matched to the hardware, don't change. */
3516                 u8 wep_is_on;
3517                 u8 default_key; /* 0..3 */
3518                 u8 reserved;
3519                 u8 exclude_unencrypted;
3520
3521                 u32 WEPICV_error_count;
3522                 u32 WEP_excluded_count;
3523
3524                 u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
3525                 u8 encryption_level; /* 0, 1, 2 */
3526                 u8 reserved2[3];
3527         } mib;
3528         int i;
3529
3530         mib.wep_is_on = priv->wep_is_on;
3531         if (priv->wep_is_on) {
3532                 if (priv->wep_key_len[priv->default_key] > 5)
3533                         mib.encryption_level = 2;
3534                 else
3535                         mib.encryption_level = 1;
3536         } else {
3537                 mib.encryption_level = 0;
3538         }
3539
3540         mib.default_key = priv->default_key;
3541         mib.exclude_unencrypted = priv->exclude_unencrypted;
3542
3543         for(i = 0; i < MAX_ENCRYPTION_KEYS;  i++)
3544                 memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
3545
3546         atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3547 }
3548
3549 static void build_wpa_mib(struct atmel_private *priv)
3550 {
3551         /* This is for the later (WPA enabled) firmware. */
3552
3553         struct { /* NB this is matched to the hardware, don't change. */
3554                 u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3555                 u8 receiver_address[6];
3556                 u8 wep_is_on;
3557                 u8 default_key; /* 0..3 */
3558                 u8 group_key;
3559                 u8 exclude_unencrypted;
3560                 u8 encryption_type;
3561                 u8 reserved;
3562
3563                 u32 WEPICV_error_count;
3564                 u32 WEP_excluded_count;
3565
3566                 u8 key_RSC[4][8];
3567         } mib;
3568
3569         int i;
3570
3571         mib.wep_is_on = priv->wep_is_on;
3572         mib.exclude_unencrypted = priv->exclude_unencrypted;
3573         memcpy(mib.receiver_address, priv->CurrentBSSID, 6);
3574
3575         /* zero all the keys before adding in valid ones. */
3576         memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
3577
3578         if (priv->wep_is_on) {
3579                 /* There's a comment in the Atmel code to the effect that this is only valid
3580                    when still using WEP, it may need to be set to something to use WPA */
3581                 memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
3582
3583                 mib.default_key = mib.group_key = 255;
3584                 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3585                         if (priv->wep_key_len[i] > 0) {
3586                                 memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3587                                 if (i == priv->default_key) {
3588                                         mib.default_key = i;
3589                                         mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
3590                                         mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
3591                                 } else {
3592                                         mib.group_key = i;
3593                                         priv->group_cipher_suite = priv->pairwise_cipher_suite;
3594                                         mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
3595                                         mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
3596                                 }
3597                         }
3598                 }
3599                 if (mib.default_key == 255)
3600                         mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3601                 if (mib.group_key == 255)
3602                         mib.group_key = mib.default_key;
3603
3604         }
3605
3606         atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3607 }
3608
3609 static int reset_atmel_card(struct net_device *dev)
3610 {
3611         /* do everything necessary to wake up the hardware, including
3612            waiting for the lightning strike and throwing the knife switch....
3613
3614            set all the Mib values which matter in the card to match
3615            their settings in the atmel_private structure. Some of these
3616            can be altered on the fly, but many (WEP, infrastucture or ad-hoc)
3617            can only be changed by tearing down the world and coming back through
3618            here.
3619
3620            This routine is also responsible for initialising some
3621            hardware-specific fields in the atmel_private structure,
3622            including a copy of the firmware's hostinfo stucture
3623            which is the route into the rest of the firmare datastructures. */
3624
3625         struct atmel_private *priv = netdev_priv(dev);
3626         u8 configuration;
3627
3628         /* data to add to the firmware names, in priority order
3629            this implemenents firmware versioning */
3630
3631         static char *firmware_modifier[] = {
3632                 "-wpa",
3633                 "",
3634                 NULL
3635         };
3636
3637         /* reset pccard */
3638         if (priv->bus_type == BUS_TYPE_PCCARD)
3639                 atmel_write16(priv->dev, GCR, 0x0060);
3640
3641         /* stop card , disable interrupts */
3642         atmel_write16(priv->dev, GCR, 0x0040);
3643
3644         if (priv->card_type == CARD_TYPE_EEPROM) {
3645                 /* copy in firmware if needed */
3646                 const struct firmware *fw_entry = NULL;
3647                 unsigned char *fw;
3648                 int len = priv->firmware_length;
3649                 if (!(fw = priv->firmware)) {
3650                         if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3651                                 if (strlen(priv->firmware_id) == 0) {
3652                                         printk(KERN_INFO
3653                                                "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3654                                                dev->name);
3655                                         printk(KERN_INFO
3656                                                "%s: if not, use the firmware= module parameter.\n",
3657                                                dev->name);
3658                                         strcpy(priv->firmware_id, "atmel_at76c502.bin");
3659                                 }
3660                                 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) != 0) {
3661                                         printk(KERN_ALERT
3662                                                "%s: firmware %s is missing, cannot continue.\n",
3663                                                dev->name, priv->firmware_id);
3664                                         return 0;
3665                                 }
3666                         } else {
3667                                 int fw_index = 0;
3668                                 int success = 0;
3669
3670                                 /* get firmware filename entry based on firmware type ID */
3671                                 while (fw_table[fw_index].fw_type != priv->firmware_type
3672                                                 && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3673                                         fw_index++;
3674
3675                                 /* construct the actual firmware file name */
3676                                 if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3677                                         int i;
3678                                         for (i = 0; firmware_modifier[i]; i++) {
3679                                                 snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3680                                                         firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3681                                                 priv->firmware_id[31] = '\0';
3682                                                 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3683                                                         success = 1;
3684                                                         break;
3685                                                 }
3686                                         }
3687                                 }
3688                                 if (!success) {
3689                                         printk(KERN_ALERT
3690                                                "%s: firmware %s is missing, cannot start.\n",
3691                                                dev->name, priv->firmware_id);
3692                                         priv->firmware_id[0] = '\0';
3693                                         return 0;
3694                                 }
3695                         }
3696
3697                         fw = fw_entry->data;
3698                         len = fw_entry->size;
3699                 }
3700
3701                 if (len <= 0x6000) {
3702                         atmel_write16(priv->dev, BSR, BSS_IRAM);
3703                         atmel_copy_to_card(priv->dev, 0, fw, len);
3704                         atmel_set_gcr(priv->dev, GCR_REMAP);
3705                 } else {
3706                         /* Remap */
3707                         atmel_set_gcr(priv->dev, GCR_REMAP);
3708                         atmel_write16(priv->dev, BSR, BSS_IRAM);
3709                         atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3710                         atmel_write16(priv->dev, BSR, 0x2ff);
3711                         atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3712                 }
3713
3714                 if (fw_entry)
3715                         release_firmware(fw_entry);
3716         }
3717
3718         if (!atmel_wakeup_firmware(priv))
3719                 return 0;
3720
3721         /* Check the version and set the correct flag for wpa stuff,
3722            old and new firmware is incompatible.
3723            The pre-wpa 3com firmware reports major version 5,
3724            the wpa 3com firmware is major version 4 and doesn't need
3725            the 3com broken-ness filter. */
3726         priv->use_wpa = (priv->host_info.major_version == 4);
3727         priv->radio_on_broken = (priv->host_info.major_version == 5);
3728
3729         /* unmask all irq sources */
3730         atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
3731
3732         /* int Tx system and enable Tx */
3733         atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3734         atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3735         atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3736         atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3737
3738         priv->tx_desc_free = priv->host_info.tx_desc_count;
3739         priv->tx_desc_head = 0;
3740         priv->tx_desc_tail = 0;
3741         priv->tx_desc_previous = 0;
3742         priv->tx_free_mem = priv->host_info.tx_buff_size;
3743         priv->tx_buff_head = 0;
3744         priv->tx_buff_tail = 0;
3745
3746         configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3747         atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3748                                    configuration | FUNC_CTRL_TxENABLE);
3749
3750         /* init Rx system and enable */
3751         priv->rx_desc_head = 0;
3752
3753         configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3754         atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3755                                    configuration | FUNC_CTRL_RxENABLE);
3756
3757         if (!priv->radio_on_broken) {
3758                 if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
3759                     CMD_STATUS_REJECTED_RADIO_OFF) {
3760                         printk(KERN_INFO
3761                                "%s: cannot turn the radio on. (Hey radio, you're beautiful!)\n",
3762                                dev->name);
3763                         return 0;
3764                 }
3765         }
3766
3767         /* set up enough MIB values to run. */
3768         atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
3769         atmel_set_mib8(priv, Local_Mib_Type,  LOCAL_MIB_TX_PROMISCUOUS_POS,  PROM_MODE_OFF);
3770         atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
3771         atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
3772         atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
3773         atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
3774         atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
3775         atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
3776                       priv->dev->dev_addr, 6);
3777         atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3778         atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3779         atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
3780         atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
3781         atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
3782         if (priv->use_wpa)
3783                 build_wpa_mib(priv);
3784         else
3785                 build_wep_mib(priv);
3786
3787         return 1;
3788 }
3789
3790 static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size)
3791 {
3792         if (cmd)
3793                 atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
3794                                    cmd, cmd_size);
3795
3796         atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
3797         atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
3798 }
3799
3800 static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size)
3801 {
3802         int i, status;
3803
3804         atmel_send_command(priv, command, cmd, cmd_size);
3805
3806         for (i = 5000; i; i--) {
3807                 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3808                 if (status != CMD_STATUS_IDLE &&
3809                     status != CMD_STATUS_IN_PROGRESS)
3810                         break;
3811                 udelay(20);
3812         }
3813
3814         if (i == 0) {
3815                 printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
3816                 status =  CMD_STATUS_HOST_ERROR;
3817         } else {
3818                 if (command != CMD_EnableRadio)
3819                         status = CMD_STATUS_COMPLETE;
3820         }
3821
3822         return status;
3823 }
3824
3825 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
3826 {
3827         struct get_set_mib m;
3828         m.type = type;
3829         m.size = 1;
3830         m.index = index;
3831
3832         atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
3833         return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
3834 }
3835
3836 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
3837 {
3838         struct get_set_mib m;
3839         m.type = type;
3840         m.size = 1;
3841         m.index = index;
3842         m.data[0] = data;
3843
3844         atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
3845 }
3846
3847 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index, u16 data)
3848 {
3849         struct get_set_mib m;
3850         m.type = type;
3851         m.size = 2;
3852         m.index = index;
3853         m.data[0] = data;
3854         m.data[1] = data >> 8;
3855
3856         atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
3857 }
3858
3859 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len)
3860 {
3861         struct get_set_mib m;
3862         m.type = type;
3863         m.size = data_len;
3864         m.index = index;
3865
3866         if (data_len > MIB_MAX_DATA_BYTES)
3867                 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
3868
3869         memcpy(m.data, data, data_len);
3870         atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
3871 }
3872
3873 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len)
3874 {
3875         struct get_set_mib m;
3876         m.type = type;
3877         m.size = data_len;
3878         m.index = index;
3879
3880         if (data_len > MIB_MAX_DATA_BYTES)
3881                 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
3882
3883         atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
3884         atmel_copy_to_host(priv->dev, data,
3885                            atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
3886 }
3887
3888 static void atmel_writeAR(struct net_device *dev, u16 data)
3889 {
3890         int i;
3891         outw(data, dev->base_addr + AR);
3892         /* Address register appears to need some convincing..... */
3893         for (i = 0; data != inw(dev->base_addr + AR) && i<10; i++)
3894                 outw(data, dev->base_addr + AR);
3895 }
3896
3897 static void atmel_copy_to_card(struct net_device *dev, u16 dest, unsigned char *src, u16 len)
3898 {
3899         int i;
3900         atmel_writeAR(dev, dest);
3901         if (dest % 2) {
3902                 atmel_write8(dev, DR, *src);
3903                 src++; len--;
3904         }
3905         for (i = len; i > 1 ; i -= 2) {
3906                 u8 lb = *src++;
3907                 u8 hb = *src++;
3908                 atmel_write16(dev, DR, lb | (hb << 8));
3909         }
3910         if (i)
3911                 atmel_write8(dev, DR, *src);
3912 }
3913
3914 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest, u16 src, u16 len)
3915 {
3916         int i;
3917         atmel_writeAR(dev, src);
3918         if (src % 2) {
3919                 *dest = atmel_read8(dev, DR);
3920                 dest++; len--;
3921         }
3922         for (i = len; i > 1 ; i -= 2) {
3923                 u16 hw = atmel_read16(dev, DR);
3924                 *dest++ = hw;
3925                 *dest++ = hw >> 8;
3926         }
3927         if (i)
3928                 *dest = atmel_read8(dev, DR);
3929 }
3930
3931 static void atmel_set_gcr(struct net_device *dev, u16 mask)
3932 {
3933         outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
3934 }
3935
3936 static void atmel_clear_gcr(struct net_device *dev, u16 mask)
3937 {
3938         outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
3939 }
3940
3941 static int atmel_lock_mac(struct atmel_private *priv)
3942 {
3943         int i, j = 20;
3944  retry:
3945         for (i = 5000; i; i--) {
3946                 if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
3947                         break;
3948                 udelay(20);
3949         }
3950
3951         if (!i) return 0; /* timed out */
3952
3953         atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
3954         if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
3955                 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
3956                 if (!j--) return 0; /* timed out */
3957                 goto retry;
3958         }
3959
3960         return 1;
3961 }
3962
3963 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
3964 {
3965         atmel_writeAR(priv->dev, pos);
3966         atmel_write16(priv->dev, DR, data); /* card is little-endian */
3967         atmel_write16(priv->dev, DR, data >> 16);
3968 }
3969
3970 /***************************************************************************/
3971 /* There follows the source form of the MAC address reading firmware       */
3972 /***************************************************************************/
3973 #if 0
3974
3975 /* Copyright 2003 Matthew T. Russotto                                      */
3976 /* But derived from the Atmel 76C502 firmware written by Atmel and         */
3977 /* included in "atmel wireless lan drivers" package                        */
3978 /**
3979     This file is part of net.russotto.AtmelMACFW, hereto referred to
3980     as AtmelMACFW
3981
3982     AtmelMACFW is free software; you can redistribute it and/or modify
3983     it under the terms of the GNU General Public License version 2
3984     as published by the Free Software Foundation.
3985
3986     AtmelMACFW is distributed in the hope that it will be useful,
3987     but WITHOUT ANY WARRANTY; without even the implied warranty of
3988     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
3989     GNU General Public License for more details.
3990
3991     You should have received a copy of the GNU General Public License
3992     along with AtmelMACFW; if not, write to the Free Software
3993     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
3994
3995 ****************************************************************************/
3996 /* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E        */
3997 /* It will probably work on the 76C504 and 76C502 RFMD_3COM                */
3998 /* It only works on SPI EEPROM versions of the card.                       */
3999
4000 /* This firmware initializes the SPI controller and clock, reads the MAC   */
4001 /* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC  */
4002 /* address in MR2, and sets MR3 to 0x10 to indicate it is done             */
4003 /* It also puts a complete copy of the EEPROM in SRAM with the offset in   */
4004 /* MR4, for investigational purposes (maybe we can determine chip type     */
4005 /* from that?)                                                             */
4006
4007         .org 0
4008     .set MRBASE, 0x8000000
4009         .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4010         .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4011         .set SRAM_BASE,  0x02000000
4012         .set SP_BASE,    0x0F300000
4013         .set UNK_BASE,   0x0F000000 /* Some internal device, but which one? */
4014         .set SPI_CGEN_BASE,  0x0E000000 /* Some internal device, but which one? */
4015         .set UNK3_BASE,  0x02014000 /* Some internal device, but which one? */
4016         .set STACK_BASE, 0x5600
4017         .set SP_SR, 0x10
4018         .set SP_TDRE, 2 /* status register bit -- TDR empty */
4019         .set SP_RDRF, 1 /* status register bit -- RDR full */
4020         .set SP_SWRST, 0x80
4021         .set SP_SPIEN, 0x1
4022         .set SP_CR, 0   /* control register */
4023         .set SP_MR, 4   /* mode register */
4024         .set SP_RDR, 0x08 /* Read Data Register */
4025         .set SP_TDR, 0x0C /* Transmit Data Register */
4026         .set SP_CSR0, 0x30 /* chip select registers */
4027         .set SP_CSR1, 0x34
4028         .set SP_CSR2, 0x38
4029         .set SP_CSR3, 0x3C
4030         .set NVRAM_CMD_RDSR, 5 /* read status register */
4031         .set NVRAM_CMD_READ, 3 /* read data */
4032         .set NVRAM_SR_RDY, 1 /* RDY bit.  This bit is inverted */
4033         .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4034                                   serial output, since SO is normally high.  But it
4035                                   does cause 8 clock cycles and thus 8 bits to be
4036                                   clocked in to the chip.  See Atmel's SPI
4037                                   controller (e.g. AT91M55800) timing and 4K
4038                                   SPI EEPROM manuals */
4039
4040         .set NVRAM_SCRATCH, 0x02000100  /* arbitrary area for scratchpad memory */
4041         .set NVRAM_IMAGE, 0x02000200
4042         .set NVRAM_LENGTH, 0x0200
4043         .set MAC_ADDRESS_MIB, SRAM_BASE
4044         .set MAC_ADDRESS_LENGTH, 6
4045         .set MAC_BOOT_FLAG, 0x10
4046         .set MR1, 0
4047         .set MR2, 4
4048         .set MR3, 8
4049         .set MR4, 0xC
4050 RESET_VECTOR:
4051         b RESET_HANDLER
4052 UNDEF_VECTOR:
4053         b HALT1
4054 SWI_VECTOR:
4055         b HALT1
4056 IABORT_VECTOR:
4057         b HALT1
4058 DABORT_VECTOR:
4059 RESERVED_VECTOR:
4060         b HALT1
4061 IRQ_VECTOR:
4062         b HALT1
4063 FIQ_VECTOR:
4064         b HALT1
4065 HALT1:  b HALT1
4066 RESET_HANDLER:
4067         mov     r0, #CPSR_INITIAL
4068         msr     CPSR_c, r0      /* This is probably unnecessary */
4069
4070 /* I'm guessing this is initializing clock generator electronics for SPI */
4071         ldr     r0, =SPI_CGEN_BASE
4072         mov     r1, #0
4073         mov     r1, r1, lsl #3
4074         orr     r1,r1, #0
4075         str     r1, [r0]
4076         ldr     r1, [r0, #28]
4077         bic     r1, r1, #16
4078         str     r1, [r0, #28]
4079         mov     r1, #1
4080         str     r1, [r0, #8]
4081
4082         ldr     r0, =MRBASE
4083         mov     r1, #0
4084         strh    r1, [r0, #MR1]
4085         strh    r1, [r0, #MR2]
4086         strh    r1, [r0, #MR3]
4087         strh    r1, [r0, #MR4]
4088
4089         mov     sp, #STACK_BASE
4090         bl      SP_INIT
4091         mov     r0, #10
4092         bl      DELAY9
4093         bl      GET_MAC_ADDR
4094         bl      GET_WHOLE_NVRAM
4095         ldr     r0, =MRBASE
4096         ldr     r1, =MAC_ADDRESS_MIB
4097         strh    r1, [r0, #MR2]
4098         ldr     r1, =NVRAM_IMAGE
4099         strh    r1, [r0, #MR4]
4100         mov     r1, #MAC_BOOT_FLAG
4101         strh    r1, [r0, #MR3]
4102 HALT2:  b HALT2
4103 .func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4104 GET_WHOLE_NVRAM:
4105         stmdb   sp!, {lr}
4106         mov     r2, #0 /* 0th bytes of NVRAM */
4107         mov     r3, #NVRAM_LENGTH
4108         mov     r1, #0          /* not used in routine */
4109         ldr     r0, =NVRAM_IMAGE
4110         bl      NVRAM_XFER
4111         ldmia   sp!, {lr}
4112         bx      lr
4113 .endfunc
4114
4115 .func Get_MAC_Addr, GET_MAC_ADDR
4116 GET_MAC_ADDR:
4117         stmdb   sp!, {lr}
4118         mov     r2, #0x120      /* address of MAC Address within NVRAM */
4119         mov     r3, #MAC_ADDRESS_LENGTH
4120         mov     r1, #0          /* not used in routine */
4121         ldr     r0, =MAC_ADDRESS_MIB
4122         bl      NVRAM_XFER
4123         ldmia   sp!, {lr}
4124         bx      lr
4125 .endfunc
4126 .ltorg
4127 .func Delay9, DELAY9
4128 DELAY9:
4129         adds    r0, r0, r0, LSL #3   /* r0 = r0 * 9 */
4130 DELAYLOOP:
4131         beq     DELAY9_done
4132         subs    r0, r0, #1
4133         b       DELAYLOOP
4134 DELAY9_done:
4135         bx      lr
4136 .endfunc
4137
4138 .func SP_Init, SP_INIT
4139 SP_INIT:
4140         mov     r1, #SP_SWRST
4141         ldr     r0, =SP_BASE
4142         str     r1, [r0, #SP_CR] /* reset the SPI */
4143         mov     r1, #0
4144         str     r1, [r0, #SP_CR] /* release SPI from reset state */
4145         mov     r1, #SP_SPIEN
4146         str     r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4147         str     r1, [r0, #SP_CR] /* enable the SPI */
4148
4149 /*  My guess would be this turns on the SPI clock */
4150         ldr     r3, =SPI_CGEN_BASE
4151         ldr     r1, [r3, #28]
4152         orr     r1, r1, #0x2000
4153         str     r1, [r3, #28]
4154
4155         ldr     r1, =0x2000c01
4156         str     r1, [r0, #SP_CSR0]
4157         ldr     r1, =0x2000201
4158         str     r1, [r0, #SP_CSR1]
4159         str     r1, [r0, #SP_CSR2]
4160         str     r1, [r0, #SP_CSR3]
4161         ldr     r1, [r0, #SP_SR]
4162         ldr     r0, [r0, #SP_RDR]
4163         bx      lr
4164 .endfunc
4165 .func NVRAM_Init, NVRAM_INIT
4166 NVRAM_INIT:
4167         ldr     r1, =SP_BASE
4168         ldr     r0, [r1, #SP_RDR]
4169         mov     r0, #NVRAM_CMD_RDSR
4170         str     r0, [r1, #SP_TDR]
4171 SP_loop1:
4172         ldr     r0, [r1, #SP_SR]
4173         tst     r0, #SP_TDRE
4174         beq     SP_loop1
4175
4176         mov     r0, #SPI_8CLOCKS
4177         str     r0, [r1, #SP_TDR]
4178 SP_loop2:
4179         ldr     r0, [r1, #SP_SR]
4180         tst     r0, #SP_TDRE
4181         beq     SP_loop2
4182
4183         ldr     r0, [r1, #SP_RDR]
4184 SP_loop3:
4185         ldr     r0, [r1, #SP_SR]
4186         tst     r0, #SP_RDRF
4187         beq     SP_loop3
4188
4189         ldr     r0, [r1, #SP_RDR]
4190         and     r0, r0, #255
4191         bx      lr
4192 .endfunc
4193
4194 .func NVRAM_Xfer, NVRAM_XFER
4195         /* r0 = dest address */
4196         /* r1 = not used */
4197         /* r2 = src address within NVRAM */
4198         /* r3 = length */
4199 NVRAM_XFER:
4200         stmdb   sp!, {r4, r5, lr}
4201         mov     r5, r0          /* save r0 (dest address) */
4202         mov     r4, r3          /* save r3 (length) */
4203         mov     r0, r2, LSR #5 /*  SPI memories put A8 in the command field */
4204         and     r0, r0, #8
4205         add     r0, r0, #NVRAM_CMD_READ
4206         ldr     r1, =NVRAM_SCRATCH
4207         strb    r0, [r1, #0]    /* save command in NVRAM_SCRATCH[0] */
4208         strb    r2, [r1, #1]    /* save low byte of source address in NVRAM_SCRATCH[1] */
4209 _local1:
4210         bl      NVRAM_INIT
4211         tst     r0, #NVRAM_SR_RDY
4212         bne     _local1
4213         mov     r0, #20
4214         bl      DELAY9
4215         mov     r2, r4          /* length */
4216         mov     r1, r5          /* dest address */
4217         mov     r0, #2          /* bytes to transfer in command */
4218         bl      NVRAM_XFER2
4219         ldmia   sp!, {r4, r5, lr}
4220         bx      lr
4221 .endfunc
4222
4223 .func NVRAM_Xfer2, NVRAM_XFER2
4224 NVRAM_XFER2:
4225         stmdb   sp!, {r4, r5, r6, lr}
4226         ldr     r4, =SP_BASE
4227         mov     r3, #0
4228         cmp     r0, #0
4229         bls     _local2
4230         ldr     r5, =NVRAM_SCRATCH
4231 _local4:
4232         ldrb    r6, [r5, r3]
4233         str     r6, [r4, #SP_TDR]
4234 _local3:
4235         ldr     r6, [r4, #SP_SR]
4236         tst     r6, #SP_TDRE
4237         beq     _local3
4238         add     r3, r3, #1
4239         cmp     r3, r0 /* r0 is # of bytes to send out (command+addr) */
4240         blo     _local4
4241 _local2:
4242         mov     r3, #SPI_8CLOCKS
4243         str     r3, [r4, #SP_TDR]
4244         ldr     r0, [r4, #SP_RDR]
4245 _local5:
4246         ldr     r0, [r4, #SP_SR]
4247         tst     r0, #SP_RDRF
4248         beq     _local5
4249         ldr     r0, [r4, #SP_RDR] /* what's this byte?  It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4250         mov     r0, #0
4251         cmp     r2, #0  /* r2 is # of bytes to copy in */
4252         bls     _local6
4253 _local7:
4254         ldr     r5, [r4, #SP_SR]
4255         tst     r5, #SP_TDRE
4256         beq     _local7
4257         str     r3, [r4, #SP_TDR]  /* r3 has SPI_8CLOCKS */
4258 _local8:
4259         ldr     r5, [r4, #SP_SR]
4260         tst     r5, #SP_RDRF
4261         beq     _local8
4262         ldr     r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4263         strb    r5, [r1], #1 /* postindexed */
4264         add     r0, r0, #1
4265         cmp     r0, r2
4266         blo     _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4267 _local6:
4268         mov     r0, #200
4269         bl      DELAY9
4270         ldmia   sp!, {r4, r5, r6, lr}
4271         bx      lr
4272 #endif