3 * Driver for Prism II devices which would usually be driven by orinoco_cs,
4 * but are connected to the PCI bus by a PLX9052.
6 * Copyright (C) 2001 Daniel Barlow <dan@telent.net>
8 * The contents of this file are subject to the Mozilla Public License
9 * Version 1.1 (the "License"); you may not use this file except in
10 * compliance with the License. You may obtain a copy of the License
11 * at http://www.mozilla.org/MPL/
13 * Software distributed under the License is distributed on an "AS IS"
14 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
15 * the License for the specific language governing rights and
16 * limitations under the License.
18 * Alternatively, the contents of this file may be used under the
19 * terms of the GNU General Public License version 2 (the "GPL"), in
20 * which case the provisions of the GPL are applicable instead of the
21 * above. If you wish to allow the use of your version of this file
22 * only under the terms of the GPL and not to allow others to use your
23 * version of this file under the MPL, indicate your decision by
24 * deleting the provisions above and replace them with the notice and
25 * other provisions required by the GPL. If you do not delete the
26 * provisions above, a recipient may use your version of this file
27 * under either the MPL or the GPL.
29 * Caution: this is experimental and probably buggy. For success and
30 * failure reports for different cards and adaptors, see
31 * orinoco_plx_pci_id_table near the end of the file. If you have a
32 * card we don't have the PCI id for, and looks like it should work,
33 * drop me mail with the id and "it works"/"it doesn't work".
35 * Note: if everything gets detected fine but it doesn't actually send
36 * or receive packets, your first port of call should probably be to
37 * try newer firmware in the card. Especially if you're doing Ad-Hoc
40 * The actual driving is done by orinoco.c, this is just resource
41 * allocation stuff. The explanation below is courtesy of Ryan Niemi
42 * on the linux-wlan-ng list at
43 * http://archives.neohapsis.com/archives/dev/linux-wlan/2001-q1/0026.html
45 The PLX9052-based cards (WL11000 and several others) are a different
46 beast than the usual PCMCIA-based PRISM2 configuration expected by
47 wlan-ng. Here's the general details on how the WL11000 PCI adapter
50 - Two PCI I/O address spaces, one 0x80 long which contains the PLX9052
51 registers, and one that's 0x40 long mapped to the PCMCIA slot I/O
54 - One PCI memory address space, mapped to the PCMCIA memory space
57 After identifying the I/O and memory space, you can read through the
58 memory space to confirm the CIS's device ID or manufacturer ID to make
59 sure it's the expected card. Keep in mind that the PCMCIA spec specifies
60 the CIS as the lower 8 bits of each word read from the CIS, so to read the
61 bytes of the CIS, read every other byte (0,2,4,...). Passing that test,
62 you need to enable the I/O address space on the PCMCIA card via the PCMCIA
63 COR register. This is the first byte following the CIS. In my case
64 (which may not have any relation to what's on the PRISM2 cards), COR was
65 at offset 0x800 within the PCI memory space. Write 0x41 to the COR
66 register to enable I/O mode and to select level triggered interrupts. To
67 confirm you actually succeeded, read the COR register back and make sure
68 it actually got set to 0x41, incase you have an unexpected card inserted.
70 Following that, you can treat the second PCI I/O address space (the one
71 that's not 0x80 in length) as the PCMCIA I/O space.
73 Note that in the Eumitcom's source for their drivers, they register the
74 interrupt as edge triggered when registering it with the Windows kernel. I
75 don't recall how to register edge triggered on Linux (if it can be done at
76 all). But in some experimentation, I don't see much operational
77 difference between using either interrupt mode. Don't mess with the
78 interrupt mode in the COR register though, as the PLX9052 wants level
79 triggers with the way the serial EEPROM configures it on the WL11000.
81 There's some other little quirks related to timing that I bumped into, but
82 I don't recall right now. Also, there's two variants of the WL11000 I've
83 seen, revision A1 and T2. These seem to differ slightly in the timings
84 configured in the wait-state generator in the PLX9052. There have also
85 been some comments from Eumitcom that cards shouldn't be hot swapped,
86 apparently due to risk of cooking the PLX9052. I'm unsure why they
87 believe this, as I can't see anything in the design that would really
88 cause a problem, except for crashing drivers not written to expect it. And
89 having developed drivers for the WL11000, I'd say it's quite tricky to
90 write code that will successfully deal with a hot unplug. Very odd things
91 happen on the I/O side of things. But anyway, be warned. Despite that,
92 I've hot-swapped a number of times during debugging and driver development
93 for various reasons (stuck WAIT# line after the radio card's firmware
96 Hope this is enough info for someone to add PLX9052 support to the wlan-ng
97 card. In the case of the WL11000, the PCI ID's are 0x1639/0x0200, with
98 matching subsystem ID's. Other PLX9052-based manufacturers other than
99 Eumitcom (or on cards other than the WL11000) may have different PCI ID's.
101 If anyone needs any more specific info, let me know. I haven't had time
102 to implement support myself yet, and with the way things are going, might
103 not have time for a while..
108 #include <linux/config.h>
110 #include <linux/module.h>
111 #include <linux/kernel.h>
112 #include <linux/init.h>
113 #include <linux/sched.h>
114 #include <linux/ptrace.h>
115 #include <linux/slab.h>
116 #include <linux/string.h>
117 #include <linux/timer.h>
118 #include <linux/ioport.h>
119 #include <asm/uaccess.h>
121 #include <asm/system.h>
122 #include <linux/netdevice.h>
123 #include <linux/if_arp.h>
124 #include <linux/etherdevice.h>
125 #include <linux/wireless.h>
126 #include <linux/list.h>
127 #include <linux/pci.h>
128 #include <linux/fcntl.h>
130 #include <pcmcia/cisreg.h>
135 static char dev_info[] = "orinoco_plx";
137 #define COR_OFFSET (0x3e0 / 2) /* COR attribute offset of Prism2 PC card */
138 #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */
140 #define PLX_INTCSR 0x4c /* Interrupt Control and Status Register */
141 #define PLX_INTCSR_INTEN (1<<6) /* Interrupt Enable bit */
143 static const u16 cis_magic[] = {
144 0x0001, 0x0003, 0x0000, 0x0000, 0x00ff, 0x0017, 0x0004, 0x0067
147 static int orinoco_plx_init_one(struct pci_dev *pdev,
148 const struct pci_device_id *ent)
151 u16 *attr_mem = NULL;
153 struct orinoco_private *priv = NULL;
154 unsigned long pccard_ioaddr = 0;
155 unsigned long pccard_iolen = 0;
156 struct net_device *dev = NULL;
159 err = pci_enable_device(pdev);
163 /* Resource 2 is mapped to the PCMCIA space */
164 attr_mem = ioremap(pci_resource_start(pdev, 2), PAGE_SIZE);
168 printk(KERN_DEBUG "orinoco_plx: CIS: ");
169 for (i = 0; i < 16; i++) {
170 printk("%02X:", (int)attr_mem[i]);
174 /* Verify whether PC card is present */
175 /* FIXME: we probably need to be smarted about this */
176 if (memcmp(attr_mem, cis_magic, sizeof(cis_magic)) != 0) {
177 printk(KERN_ERR "orinoco_plx: The CIS value of Prism2 PC card is invalid.\n");
182 /* PCMCIA COR is the first byte following CIS: this write should
183 * enable I/O mode and select level-triggered interrupts */
184 attr_mem[COR_OFFSET] = COR_VALUE;
186 reg = attr_mem[COR_OFFSET];
187 if (reg != COR_VALUE) {
188 printk(KERN_ERR "orinoco_plx: Error setting COR value (reg=%x)\n", reg);
193 attr_mem = NULL; /* done with this now, it seems */
195 /* bjoern: We need to tell the card to enable interrupts, in
196 case the serial eprom didn't do this already. See the
197 PLX9052 data book, p8-1 and 8-24 for reference. */
198 addr = pci_resource_start(pdev, 1);
200 reg = inl(addr+PLX_INTCSR);
201 if (reg & PLX_INTCSR_INTEN)
202 printk(KERN_DEBUG "orinoco_plx: "
203 "Local Interrupt already enabled\n");
205 reg |= PLX_INTCSR_INTEN;
206 outl(reg, addr+PLX_INTCSR);
207 reg = inl(addr+PLX_INTCSR);
208 if(!(reg & PLX_INTCSR_INTEN)) {
209 printk(KERN_ERR "orinoco_plx: "
210 "Couldn't enable Local Interrupts\n");
215 /* and 3 to the PCMCIA slot I/O address space */
216 pccard_ioaddr = pci_resource_start(pdev, 3);
217 pccard_iolen = pci_resource_len(pdev, 3);
218 if (! request_region(pccard_ioaddr, pccard_iolen, dev_info)) {
219 printk(KERN_ERR "orinoco_plx: I/O resource 0x%lx @ 0x%lx busy\n",
220 pccard_iolen, pccard_ioaddr);
226 dev = alloc_orinocodev(0, NULL);
233 dev->base_addr = pccard_ioaddr;
234 SET_MODULE_OWNER(dev);
235 SET_NETDEV_DEV(dev, &pdev->dev);
238 "Detected Orinoco/Prism2 PLX device at %s irq:%d, io addr:0x%lx\n",
239 pci_name(pdev), pdev->irq, pccard_ioaddr);
241 hermes_struct_init(&(priv->hw), dev->base_addr,
242 HERMES_IO, HERMES_16BIT_REGSPACING);
243 pci_set_drvdata(pdev, dev);
245 err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ, dev->name, dev);
247 printk(KERN_ERR "orinoco_plx: Error allocating IRQ %d.\n", pdev->irq);
251 dev->irq = pdev->irq;
253 err = register_netdev(dev);
257 return 0; /* succeeded */
260 printk(KERN_DEBUG "orinoco_plx: init_one(), FAIL!\n");
264 free_irq(dev->irq, dev);
270 release_region(pccard_ioaddr, pccard_iolen);
275 pci_disable_device(pdev);
280 static void __devexit orinoco_plx_remove_one(struct pci_dev *pdev)
282 struct net_device *dev = pci_get_drvdata(pdev);
287 unregister_netdev(dev);
290 free_irq(dev->irq, dev);
292 pci_set_drvdata(pdev, NULL);
296 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
298 pci_disable_device(pdev);
302 static struct pci_device_id orinoco_plx_pci_id_table[] = {
303 {0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */
304 {0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */
305 {0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */
306 {0x1638, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* SMC EZConnect SMC2602W,
307 Eumitcom PCI WL11000,
309 {0x16ab, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* Global Sun Tech GL24110P */
310 {0x16ab, 0x1101, PCI_ANY_ID, PCI_ANY_ID,}, /* Reported working, but unknown */
311 {0x16ab, 0x1102, PCI_ANY_ID, PCI_ANY_ID,}, /* Linksys WDT11 */
312 {0x16ec, 0x3685, PCI_ANY_ID, PCI_ANY_ID,}, /* USR 2415 */
313 {0xec80, 0xec00, PCI_ANY_ID, PCI_ANY_ID,}, /* Belkin F5D6000 tested by
314 Brendan W. McAdams <rit@jacked-in.org> */
315 {0x10b7, 0x7770, PCI_ANY_ID, PCI_ANY_ID,}, /* 3Com AirConnect PCI tested by
316 Damien Persohn <damien@persohn.net> */
320 MODULE_DEVICE_TABLE(pci, orinoco_plx_pci_id_table);
322 static struct pci_driver orinoco_plx_driver = {
323 .name = "orinoco_plx",
324 .id_table = orinoco_plx_pci_id_table,
325 .probe = orinoco_plx_init_one,
326 .remove = __devexit_p(orinoco_plx_remove_one),
331 static char version[] __initdata = "orinoco_plx.c 0.13e (Daniel Barlow <dan@telent.net>, David Gibson <hermes@gibson.dropbear.id.au>)";
332 MODULE_AUTHOR("Daniel Barlow <dan@telent.net>");
333 MODULE_DESCRIPTION("Driver for wireless LAN cards using the PLX9052 PCI bridge");
334 #ifdef MODULE_LICENSE
335 MODULE_LICENSE("Dual MPL/GPL");
338 static int __init orinoco_plx_init(void)
340 printk(KERN_DEBUG "%s\n", version);
341 return pci_module_init(&orinoco_plx_driver);
344 extern void __exit orinoco_plx_exit(void)
346 pci_unregister_driver(&orinoco_plx_driver);
347 current->state = TASK_UNINTERRUPTIBLE;
348 schedule_timeout(HZ);
351 module_init(orinoco_plx_init);
352 module_exit(orinoco_plx_exit);