3 * Copyright (C) 2002 Intersil Americas Inc.
4 * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
5 * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/version.h>
23 #include <linux/module.h>
25 #include <linux/netdevice.h>
26 #include <linux/pci.h>
27 #include <linux/etherdevice.h>
28 #include <linux/delay.h>
29 #include <linux/if_arp.h>
33 #include "prismcompat.h"
35 #include "isl_ioctl.h"
36 #include "islpci_dev.h"
37 #include "islpci_mgt.h"
38 #include "islpci_eth.h"
41 #define ISL3877_IMAGE_FILE "isl3877"
42 #define ISL3886_IMAGE_FILE "isl3886"
43 #define ISL3890_IMAGE_FILE "isl3890"
45 static int prism54_bring_down(islpci_private *);
46 static int islpci_alloc_memory(islpci_private *);
48 /* Temporary dummy MAC address to use until firmware is loaded.
49 * The idea there is that some tools (such as nameif) may query
50 * the MAC address before the netdev is 'open'. By using a valid
51 * OUI prefix, they can process the netdev properly.
52 * Of course, this is not the final/real MAC address. It doesn't
53 * matter, as you are suppose to be able to change it anytime via
54 * ndev->set_mac_address. Jean II */
55 const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
58 isl_upload_firmware(islpci_private *priv)
61 void __iomem *device_base = priv->device_base;
63 /* clear the RAMBoot and the Reset bit */
64 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
65 reg &= ~ISL38XX_CTRL_STAT_RESET;
66 reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
67 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
69 udelay(ISL38XX_WRITEIO_DELAY);
71 /* set the Reset bit without reading the register ! */
72 reg |= ISL38XX_CTRL_STAT_RESET;
73 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
75 udelay(ISL38XX_WRITEIO_DELAY);
77 /* clear the Reset bit */
78 reg &= ~ISL38XX_CTRL_STAT_RESET;
79 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
82 /* wait a while for the device to reboot */
86 const struct firmware *fw_entry = NULL;
90 rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
93 "%s: request_firmware() failed for '%s'\n",
94 "prism54", priv->firmware);
97 /* prepare the Direct Memory Base register */
98 reg = ISL38XX_DEV_FIRMWARE_ADDRES;
100 fw_ptr = (u32 *) fw_entry->data;
101 fw_len = fw_entry->size;
105 "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
106 "prism54", priv->firmware);
107 release_firmware(fw_entry);
108 return EILSEQ; /* Illegal byte sequence */;
114 ISL38XX_MEMORY_WINDOW_SIZE) ?
115 ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
116 u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
118 /* set the cards base address for writting the data */
119 isl38xx_w32_flush(device_base, reg,
120 ISL38XX_DIR_MEM_BASE_REG);
121 wmb(); /* be paranoid */
123 /* increment the write address for next iteration */
127 /* write the data to the Direct Memory Window 32bit-wise */
128 /* memcpy_toio() doesn't guarantee 32bit writes :-| */
129 while (_fw_len > 0) {
130 /* use non-swapping writel() */
131 __raw_writel(*fw_ptr, dev_fw_ptr);
132 fw_ptr++, dev_fw_ptr++;
136 /* flush PCI posting */
137 (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
138 wmb(); /* be paranoid again */
140 BUG_ON(_fw_len != 0);
145 release_firmware(fw_entry);
148 /* now reset the device
149 * clear the Reset & ClkRun bit, set the RAMBoot bit */
150 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
151 reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
152 reg &= ~ISL38XX_CTRL_STAT_RESET;
153 reg |= ISL38XX_CTRL_STAT_RAMBOOT;
154 isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
156 udelay(ISL38XX_WRITEIO_DELAY);
158 /* set the reset bit latches the host override and RAMBoot bits
159 * into the device for operation when the reset bit is reset */
160 reg |= ISL38XX_CTRL_STAT_RESET;
161 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
162 /* don't do flush PCI posting here! */
164 udelay(ISL38XX_WRITEIO_DELAY);
166 /* clear the reset bit should start the whole circus */
167 reg &= ~ISL38XX_CTRL_STAT_RESET;
168 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
169 /* don't do flush PCI posting here! */
171 udelay(ISL38XX_WRITEIO_DELAY);
176 /******************************************************************************
177 Device Interrupt Handler
178 ******************************************************************************/
181 islpci_interrupt(int irq, void *config, struct pt_regs *regs)
184 islpci_private *priv = config;
185 struct net_device *ndev = priv->ndev;
186 void __iomem *device = priv->device_base;
187 int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
189 /* lock the interrupt handler */
190 spin_lock(&priv->slock);
192 /* received an interrupt request on a shared IRQ line
193 * first check whether the device is in sleep mode */
194 reg = readl(device + ISL38XX_CTRL_STAT_REG);
195 if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
196 /* device is in sleep mode, IRQ was generated by someone else */
198 #if VERBOSE > SHOW_ERROR_MESSAGES
199 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
201 spin_unlock(&priv->slock);
206 /* check whether there is any source of interrupt on the device */
207 reg = readl(device + ISL38XX_INT_IDENT_REG);
209 /* also check the contents of the Interrupt Enable Register, because this
210 * will filter out interrupt sources from other devices on the same irq ! */
211 reg &= readl(device + ISL38XX_INT_EN_REG);
212 reg &= ISL38XX_INT_SOURCES;
215 if (islpci_get_state(priv) != PRV_STATE_SLEEP)
216 powerstate = ISL38XX_PSM_ACTIVE_STATE;
218 /* reset the request bits in the Identification register */
219 isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
221 #if VERBOSE > SHOW_ERROR_MESSAGES
222 DEBUG(SHOW_FUNCTION_CALLS,
223 "IRQ: Identification register 0x%p 0x%x \n", device, reg);
226 /* check for each bit in the register separately */
227 if (reg & ISL38XX_INT_IDENT_UPDATE) {
228 #if VERBOSE > SHOW_ERROR_MESSAGES
229 /* Queue has been updated */
230 DEBUG(SHOW_TRACING, "IRQ: Update flag \n");
232 DEBUG(SHOW_QUEUE_INDEXES,
233 "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
234 le32_to_cpu(priv->control_block->
235 driver_curr_frag[0]),
236 le32_to_cpu(priv->control_block->
237 driver_curr_frag[1]),
238 le32_to_cpu(priv->control_block->
239 driver_curr_frag[2]),
240 le32_to_cpu(priv->control_block->
241 driver_curr_frag[3]),
242 le32_to_cpu(priv->control_block->
243 driver_curr_frag[4]),
244 le32_to_cpu(priv->control_block->
248 DEBUG(SHOW_QUEUE_INDEXES,
249 "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
250 le32_to_cpu(priv->control_block->
251 device_curr_frag[0]),
252 le32_to_cpu(priv->control_block->
253 device_curr_frag[1]),
254 le32_to_cpu(priv->control_block->
255 device_curr_frag[2]),
256 le32_to_cpu(priv->control_block->
257 device_curr_frag[3]),
258 le32_to_cpu(priv->control_block->
259 device_curr_frag[4]),
260 le32_to_cpu(priv->control_block->
265 /* cleanup the data low transmit queue */
266 islpci_eth_cleanup_transmit(priv, priv->control_block);
268 /* device is in active state, update the
269 * powerstate flag if necessary */
270 powerstate = ISL38XX_PSM_ACTIVE_STATE;
272 /* check all three queues in priority order
273 * call the PIMFOR receive function until the
275 if (isl38xx_in_queue(priv->control_block,
276 ISL38XX_CB_RX_MGMTQ) != 0) {
277 #if VERBOSE > SHOW_ERROR_MESSAGES
279 "Received frame in Management Queue\n");
281 islpci_mgt_receive(ndev);
283 islpci_mgt_cleanup_transmit(ndev);
285 /* Refill slots in receive queue */
286 islpci_mgmt_rx_fill(ndev);
288 /* no need to trigger the device, next
289 islpci_mgt_transaction does it */
292 while (isl38xx_in_queue(priv->control_block,
293 ISL38XX_CB_RX_DATA_LQ) != 0) {
294 #if VERBOSE > SHOW_ERROR_MESSAGES
296 "Received frame in Data Low Queue \n");
298 islpci_eth_receive(priv);
301 /* check whether the data transmit queues were full */
302 if (priv->data_low_tx_full) {
303 /* check whether the transmit is not full anymore */
304 if (ISL38XX_CB_TX_QSIZE -
305 isl38xx_in_queue(priv->control_block,
306 ISL38XX_CB_TX_DATA_LQ) >=
307 ISL38XX_MIN_QTHRESHOLD) {
308 /* nope, the driver is ready for more network frames */
309 netif_wake_queue(priv->ndev);
311 /* reset the full flag */
312 priv->data_low_tx_full = 0;
317 if (reg & ISL38XX_INT_IDENT_INIT) {
318 /* Device has been initialized */
319 #if VERBOSE > SHOW_ERROR_MESSAGES
321 "IRQ: Init flag, device initialized \n");
323 wake_up(&priv->reset_done);
326 if (reg & ISL38XX_INT_IDENT_SLEEP) {
327 /* Device intends to move to powersave state */
328 #if VERBOSE > SHOW_ERROR_MESSAGES
329 DEBUG(SHOW_TRACING, "IRQ: Sleep flag \n");
331 isl38xx_handle_sleep_request(priv->control_block,
336 if (reg & ISL38XX_INT_IDENT_WAKEUP) {
337 /* Device has been woken up to active state */
338 #if VERBOSE > SHOW_ERROR_MESSAGES
339 DEBUG(SHOW_TRACING, "IRQ: Wakeup flag \n");
342 isl38xx_handle_wakeup(priv->control_block,
343 &powerstate, priv->device_base);
346 #if VERBOSE > SHOW_ERROR_MESSAGES
347 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
349 spin_unlock(&priv->slock);
354 if (islpci_get_state(priv) == PRV_STATE_SLEEP
355 && powerstate == ISL38XX_PSM_ACTIVE_STATE)
356 islpci_set_state(priv, PRV_STATE_READY);
358 /* !sleep -> sleep */
359 if (islpci_get_state(priv) != PRV_STATE_SLEEP
360 && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
361 islpci_set_state(priv, PRV_STATE_SLEEP);
363 /* unlock the interrupt handler */
364 spin_unlock(&priv->slock);
369 /******************************************************************************
370 Network Interface Control & Statistical functions
371 ******************************************************************************/
373 islpci_open(struct net_device *ndev)
376 islpci_private *priv = netdev_priv(ndev);
378 printk(KERN_DEBUG "%s: islpci_open()\n", ndev->name);
380 /* reset data structures, upload firmware and reset device */
381 rc = islpci_reset(priv,1);
383 prism54_bring_down(priv);
384 return rc; /* Returns informative message */
387 netif_start_queue(ndev);
388 /* netif_mark_up( ndev ); */
394 islpci_close(struct net_device *ndev)
396 islpci_private *priv = netdev_priv(ndev);
398 printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
400 netif_stop_queue(ndev);
402 return prism54_bring_down(priv);
406 prism54_bring_down(islpci_private *priv)
408 void __iomem *device_base = priv->device_base;
410 /* we are going to shutdown the device */
411 islpci_set_state(priv, PRV_STATE_PREBOOT);
413 /* disable all device interrupts in case they weren't */
414 isl38xx_disable_interrupts(priv->device_base);
416 /* For safety reasons, we may want to ensure that no DMA transfer is
417 * currently in progress by emptying the TX and RX queues. */
419 /* wait until interrupts have finished executing on other CPUs */
420 prism54_synchronize_irq(priv->pdev->irq);
422 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
423 reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
424 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
426 udelay(ISL38XX_WRITEIO_DELAY);
428 reg |= ISL38XX_CTRL_STAT_RESET;
429 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
431 udelay(ISL38XX_WRITEIO_DELAY);
433 /* clear the Reset bit */
434 reg &= ~ISL38XX_CTRL_STAT_RESET;
435 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
438 /* wait a while for the device to reset */
439 set_current_state(TASK_UNINTERRUPTIBLE);
440 schedule_timeout(50*HZ/1000);
446 islpci_upload_fw(islpci_private *priv)
448 islpci_state_t old_state;
451 old_state = islpci_set_state(priv, PRV_STATE_BOOT);
453 printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
455 rc = isl_upload_firmware(priv);
457 /* error uploading the firmware */
458 printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
459 priv->ndev->name, priv->firmware);
461 islpci_set_state(priv, old_state);
466 "%s: firmware uploaded done, now triggering reset...\n",
469 islpci_set_state(priv, PRV_STATE_POSTBOOT);
475 islpci_reset_if(islpci_private *priv)
482 prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
484 /* now the last step is to reset the interface */
485 isl38xx_interface_reset(priv->device_base, priv->device_host_address);
486 islpci_set_state(priv, PRV_STATE_PREINIT);
488 for(count = 0; count < 2 && result; count++) {
489 /* The software reset acknowledge needs about 220 msec here.
490 * Be conservative and wait for up to one second. */
492 remaining = schedule_timeout(HZ);
499 /* If we're here it's because our IRQ hasn't yet gone through.
500 * Retry a bit more...
502 printk(KERN_ERR "%s: device soft reset timed out\n",
507 finish_wait(&priv->reset_done, &wait);
512 islpci_set_state(priv, PRV_STATE_INIT);
514 /* Now that the device is 100% up, let's allow
515 * for the other interrupts --
516 * NOTE: this is not *yet* true since we've only allowed the
517 * INIT interrupt on the IRQ line. We can perhaps poll
518 * the IRQ line until we know for sure the reset went through */
519 isl38xx_enable_common_interrupts(priv->device_base);
521 down_write(&priv->mib_sem);
523 up_write(&priv->mib_sem);
525 islpci_set_state(priv, PRV_STATE_READY);
531 islpci_reset(islpci_private *priv, int reload_firmware)
533 isl38xx_control_block *cb = /* volatile not needed */
534 (isl38xx_control_block *) priv->control_block;
539 islpci_set_state(priv, PRV_STATE_PREBOOT);
541 islpci_set_state(priv, PRV_STATE_POSTBOOT);
543 printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
545 /* disable all device interrupts in case they weren't */
546 isl38xx_disable_interrupts(priv->device_base);
548 /* flush all management queues */
549 priv->index_mgmt_tx = 0;
550 priv->index_mgmt_rx = 0;
552 /* clear the indexes in the frame pointer */
553 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
554 cb->driver_curr_frag[counter] = cpu_to_le32(0);
555 cb->device_curr_frag[counter] = cpu_to_le32(0);
558 /* reset the mgmt receive queue */
559 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
560 isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
561 frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
563 frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
566 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
567 cb->rx_data_low[counter].address =
568 cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
571 /* since the receive queues are filled with empty fragments, now we can
572 * set the corresponding indexes in the Control Block */
573 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
574 cpu_to_le32(ISL38XX_CB_RX_QSIZE);
575 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
576 cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
578 /* reset the remaining real index registers and full flags */
579 priv->free_data_rx = 0;
580 priv->free_data_tx = 0;
581 priv->data_low_tx_full = 0;
583 if (reload_firmware) { /* Should we load the firmware ? */
584 /* now that the data structures are cleaned up, upload
585 * firmware and reset interface */
586 rc = islpci_upload_fw(priv);
591 /* finally reset interface */
592 rc = islpci_reset_if(priv);
593 if (!rc) /* If successful */
596 printk(KERN_DEBUG "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
601 struct net_device_stats *
602 islpci_statistics(struct net_device *ndev)
604 islpci_private *priv = netdev_priv(ndev);
606 #if VERBOSE > SHOW_ERROR_MESSAGES
607 DEBUG(SHOW_FUNCTION_CALLS, "islpci_statistics \n");
610 return &priv->statistics;
613 /******************************************************************************
614 Network device configuration functions
615 ******************************************************************************/
617 islpci_alloc_memory(islpci_private *priv)
621 #if VERBOSE > SHOW_ERROR_MESSAGES
622 printk(KERN_DEBUG "islpci_alloc_memory\n");
625 /* remap the PCI device base address to accessable */
626 if (!(priv->device_base =
627 ioremap(pci_resource_start(priv->pdev, 0),
628 ISL38XX_PCI_MEM_SIZE))) {
629 /* error in remapping the PCI device memory address range */
630 printk(KERN_ERR "PCI memory remapping failed \n");
634 /* memory layout for consistent DMA region:
636 * Area 1: Control Block for the device interface
637 * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
638 * the number of supported stations in the AP determines the minimal
639 * size of the buffer !
642 /* perform the allocation */
643 priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
646 device_host_address);
648 if (!priv->driver_mem_address) {
649 /* error allocating the block of PCI memory */
650 printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
655 /* assign the Control Block to the first address of the allocated area */
656 priv->control_block =
657 (isl38xx_control_block *) priv->driver_mem_address;
659 /* set the Power Save Buffer pointer directly behind the CB */
660 priv->device_psm_buffer =
661 priv->device_host_address + CONTROL_BLOCK_SIZE;
663 /* make sure all buffer pointers are initialized */
664 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
665 priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
666 priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
669 priv->index_mgmt_rx = 0;
670 memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
671 memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
673 /* allocate rx queue for management frames */
674 if (islpci_mgmt_rx_fill(priv->ndev) < 0)
677 /* now get the data rx skb's */
678 memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
679 memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
681 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
684 /* allocate an sk_buff for received data frames storage
685 * each frame on receive size consists of 1 fragment
686 * include any required allignment operations */
687 if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
688 /* error allocating an sk_buff structure elements */
689 printk(KERN_ERR "Error allocating skb.\n");
693 skb_reserve(skb, (4 - (long) skb->data) & 0x03);
694 /* add the new allocated sk_buff to the buffer array */
695 priv->data_low_rx[counter] = skb;
697 /* map the allocated skb data area to pci */
698 priv->pci_map_rx_address[counter] =
699 pci_map_single(priv->pdev, (void *) skb->data,
700 MAX_FRAGMENT_SIZE_RX + 2,
702 if (!priv->pci_map_rx_address[counter]) {
703 /* error mapping the buffer to device
704 accessable memory address */
705 printk(KERN_ERR "failed to map skb DMA'able\n");
710 prism54_acl_init(&priv->acl);
711 prism54_wpa_ie_init(priv);
717 islpci_free_memory(priv);
722 islpci_free_memory(islpci_private *priv)
726 if (priv->device_base)
727 iounmap(priv->device_base);
728 priv->device_base = NULL;
730 /* free consistent DMA area... */
731 if (priv->driver_mem_address)
732 pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
733 priv->driver_mem_address,
734 priv->device_host_address);
736 /* clear some dangling pointers */
737 priv->driver_mem_address = NULL;
738 priv->device_host_address = 0;
739 priv->device_psm_buffer = 0;
740 priv->control_block = NULL;
742 /* clean up mgmt rx buffers */
743 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
744 struct islpci_membuf *buf = &priv->mgmt_rx[counter];
746 pci_unmap_single(priv->pdev, buf->pci_addr,
747 buf->size, PCI_DMA_FROMDEVICE);
755 /* clean up data rx buffers */
756 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
757 if (priv->pci_map_rx_address[counter])
758 pci_unmap_single(priv->pdev,
759 priv->pci_map_rx_address[counter],
760 MAX_FRAGMENT_SIZE_RX + 2,
762 priv->pci_map_rx_address[counter] = 0;
764 if (priv->data_low_rx[counter])
765 dev_kfree_skb(priv->data_low_rx[counter]);
766 priv->data_low_rx[counter] = NULL;
769 /* Free the acces control list and the WPA list */
770 prism54_acl_clean(&priv->acl);
771 prism54_wpa_ie_clean(priv);
779 islpci_set_multicast_list(struct net_device *dev)
781 /* put device into promisc mode and let network layer handle it */
786 islpci_setup(struct pci_dev *pdev)
788 islpci_private *priv;
789 struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
794 SET_MODULE_OWNER(ndev);
795 pci_set_drvdata(pdev, ndev);
796 #if defined(SET_NETDEV_DEV)
797 SET_NETDEV_DEV(ndev, &pdev->dev);
800 /* setup the structure members */
801 ndev->base_addr = pci_resource_start(pdev, 0);
802 ndev->irq = pdev->irq;
804 /* initialize the function pointers */
805 ndev->open = &islpci_open;
806 ndev->stop = &islpci_close;
807 ndev->get_stats = &islpci_statistics;
808 ndev->get_wireless_stats = &prism54_get_wireless_stats;
809 ndev->do_ioctl = &prism54_ioctl;
810 ndev->wireless_handlers =
811 (struct iw_handler_def *) &prism54_handler_def;
813 ndev->hard_start_xmit = &islpci_eth_transmit;
814 /* ndev->set_multicast_list = &islpci_set_multicast_list; */
815 ndev->addr_len = ETH_ALEN;
816 ndev->set_mac_address = &prism54_set_mac_address;
817 /* Get a non-zero dummy MAC address for nameif. Jean II */
818 memcpy(ndev->dev_addr, dummy_mac, 6);
820 #ifdef HAVE_TX_TIMEOUT
821 ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
822 ndev->tx_timeout = &islpci_eth_tx_timeout;
825 /* allocate a private device structure to the network device */
826 priv = netdev_priv(ndev);
829 priv->monitor_type = ARPHRD_IEEE80211;
830 priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
831 priv->monitor_type : ARPHRD_ETHER;
833 /* save the start and end address of the PCI memory area */
834 ndev->mem_start = (unsigned long) priv->device_base;
835 ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
837 #if VERBOSE > SHOW_ERROR_MESSAGES
838 DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
841 init_waitqueue_head(&priv->reset_done);
843 /* init the queue read locks, process wait counter */
844 sema_init(&priv->mgmt_sem, 1);
845 priv->mgmt_received = NULL;
846 init_waitqueue_head(&priv->mgmt_wqueue);
847 sema_init(&priv->stats_sem, 1);
848 spin_lock_init(&priv->slock);
850 /* init state machine with off#1 state */
851 priv->state = PRV_STATE_OFF;
854 /* initialize workqueue's */
855 INIT_WORK(&priv->stats_work,
856 (void (*)(void *)) prism54_update_stats, priv);
857 priv->stats_timestamp = 0;
859 INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake, priv);
860 priv->reset_task_pending = 0;
862 /* allocate various memory areas */
863 if (islpci_alloc_memory(priv))
866 /* select the firmware file depending on the device id */
867 switch (pdev->device) {
869 strcpy(priv->firmware, ISL3877_IMAGE_FILE);
873 strcpy(priv->firmware, ISL3886_IMAGE_FILE);
877 strcpy(priv->firmware, ISL3890_IMAGE_FILE);
881 if (register_netdev(ndev)) {
882 DEBUG(SHOW_ERROR_MESSAGES,
883 "ERROR: register_netdev() failed \n");
884 goto do_islpci_free_memory;
889 do_islpci_free_memory:
890 islpci_free_memory(priv);
892 pci_set_drvdata(pdev, NULL);
899 islpci_set_state(islpci_private *priv, islpci_state_t new_state)
901 islpci_state_t old_state;
904 old_state = priv->state;
906 /* this means either a race condition or some serious error in
912 priv->state = new_state;
915 case PRV_STATE_PREBOOT:
916 /* there are actually many off-states, enumerated by
918 if (old_state == PRV_STATE_OFF)
921 /* only if hw_unavailable is zero now it means we either
922 * were in off#1 state, or came here from
924 if (!priv->state_off)
925 priv->state = new_state;
929 printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
930 priv->ndev->name, old_state, new_state, priv->state_off);
934 BUG_ON(priv->state_off < 0);
935 BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
936 BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));