drivers/net/wireless/prism54/oid_mgt.c

   1 /*
   2  *  Copyright (C) 2003 Aurelien Alleaume <slts@free.fr>
   3  *
   4  *  This program is free software; you can redistribute it and/or modify
   5  *  it under the terms of the GNU General Public License as published by
   6  *  the Free Software Foundation; either version 2 of the License
   7  *
   8  *  This program is distributed in the hope that it will be useful,
   9  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  *  GNU General Public License for more details.
  12  *
  13  *  You should have received a copy of the GNU General Public License
  14  *  along with this program; if not, write to the Free Software
  15  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  16  *
  17  */
  18
  19 #include "islpci_dev.h"
  20 #include "islpci_mgt.h"
  21 #include "isl_oid.h"
  22 #include "oid_mgt.h"
  23 #include "isl_ioctl.h"
  24
  25 /* to convert between channel and freq */
  26 const int frequency_list_bg[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
  27         2447, 2452, 2457, 2462, 2467, 2472, 2484
  28 };
  29
  30 const int frequency_list_a[] = { 5170, 5180, 5190, 5200, 5210, 5220, 5230,
  31         5240, 5260, 5280, 5300, 5320
  32 };
  33
  34 #define OID_U32(x) {x, 0, sizeof(u32), OID_FLAG_U32}
  35 #define OID_U32_C(x) {x, 0, sizeof(u32), OID_FLAG_U32 | OID_FLAG_CACHED}
  36 #define OID_STRUCT(x,s) {x, 0, sizeof(s), 0}
  37 #define OID_STRUCT_C(x,s) {x, 0, sizeof(s), OID_FLAG_CACHED}
  38 #define OID_STRUCT_MLME(x){x, 0, sizeof(struct obj_mlme), 0}
  39 #define OID_STRUCT_MLMEEX(x){x, 0, sizeof(struct obj_mlmeex), OID_FLAG_MLMEEX}
  40
  41 #define OID_UNKNOWN(x) {x, 0, 0, 0}
  42
  43 struct oid_t isl_oid[] = {
  44         [GEN_OID_MACADDRESS] = OID_STRUCT(0x00000000, u8[6]),
  45         [GEN_OID_LINKSTATE] = OID_U32(0x00000001),
  46         [GEN_OID_WATCHDOG] = OID_UNKNOWN(0x00000002),
  47         [GEN_OID_MIBOP] = OID_UNKNOWN(0x00000003),
  48         [GEN_OID_OPTIONS] = OID_UNKNOWN(0x00000004),
  49         [GEN_OID_LEDCONFIG] = OID_UNKNOWN(0x00000005),
  50
  51         /* 802.11 */
  52         [DOT11_OID_BSSTYPE] = OID_U32_C(0x10000000),
  53         [DOT11_OID_BSSID] = OID_STRUCT_C(0x10000001, u8[6]),
  54         [DOT11_OID_SSID] = OID_STRUCT_C(0x10000002, struct obj_ssid),
  55         [DOT11_OID_STATE] = OID_U32(0x10000003),
  56         [DOT11_OID_AID] = OID_U32(0x10000004),
  57         [DOT11_OID_COUNTRYSTRING] = OID_STRUCT(0x10000005, u8[4]),
  58         [DOT11_OID_SSIDOVERRIDE] = OID_STRUCT_C(0x10000006, struct obj_ssid),
  59
  60         [DOT11_OID_MEDIUMLIMIT] = OID_U32(0x11000000),
  61         [DOT11_OID_BEACONPERIOD] = OID_U32_C(0x11000001),
  62         [DOT11_OID_DTIMPERIOD] = OID_U32(0x11000002),
  63         [DOT11_OID_ATIMWINDOW] = OID_U32(0x11000003),
  64         [DOT11_OID_LISTENINTERVAL] = OID_U32(0x11000004),
  65         [DOT11_OID_CFPPERIOD] = OID_U32(0x11000005),
  66         [DOT11_OID_CFPDURATION] = OID_U32(0x11000006),
  67
  68         [DOT11_OID_AUTHENABLE] = OID_U32_C(0x12000000),
  69         [DOT11_OID_PRIVACYINVOKED] = OID_U32_C(0x12000001),
  70         [DOT11_OID_EXUNENCRYPTED] = OID_U32_C(0x12000002),
  71         [DOT11_OID_DEFKEYID] = OID_U32_C(0x12000003),
  72         [DOT11_OID_DEFKEYX] = {0x12000004, 3, sizeof (struct obj_key), OID_FLAG_CACHED},        /* DOT11_OID_DEFKEY1,...DOT11_OID_DEFKEY4 */
  73         [DOT11_OID_STAKEY] = OID_UNKNOWN(0x12000008),
  74         [DOT11_OID_REKEYTHRESHOLD] = OID_U32(0x12000009),
  75         [DOT11_OID_STASC] = OID_UNKNOWN(0x1200000a),
  76
  77         [DOT11_OID_PRIVTXREJECTED] = OID_U32(0x1a000000),
  78         [DOT11_OID_PRIVRXPLAIN] = OID_U32(0x1a000001),
  79         [DOT11_OID_PRIVRXFAILED] = OID_U32(0x1a000002),
  80         [DOT11_OID_PRIVRXNOKEY] = OID_U32(0x1a000003),
  81
  82         [DOT11_OID_RTSTHRESH] = OID_U32_C(0x13000000),
  83         [DOT11_OID_FRAGTHRESH] = OID_U32_C(0x13000001),
  84         [DOT11_OID_SHORTRETRIES] = OID_U32_C(0x13000002),
  85         [DOT11_OID_LONGRETRIES] = OID_U32_C(0x13000003),
  86         [DOT11_OID_MAXTXLIFETIME] = OID_U32_C(0x13000004),
  87         [DOT11_OID_MAXRXLIFETIME] = OID_U32(0x13000005),
  88         [DOT11_OID_AUTHRESPTIMEOUT] = OID_U32(0x13000006),
  89         [DOT11_OID_ASSOCRESPTIMEOUT] = OID_U32(0x13000007),
  90
  91         [DOT11_OID_ALOFT_TABLE] = OID_UNKNOWN(0x1d000000),
  92         [DOT11_OID_ALOFT_CTRL_TABLE] = OID_UNKNOWN(0x1d000001),
  93         [DOT11_OID_ALOFT_RETREAT] = OID_UNKNOWN(0x1d000002),
  94         [DOT11_OID_ALOFT_PROGRESS] = OID_UNKNOWN(0x1d000003),
  95         [DOT11_OID_ALOFT_FIXEDRATE] = OID_U32(0x1d000004),
  96         [DOT11_OID_ALOFT_RSSIGRAPH] = OID_UNKNOWN(0x1d000005),
  97         [DOT11_OID_ALOFT_CONFIG] = OID_UNKNOWN(0x1d000006),
  98
  99         [DOT11_OID_VDCFX] = {0x1b000000, 7, 0, 0},
 100         [DOT11_OID_MAXFRAMEBURST] = OID_U32(0x1b000008), /* in microseconds */
 101
 102         [DOT11_OID_PSM] = OID_U32(0x14000000),
 103         [DOT11_OID_CAMTIMEOUT] = OID_U32(0x14000001),
 104         [DOT11_OID_RECEIVEDTIMS] = OID_U32(0x14000002),
 105         [DOT11_OID_ROAMPREFERENCE] = OID_U32(0x14000003),
 106
 107         [DOT11_OID_BRIDGELOCAL] = OID_U32(0x15000000),
 108         [DOT11_OID_CLIENTS] = OID_U32(0x15000001),
 109         [DOT11_OID_CLIENTSASSOCIATED] = OID_U32(0x15000002),
 110         [DOT11_OID_CLIENTX] = {0x15000003, 2006, 0, 0}, /* DOT11_OID_CLIENTX,...DOT11_OID_CLIENT2007 */
 111
 112         [DOT11_OID_CLIENTFIND] = OID_STRUCT(0x150007DB, u8[6]),
 113         [DOT11_OID_WDSLINKADD] = OID_STRUCT(0x150007DC, u8[6]),
 114         [DOT11_OID_WDSLINKREMOVE] = OID_STRUCT(0x150007DD, u8[6]),
 115         [DOT11_OID_EAPAUTHSTA] = OID_STRUCT(0x150007DE, u8[6]),
 116         [DOT11_OID_EAPUNAUTHSTA] = OID_STRUCT(0x150007DF, u8[6]),
 117         [DOT11_OID_DOT1XENABLE] = OID_U32_C(0x150007E0),
 118         [DOT11_OID_MICFAILURE] = OID_UNKNOWN(0x150007E1),
 119         [DOT11_OID_REKEYINDICATE] = OID_UNKNOWN(0x150007E2),
 120
 121         [DOT11_OID_MPDUTXSUCCESSFUL] = OID_U32(0x16000000),
 122         [DOT11_OID_MPDUTXONERETRY] = OID_U32(0x16000001),
 123         [DOT11_OID_MPDUTXMULTIPLERETRIES] = OID_U32(0x16000002),
 124         [DOT11_OID_MPDUTXFAILED] = OID_U32(0x16000003),
 125         [DOT11_OID_MPDURXSUCCESSFUL] = OID_U32(0x16000004),
 126         [DOT11_OID_MPDURXDUPS] = OID_U32(0x16000005),
 127         [DOT11_OID_RTSSUCCESSFUL] = OID_U32(0x16000006),
 128         [DOT11_OID_RTSFAILED] = OID_U32(0x16000007),
 129         [DOT11_OID_ACKFAILED] = OID_U32(0x16000008),
 130         [DOT11_OID_FRAMERECEIVES] = OID_U32(0x16000009),
 131         [DOT11_OID_FRAMEERRORS] = OID_U32(0x1600000A),
 132         [DOT11_OID_FRAMEABORTS] = OID_U32(0x1600000B),
 133         [DOT11_OID_FRAMEABORTSPHY] = OID_U32(0x1600000C),
 134
 135         [DOT11_OID_SLOTTIME] = OID_U32(0x17000000),
 136         [DOT11_OID_CWMIN] = OID_U32(0x17000001),
 137         [DOT11_OID_CWMAX] = OID_U32(0x17000002),
 138         [DOT11_OID_ACKWINDOW] = OID_U32(0x17000003),
 139         [DOT11_OID_ANTENNARX] = OID_U32(0x17000004),
 140         [DOT11_OID_ANTENNATX] = OID_U32(0x17000005),
 141         [DOT11_OID_ANTENNADIVERSITY] = OID_U32(0x17000006),
 142         [DOT11_OID_CHANNEL] = OID_U32_C(0x17000007),
 143         [DOT11_OID_EDTHRESHOLD] = OID_U32_C(0x17000008),
 144         [DOT11_OID_PREAMBLESETTINGS] = OID_U32(0x17000009),
 145         [DOT11_OID_RATES] = OID_STRUCT(0x1700000A, u8[IWMAX_BITRATES + 1]),
 146         [DOT11_OID_CCAMODESUPPORTED] = OID_U32(0x1700000B),
 147         [DOT11_OID_CCAMODE] = OID_U32(0x1700000C),
 148         [DOT11_OID_RSSIVECTOR] = OID_U32(0x1700000D),
 149         [DOT11_OID_OUTPUTPOWERTABLE] = OID_U32(0x1700000E),
 150         [DOT11_OID_OUTPUTPOWER] = OID_U32_C(0x1700000F),
 151         [DOT11_OID_SUPPORTEDRATES] =
 152             OID_STRUCT(0x17000010, u8[IWMAX_BITRATES + 1]),
 153         [DOT11_OID_FREQUENCY] = OID_U32_C(0x17000011),
 154         [DOT11_OID_SUPPORTEDFREQUENCIES] = {0x17000012, 0, sizeof (struct
 155                                                                    obj_frequencies)
 156                                             + sizeof (u16) * IWMAX_FREQ, 0},
 157
 158         [DOT11_OID_NOISEFLOOR] = OID_U32(0x17000013),
 159         [DOT11_OID_FREQUENCYACTIVITY] =
 160             OID_STRUCT(0x17000014, u8[IWMAX_FREQ + 1]),
 161         [DOT11_OID_IQCALIBRATIONTABLE] = OID_UNKNOWN(0x17000015),
 162         [DOT11_OID_NONERPPROTECTION] = OID_U32(0x17000016),
 163         [DOT11_OID_SLOTSETTINGS] = OID_U32(0x17000017),
 164         [DOT11_OID_NONERPTIMEOUT] = OID_U32(0x17000018),
 165         [DOT11_OID_PROFILES] = OID_U32(0x17000019),
 166         [DOT11_OID_EXTENDEDRATES] =
 167             OID_STRUCT(0x17000020, u8[IWMAX_BITRATES + 1]),
 168
 169         [DOT11_OID_DEAUTHENTICATE] = OID_STRUCT_MLME(0x18000000),
 170         [DOT11_OID_AUTHENTICATE] = OID_STRUCT_MLME(0x18000001),
 171         [DOT11_OID_DISASSOCIATE] = OID_STRUCT_MLME(0x18000002),
 172         [DOT11_OID_ASSOCIATE] = OID_STRUCT_MLME(0x18000003),
 173         [DOT11_OID_SCAN] = OID_UNKNOWN(0x18000004),
 174         [DOT11_OID_BEACON] = OID_STRUCT_MLMEEX(0x18000005),
 175         [DOT11_OID_PROBE] = OID_STRUCT_MLMEEX(0x18000006),
 176         [DOT11_OID_DEAUTHENTICATEEX] = OID_STRUCT_MLMEEX(0x18000007),
 177         [DOT11_OID_AUTHENTICATEEX] = OID_STRUCT_MLMEEX(0x18000008),
 178         [DOT11_OID_DISASSOCIATEEX] = OID_STRUCT_MLMEEX(0x18000009),
 179         [DOT11_OID_ASSOCIATEEX] = OID_STRUCT_MLMEEX(0x1800000A),
 180         [DOT11_OID_REASSOCIATE] = OID_STRUCT_MLMEEX(0x1800000B),
 181         [DOT11_OID_REASSOCIATEEX] = OID_STRUCT_MLMEEX(0x1800000C),
 182
 183         [DOT11_OID_NONERPSTATUS] = OID_U32(0x1E000000),
 184
 185         [DOT11_OID_STATIMEOUT] = OID_U32(0x19000000),
 186         [DOT11_OID_MLMEAUTOLEVEL] = OID_U32_C(0x19000001),
 187         [DOT11_OID_BSSTIMEOUT] = OID_U32(0x19000002),
 188         [DOT11_OID_ATTACHMENT] = OID_UNKNOWN(0x19000003),
 189         [DOT11_OID_PSMBUFFER] = OID_STRUCT_C(0x19000004, struct obj_buffer),
 190
 191         [DOT11_OID_BSSS] = OID_U32(0x1C000000),
 192         [DOT11_OID_BSSX] = {0x1C000001, 63, sizeof (struct obj_bss), 0},        /*DOT11_OID_BSS1,...,DOT11_OID_BSS64 */
 193         [DOT11_OID_BSSFIND] = OID_STRUCT(0x1C000042, struct obj_bss),
 194         [DOT11_OID_BSSLIST] = {0x1C000043, 0, sizeof (struct
 195                                                       obj_bsslist) +
 196                                sizeof (struct obj_bss[IWMAX_BSS]), 0},
 197
 198         [OID_INL_TUNNEL] = OID_UNKNOWN(0xFF020000),
 199         [OID_INL_MEMADDR] = OID_UNKNOWN(0xFF020001),
 200         [OID_INL_MEMORY] = OID_UNKNOWN(0xFF020002),
 201         [OID_INL_MODE] = OID_U32_C(0xFF020003),
 202         [OID_INL_COMPONENT_NR] = OID_UNKNOWN(0xFF020004),
 203         [OID_INL_VERSION] = OID_UNKNOWN(0xFF020005),
 204         [OID_INL_INTERFACE_ID] = OID_UNKNOWN(0xFF020006),
 205         [OID_INL_COMPONENT_ID] = OID_UNKNOWN(0xFF020007),
 206         [OID_INL_CONFIG] = OID_U32_C(0xFF020008),
 207         [OID_INL_DOT11D_CONFORMANCE] = OID_U32_C(0xFF02000C),
 208         [OID_INL_PHYCAPABILITIES] = OID_U32(0xFF02000D),
 209         [OID_INL_OUTPUTPOWER] = OID_U32_C(0xFF02000F),
 210
 211 };
 212
 213 int
 214 mgt_init(islpci_private *priv)
 215 {
 216         int i;
 217
 218         priv->mib = kmalloc(OID_NUM_LAST * sizeof (void *), GFP_KERNEL);
 219         if (!priv->mib)
 220                 return -ENOMEM;
 221
 222         memset(priv->mib, 0, OID_NUM_LAST * sizeof (void *));
 223
 224         /* Alloc the cache */
 225         for (i = 0; i < OID_NUM_LAST; i++) {
 226                 if (isl_oid[i].flags & OID_FLAG_CACHED) {
 227                         priv->mib[i] = kmalloc(isl_oid[i].size *
 228                                                (isl_oid[i].range + 1),
 229                                                GFP_KERNEL);
 230                         if (!priv->mib[i])
 231                                 return -ENOMEM;
 232                         memset(priv->mib[i], 0,
 233                                isl_oid[i].size * (isl_oid[i].range + 1));
 234                 } else
 235                         priv->mib[i] = NULL;
 236         }
 237
 238         init_rwsem(&priv->mib_sem);
 239         prism54_mib_init(priv);
 240
 241         return 0;
 242 }
 243
 244 void
 245 mgt_clean(islpci_private *priv)
 246 {
 247         int i;
 248
 249         if (!priv->mib)
 250                 return;
 251         for (i = 0; i < OID_NUM_LAST; i++)
 252                 if (priv->mib[i]) {
 253                         kfree(priv->mib[i]);
 254                         priv->mib[i] = NULL;
 255                 }
 256         kfree(priv->mib);
 257         priv->mib = NULL;
 258 }
 259
 260 int
 261 mgt_set_request(islpci_private *priv, enum oid_num_t n, int extra, void *data)
 262 {
 263         int ret = 0;
 264         struct islpci_mgmtframe *response;
 265         int response_op = PIMFOR_OP_ERROR;
 266         int dlen;
 267         void *cache, *_data = data;
 268         u32 oid, u;
 269
 270         BUG_ON(OID_NUM_LAST <= n);
 271         BUG_ON(extra > isl_oid[n].range);
 272
 273         if (!priv->mib)
 274                 /* memory has been freed */
 275                 return -1;
 276
 277         dlen = isl_oid[n].size;
 278         cache = priv->mib[n];
 279         cache += (cache ? extra * dlen : 0);
 280         oid = isl_oid[n].oid + extra;
 281
 282         if (data == NULL)
 283                 /* we are requested to re-set a cached value */
 284                 _data = cache;
 285         if ((isl_oid[n].flags & OID_FLAG_U32) && data) {
 286                 u = cpu_to_le32(*(u32 *) data);
 287                 _data = &u;
 288         }
 289         /* If we are going to write to the cache, we don't want anyone to read
 290          * it -> acquire write lock.
 291          * Else we could acquire a read lock to be sure we don't bother the
 292          * commit process (which takes a write lock). But I'm not sure if it's
 293          * needed.
 294          */
 295         if (cache)
 296                 down_write(&priv->mib_sem);
 297
 298         if (islpci_get_state(priv) >= PRV_STATE_INIT) {
 299                 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET, oid,
 300                                              _data, dlen, &response);
 301                 if (!ret) {
 302                         response_op = response->header->operation;
 303                         islpci_mgt_release(response);
 304                 }
 305                 if (ret || response_op == PIMFOR_OP_ERROR)
 306                         ret = -EIO;
 307         } else if (!cache)
 308                 ret = -EIO;
 309
 310         if (cache) {
 311                 if (!ret && data)
 312                         memcpy(cache, _data, dlen);
 313                 up_write(&priv->mib_sem);
 314         }
 315
 316         return ret;
 317 }
 318
 319 int
 320 mgt_get_request(islpci_private *priv, enum oid_num_t n, int extra, void *data,
 321                 union oid_res_t *res)
 322 {
 323
 324         int ret = -EIO;
 325         int reslen = 0;
 326         struct islpci_mgmtframe *response = NULL;
 327
 328         int dlen;
 329         void *cache, *_res=NULL;
 330         u32 oid;
 331
 332         BUG_ON(OID_NUM_LAST <= n);
 333         BUG_ON(extra > isl_oid[n].range);
 334
 335         if (!priv->mib)
 336                 /* memory has been freed */
 337                 return -1;
 338
 339         dlen = isl_oid[n].size;
 340         cache = priv->mib[n];
 341         cache += cache ? extra * dlen : 0;
 342         oid = isl_oid[n].oid + extra;
 343         reslen = dlen;
 344
 345         if (cache)
 346                 down_read(&priv->mib_sem);
 347
 348         if (islpci_get_state(priv) >= PRV_STATE_INIT) {
 349                 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_GET,
 350                                              oid, data, dlen, &response);
 351                 if (ret || !response ||
 352                         response->header->operation == PIMFOR_OP_ERROR) {
 353                         if (response)
 354                                 islpci_mgt_release(response);
 355                         ret = -EIO;
 356                 }
 357                 if (!ret) {
 358                         _res = response->data;
 359                         reslen = response->header->length;
 360                 }
 361         } else if (cache) {
 362                 _res = cache;
 363                 ret = 0;
 364         }
 365         if (isl_oid[n].flags & OID_FLAG_U32) {
 366                 if (ret)
 367                         res->u = 0;
 368                 else
 369                         res->u = le32_to_cpu(*(u32 *) _res);
 370         } else {
 371                 res->ptr = kmalloc(reslen, GFP_KERNEL);
 372                 BUG_ON(res->ptr == NULL);
 373                 if (ret)
 374                         memset(res->ptr, 0, reslen);
 375                 else
 376                         memcpy(res->ptr, _res, reslen);
 377         }
 378
 379         if (cache)
 380                 up_read(&priv->mib_sem);
 381
 382         if (response && !ret)
 383                 islpci_mgt_release(response);
 384
 385         if (reslen > isl_oid[n].size)
 386                 printk(KERN_DEBUG
 387                        "mgt_get_request(0x%x): received data length was bigger "
 388                        "than expected (%d > %d). Memory is probably corrupted... ",
 389                        oid, reslen, isl_oid[n].size);
 390
 391         return ret;
 392 }
 393
 394 /* lock outside */
 395 int
 396 mgt_commit_list(islpci_private *priv, enum oid_num_t *l, int n)
 397 {
 398         int i, ret = 0;
 399         struct islpci_mgmtframe *response;
 400
 401         for (i = 0; i < n; i++) {
 402                 struct oid_t *t = &(isl_oid[l[i]]);
 403                 void *data = priv->mib[l[i]];
 404                 int j = 0;
 405                 u32 oid = t->oid;
 406                 BUG_ON(data == NULL);
 407                 while (j <= t->range){
 408                         response = NULL;
 409                         ret |= islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET,
 410                                                       oid, data, t->size,
 411                                                       &response);
 412                         if (response) {
 413                                 ret |= (response->header->operation ==
 414                                         PIMFOR_OP_ERROR);
 415                                 islpci_mgt_release(response);
 416                         }
 417                         j++;
 418                         oid++;
 419                         data += t->size;
 420                 }
 421         }
 422         return ret;
 423 }
 424
 425 /* Lock outside */
 426
 427 void
 428 mgt_set(islpci_private *priv, enum oid_num_t n, void *data)
 429 {
 430         BUG_ON(OID_NUM_LAST <= n);
 431         BUG_ON(priv->mib[n] == NULL);
 432
 433         memcpy(priv->mib[n], data, isl_oid[n].size);
 434         if (isl_oid[n].flags & OID_FLAG_U32)
 435                 *(u32 *) priv->mib[n] = cpu_to_le32(*(u32 *) priv->mib[n]);
 436 }
 437
 438 /* Commits the cache. If something goes wrong, it restarts the device. Lock
 439  * outside
 440  */
 441
 442 static enum oid_num_t commit_part1[] = {
 443         OID_INL_CONFIG,
 444         OID_INL_MODE,
 445         DOT11_OID_BSSTYPE,
 446         DOT11_OID_CHANNEL,
 447         DOT11_OID_MLMEAUTOLEVEL
 448 };
 449
 450 static enum oid_num_t commit_part2[] = {
 451         DOT11_OID_SSID,
 452         DOT11_OID_PSMBUFFER,
 453         DOT11_OID_AUTHENABLE,
 454         DOT11_OID_PRIVACYINVOKED,
 455         DOT11_OID_EXUNENCRYPTED,
 456         DOT11_OID_DEFKEYX,      /* MULTIPLE */
 457         DOT11_OID_DEFKEYID,
 458         DOT11_OID_DOT1XENABLE,
 459         OID_INL_DOT11D_CONFORMANCE,
 460         OID_INL_OUTPUTPOWER,
 461 };
 462
 463 void
 464 mgt_commit(islpci_private *priv)
 465 {
 466         int rvalue;
 467         u32 u;
 468         union oid_res_t r;
 469
 470         if (islpci_get_state(priv) < PRV_STATE_INIT)
 471                 return;
 472
 473         rvalue = mgt_commit_list(priv, commit_part1,
 474                                  sizeof (commit_part1) /
 475                                  sizeof (commit_part1[0]));
 476
 477         if (priv->iw_mode != IW_MODE_MONITOR)
 478                 rvalue |= mgt_commit_list(priv, commit_part2,
 479                                           sizeof (commit_part2) /
 480                                           sizeof (commit_part2[0]));
 481
 482         u = OID_INL_MODE;
 483         rvalue |= mgt_commit_list(priv, &u, 1);
 484
 485         if (rvalue) {
 486                 /* some request have failed. The device might be in an
 487                    incoherent state. We should reset it ! */
 488                 printk(KERN_DEBUG "%s: mgt_commit has failed. Restart the "
 489                 "device \n", priv->ndev->name);
 490         }
 491
 492         /* update the MAC addr. As it's not cached, no lock will be acquired by
 493          * the mgt_get_request
 494          */
 495         mgt_get_request(priv, GEN_OID_MACADDRESS, 0, NULL, &r);
 496         memcpy(priv->ndev->dev_addr, r.ptr, 6);
 497         kfree(r.ptr);
 498
 499 }
 500
 501 /* This will tell you if you are allowed to answer a mlme(ex) request .*/
 502
 503 inline int
 504 mgt_mlme_answer(islpci_private *priv)
 505 {
 506         u32 mlmeautolevel;
 507         /* Acquire a read lock because if we are in a mode change, it's
 508          * possible to answer true, while the card is leaving master to managed
 509          * mode. Answering to a mlme in this situation could hang the card.
 510          */
 511         down_read(&priv->mib_sem);
 512         mlmeautolevel =
 513             le32_to_cpu(*(u32 *) priv->mib[DOT11_OID_MLMEAUTOLEVEL]);
 514         up_read(&priv->mib_sem);
 515
 516         return ((priv->iw_mode == IW_MODE_MASTER) &&
 517                 (mlmeautolevel >= DOT11_MLME_INTERMEDIATE));
 518 }
 519
 520 inline enum oid_num_t
 521 mgt_oidtonum(u32 oid)
 522 {
 523         int i;
 524
 525         for (i = 0; i < OID_NUM_LAST - 1; i++)
 526                 if (isl_oid[i].oid == oid)
 527                         return i;
 528
 529         printk(KERN_DEBUG "looking for an unknown oid 0x%x", oid);
 530
 531         return 0;
 532 }