ftp://ftp.kernel.org/pub/linux/kernel/v2.6/linux-2.6.6.tar.bz2
[linux-2.6.git] / drivers / pci / hotplug / cpqphp_core.c
1 /*
2  * Compaq Hot Plug Controller Driver
3  *
4  * Copyright (C) 1995,2001 Compaq Computer Corporation
5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6  * Copyright (C) 2001 IBM Corp.
7  *
8  * All rights reserved.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or (at
13  * your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful, but
16  * WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18  * NON INFRINGEMENT.  See the GNU General Public License for more
19  * details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24  *
25  * Send feedback to <greg@kroah.com>
26  *
27  * Jan 12, 2003 -       Added 66/100/133MHz PCI-X support,
28  *                      Torben Mathiasen <torben.mathiasen@hp.com>
29  *
30  */
31
32 #include <linux/config.h>
33 #include <linux/module.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/proc_fs.h>
37 #include <linux/slab.h>
38 #include <linux/workqueue.h>
39 #include <linux/pci.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42
43 #include <asm/uaccess.h>
44
45 #include "cpqphp.h"
46 #include "cpqphp_nvram.h"
47 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
48
49
50 /* Global variables */
51 int cpqhp_debug;
52 int cpqhp_legacy_mode;
53 struct controller *cpqhp_ctrl_list;     /* = NULL */
54 struct pci_func *cpqhp_slot_list[256];
55
56 /* local variables */
57 static void *smbios_table;
58 static void *smbios_start;
59 static void *cpqhp_rom_start;
60 static u8 power_mode;
61 static int debug;
62
63 #define DRIVER_VERSION  "0.9.7"
64 #define DRIVER_AUTHOR   "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
65 #define DRIVER_DESC     "Compaq Hot Plug PCI Controller Driver"
66
67 MODULE_AUTHOR(DRIVER_AUTHOR);
68 MODULE_DESCRIPTION(DRIVER_DESC);
69 MODULE_LICENSE("GPL");
70
71 MODULE_PARM(power_mode, "b");
72 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
73
74 MODULE_PARM(debug, "i");
75 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
76
77 #define CPQHPC_MODULE_MINOR 208
78
79 static int one_time_init (void);
80 static int set_attention_status (struct hotplug_slot *slot, u8 value);
81 static int process_SI           (struct hotplug_slot *slot);
82 static int process_SS           (struct hotplug_slot *slot);
83 static int hardware_test        (struct hotplug_slot *slot, u32 value);
84 static int get_power_status     (struct hotplug_slot *slot, u8 *value);
85 static int get_attention_status (struct hotplug_slot *slot, u8 *value);
86 static int get_latch_status     (struct hotplug_slot *slot, u8 *value);
87 static int get_adapter_status   (struct hotplug_slot *slot, u8 *value);
88 static int get_max_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
89 static int get_cur_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
90
91 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
92         .owner =                THIS_MODULE,
93         .set_attention_status = set_attention_status,
94         .enable_slot =          process_SI,
95         .disable_slot =         process_SS,
96         .hardware_test =        hardware_test,
97         .get_power_status =     get_power_status,
98         .get_attention_status = get_attention_status,
99         .get_latch_status =     get_latch_status,
100         .get_adapter_status =   get_adapter_status,
101         .get_max_bus_speed =    get_max_bus_speed,
102         .get_cur_bus_speed =    get_cur_bus_speed,
103 };
104
105
106 static inline int is_slot64bit (struct slot *slot)
107 {
108         if (!slot || !slot->p_sm_slot)
109                 return 0;
110
111         if (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06)
112                 return 1;
113
114         return 0;
115 }
116
117 static inline int is_slot66mhz (struct slot *slot)
118 {
119         if (!slot || !slot->p_sm_slot)
120                 return 0;
121
122         if (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E)
123                 return 1;
124
125         return 0;
126 }
127
128 /**
129  * detect_SMBIOS_pointer - find the system Management BIOS Table in the specified region of memory.
130  *
131  * @begin: begin pointer for region to be scanned.
132  * @end: end pointer for region to be scanned.
133  *
134  * Returns pointer to the head of the SMBIOS tables (or NULL)
135  *
136  */
137 static void * detect_SMBIOS_pointer(void *begin, void *end)
138 {
139         void *fp;
140         void *endp;
141         u8 temp1, temp2, temp3, temp4;
142         int status = 0;
143
144         endp = (end - sizeof(u32) + 1);
145
146         for (fp = begin; fp <= endp; fp += 16) {
147                 temp1 = readb(fp);
148                 temp2 = readb(fp+1);
149                 temp3 = readb(fp+2);
150                 temp4 = readb(fp+3);
151                 if (temp1 == '_' &&
152                     temp2 == 'S' &&
153                     temp3 == 'M' &&
154                     temp4 == '_') {
155                         status = 1;
156                         break;
157                 }
158         }
159         
160         if (!status)
161                 fp = NULL;
162
163         dbg("Discovered SMBIOS Entry point at %p\n", fp);
164
165         return fp;
166 }
167
168 /**
169  * init_SERR - Initializes the per slot SERR generation.
170  *
171  * For unexpected switch opens
172  *
173  */
174 static int init_SERR(struct controller * ctrl)
175 {
176         u32 tempdword;
177         u32 number_of_slots;
178         u8 physical_slot;
179
180         if (!ctrl)
181                 return 1;
182
183         tempdword = ctrl->first_slot;
184
185         number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
186         // Loop through slots
187         while (number_of_slots) {
188                 physical_slot = tempdword;
189                 writeb(0, ctrl->hpc_reg + SLOT_SERR);
190                 tempdword++;
191                 number_of_slots--;
192         }
193
194         return 0;
195 }
196
197
198 /* nice debugging output */
199 static int pci_print_IRQ_route (void)
200 {
201         struct irq_routing_table *routing_table;
202         int len;
203         int loop;
204
205         u8 tbus, tdevice, tslot;
206
207         routing_table = pcibios_get_irq_routing_table();
208         if (routing_table == NULL) {
209                 err("No BIOS Routing Table??? Not good\n");
210                 return -ENOMEM;
211         }
212
213         len = (routing_table->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
214         // Make sure I got at least one entry
215         if (len == 0) {
216                 kfree(routing_table);
217                 return -1;
218         }
219
220         dbg("bus dev func slot\n");
221
222         for (loop = 0; loop < len; ++loop) {
223                 tbus = routing_table->slots[loop].bus;
224                 tdevice = routing_table->slots[loop].devfn;
225                 tslot = routing_table->slots[loop].slot;
226                 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
227
228         }
229         kfree(routing_table);
230         return 0;
231 }
232
233
234 /*
235  * get_subsequent_smbios_entry
236  *
237  * Gets the first entry if previous == NULL
238  * Otherwise, returns the next entry
239  * Uses global SMBIOS Table pointer
240  *
241  * @curr: %NULL or pointer to previously returned structure
242  *
243  * returns a pointer to an SMBIOS structure or NULL if none found
244  */
245 static void * get_subsequent_smbios_entry(void *smbios_start, void *smbios_table, void *curr)
246 {
247         u8 bail = 0;
248         u8 previous_byte = 1;
249         void *p_temp;
250         void *p_max;
251
252         if (!smbios_table || !curr)
253                 return(NULL);
254
255         // set p_max to the end of the table
256         p_max = smbios_start + readw(smbios_table + ST_LENGTH);
257
258         p_temp = curr;
259         p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
260
261         while ((p_temp < p_max) && !bail) {
262                 // Look for the double NULL terminator
263                 // The first condition is the previous byte and the second is the curr
264                 if (!previous_byte && !(readb(p_temp))) {
265                         bail = 1;
266                 }
267
268                 previous_byte = readb(p_temp);
269                 p_temp++;
270         }
271
272         if (p_temp < p_max) {
273                 return p_temp;
274         } else {
275                 return NULL;
276         }
277 }
278
279
280 /**
281  * get_SMBIOS_entry
282  *
283  * @type:SMBIOS structure type to be returned
284  * @previous: %NULL or pointer to previously returned structure
285  *
286  * Gets the first entry of the specified type if previous == NULL
287  * Otherwise, returns the next entry of the given type.
288  * Uses global SMBIOS Table pointer
289  * Uses get_subsequent_smbios_entry
290  *
291  * returns a pointer to an SMBIOS structure or %NULL if none found
292  */
293 static void *get_SMBIOS_entry (void *smbios_start, void *smbios_table, u8 type, void * previous)
294 {
295         if (!smbios_table)
296                 return NULL;
297
298         if (!previous) {                  
299                 previous = smbios_start;
300         } else {
301                 previous = get_subsequent_smbios_entry(smbios_start, smbios_table, previous);
302         }
303
304         while (previous) {
305                 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
306                         previous = get_subsequent_smbios_entry(smbios_start, smbios_table, previous);
307                 } else {
308                         break;
309                 }
310         }
311
312         return previous;
313 }
314
315 static void release_slot(struct hotplug_slot *hotplug_slot)
316 {
317         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
318         
319         if (slot == NULL)
320                 return;
321         
322         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
323
324         kfree(slot->hotplug_slot->info);
325         kfree(slot->hotplug_slot->name);
326         kfree(slot->hotplug_slot);
327         kfree(slot);
328 }
329
330 static int ctrl_slot_setup (struct controller * ctrl, void *smbios_start, void *smbios_table)
331 {
332         struct slot *new_slot;
333         u8 number_of_slots;
334         u8 slot_device;
335         u8 slot_number;
336         u8 ctrl_slot;
337         u32 tempdword;
338         void *slot_entry= NULL;
339         int result;
340
341         dbg("%s\n", __FUNCTION__);
342
343         tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
344
345         number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
346         slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
347         slot_number = ctrl->first_slot;
348
349         while (number_of_slots) {
350                 new_slot = (struct slot *) kmalloc(sizeof(struct slot), GFP_KERNEL);
351                 if (!new_slot)
352                         return -ENOMEM;
353
354                 memset(new_slot, 0, sizeof(struct slot));
355                 new_slot->hotplug_slot = kmalloc (sizeof (struct hotplug_slot), GFP_KERNEL);
356                 if (!new_slot->hotplug_slot) {
357                         kfree (new_slot);
358                         return -ENOMEM;
359                 }
360                 memset(new_slot->hotplug_slot, 0, sizeof (struct hotplug_slot));
361
362                 new_slot->hotplug_slot->info = kmalloc (sizeof (struct hotplug_slot_info), GFP_KERNEL);
363                 if (!new_slot->hotplug_slot->info) {
364                         kfree (new_slot->hotplug_slot);
365                         kfree (new_slot);
366                         return -ENOMEM;
367                 }
368                 memset(new_slot->hotplug_slot->info, 0, sizeof (struct hotplug_slot_info));
369                 new_slot->hotplug_slot->name = kmalloc (SLOT_NAME_SIZE, GFP_KERNEL);
370                 if (!new_slot->hotplug_slot->name) {
371                         kfree (new_slot->hotplug_slot->info);
372                         kfree (new_slot->hotplug_slot);
373                         kfree (new_slot);
374                         return -ENOMEM;
375                 }
376
377                 new_slot->magic = SLOT_MAGIC;
378                 new_slot->ctrl = ctrl;
379                 new_slot->bus = ctrl->bus;
380                 new_slot->device = slot_device;
381                 new_slot->number = slot_number;
382                 dbg("slot->number = %d\n",new_slot->number);
383
384                 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, slot_entry);
385
386                 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != new_slot->number)) {
387                         slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, slot_entry);
388                 }
389
390                 new_slot->p_sm_slot = slot_entry;
391
392                 init_timer(&new_slot->task_event);
393                 new_slot->task_event.expires = jiffies + 5 * HZ;
394                 new_slot->task_event.function = cpqhp_pushbutton_thread;
395
396                 //FIXME: these capabilities aren't used but if they are
397                 //       they need to be correctly implemented
398                 new_slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
399                 new_slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
400
401                 if (is_slot64bit(new_slot))
402                         new_slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
403                 if (is_slot66mhz(new_slot))
404                         new_slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
405                 if (ctrl->speed == PCI_SPEED_66MHz)
406                         new_slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
407
408                 ctrl_slot = slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
409
410                 // Check presence
411                 new_slot->capabilities |= ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
412                 // Check the switch state
413                 new_slot->capabilities |= ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
414                 // Check the slot enable
415                 new_slot->capabilities |= ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
416
417                 /* register this slot with the hotplug pci core */
418                 new_slot->hotplug_slot->release = &release_slot;
419                 new_slot->hotplug_slot->private = new_slot;
420                 make_slot_name (new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot);
421                 new_slot->hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
422                 
423                 new_slot->hotplug_slot->info->power_status = get_slot_enabled(ctrl, new_slot);
424                 new_slot->hotplug_slot->info->attention_status = cpq_get_attention_status(ctrl, new_slot);
425                 new_slot->hotplug_slot->info->latch_status = cpq_get_latch_status(ctrl, new_slot);
426                 new_slot->hotplug_slot->info->adapter_status = get_presence_status(ctrl, new_slot);
427                 
428                 dbg ("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n", 
429                      new_slot->bus, new_slot->device, new_slot->number, ctrl->slot_device_offset, slot_number);
430                 result = pci_hp_register (new_slot->hotplug_slot);
431                 if (result) {
432                         err ("pci_hp_register failed with error %d\n", result);
433                         release_slot(new_slot->hotplug_slot);
434                         return result;
435                 }
436                 
437                 new_slot->next = ctrl->slot;
438                 ctrl->slot = new_slot;
439
440                 number_of_slots--;
441                 slot_device++;
442                 slot_number++;
443         }
444
445         return 0;
446 }
447
448 static int ctrl_slot_cleanup (struct controller * ctrl)
449 {
450         struct slot *old_slot, *next_slot;
451
452         old_slot = ctrl->slot;
453         ctrl->slot = NULL;
454
455         while (old_slot) {
456                 /* memory will be freed by the release_slot callback */
457                 next_slot = old_slot->next;
458                 pci_hp_deregister (old_slot->hotplug_slot);
459                 old_slot = next_slot;
460         }
461
462         //Free IRQ associated with hot plug device
463         free_irq(ctrl->interrupt, ctrl);
464         //Unmap the memory
465         iounmap(ctrl->hpc_reg);
466         //Finally reclaim PCI mem
467         release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
468                            pci_resource_len(ctrl->pci_dev, 0));
469
470         return(0);
471 }
472
473
474 //============================================================================
475 // function:    get_slot_mapping
476 //
477 // Description: Attempts to determine a logical slot mapping for a PCI
478 //              device.  Won't work for more than one PCI-PCI bridge
479 //              in a slot.
480 //
481 // Input:       u8 bus_num - bus number of PCI device
482 //              u8 dev_num - device number of PCI device
483 //              u8 *slot - Pointer to u8 where slot number will
484 //                      be returned
485 //
486 // Output:      SUCCESS or FAILURE
487 //=============================================================================
488 static int get_slot_mapping (struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
489 {
490         struct irq_routing_table *PCIIRQRoutingInfoLength;
491         u32 work;
492         long len;
493         long loop;
494
495         u8 tbus, tdevice, tslot, bridgeSlot;
496
497         dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
498
499         bridgeSlot = 0xFF;
500
501         PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
502         if (!PCIIRQRoutingInfoLength)
503                 return -1;
504
505         len = (PCIIRQRoutingInfoLength->size -
506                sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
507         // Make sure I got at least one entry
508         if (len == 0) {
509                 kfree(PCIIRQRoutingInfoLength);
510                 return -1;
511         }
512
513         for (loop = 0; loop < len; ++loop) {
514                 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
515                 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
516                 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
517
518                 if ((tbus == bus_num) && (tdevice == dev_num)) {
519                         *slot = tslot;
520                         kfree(PCIIRQRoutingInfoLength);
521                         return 0;
522                 } else {
523                         // Didn't get a match on the target PCI device. Check if the
524                         // current IRQ table entry is a PCI-to-PCI bridge device.  If so,
525                         // and it's secondary bus matches the bus number for the target 
526                         // device, I need to save the bridge's slot number.  If I can't 
527                         // find an entry for the target device, I will have to assume it's 
528                         // on the other side of the bridge, and assign it the bridge's slot.
529                         bus->number = tbus;
530                         pci_bus_read_config_dword (bus, PCI_DEVFN(tdevice, 0), PCI_REVISION_ID, &work);
531
532                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
533                                 pci_bus_read_config_dword (bus, PCI_DEVFN(tdevice, 0), PCI_PRIMARY_BUS, &work);
534                                 // See if bridge's secondary bus matches target bus.
535                                 if (((work >> 8) & 0x000000FF) == (long) bus_num) {
536                                         bridgeSlot = tslot;
537                                 }
538                         }
539                 }
540
541         }
542
543         // If we got here, we didn't find an entry in the IRQ mapping table 
544         // for the target PCI device.  If we did determine that the target 
545         // device is on the other side of a PCI-to-PCI bridge, return the 
546         // slot number for the bridge.
547         if (bridgeSlot != 0xFF) {
548                 *slot = bridgeSlot;
549                 kfree(PCIIRQRoutingInfoLength);
550                 return 0;
551         }
552         kfree(PCIIRQRoutingInfoLength);
553         // Couldn't find an entry in the routing table for this PCI device
554         return -1;
555 }
556
557
558 /**
559  * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
560  *
561  */
562 static int cpqhp_set_attention_status (struct controller *ctrl, struct pci_func *func, u32 status)
563 {
564         u8 hp_slot;
565
566         hp_slot = func->device - ctrl->slot_device_offset;
567
568         if (func == NULL)
569                 return(1);
570
571         // Wait for exclusive access to hardware
572         down(&ctrl->crit_sect);
573
574         if (status == 1) {
575                 amber_LED_on (ctrl, hp_slot);
576         } else if (status == 0) {
577                 amber_LED_off (ctrl, hp_slot);
578         } else {
579                 // Done with exclusive hardware access
580                 up(&ctrl->crit_sect);
581                 return(1);
582         }
583
584         set_SOGO(ctrl);
585
586         // Wait for SOBS to be unset
587         wait_for_ctrl_irq (ctrl);
588
589         // Done with exclusive hardware access
590         up(&ctrl->crit_sect);
591
592         return(0);
593 }
594
595
596 /**
597  * set_attention_status - Turns the Amber LED for a slot on or off
598  *
599  */
600 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
601 {
602         struct pci_func *slot_func;
603         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
604         struct controller *ctrl;
605         u8 bus;
606         u8 devfn;
607         u8 device;
608         u8 function;
609         
610         if (slot == NULL)
611                 return -ENODEV;
612         
613         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
614
615         ctrl = slot->ctrl;
616         if (ctrl == NULL)
617                 return -ENODEV;
618         
619         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
620                 return -ENODEV;
621
622         device = devfn >> 3;
623         function = devfn & 0x7;
624         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
625
626         slot_func = cpqhp_slot_find(bus, device, function);
627         if (!slot_func) {
628                 return -ENODEV;
629         }
630
631         return cpqhp_set_attention_status(ctrl, slot_func, status);
632 }
633
634
635 static int process_SI (struct hotplug_slot *hotplug_slot)
636 {
637         struct pci_func *slot_func;
638         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
639         struct controller *ctrl;
640         u8 bus;
641         u8 devfn;
642         u8 device;
643         u8 function;
644         
645         if (slot == NULL)
646                 return -ENODEV;
647         
648         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
649
650         ctrl = slot->ctrl;
651         if (ctrl == NULL)
652                 return -ENODEV;
653         
654         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
655                 return -ENODEV;
656
657         device = devfn >> 3;
658         function = devfn & 0x7;
659         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
660
661         slot_func = cpqhp_slot_find(bus, device, function);
662         if (!slot_func) {
663                 return -ENODEV;
664         }
665
666         slot_func->bus = bus;
667         slot_func->device = device;
668         slot_func->function = function;
669         slot_func->configured = 0;
670         dbg("board_added(%p, %p)\n", slot_func, ctrl);
671         return cpqhp_process_SI(ctrl, slot_func);
672 }
673
674
675 static int process_SS (struct hotplug_slot *hotplug_slot)
676 {
677         struct pci_func *slot_func;
678         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
679         struct controller *ctrl;
680         u8 bus;
681         u8 devfn;
682         u8 device;
683         u8 function;
684         
685         if (slot == NULL)
686                 return -ENODEV;
687         
688         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
689
690         ctrl = slot->ctrl;
691         if (ctrl == NULL)
692                 return -ENODEV;
693         
694         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
695                 return -ENODEV;
696
697         device = devfn >> 3;
698         function = devfn & 0x7;
699         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
700
701         slot_func = cpqhp_slot_find(bus, device, function);
702         if (!slot_func) {
703                 return -ENODEV;
704         }
705         
706         dbg("In power_down_board, slot_func = %p, ctrl = %p\n", slot_func, ctrl);
707         return cpqhp_process_SS(ctrl, slot_func);
708 }
709
710
711 static int hardware_test (struct hotplug_slot *hotplug_slot, u32 value)
712 {
713         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
714         struct controller *ctrl;
715
716         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
717
718         if (slot == NULL)
719                 return -ENODEV;
720
721         ctrl = slot->ctrl;
722         if (ctrl == NULL)
723                 return -ENODEV;
724
725         return cpqhp_hardware_test (ctrl, value);       
726 }
727
728
729 static int get_power_status (struct hotplug_slot *hotplug_slot, u8 *value)
730 {
731         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
732         struct controller *ctrl;
733         
734         if (slot == NULL)
735                 return -ENODEV;
736         
737         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
738
739         ctrl = slot->ctrl;
740         if (ctrl == NULL)
741                 return -ENODEV;
742         
743         *value = get_slot_enabled(ctrl, slot);
744         return 0;
745 }
746
747 static int get_attention_status (struct hotplug_slot *hotplug_slot, u8 *value)
748 {
749         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
750         struct controller *ctrl;
751         
752         if (slot == NULL)
753                 return -ENODEV;
754         
755         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
756
757         ctrl = slot->ctrl;
758         if (ctrl == NULL)
759                 return -ENODEV;
760         
761         *value = cpq_get_attention_status(ctrl, slot);
762         return 0;
763 }
764
765 static int get_latch_status (struct hotplug_slot *hotplug_slot, u8 *value)
766 {
767         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
768         struct controller *ctrl;
769         
770         if (slot == NULL)
771                 return -ENODEV;
772         
773         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
774
775         ctrl = slot->ctrl;
776         if (ctrl == NULL)
777                 return -ENODEV;
778         
779         *value = cpq_get_latch_status (ctrl, slot);
780
781         return 0;
782 }
783
784 static int get_adapter_status (struct hotplug_slot *hotplug_slot, u8 *value)
785 {
786         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
787         struct controller *ctrl;
788         
789         if (slot == NULL)
790                 return -ENODEV;
791
792         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
793
794         ctrl = slot->ctrl;
795         if (ctrl == NULL)
796                 return -ENODEV;
797         
798         *value = get_presence_status (ctrl, slot);
799
800         return 0;
801 }
802
803 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
804 {
805         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
806         struct controller *ctrl;
807         
808         if (slot == NULL)
809                 return -ENODEV;
810
811         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
812
813         ctrl = slot->ctrl;
814         if (ctrl == NULL)
815                 return -ENODEV;
816         
817         *value = ctrl->speed_capability;
818
819         return 0;
820 }
821
822 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
823 {
824         struct slot *slot = get_slot (hotplug_slot, __FUNCTION__);
825         struct controller *ctrl;
826         
827         if (slot == NULL)
828                 return -ENODEV;
829
830         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
831
832         ctrl = slot->ctrl;
833         if (ctrl == NULL)
834                 return -ENODEV;
835         
836         *value = ctrl->speed;
837
838         return 0;
839 }
840
841 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
842 {
843         u8 num_of_slots = 0;
844         u8 hp_slot = 0;
845         u8 device;
846         u8 rev;
847         u8 bus_cap;
848         u16 temp_word;
849         u16 vendor_id;
850         u16 subsystem_vid;
851         u16 subsystem_deviceid;
852         u32 rc;
853         struct controller *ctrl;
854         struct pci_func *func;
855
856         // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
857         rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
858         if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
859                 err(msg_HPC_non_compaq_or_intel);
860                 return -ENODEV;
861         }
862         dbg("Vendor ID: %x\n", vendor_id);
863
864         rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
865         dbg("revision: %d\n", rev);
866         if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
867                 err(msg_HPC_rev_error);
868                 return -ENODEV;
869         }
870
871         /* Check for the proper subsytem ID's
872          * Intel uses a different SSID programming model than Compaq.  
873          * For Intel, each SSID bit identifies a PHP capability.
874          * Also Intel HPC's may have RID=0.
875          */
876         if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
877                 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
878                 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
879                 if (rc) {
880                         err("%s : pci_read_config_word failed\n", __FUNCTION__);
881                         return rc;
882                 }
883                 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
884                 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
885                         err(msg_HPC_non_compaq_or_intel);
886                         return -ENODEV;
887                 }
888
889                 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
890                 if (!ctrl) {
891                         err("%s : out of memory\n", __FUNCTION__);
892                         return -ENOMEM;
893                 }
894                 memset(ctrl, 0, sizeof(struct controller));
895
896                 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
897                 if (rc) {
898                         err("%s : pci_read_config_word failed\n", __FUNCTION__);
899                         goto err_free_ctrl;
900                 }
901
902                 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
903
904                 /* Set Vendor ID, so it can be accessed later from other functions */
905                 ctrl->vendor_id = vendor_id;
906
907                 switch (subsystem_vid) {
908                         case PCI_VENDOR_ID_COMPAQ:
909                                 if (rev >= 0x13) { /* CIOBX */
910                                         ctrl->push_flag = 1;
911                                         ctrl->slot_switch_type = 1;             // Switch is present
912                                         ctrl->push_button = 1;                  // Pushbutton is present
913                                         ctrl->pci_config_space = 1;             // Index/data access to working registers 0 = not supported, 1 = supported
914                                         ctrl->defeature_PHP = 1;                // PHP is supported
915                                         ctrl->pcix_support = 1;                 // PCI-X supported
916                                         ctrl->pcix_speed_capability = 1;
917                                         pci_read_config_byte(pdev, 0x41, &bus_cap);
918                                         if (bus_cap & 0x80) {
919                                                 dbg("bus max supports 133MHz PCI-X\n");
920                                                 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
921                                                 break;
922                                         }
923                                         if (bus_cap & 0x40) {
924                                                 dbg("bus max supports 100MHz PCI-X\n");
925                                                 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
926                                                 break;
927                                         }
928                                         if (bus_cap & 20) {
929                                                 dbg("bus max supports 66MHz PCI-X\n");
930                                                 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
931                                                 break;
932                                         }
933                                         if (bus_cap & 10) {
934                                                 dbg("bus max supports 66MHz PCI\n");
935                                                 ctrl->speed_capability = PCI_SPEED_66MHz;
936                                                 break;
937                                         }
938
939                                         break;
940                                 }
941
942                                 switch (subsystem_deviceid) {
943                                         case PCI_SUB_HPC_ID:
944                                                 /* Original 6500/7000 implementation */
945                                                 ctrl->slot_switch_type = 1;             // Switch is present
946                                                 ctrl->speed_capability = PCI_SPEED_33MHz;
947                                                 ctrl->push_button = 0;                  // No pushbutton
948                                                 ctrl->pci_config_space = 1;             // Index/data access to working registers 0 = not supported, 1 = supported
949                                                 ctrl->defeature_PHP = 1;                // PHP is supported
950                                                 ctrl->pcix_support = 0;                 // PCI-X not supported
951                                                 ctrl->pcix_speed_capability = 0;        // N/A since PCI-X not supported
952                                                 break;
953                                         case PCI_SUB_HPC_ID2:
954                                                 /* First Pushbutton implementation */
955                                                 ctrl->push_flag = 1;
956                                                 ctrl->slot_switch_type = 1;             // Switch is present
957                                                 ctrl->speed_capability = PCI_SPEED_33MHz;
958                                                 ctrl->push_button = 1;                  // Pushbutton is present
959                                                 ctrl->pci_config_space = 1;             // Index/data access to working registers 0 = not supported, 1 = supported
960                                                 ctrl->defeature_PHP = 1;                // PHP is supported
961                                                 ctrl->pcix_support = 0;                 // PCI-X not supported
962                                                 ctrl->pcix_speed_capability = 0;        // N/A since PCI-X not supported
963                                                 break;
964                                         case PCI_SUB_HPC_ID_INTC:
965                                                 /* Third party (6500/7000) */
966                                                 ctrl->slot_switch_type = 1;             // Switch is present
967                                                 ctrl->speed_capability = PCI_SPEED_33MHz;
968                                                 ctrl->push_button = 0;                  // No pushbutton
969                                                 ctrl->pci_config_space = 1;             // Index/data access to working registers 0 = not supported, 1 = supported
970                                                 ctrl->defeature_PHP = 1;                        // PHP is supported
971                                                 ctrl->pcix_support = 0;                 // PCI-X not supported
972                                                 ctrl->pcix_speed_capability = 0;                // N/A since PCI-X not supported
973                                                 break;
974                                         case PCI_SUB_HPC_ID3:
975                                                 /* First 66 Mhz implementation */
976                                                 ctrl->push_flag = 1;
977                                                 ctrl->slot_switch_type = 1;             // Switch is present
978                                                 ctrl->speed_capability = PCI_SPEED_66MHz;
979                                                 ctrl->push_button = 1;                  // Pushbutton is present
980                                                 ctrl->pci_config_space = 1;             // Index/data access to working registers 0 = not supported, 1 = supported
981                                                 ctrl->defeature_PHP = 1;                // PHP is supported
982                                                 ctrl->pcix_support = 0;                 // PCI-X not supported
983                                                 ctrl->pcix_speed_capability = 0;        // N/A since PCI-X not supported
984                                                 break;
985                                         case PCI_SUB_HPC_ID4:
986                                                 /* First PCI-X implementation, 100MHz */
987                                                 ctrl->push_flag = 1;
988                                                 ctrl->slot_switch_type = 1;             // Switch is present
989                                                 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
990                                                 ctrl->push_button = 1;                  // Pushbutton is present
991                                                 ctrl->pci_config_space = 1;             // Index/data access to working registers 0 = not supported, 1 = supported
992                                                 ctrl->defeature_PHP = 1;                // PHP is supported
993                                                 ctrl->pcix_support = 1;                 // PCI-X supported
994                                                 ctrl->pcix_speed_capability = 0;        
995                                                 break;
996                                         default:
997                                                 err(msg_HPC_not_supported);
998                                                 rc = -ENODEV;
999                                                 goto err_free_ctrl;
1000                                 }
1001                                 break;
1002
1003                         case PCI_VENDOR_ID_INTEL:
1004                                 /* Check for speed capability (0=33, 1=66) */
1005                                 if (subsystem_deviceid & 0x0001) {
1006                                         ctrl->speed_capability = PCI_SPEED_66MHz;
1007                                 } else {
1008                                         ctrl->speed_capability = PCI_SPEED_33MHz;
1009                                 }
1010
1011                                 /* Check for push button */
1012                                 if (subsystem_deviceid & 0x0002) {
1013                                         /* no push button */
1014                                         ctrl->push_button = 0;
1015                                 } else {
1016                                         /* push button supported */
1017                                         ctrl->push_button = 1;
1018                                 }
1019
1020                                 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
1021                                 if (subsystem_deviceid & 0x0004) {
1022                                         /* no switch */
1023                                         ctrl->slot_switch_type = 0;
1024                                 } else {
1025                                         /* switch */
1026                                         ctrl->slot_switch_type = 1;
1027                                 }
1028
1029                                 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
1030                                 if (subsystem_deviceid & 0x0008) {
1031                                         ctrl->defeature_PHP = 1;        // PHP supported
1032                                 } else {
1033                                         ctrl->defeature_PHP = 0;        // PHP not supported
1034                                 }
1035
1036                                 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
1037                                 if (subsystem_deviceid & 0x0010) {
1038                                         ctrl->alternate_base_address = 1;       // supported
1039                                 } else {
1040                                         ctrl->alternate_base_address = 0;       // not supported
1041                                 }
1042
1043                                 /* PCI Config Space Index (0=not supported, 1=supported) */
1044                                 if (subsystem_deviceid & 0x0020) {
1045                                         ctrl->pci_config_space = 1;             // supported
1046                                 } else {
1047                                         ctrl->pci_config_space = 0;             // not supported
1048                                 }
1049
1050                                 /* PCI-X support */
1051                                 if (subsystem_deviceid & 0x0080) {
1052                                         /* PCI-X capable */
1053                                         ctrl->pcix_support = 1;
1054                                         /* Frequency of operation in PCI-X mode */
1055                                         if (subsystem_deviceid & 0x0040) {
1056                                                 /* 133MHz PCI-X if bit 7 is 1 */
1057                                                 ctrl->pcix_speed_capability = 1;
1058                                         } else {
1059                                                 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1060                                                 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1061                                                 ctrl->pcix_speed_capability = 0;
1062                                         }
1063                                 } else {
1064                                         /* Conventional PCI */
1065                                         ctrl->pcix_support = 0;
1066                                         ctrl->pcix_speed_capability = 0;
1067                                 }
1068                                 break;
1069
1070                         default:
1071                                 err(msg_HPC_not_supported);
1072                                 rc = -ENODEV;
1073                                 goto err_free_ctrl;
1074                 }
1075
1076         } else {
1077                 err(msg_HPC_not_supported);
1078                 return -ENODEV;
1079         }
1080
1081         // Tell the user that we found one.
1082         info("Initializing the PCI hot plug controller residing on PCI bus %d\n", pdev->bus->number);
1083
1084         dbg ("Hotplug controller capabilities:\n");
1085         dbg ("    speed_capability       %d\n", ctrl->speed_capability);
1086         dbg ("    slot_switch_type       %s\n", ctrl->slot_switch_type == 0 ? "no switch" : "switch present");
1087         dbg ("    defeature_PHP          %s\n", ctrl->defeature_PHP == 0 ? "PHP not supported" : "PHP supported");
1088         dbg ("    alternate_base_address %s\n", ctrl->alternate_base_address == 0 ? "not supported" : "supported");
1089         dbg ("    pci_config_space       %s\n", ctrl->pci_config_space == 0 ? "not supported" : "supported");
1090         dbg ("    pcix_speed_capability  %s\n", ctrl->pcix_speed_capability == 0 ? "not supported" : "supported");
1091         dbg ("    pcix_support           %s\n", ctrl->pcix_support == 0 ? "not supported" : "supported");
1092
1093         ctrl->pci_dev = pdev;
1094         pci_set_drvdata(pdev, ctrl);
1095
1096         /* make our own copy of the pci bus structure, as we like tweaking it a lot */
1097         ctrl->pci_bus = kmalloc (sizeof (*ctrl->pci_bus), GFP_KERNEL);
1098         if (!ctrl->pci_bus) {
1099                 err("out of memory\n");
1100                 rc = -ENOMEM;
1101                 goto err_free_ctrl;
1102         }
1103         memcpy (ctrl->pci_bus, pdev->bus, sizeof (*ctrl->pci_bus));
1104
1105         ctrl->bus = pdev->bus->number;
1106         ctrl->rev = rev;
1107         dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1108              PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1109
1110         init_MUTEX(&ctrl->crit_sect);
1111         init_waitqueue_head(&ctrl->queue);
1112
1113         /* initialize our threads if they haven't already been started up */
1114         rc = one_time_init();
1115         if (rc) {
1116                 goto err_free_bus;
1117         }
1118         
1119         dbg("pdev = %p\n", pdev);
1120         dbg("pci resource start %lx\n", pci_resource_start(pdev, 0));
1121         dbg("pci resource len %lx\n", pci_resource_len(pdev, 0));
1122
1123         if (!request_mem_region(pci_resource_start(pdev, 0),
1124                                 pci_resource_len(pdev, 0), MY_NAME)) {
1125                 err("cannot reserve MMIO region\n");
1126                 rc = -ENOMEM;
1127                 goto err_free_bus;
1128         }
1129
1130         ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1131         if (!ctrl->hpc_reg) {
1132                 err("cannot remap MMIO region %lx @ %lx\n", pci_resource_len(pdev, 0), pci_resource_start(pdev, 0));
1133                 rc = -ENODEV;
1134                 goto err_free_mem_region;
1135         }
1136
1137         // Check for 66Mhz operation
1138         ctrl->speed = get_controller_speed(ctrl);
1139
1140
1141         //**************************************************
1142         //
1143         //              Save configuration headers for this and
1144         //              subordinate PCI buses
1145         //
1146         //**************************************************
1147
1148         // find the physical slot number of the first hot plug slot
1149
1150         // Get slot won't work for devices behind bridges, but
1151         // in this case it will always be called for the "base"
1152         // bus/dev/func of a slot.
1153         // CS: this is leveraging the PCIIRQ routing code from the kernel (pci-pc.c: get_irq_routing_table)
1154         rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number, (readb(ctrl->hpc_reg + SLOT_MASK) >> 4), &(ctrl->first_slot));
1155         dbg("get_slot_mapping: first_slot = %d, returned = %d\n", ctrl->first_slot, rc);
1156         if (rc) {
1157                 err(msg_initialization_err, rc);
1158                 goto err_iounmap;
1159         }
1160
1161         // Store PCI Config Space for all devices on this bus
1162         rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1163         if (rc) {
1164                 err("%s: unable to save PCI configuration data, error %d\n", __FUNCTION__, rc);
1165                 goto err_iounmap;
1166         }
1167
1168         /*
1169          * Get IO, memory, and IRQ resources for new devices
1170          */
1171         // The next line is required for cpqhp_find_available_resources
1172         ctrl->interrupt = pdev->irq;
1173         if (ctrl->interrupt < 0x10) {
1174                 cpqhp_legacy_mode = 1;
1175                 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1176         }
1177
1178         ctrl->cfgspc_irq = 0;
1179         pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1180
1181         rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1182         ctrl->add_support = !rc;
1183         if (rc) {
1184                 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1185                 err("unable to locate PCI configuration resources for hot plug add.\n");
1186                 goto err_iounmap;
1187         }
1188
1189         /*
1190          * Finish setting up the hot plug ctrl device
1191          */
1192         ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1193         dbg("NumSlots %d \n", ctrl->slot_device_offset);
1194
1195         ctrl->next_event = 0;
1196
1197         /* Setup the slot information structures */
1198         rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1199         if (rc) {
1200                 err(msg_initialization_err, 6);
1201                 err("%s: unable to save PCI configuration data, error %d\n", __FUNCTION__, rc);
1202                 goto err_iounmap;
1203         }
1204         
1205         /* Mask all general input interrupts */
1206         writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1207
1208         /* set up the interrupt */
1209         dbg("HPC interrupt = %d \n", ctrl->interrupt);
1210         if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1211                         SA_SHIRQ, MY_NAME, ctrl)) {
1212                 err("Can't get irq %d for the hotplug pci controller\n", ctrl->interrupt);
1213                 rc = -ENODEV;
1214                 goto err_iounmap;
1215         }
1216
1217         /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
1218         temp_word = readw(ctrl->hpc_reg + MISC);
1219         temp_word |= 0x4006;
1220         writew(temp_word, ctrl->hpc_reg + MISC);
1221
1222         // Changed 05/05/97 to clear all interrupts at start
1223         writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1224
1225         ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1226
1227         writel(0x0L, ctrl->hpc_reg + INT_MASK);
1228
1229         if (!cpqhp_ctrl_list) {
1230                 cpqhp_ctrl_list = ctrl;
1231                 ctrl->next = NULL;
1232         } else {
1233                 ctrl->next = cpqhp_ctrl_list;
1234                 cpqhp_ctrl_list = ctrl;
1235         }
1236
1237         // turn off empty slots here unless command line option "ON" set
1238         // Wait for exclusive access to hardware
1239         down(&ctrl->crit_sect);
1240
1241         num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1242
1243         // find first device number for the ctrl
1244         device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1245
1246         while (num_of_slots) {
1247                 dbg("num_of_slots: %d\n", num_of_slots);
1248                 func = cpqhp_slot_find(ctrl->bus, device, 0);
1249                 if (!func)
1250                         break;
1251
1252                 hp_slot = func->device - ctrl->slot_device_offset;
1253                 dbg("hp_slot: %d\n", hp_slot);
1254
1255                 // We have to save the presence info for these slots
1256                 temp_word = ctrl->ctrl_int_comp >> 16;
1257                 func->presence_save = (temp_word >> hp_slot) & 0x01;
1258                 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1259
1260                 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1261                         func->switch_save = 0;
1262                 } else {
1263                         func->switch_save = 0x10;
1264                 }
1265
1266                 if (!power_mode) {
1267                         if (!func->is_a_board) {
1268                                 green_LED_off (ctrl, hp_slot);
1269                                 slot_disable (ctrl, hp_slot);
1270                         }
1271                 }
1272
1273                 device++;
1274                 num_of_slots--;
1275         }
1276
1277         if (!power_mode) {
1278                 set_SOGO(ctrl);
1279                 // Wait for SOBS to be unset
1280                 wait_for_ctrl_irq (ctrl);
1281         }
1282
1283         rc = init_SERR(ctrl);
1284         if (rc) {
1285                 err("init_SERR failed\n");
1286                 up(&ctrl->crit_sect);
1287                 goto err_free_irq;
1288         }
1289
1290         // Done with exclusive hardware access
1291         up(&ctrl->crit_sect);
1292
1293         cpqhp_create_ctrl_files (ctrl);
1294
1295         return 0;
1296
1297 err_free_irq:
1298         free_irq(ctrl->interrupt, ctrl);
1299 err_iounmap:
1300         iounmap(ctrl->hpc_reg);
1301 err_free_mem_region:
1302         release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1303 err_free_bus:
1304         kfree(ctrl->pci_bus);
1305 err_free_ctrl:
1306         kfree(ctrl);
1307         return rc;
1308 }
1309
1310
1311 static int one_time_init(void)
1312 {
1313         int loop;
1314         int retval = 0;
1315         static int initialized = 0;
1316
1317         if (initialized)
1318                 return 0;
1319
1320         power_mode = 0;
1321
1322         retval = pci_print_IRQ_route();
1323         if (retval)
1324                 goto error;
1325
1326         dbg("Initialize + Start the notification mechanism \n");
1327
1328         retval = cpqhp_event_start_thread();
1329         if (retval)
1330                 goto error;
1331
1332         dbg("Initialize slot lists\n");
1333         for (loop = 0; loop < 256; loop++) {
1334                 cpqhp_slot_list[loop] = NULL;
1335         }
1336
1337         // FIXME: We also need to hook the NMI handler eventually.
1338         // this also needs to be worked with Christoph
1339         // register_NMI_handler();
1340
1341         // Map rom address
1342         cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1343         if (!cpqhp_rom_start) {
1344                 err ("Could not ioremap memory region for ROM\n");
1345                 retval = -EIO;
1346                 goto error;
1347         }
1348         
1349         /* Now, map the int15 entry point if we are on compaq specific hardware */
1350         compaq_nvram_init(cpqhp_rom_start);
1351         
1352         /* Map smbios table entry point structure */
1353         smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start, cpqhp_rom_start + ROM_PHY_LEN);
1354         if (!smbios_table) {
1355                 err ("Could not find the SMBIOS pointer in memory\n");
1356                 retval = -EIO;
1357                 goto error;
1358         }
1359
1360         smbios_start = ioremap(readl(smbios_table + ST_ADDRESS), readw(smbios_table + ST_LENGTH));
1361         if (!smbios_start) {
1362                 err ("Could not ioremap memory region taken from SMBIOS values\n");
1363                 retval = -EIO;
1364                 goto error;
1365         }
1366
1367         initialized = 1;
1368
1369         return retval;
1370
1371 error:
1372         if (cpqhp_rom_start)
1373                 iounmap(cpqhp_rom_start);
1374         if (smbios_start)
1375                 iounmap(smbios_start);
1376         
1377         return retval;
1378 }
1379
1380
1381 static void unload_cpqphpd(void)
1382 {
1383         struct pci_func *next;
1384         struct pci_func *TempSlot;
1385         int loop;
1386         u32 rc;
1387         struct controller *ctrl;
1388         struct controller *tctrl;
1389         struct pci_resource *res;
1390         struct pci_resource *tres;
1391
1392         rc = compaq_nvram_store(cpqhp_rom_start);
1393
1394         ctrl = cpqhp_ctrl_list;
1395
1396         while (ctrl) {
1397                 if (ctrl->hpc_reg) {
1398                         u16 misc;
1399                         rc = read_slot_enable (ctrl);
1400                         
1401                         writeb(0, ctrl->hpc_reg + SLOT_SERR);
1402                         writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1403                         
1404                         misc = readw(ctrl->hpc_reg + MISC);
1405                         misc &= 0xFFFD;
1406                         writew(misc, ctrl->hpc_reg + MISC);
1407                 }
1408
1409                 ctrl_slot_cleanup(ctrl);
1410
1411                 res = ctrl->io_head;
1412                 while (res) {
1413                         tres = res;
1414                         res = res->next;
1415                         kfree(tres);
1416                 }
1417
1418                 res = ctrl->mem_head;
1419                 while (res) {
1420                         tres = res;
1421                         res = res->next;
1422                         kfree(tres);
1423                 }
1424
1425                 res = ctrl->p_mem_head;
1426                 while (res) {
1427                         tres = res;
1428                         res = res->next;
1429                         kfree(tres);
1430                 }
1431
1432                 res = ctrl->bus_head;
1433                 while (res) {
1434                         tres = res;
1435                         res = res->next;
1436                         kfree(tres);
1437                 }
1438
1439                 kfree (ctrl->pci_bus);
1440
1441                 tctrl = ctrl;
1442                 ctrl = ctrl->next;
1443                 kfree(tctrl);
1444         }
1445
1446         for (loop = 0; loop < 256; loop++) {
1447                 next = cpqhp_slot_list[loop];
1448                 while (next != NULL) {
1449                         res = next->io_head;
1450                         while (res) {
1451                                 tres = res;
1452                                 res = res->next;
1453                                 kfree(tres);
1454                         }
1455
1456                         res = next->mem_head;
1457                         while (res) {
1458                                 tres = res;
1459                                 res = res->next;
1460                                 kfree(tres);
1461                         }
1462
1463                         res = next->p_mem_head;
1464                         while (res) {
1465                                 tres = res;
1466                                 res = res->next;
1467                                 kfree(tres);
1468                         }
1469
1470                         res = next->bus_head;
1471                         while (res) {
1472                                 tres = res;
1473                                 res = res->next;
1474                                 kfree(tres);
1475                         }
1476
1477                         TempSlot = next;
1478                         next = next->next;
1479                         kfree(TempSlot);
1480                 }
1481         }
1482
1483         // Stop the notification mechanism
1484         cpqhp_event_stop_thread();
1485
1486         //unmap the rom address
1487         if (cpqhp_rom_start)
1488                 iounmap(cpqhp_rom_start);
1489         if (smbios_start)
1490                 iounmap(smbios_start);
1491 }
1492
1493
1494
1495 static struct pci_device_id hpcd_pci_tbl[] = {
1496         {
1497         /* handle any PCI Hotplug controller */
1498         .class =        ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1499         .class_mask =   ~0,
1500         
1501         /* no matter who makes it */
1502         .vendor =       PCI_ANY_ID,
1503         .device =       PCI_ANY_ID,
1504         .subvendor =    PCI_ANY_ID,
1505         .subdevice =    PCI_ANY_ID,
1506         
1507         }, { /* end: all zeroes */ }
1508 };
1509
1510 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1511
1512
1513
1514 static struct pci_driver cpqhpc_driver = {
1515         .name =         "pci_hotplug",
1516         .id_table =     hpcd_pci_tbl,
1517         .probe =        cpqhpc_probe,
1518         /* remove:      cpqhpc_remove_one, */
1519 };
1520
1521
1522
1523 static int __init cpqhpc_init(void)
1524 {
1525         int result;
1526
1527         cpqhp_debug = debug;
1528
1529         result = pci_module_init(&cpqhpc_driver);
1530         dbg("pci_module_init = %d\n", result);
1531         if (result)
1532                 return result;
1533         info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1534         return 0;
1535 }
1536
1537
1538 static void __exit cpqhpc_cleanup(void)
1539 {
1540         dbg("unload_cpqphpd()\n");
1541         unload_cpqphpd();
1542
1543         dbg("pci_unregister_driver\n");
1544         pci_unregister_driver(&cpqhpc_driver);
1545 }
1546
1547
1548 module_init(cpqhpc_init);
1549 module_exit(cpqhpc_cleanup);
1550
1551