drivers/pci/hotplug/cpqphp_pci.c

   1 /*
   2  * Compaq Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM Corp.
   7  *
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18  * NON INFRINGEMENT.  See the GNU General Public License for more
  19  * details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  * Send feedback to <greg@kroah.com>
  26  *
  27  */
  28
  29 #include <linux/config.h>
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/types.h>
  33 #include <linux/slab.h>
  34 #include <linux/workqueue.h>
  35 #include <linux/proc_fs.h>
  36 #include <linux/pci.h>
  37 #include "../pci.h"
  38 #include "cpqphp.h"
  39 #include "cpqphp_nvram.h"
  40 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
  41
  42
  43 u8 cpqhp_nic_irq;
  44 u8 cpqhp_disk_irq;
  45
  46 static u16 unused_IRQ;
  47
  48 /*
  49  * detect_HRT_floating_pointer
  50  *
  51  * find the Hot Plug Resource Table in the specified region of memory.
  52  *
  53  */
  54 static void *detect_HRT_floating_pointer(void *begin, void *end)
  55 {
  56         void *fp;
  57         void *endp;
  58         u8 temp1, temp2, temp3, temp4;
  59         int status = 0;
  60
  61         endp = (end - sizeof(struct hrt) + 1);
  62
  63         for (fp = begin; fp <= endp; fp += 16) {
  64                 temp1 = readb(fp + SIG0);
  65                 temp2 = readb(fp + SIG1);
  66                 temp3 = readb(fp + SIG2);
  67                 temp4 = readb(fp + SIG3);
  68                 if (temp1 == '$' &&
  69                     temp2 == 'H' &&
  70                     temp3 == 'R' &&
  71                     temp4 == 'T') {
  72                         status = 1;
  73                         break;
  74                 }
  75         }
  76
  77         if (!status)
  78                 fp = NULL;
  79
  80         dbg("Discovered Hotplug Resource Table at %p\n", fp);
  81         return fp;
  82 }
  83
  84
  85 int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func)
  86 {
  87         unsigned char bus;
  88         struct pci_bus *child;
  89         int num;
  90
  91         if (func->pci_dev == NULL)
  92                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
  93
  94         /* No pci device, we need to create it then */
  95         if (func->pci_dev == NULL) {
  96                 dbg("INFO: pci_dev still null\n");
  97
  98                 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function));
  99                 if (num)
 100                         pci_bus_add_devices(ctrl->pci_dev->bus);
 101
 102                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
 103                 if (func->pci_dev == NULL) {
 104                         dbg("ERROR: pci_dev still null\n");
 105                         return 0;
 106                 }
 107         }
 108
 109         if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
 110                 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
 111                 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
 112                 pci_do_scan_bus(child);
 113         }
 114
 115         return 0;
 116 }
 117
 118
 119 int cpqhp_unconfigure_device(struct pci_func* func)
 120 {
 121         int j;
 122
 123         dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, func->device, func->function);
 124
 125         for (j=0; j<8 ; j++) {
 126                 struct pci_dev* temp = pci_find_slot(func->bus, PCI_DEVFN(func->device, j));
 127                 if (temp)
 128                         pci_remove_bus_device(temp);
 129         }
 130         return 0;
 131 }
 132
 133 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value)
 134 {
 135         u32 vendID = 0;
 136
 137         if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1)
 138                 return -1;
 139         if (vendID == 0xffffffff)
 140                 return -1;
 141         return pci_bus_read_config_dword (bus, devfn, offset, value);
 142 }
 143
 144
 145 /*
 146  * cpqhp_set_irq
 147  *
 148  * @bus_num: bus number of PCI device
 149  * @dev_num: device number of PCI device
 150  * @slot: pointer to u8 where slot number will be returned
 151  */
 152 int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
 153 {
 154         int rc;
 155         u16 temp_word;
 156         struct pci_dev fakedev;
 157         struct pci_bus fakebus;
 158
 159         if (cpqhp_legacy_mode) {
 160                 fakedev.devfn = dev_num << 3;
 161                 fakedev.bus = &fakebus;
 162                 fakebus.number = bus_num;
 163                 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
 164                     __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
 165                 rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
 166                 dbg("%s: rc %d\n", __FUNCTION__, rc);
 167                 if (!rc)
 168                         return !rc;
 169
 170                 // set the Edge Level Control Register (ELCR)
 171                 temp_word = inb(0x4d0);
 172                 temp_word |= inb(0x4d1) << 8;
 173
 174                 temp_word |= 0x01 << irq_num;
 175
 176                 // This should only be for x86 as it sets the Edge Level Control Register
 177                 outb((u8) (temp_word & 0xFF), 0x4d0);
 178                 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
 179         }
 180
 181         return 0;
 182 }
 183
 184
 185 /*
 186  * WTF??? This function isn't in the code, yet a function calls it, but the
 187  * compiler optimizes it away?  strange.  Here as a placeholder to keep the
 188  * compiler happy.
 189  */
 190 static int PCI_ScanBusNonBridge (u8 bus, u8 device)
 191 {
 192         return 0;
 193 }
 194
 195 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num)
 196 {
 197         u8 tdevice;
 198         u32 work;
 199         u8 tbus;
 200
 201         ctrl->pci_bus->number = bus_num;
 202
 203         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 204                 //Scan for access first
 205                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 206                         continue;
 207                 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
 208                 //Yep we got one. Not a bridge ?
 209                 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
 210                         *dev_num = tdevice;
 211                         dbg("found it !\n");
 212                         return 0;
 213                 }
 214         }
 215         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 216                 //Scan for access first
 217                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 218                         continue;
 219                 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
 220                 //Yep we got one. bridge ?
 221                 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 222                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
 223                         dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
 224                         if (PCI_ScanBusNonBridge(tbus, tdevice) == 0)
 225                                 return 0;
 226                 }
 227         }
 228
 229         return -1;
 230 }
 231
 232
 233 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge)
 234 {
 235         struct irq_routing_table *PCIIRQRoutingInfoLength;
 236         long len;
 237         long loop;
 238         u32 work;
 239
 240         u8 tbus, tdevice, tslot;
 241
 242         PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
 243         if (!PCIIRQRoutingInfoLength)
 244                 return -1;
 245
 246         len = (PCIIRQRoutingInfoLength->size -
 247                sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 248         // Make sure I got at least one entry
 249         if (len == 0) {
 250                 if (PCIIRQRoutingInfoLength != NULL)
 251                         kfree(PCIIRQRoutingInfoLength );
 252                 return -1;
 253         }
 254
 255         for (loop = 0; loop < len; ++loop) {
 256                 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
 257                 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn;
 258                 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
 259
 260                 if (tslot == slot) {
 261                         *bus_num = tbus;
 262                         *dev_num = tdevice;
 263                         ctrl->pci_bus->number = tbus;
 264                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
 265                         if (!nobridge || (work == 0xffffffff)) {
 266                                 if (PCIIRQRoutingInfoLength != NULL)
 267                                         kfree(PCIIRQRoutingInfoLength );
 268                                 return 0;
 269                         }
 270
 271                         dbg("bus_num %d devfn %d\n", *bus_num, *dev_num);
 272                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work);
 273                         dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS);
 274
 275                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 276                                 pci_bus_read_config_byte (ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus);
 277                                 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
 278                                 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
 279                                         *bus_num = tbus;
 280                                         if (PCIIRQRoutingInfoLength != NULL)
 281                                                 kfree(PCIIRQRoutingInfoLength );
 282                                         return 0;
 283                                 }
 284                         } else {
 285                                 if (PCIIRQRoutingInfoLength != NULL)
 286                                         kfree(PCIIRQRoutingInfoLength );
 287                                 return 0;
 288                         }
 289
 290                 }
 291         }
 292         if (PCIIRQRoutingInfoLength != NULL)
 293                 kfree(PCIIRQRoutingInfoLength );
 294         return -1;
 295 }
 296
 297
 298 int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
 299 {
 300         return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);    //plain (bridges allowed)
 301 }
 302
 303
 304 /* More PCI configuration routines; this time centered around hotplug controller */
 305
 306
 307 /*
 308  * cpqhp_save_config
 309  *
 310  * Reads configuration for all slots in a PCI bus and saves info.
 311  *
 312  * Note:  For non-hot plug busses, the slot # saved is the device #
 313  *
 314  * returns 0 if success
 315  */
 316 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
 317 {
 318         long rc;
 319         u8 class_code;
 320         u8 header_type;
 321         u32 ID;
 322         u8 secondary_bus;
 323         struct pci_func *new_slot;
 324         int sub_bus;
 325         int FirstSupported;
 326         int LastSupported;
 327         int max_functions;
 328         int function;
 329         u8 DevError;
 330         int device = 0;
 331         int cloop = 0;
 332         int stop_it;
 333         int index;
 334
 335         //              Decide which slots are supported
 336
 337         if (is_hot_plug) {
 338                 //*********************************
 339                 // is_hot_plug is the slot mask
 340                 //*********************************
 341                 FirstSupported = is_hot_plug >> 4;
 342                 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
 343         } else {
 344                 FirstSupported = 0;
 345                 LastSupported = 0x1F;
 346         }
 347
 348         //     Save PCI configuration space for all devices in supported slots
 349         ctrl->pci_bus->number = busnumber;
 350         for (device = FirstSupported; device <= LastSupported; device++) {
 351                 ID = 0xFFFFFFFF;
 352                 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
 353
 354                 if (ID != 0xFFFFFFFF) {   //  device in slot
 355                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
 356                         if (rc)
 357                                 return rc;
 358
 359                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
 360                         if (rc)
 361                                 return rc;
 362
 363                         // If multi-function device, set max_functions to 8
 364                         if (header_type & 0x80)
 365                                 max_functions = 8;
 366                         else
 367                                 max_functions = 1;
 368
 369                         function = 0;
 370
 371                         do {
 372                                 DevError = 0;
 373
 374                                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {   // P-P Bridge
 375                                         //  Recurse the subordinate bus
 376                                         //  get the subordinate bus number
 377                                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
 378                                         if (rc) {
 379                                                 return rc;
 380                                         } else {
 381                                                 sub_bus = (int) secondary_bus;
 382
 383                                                 // Save secondary bus cfg spc
 384                                                 // with this recursive call.
 385                                                 rc = cpqhp_save_config(ctrl, sub_bus, 0);
 386                                                 if (rc)
 387                                                         return rc;
 388                                                 ctrl->pci_bus->number = busnumber;
 389                                         }
 390                                 }
 391
 392                                 index = 0;
 393                                 new_slot = cpqhp_slot_find(busnumber, device, index++);
 394                                 while (new_slot &&
 395                                        (new_slot->function != (u8) function))
 396                                         new_slot = cpqhp_slot_find(busnumber, device, index++);
 397
 398                                 if (!new_slot) {
 399                                         // Setup slot structure.
 400                                         new_slot = cpqhp_slot_create(busnumber);
 401
 402                                         if (new_slot == NULL)
 403                                                 return(1);
 404                                 }
 405
 406                                 new_slot->bus = (u8) busnumber;
 407                                 new_slot->device = (u8) device;
 408                                 new_slot->function = (u8) function;
 409                                 new_slot->is_a_board = 1;
 410                                 new_slot->switch_save = 0x10;
 411                                 // In case of unsupported board
 412                                 new_slot->status = DevError;
 413                                 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
 414
 415                                 for (cloop = 0; cloop < 0x20; cloop++) {
 416                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 417                                         if (rc)
 418                                                 return rc;
 419                                 }
 420
 421                                 function++;
 422
 423                                 stop_it = 0;
 424
 425                                 //  this loop skips to the next present function
 426                                 //  reading in Class Code and Header type.
 427
 428                                 while ((function < max_functions)&&(!stop_it)) {
 429                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
 430                                         if (ID == 0xFFFFFFFF) {  // nothing there.
 431                                                 function++;
 432                                         } else {  // Something there
 433                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
 434                                                 if (rc)
 435                                                         return rc;
 436
 437                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type);
 438                                                 if (rc)
 439                                                         return rc;
 440
 441                                                 stop_it++;
 442                                         }
 443                                 }
 444
 445                         } while (function < max_functions);
 446                 }               // End of IF (device in slot?)
 447                 else if (is_hot_plug) {
 448                         // Setup slot structure with entry for empty slot
 449                         new_slot = cpqhp_slot_create(busnumber);
 450
 451                         if (new_slot == NULL) {
 452                                 return(1);
 453                         }
 454
 455                         new_slot->bus = (u8) busnumber;
 456                         new_slot->device = (u8) device;
 457                         new_slot->function = 0;
 458                         new_slot->is_a_board = 0;
 459                         new_slot->presence_save = 0;
 460                         new_slot->switch_save = 0;
 461                 }
 462         }                       // End of FOR loop
 463
 464         return(0);
 465 }
 466
 467
 468 /*
 469  * cpqhp_save_slot_config
 470  *
 471  * Saves configuration info for all PCI devices in a given slot
 472  * including subordinate busses.
 473  *
 474  * returns 0 if success
 475  */
 476 int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
 477 {
 478         long rc;
 479         u8 class_code;
 480         u8 header_type;
 481         u32 ID;
 482         u8 secondary_bus;
 483         int sub_bus;
 484         int max_functions;
 485         int function;
 486         int cloop = 0;
 487         int stop_it;
 488
 489         ID = 0xFFFFFFFF;
 490
 491         ctrl->pci_bus->number = new_slot->bus;
 492         pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
 493
 494         if (ID != 0xFFFFFFFF) {   //  device in slot
 495                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
 496                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
 497
 498                 if (header_type & 0x80) // Multi-function device
 499                         max_functions = 8;
 500                 else
 501                         max_functions = 1;
 502
 503                 function = 0;
 504
 505                 do {
 506                         if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 507                                 //  Recurse the subordinate bus
 508                                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
 509
 510                                 sub_bus = (int) secondary_bus;
 511
 512                                 // Save the config headers for the secondary bus.
 513                                 rc = cpqhp_save_config(ctrl, sub_bus, 0);
 514                                 if (rc)
 515                                         return(rc);
 516                                 ctrl->pci_bus->number = new_slot->bus;
 517
 518                         }       // End of IF
 519
 520                         new_slot->status = 0;
 521
 522                         for (cloop = 0; cloop < 0x20; cloop++) {
 523                                 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 524                         }
 525
 526                         function++;
 527
 528                         stop_it = 0;
 529
 530                         //  this loop skips to the next present function
 531                         //  reading in the Class Code and the Header type.
 532
 533                         while ((function < max_functions) && (!stop_it)) {
 534                                 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
 535
 536                                 if (ID == 0xFFFFFFFF) {  // nothing there.
 537                                         function++;
 538                                 } else {  // Something there
 539                                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
 540
 541                                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
 542
 543                                         stop_it++;
 544                                 }
 545                         }
 546
 547                 } while (function < max_functions);
 548         }                       // End of IF (device in slot?)
 549         else {
 550                 return 2;
 551         }
 552
 553         return 0;
 554 }
 555
 556
 557 /*
 558  * cpqhp_save_base_addr_length
 559  *
 560  * Saves the length of all base address registers for the
 561  * specified slot.  this is for hot plug REPLACE
 562  *
 563  * returns 0 if success
 564  */
 565 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
 566 {
 567         u8 cloop;
 568         u8 header_type;
 569         u8 secondary_bus;
 570         u8 type;
 571         int sub_bus;
 572         u32 temp_register;
 573         u32 base;
 574         u32 rc;
 575         struct pci_func *next;
 576         int index = 0;
 577         struct pci_bus *pci_bus = ctrl->pci_bus;
 578         unsigned int devfn;
 579
 580         func = cpqhp_slot_find(func->bus, func->device, index++);
 581
 582         while (func != NULL) {
 583                 pci_bus->number = func->bus;
 584                 devfn = PCI_DEVFN(func->device, func->function);
 585
 586                 // Check for Bridge
 587                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 588
 589                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 590                         // PCI-PCI Bridge
 591                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 592
 593                         sub_bus = (int) secondary_bus;
 594
 595                         next = cpqhp_slot_list[sub_bus];
 596
 597                         while (next != NULL) {
 598                                 rc = cpqhp_save_base_addr_length(ctrl, next);
 599                                 if (rc)
 600                                         return rc;
 601
 602                                 next = next->next;
 603                         }
 604                         pci_bus->number = func->bus;
 605
 606                         //FIXME: this loop is duplicated in the non-bridge case.  The two could be rolled together
 607                         // Figure out IO and memory base lengths
 608                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 609                                 temp_register = 0xFFFFFFFF;
 610                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 611                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 612
 613                                 if (base) {  // If this register is implemented
 614                                         if (base & 0x01L) {
 615                                                 // IO base
 616                                                 // set base = amount of IO space requested
 617                                                 base = base & 0xFFFFFFFE;
 618                                                 base = (~base) + 1;
 619
 620                                                 type = 1;
 621                                         } else {
 622                                                 // memory base
 623                                                 base = base & 0xFFFFFFF0;
 624                                                 base = (~base) + 1;
 625
 626                                                 type = 0;
 627                                         }
 628                                 } else {
 629                                         base = 0x0L;
 630                                         type = 0;
 631                                 }
 632
 633                                 // Save information in slot structure
 634                                 func->base_length[(cloop - 0x10) >> 2] =
 635                                 base;
 636                                 func->base_type[(cloop - 0x10) >> 2] = type;
 637
 638                         }       // End of base register loop
 639
 640
 641                 } else if ((header_type & 0x7F) == 0x00) {        // PCI-PCI Bridge
 642                         // Figure out IO and memory base lengths
 643                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 644                                 temp_register = 0xFFFFFFFF;
 645                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 646                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 647
 648                                 if (base) {  // If this register is implemented
 649                                         if (base & 0x01L) {
 650                                                 // IO base
 651                                                 // base = amount of IO space requested
 652                                                 base = base & 0xFFFFFFFE;
 653                                                 base = (~base) + 1;
 654
 655                                                 type = 1;
 656                                         } else {
 657                                                 // memory base
 658                                                 // base = amount of memory space requested
 659                                                 base = base & 0xFFFFFFF0;
 660                                                 base = (~base) + 1;
 661
 662                                                 type = 0;
 663                                         }
 664                                 } else {
 665                                         base = 0x0L;
 666                                         type = 0;
 667                                 }
 668
 669                                 // Save information in slot structure
 670                                 func->base_length[(cloop - 0x10) >> 2] = base;
 671                                 func->base_type[(cloop - 0x10) >> 2] = type;
 672
 673                         }       // End of base register loop
 674
 675                 } else {          // Some other unknown header type
 676                 }
 677
 678                 // find the next device in this slot
 679                 func = cpqhp_slot_find(func->bus, func->device, index++);
 680         }
 681
 682         return(0);
 683 }
 684
 685
 686 /*
 687  * cpqhp_save_used_resources
 688  *
 689  * Stores used resource information for existing boards.  this is
 690  * for boards that were in the system when this driver was loaded.
 691  * this function is for hot plug ADD
 692  *
 693  * returns 0 if success
 694  */
 695 int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
 696 {
 697         u8 cloop;
 698         u8 header_type;
 699         u8 secondary_bus;
 700         u8 temp_byte;
 701         u8 b_base;
 702         u8 b_length;
 703         u16 command;
 704         u16 save_command;
 705         u16 w_base;
 706         u16 w_length;
 707         u32 temp_register;
 708         u32 save_base;
 709         u32 base;
 710         int index = 0;
 711         struct pci_resource *mem_node;
 712         struct pci_resource *p_mem_node;
 713         struct pci_resource *io_node;
 714         struct pci_resource *bus_node;
 715         struct pci_bus *pci_bus = ctrl->pci_bus;
 716         unsigned int devfn;
 717
 718         func = cpqhp_slot_find(func->bus, func->device, index++);
 719
 720         while ((func != NULL) && func->is_a_board) {
 721                 pci_bus->number = func->bus;
 722                 devfn = PCI_DEVFN(func->device, func->function);
 723
 724                 // Save the command register
 725                 pci_bus_read_config_word (pci_bus, devfn, PCI_COMMAND, &save_command);
 726
 727                 // disable card
 728                 command = 0x00;
 729                 pci_bus_write_config_word (pci_bus, devfn, PCI_COMMAND, command);
 730
 731                 // Check for Bridge
 732                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 733
 734                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 735                         // Clear Bridge Control Register
 736                         command = 0x00;
 737                         pci_bus_write_config_word (pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
 738                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 739                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
 740
 741                         bus_node =(struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 742                         if (!bus_node)
 743                                 return -ENOMEM;
 744
 745                         bus_node->base = secondary_bus;
 746                         bus_node->length = temp_byte - secondary_bus + 1;
 747
 748                         bus_node->next = func->bus_head;
 749                         func->bus_head = bus_node;
 750
 751                         // Save IO base and Limit registers
 752                         pci_bus_read_config_byte (pci_bus, devfn, PCI_IO_BASE, &b_base);
 753                         pci_bus_read_config_byte (pci_bus, devfn, PCI_IO_LIMIT, &b_length);
 754
 755                         if ((b_base <= b_length) && (save_command & 0x01)) {
 756                                 io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 757                                 if (!io_node)
 758                                         return -ENOMEM;
 759
 760                                 io_node->base = (b_base & 0xF0) << 8;
 761                                 io_node->length = (b_length - b_base + 0x10) << 8;
 762
 763                                 io_node->next = func->io_head;
 764                                 func->io_head = io_node;
 765                         }
 766
 767                         // Save memory base and Limit registers
 768                         pci_bus_read_config_word (pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
 769                         pci_bus_read_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
 770
 771                         if ((w_base <= w_length) && (save_command & 0x02)) {
 772                                 mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 773                                 if (!mem_node)
 774                                         return -ENOMEM;
 775
 776                                 mem_node->base = w_base << 16;
 777                                 mem_node->length = (w_length - w_base + 0x10) << 16;
 778
 779                                 mem_node->next = func->mem_head;
 780                                 func->mem_head = mem_node;
 781                         }
 782
 783                         // Save prefetchable memory base and Limit registers
 784                         pci_bus_read_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
 785                         pci_bus_read_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
 786
 787                         if ((w_base <= w_length) && (save_command & 0x02)) {
 788                                 p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 789                                 if (!p_mem_node)
 790                                         return -ENOMEM;
 791
 792                                 p_mem_node->base = w_base << 16;
 793                                 p_mem_node->length = (w_length - w_base + 0x10) << 16;
 794
 795                                 p_mem_node->next = func->p_mem_head;
 796                                 func->p_mem_head = p_mem_node;
 797                         }
 798                         // Figure out IO and memory base lengths
 799                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 800                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
 801
 802                                 temp_register = 0xFFFFFFFF;
 803                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 804                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 805
 806                                 temp_register = base;
 807
 808                                 if (base) {  // If this register is implemented
 809                                         if (((base & 0x03L) == 0x01)
 810                                             && (save_command & 0x01)) {
 811                                                 // IO base
 812                                                 // set temp_register = amount of IO space requested
 813                                                 temp_register = base & 0xFFFFFFFE;
 814                                                 temp_register = (~temp_register) + 1;
 815
 816                                                 io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 817                                                 if (!io_node)
 818                                                         return -ENOMEM;
 819
 820                                                 io_node->base =
 821                                                 save_base & (~0x03L);
 822                                                 io_node->length = temp_register;
 823
 824                                                 io_node->next = func->io_head;
 825                                                 func->io_head = io_node;
 826                                         } else
 827                                                 if (((base & 0x0BL) == 0x08)
 828                                                     && (save_command & 0x02)) {
 829                                                 // prefetchable memory base
 830                                                 temp_register = base & 0xFFFFFFF0;
 831                                                 temp_register = (~temp_register) + 1;
 832
 833                                                 p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 834                                                 if (!p_mem_node)
 835                                                         return -ENOMEM;
 836
 837                                                 p_mem_node->base = save_base & (~0x0FL);
 838                                                 p_mem_node->length = temp_register;
 839
 840                                                 p_mem_node->next = func->p_mem_head;
 841                                                 func->p_mem_head = p_mem_node;
 842                                         } else
 843                                                 if (((base & 0x0BL) == 0x00)
 844                                                     && (save_command & 0x02)) {
 845                                                 // prefetchable memory base
 846                                                 temp_register = base & 0xFFFFFFF0;
 847                                                 temp_register = (~temp_register) + 1;
 848
 849                                                 mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 850                                                 if (!mem_node)
 851                                                         return -ENOMEM;
 852
 853                                                 mem_node->base = save_base & (~0x0FL);
 854                                                 mem_node->length = temp_register;
 855
 856                                                 mem_node->next = func->mem_head;
 857                                                 func->mem_head = mem_node;
 858                                         } else
 859                                                 return(1);
 860                                 }
 861                         }       // End of base register loop
 862                 } else if ((header_type & 0x7F) == 0x00) {        // Standard header
 863                         // Figure out IO and memory base lengths
 864                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 865                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
 866
 867                                 temp_register = 0xFFFFFFFF;
 868                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 869                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 870
 871                                 temp_register = base;
 872
 873                                 if (base) {       // If this register is implemented
 874                                         if (((base & 0x03L) == 0x01)
 875                                             && (save_command & 0x01)) {
 876                                                 // IO base
 877                                                 // set temp_register = amount of IO space requested
 878                                                 temp_register = base & 0xFFFFFFFE;
 879                                                 temp_register = (~temp_register) + 1;
 880
 881                                                 io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 882                                                 if (!io_node)
 883                                                         return -ENOMEM;
 884
 885                                                 io_node->base = save_base & (~0x01L);
 886                                                 io_node->length = temp_register;
 887
 888                                                 io_node->next = func->io_head;
 889                                                 func->io_head = io_node;
 890                                         } else
 891                                                 if (((base & 0x0BL) == 0x08)
 892                                                     && (save_command & 0x02)) {
 893                                                 // prefetchable memory base
 894                                                 temp_register = base & 0xFFFFFFF0;
 895                                                 temp_register = (~temp_register) + 1;
 896
 897                                                 p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 898                                                 if (!p_mem_node)
 899                                                         return -ENOMEM;
 900
 901                                                 p_mem_node->base = save_base & (~0x0FL);
 902                                                 p_mem_node->length = temp_register;
 903
 904                                                 p_mem_node->next = func->p_mem_head;
 905                                                 func->p_mem_head = p_mem_node;
 906                                         } else
 907                                                 if (((base & 0x0BL) == 0x00)
 908                                                     && (save_command & 0x02)) {
 909                                                 // prefetchable memory base
 910                                                 temp_register = base & 0xFFFFFFF0;
 911                                                 temp_register = (~temp_register) + 1;
 912
 913                                                 mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
 914                                                 if (!mem_node)
 915                                                         return -ENOMEM;
 916
 917                                                 mem_node->base = save_base & (~0x0FL);
 918                                                 mem_node->length = temp_register;
 919
 920                                                 mem_node->next = func->mem_head;
 921                                                 func->mem_head = mem_node;
 922                                         } else
 923                                                 return(1);
 924                                 }
 925                         }       // End of base register loop
 926                 } else {          // Some other unknown header type
 927                 }
 928
 929                 // find the next device in this slot
 930                 func = cpqhp_slot_find(func->bus, func->device, index++);
 931         }
 932
 933         return(0);
 934 }
 935
 936
 937 /*
 938  * cpqhp_configure_board
 939  *
 940  * Copies saved configuration information to one slot.
 941  * this is called recursively for bridge devices.
 942  * this is for hot plug REPLACE!
 943  *
 944  * returns 0 if success
 945  */
 946 int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
 947 {
 948         int cloop;
 949         u8 header_type;
 950         u8 secondary_bus;
 951         int sub_bus;
 952         struct pci_func *next;
 953         u32 temp;
 954         u32 rc;
 955         int index = 0;
 956         struct pci_bus *pci_bus = ctrl->pci_bus;
 957         unsigned int devfn;
 958
 959         func = cpqhp_slot_find(func->bus, func->device, index++);
 960
 961         while (func != NULL) {
 962                 pci_bus->number = func->bus;
 963                 devfn = PCI_DEVFN(func->device, func->function);
 964
 965                 // Start at the top of config space so that the control
 966                 // registers are programmed last
 967                 for (cloop = 0x3C; cloop > 0; cloop -= 4) {
 968                         pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
 969                 }
 970
 971                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 972
 973                 // If this is a bridge device, restore subordinate devices
 974                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 975                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 976
 977                         sub_bus = (int) secondary_bus;
 978
 979                         next = cpqhp_slot_list[sub_bus];
 980
 981                         while (next != NULL) {
 982                                 rc = cpqhp_configure_board(ctrl, next);
 983                                 if (rc)
 984                                         return rc;
 985
 986                                 next = next->next;
 987                         }
 988                 } else {
 989
 990                         // Check all the base Address Registers to make sure
 991                         // they are the same.  If not, the board is different.
 992
 993                         for (cloop = 16; cloop < 40; cloop += 4) {
 994                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
 995
 996                                 if (temp != func->config_space[cloop >> 2]) {
 997                                         dbg("Config space compare failure!!! offset = %x\n", cloop);
 998                                         dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function);
 999                                         dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]);
1000                                         return 1;
1001                                 }
1002                         }
1003                 }
1004
1005                 func->configured = 1;
1006
1007                 func = cpqhp_slot_find(func->bus, func->device, index++);
1008         }
1009
1010         return 0;
1011 }
1012
1013
1014 /*
1015  * cpqhp_valid_replace
1016  *
1017  * this function checks to see if a board is the same as the
1018  * one it is replacing.  this check will detect if the device's
1019  * vendor or device id's are the same
1020  *
1021  * returns 0 if the board is the same nonzero otherwise
1022  */
1023 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1024 {
1025         u8 cloop;
1026         u8 header_type;
1027         u8 secondary_bus;
1028         u8 type;
1029         u32 temp_register = 0;
1030         u32 base;
1031         u32 rc;
1032         struct pci_func *next;
1033         int index = 0;
1034         struct pci_bus *pci_bus = ctrl->pci_bus;
1035         unsigned int devfn;
1036
1037         if (!func->is_a_board)
1038                 return(ADD_NOT_SUPPORTED);
1039
1040         func = cpqhp_slot_find(func->bus, func->device, index++);
1041
1042         while (func != NULL) {
1043                 pci_bus->number = func->bus;
1044                 devfn = PCI_DEVFN(func->device, func->function);
1045
1046                 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1047
1048                 // No adapter present
1049                 if (temp_register == 0xFFFFFFFF)
1050                         return(NO_ADAPTER_PRESENT);
1051
1052                 if (temp_register != func->config_space[0])
1053                         return(ADAPTER_NOT_SAME);
1054
1055                 // Check for same revision number and class code
1056                 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1057
1058                 // Adapter not the same
1059                 if (temp_register != func->config_space[0x08 >> 2])
1060                         return(ADAPTER_NOT_SAME);
1061
1062                 // Check for Bridge
1063                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1064
1065                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
1066                         // In order to continue checking, we must program the
1067                         // bus registers in the bridge to respond to accesses
1068                         // for it's subordinate bus(es)
1069
1070                         temp_register = func->config_space[0x18 >> 2];
1071                         pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
1072
1073                         secondary_bus = (temp_register >> 8) & 0xFF;
1074
1075                         next = cpqhp_slot_list[secondary_bus];
1076
1077                         while (next != NULL) {
1078                                 rc = cpqhp_valid_replace(ctrl, next);
1079                                 if (rc)
1080                                         return rc;
1081
1082                                 next = next->next;
1083                         }
1084
1085                 }
1086                 // Check to see if it is a standard config header
1087                 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1088                         // Check subsystem vendor and ID
1089                         pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1090
1091                         if (temp_register != func->config_space[0x2C >> 2]) {
1092                                 // If it's a SMART-2 and the register isn't filled
1093                                 // in, ignore the difference because
1094                                 // they just have an old rev of the firmware
1095
1096                                 if (!((func->config_space[0] == 0xAE100E11)
1097                                       && (temp_register == 0x00L)))
1098                                         return(ADAPTER_NOT_SAME);
1099                         }
1100                         // Figure out IO and memory base lengths
1101                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1102                                 temp_register = 0xFFFFFFFF;
1103                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
1104                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
1105                                 if (base) {       // If this register is implemented
1106                                         if (base & 0x01L) {
1107                                                 // IO base
1108                                                 // set base = amount of IO space requested
1109                                                 base = base & 0xFFFFFFFE;
1110                                                 base = (~base) + 1;
1111
1112                                                 type = 1;
1113                                         } else {
1114                                                 // memory base
1115                                                 base = base & 0xFFFFFFF0;
1116                                                 base = (~base) + 1;
1117
1118                                                 type = 0;
1119                                         }
1120                                 } else {
1121                                         base = 0x0L;
1122                                         type = 0;
1123                                 }
1124
1125                                 // Check information in slot structure
1126                                 if (func->base_length[(cloop - 0x10) >> 2] != base)
1127                                         return(ADAPTER_NOT_SAME);
1128
1129                                 if (func->base_type[(cloop - 0x10) >> 2] != type)
1130                                         return(ADAPTER_NOT_SAME);
1131
1132                         }       // End of base register loop
1133
1134                 }               // End of (type 0 config space) else
1135                 else {
1136                         // this is not a type 0 or 1 config space header so
1137                         // we don't know how to do it
1138                         return(DEVICE_TYPE_NOT_SUPPORTED);
1139                 }
1140
1141                 // Get the next function
1142                 func = cpqhp_slot_find(func->bus, func->device, index++);
1143         }
1144
1145
1146         return 0;
1147 }
1148
1149
1150 /*
1151  * cpqhp_find_available_resources
1152  *
1153  * Finds available memory, IO, and IRQ resources for programming
1154  * devices which may be added to the system
1155  * this function is for hot plug ADD!
1156  *
1157  * returns 0 if success
1158  */
1159 int cpqhp_find_available_resources (struct controller *ctrl, void *rom_start)
1160 {
1161         u8 temp;
1162         u8 populated_slot;
1163         u8 bridged_slot;
1164         void *one_slot;
1165         struct pci_func *func = NULL;
1166         int i = 10, index;
1167         u32 temp_dword, rc;
1168         struct pci_resource *mem_node;
1169         struct pci_resource *p_mem_node;
1170         struct pci_resource *io_node;
1171         struct pci_resource *bus_node;
1172         void *rom_resource_table;
1173
1174         rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
1175         dbg("rom_resource_table = %p\n", rom_resource_table);
1176
1177         if (rom_resource_table == NULL) {
1178                 return -ENODEV;
1179         }
1180         // Sum all resources and setup resource maps
1181         unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1182         dbg("unused_IRQ = %x\n", unused_IRQ);
1183
1184         temp = 0;
1185         while (unused_IRQ) {
1186                 if (unused_IRQ & 1) {
1187                         cpqhp_disk_irq = temp;
1188                         break;
1189                 }
1190                 unused_IRQ = unused_IRQ >> 1;
1191                 temp++;
1192         }
1193
1194         dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq);
1195         unused_IRQ = unused_IRQ >> 1;
1196         temp++;
1197
1198         while (unused_IRQ) {
1199                 if (unused_IRQ & 1) {
1200                         cpqhp_nic_irq = temp;
1201                         break;
1202                 }
1203                 unused_IRQ = unused_IRQ >> 1;
1204                 temp++;
1205         }
1206
1207         dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq);
1208         unused_IRQ = readl(rom_resource_table + PCIIRQ);
1209
1210         temp = 0;
1211
1212         if (!cpqhp_nic_irq) {
1213                 cpqhp_nic_irq = ctrl->cfgspc_irq;
1214         }
1215
1216         if (!cpqhp_disk_irq) {
1217                 cpqhp_disk_irq = ctrl->cfgspc_irq;
1218         }
1219
1220         dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq);
1221
1222         rc = compaq_nvram_load(rom_start, ctrl);
1223         if (rc)
1224                 return rc;
1225
1226         one_slot = rom_resource_table + sizeof (struct hrt);
1227
1228         i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
1229         dbg("number_of_entries = %d\n", i);
1230
1231         if (!readb(one_slot + SECONDARY_BUS))
1232                 return 1;
1233
1234         dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n");
1235
1236         while (i && readb(one_slot + SECONDARY_BUS)) {
1237                 u8 dev_func = readb(one_slot + DEV_FUNC);
1238                 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
1239                 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
1240                 u8 max_bus = readb(one_slot + MAX_BUS);
1241                 u16 io_base = readw(one_slot + IO_BASE);
1242                 u16 io_length = readw(one_slot + IO_LENGTH);
1243                 u16 mem_base = readw(one_slot + MEM_BASE);
1244                 u16 mem_length = readw(one_slot + MEM_LENGTH);
1245                 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
1246                 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
1247
1248                 dbg("%2.2x | %4.4x  | %4.4x | %4.4x   | %4.4x | %4.4x   | %4.4x |%2.2x %2.2x %2.2x\n",
1249                     dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1250                     primary_bus, secondary_bus, max_bus);
1251
1252                 // If this entry isn't for our controller's bus, ignore it
1253                 if (primary_bus != ctrl->bus) {
1254                         i--;
1255                         one_slot += sizeof (struct slot_rt);
1256                         continue;
1257                 }
1258                 // find out if this entry is for an occupied slot
1259                 ctrl->pci_bus->number = primary_bus;
1260                 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1261                 dbg("temp_D_word = %x\n", temp_dword);
1262
1263                 if (temp_dword != 0xFFFFFFFF) {
1264                         index = 0;
1265                         func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0);
1266
1267                         while (func && (func->function != (dev_func & 0x07))) {
1268                                 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index);
1269                                 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1270                         }
1271
1272                         // If we can't find a match, skip this table entry
1273                         if (!func) {
1274                                 i--;
1275                                 one_slot += sizeof (struct slot_rt);
1276                                 continue;
1277                         }
1278                         // this may not work and shouldn't be used
1279                         if (secondary_bus != primary_bus)
1280                                 bridged_slot = 1;
1281                         else
1282                                 bridged_slot = 0;
1283
1284                         populated_slot = 1;
1285                 } else {
1286                         populated_slot = 0;
1287                         bridged_slot = 0;
1288                 }
1289
1290
1291                 // If we've got a valid IO base, use it
1292
1293                 temp_dword = io_base + io_length;
1294
1295                 if ((io_base) && (temp_dword < 0x10000)) {
1296                         io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
1297                         if (!io_node)
1298                                 return -ENOMEM;
1299
1300                         io_node->base = io_base;
1301                         io_node->length = io_length;
1302
1303                         dbg("found io_node(base, length) = %x, %x\n", io_node->base, io_node->length);
1304                         dbg("populated slot =%d \n", populated_slot);
1305                         if (!populated_slot) {
1306                                 io_node->next = ctrl->io_head;
1307                                 ctrl->io_head = io_node;
1308                         } else {
1309                                 io_node->next = func->io_head;
1310                                 func->io_head = io_node;
1311                         }
1312                 }
1313
1314                 // If we've got a valid memory base, use it
1315                 temp_dword = mem_base + mem_length;
1316                 if ((mem_base) && (temp_dword < 0x10000)) {
1317                         mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
1318                         if (!mem_node)
1319                                 return -ENOMEM;
1320
1321                         mem_node->base = mem_base << 16;
1322
1323                         mem_node->length = mem_length << 16;
1324
1325                         dbg("found mem_node(base, length) = %x, %x\n", mem_node->base, mem_node->length);
1326                         dbg("populated slot =%d \n", populated_slot);
1327                         if (!populated_slot) {
1328                                 mem_node->next = ctrl->mem_head;
1329                                 ctrl->mem_head = mem_node;
1330                         } else {
1331                                 mem_node->next = func->mem_head;
1332                                 func->mem_head = mem_node;
1333                         }
1334                 }
1335
1336                 // If we've got a valid prefetchable memory base, and
1337                 // the base + length isn't greater than 0xFFFF
1338                 temp_dword = pre_mem_base + pre_mem_length;
1339                 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1340                         p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
1341                         if (!p_mem_node)
1342                                 return -ENOMEM;
1343
1344                         p_mem_node->base = pre_mem_base << 16;
1345
1346                         p_mem_node->length = pre_mem_length << 16;
1347                         dbg("found p_mem_node(base, length) = %x, %x\n", p_mem_node->base, p_mem_node->length);
1348                         dbg("populated slot =%d \n", populated_slot);
1349
1350                         if (!populated_slot) {
1351                                 p_mem_node->next = ctrl->p_mem_head;
1352                                 ctrl->p_mem_head = p_mem_node;
1353                         } else {
1354                                 p_mem_node->next = func->p_mem_head;
1355                                 func->p_mem_head = p_mem_node;
1356                         }
1357                 }
1358
1359                 // If we've got a valid bus number, use it
1360                 // The second condition is to ignore bus numbers on
1361                 // populated slots that don't have PCI-PCI bridges
1362                 if (secondary_bus && (secondary_bus != primary_bus)) {
1363                         bus_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
1364                         if (!bus_node)
1365                                 return -ENOMEM;
1366
1367                         bus_node->base = secondary_bus;
1368                         bus_node->length = max_bus - secondary_bus + 1;
1369                         dbg("found bus_node(base, length) = %x, %x\n", bus_node->base, bus_node->length);
1370                         dbg("populated slot =%d \n", populated_slot);
1371                         if (!populated_slot) {
1372                                 bus_node->next = ctrl->bus_head;
1373                                 ctrl->bus_head = bus_node;
1374                         } else {
1375                                 bus_node->next = func->bus_head;
1376                                 func->bus_head = bus_node;
1377                         }
1378                 }
1379
1380                 i--;
1381                 one_slot += sizeof (struct slot_rt);
1382         }
1383
1384         // If all of the following fail, we don't have any resources for
1385         // hot plug add
1386         rc = 1;
1387         rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1388         rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1389         rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1390         rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1391
1392         return rc;
1393 }
1394
1395
1396 /*
1397  * cpqhp_return_board_resources
1398  *
1399  * this routine returns all resources allocated to a board to
1400  * the available pool.
1401  *
1402  * returns 0 if success
1403  */
1404 int cpqhp_return_board_resources(struct pci_func * func, struct resource_lists * resources)
1405 {
1406         int rc = 0;
1407         struct pci_resource *node;
1408         struct pci_resource *t_node;
1409         dbg("%s\n", __FUNCTION__);
1410
1411         if (!func)
1412                 return 1;
1413
1414         node = func->io_head;
1415         func->io_head = NULL;
1416         while (node) {
1417                 t_node = node->next;
1418                 return_resource(&(resources->io_head), node);
1419                 node = t_node;
1420         }
1421
1422         node = func->mem_head;
1423         func->mem_head = NULL;
1424         while (node) {
1425                 t_node = node->next;
1426                 return_resource(&(resources->mem_head), node);
1427                 node = t_node;
1428         }
1429
1430         node = func->p_mem_head;
1431         func->p_mem_head = NULL;
1432         while (node) {
1433                 t_node = node->next;
1434                 return_resource(&(resources->p_mem_head), node);
1435                 node = t_node;
1436         }
1437
1438         node = func->bus_head;
1439         func->bus_head = NULL;
1440         while (node) {
1441                 t_node = node->next;
1442                 return_resource(&(resources->bus_head), node);
1443                 node = t_node;
1444         }
1445
1446         rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head));
1447         rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head));
1448         rc |= cpqhp_resource_sort_and_combine(&(resources->io_head));
1449         rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head));
1450
1451         return rc;
1452 }
1453
1454
1455 /*
1456  * cpqhp_destroy_resource_list
1457  *
1458  * Puts node back in the resource list pointed to by head
1459  */
1460 void cpqhp_destroy_resource_list (struct resource_lists * resources)
1461 {
1462         struct pci_resource *res, *tres;
1463
1464         res = resources->io_head;
1465         resources->io_head = NULL;
1466
1467         while (res) {
1468                 tres = res;
1469                 res = res->next;
1470                 kfree(tres);
1471         }
1472
1473         res = resources->mem_head;
1474         resources->mem_head = NULL;
1475
1476         while (res) {
1477                 tres = res;
1478                 res = res->next;
1479                 kfree(tres);
1480         }
1481
1482         res = resources->p_mem_head;
1483         resources->p_mem_head = NULL;
1484
1485         while (res) {
1486                 tres = res;
1487                 res = res->next;
1488                 kfree(tres);
1489         }
1490
1491         res = resources->bus_head;
1492         resources->bus_head = NULL;
1493
1494         while (res) {
1495                 tres = res;
1496                 res = res->next;
1497                 kfree(tres);
1498         }
1499 }
1500
1501
1502 /*
1503  * cpqhp_destroy_board_resources
1504  *
1505  * Puts node back in the resource list pointed to by head
1506  */
1507 void cpqhp_destroy_board_resources (struct pci_func * func)
1508 {
1509         struct pci_resource *res, *tres;
1510
1511         res = func->io_head;
1512         func->io_head = NULL;
1513
1514         while (res) {
1515                 tres = res;
1516                 res = res->next;
1517                 kfree(tres);
1518         }
1519
1520         res = func->mem_head;
1521         func->mem_head = NULL;
1522
1523         while (res) {
1524                 tres = res;
1525                 res = res->next;
1526                 kfree(tres);
1527         }
1528
1529         res = func->p_mem_head;
1530         func->p_mem_head = NULL;
1531
1532         while (res) {
1533                 tres = res;
1534                 res = res->next;
1535                 kfree(tres);
1536         }
1537
1538         res = func->bus_head;
1539         func->bus_head = NULL;
1540
1541         while (res) {
1542                 tres = res;
1543                 res = res->next;
1544                 kfree(tres);
1545         }
1546 }
1547