2 * Compaq Hot Plug Controller Driver
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 * Send feedback to <greg@kroah.com>
29 #include <linux/config.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/types.h>
33 #include <linux/slab.h>
34 #include <linux/workqueue.h>
35 #include <linux/proc_fs.h>
36 #include <linux/pci.h>
39 #include "cpqphp_nvram.h"
40 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
46 static u16 unused_IRQ;
49 * detect_HRT_floating_pointer
51 * find the Hot Plug Resource Table in the specified region of memory.
54 static void *detect_HRT_floating_pointer(void *begin, void *end)
58 u8 temp1, temp2, temp3, temp4;
61 endp = (end - sizeof(struct hrt) + 1);
63 for (fp = begin; fp <= endp; fp += 16) {
64 temp1 = readb(fp + SIG0);
65 temp2 = readb(fp + SIG1);
66 temp3 = readb(fp + SIG2);
67 temp4 = readb(fp + SIG3);
80 dbg("Discovered Hotplug Resource Table at %p\n", fp);
85 int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func)
88 struct pci_bus *child;
91 if (func->pci_dev == NULL)
92 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
94 /* No pci device, we need to create it then */
95 if (func->pci_dev == NULL) {
96 dbg("INFO: pci_dev still null\n");
98 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function));
100 pci_bus_add_devices(ctrl->pci_dev->bus);
102 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
103 if (func->pci_dev == NULL) {
104 dbg("ERROR: pci_dev still null\n");
109 if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
110 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
111 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
112 pci_do_scan_bus(child);
119 int cpqhp_unconfigure_device(struct pci_func* func)
123 dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, func->device, func->function);
125 for (j=0; j<8 ; j++) {
126 struct pci_dev* temp = pci_find_slot(func->bus, PCI_DEVFN(func->device, j));
128 pci_remove_bus_device(temp);
133 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value)
137 if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1)
139 if (vendID == 0xffffffff)
141 return pci_bus_read_config_dword (bus, devfn, offset, value);
148 * @bus_num: bus number of PCI device
149 * @dev_num: device number of PCI device
150 * @slot: pointer to u8 where slot number will be returned
152 int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
156 struct pci_dev fakedev;
157 struct pci_bus fakebus;
159 if (cpqhp_legacy_mode) {
160 fakedev.devfn = dev_num << 3;
161 fakedev.bus = &fakebus;
162 fakebus.number = bus_num;
163 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
164 __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
165 rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
166 dbg("%s: rc %d\n", __FUNCTION__, rc);
170 // set the Edge Level Control Register (ELCR)
171 temp_word = inb(0x4d0);
172 temp_word |= inb(0x4d1) << 8;
174 temp_word |= 0x01 << irq_num;
176 // This should only be for x86 as it sets the Edge Level Control Register
177 outb((u8) (temp_word & 0xFF), 0x4d0);
178 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
186 * WTF??? This function isn't in the code, yet a function calls it, but the
187 * compiler optimizes it away? strange. Here as a placeholder to keep the
190 static int PCI_ScanBusNonBridge (u8 bus, u8 device)
195 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num)
201 ctrl->pci_bus->number = bus_num;
203 for (tdevice = 0; tdevice < 0xFF; tdevice++) {
204 //Scan for access first
205 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
207 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
208 //Yep we got one. Not a bridge ?
209 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
215 for (tdevice = 0; tdevice < 0xFF; tdevice++) {
216 //Scan for access first
217 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
219 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
220 //Yep we got one. bridge ?
221 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
222 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
223 dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
224 if (PCI_ScanBusNonBridge(tbus, tdevice) == 0)
233 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge)
235 struct irq_routing_table *PCIIRQRoutingInfoLength;
240 u8 tbus, tdevice, tslot;
242 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
243 if (!PCIIRQRoutingInfoLength)
246 len = (PCIIRQRoutingInfoLength->size -
247 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
248 // Make sure I got at least one entry
250 if (PCIIRQRoutingInfoLength != NULL)
251 kfree(PCIIRQRoutingInfoLength );
255 for (loop = 0; loop < len; ++loop) {
256 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
257 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn;
258 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
263 ctrl->pci_bus->number = tbus;
264 pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
265 if (!nobridge || (work == 0xffffffff)) {
266 if (PCIIRQRoutingInfoLength != NULL)
267 kfree(PCIIRQRoutingInfoLength );
271 dbg("bus_num %d devfn %d\n", *bus_num, *dev_num);
272 pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work);
273 dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS);
275 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
276 pci_bus_read_config_byte (ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus);
277 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
278 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
280 if (PCIIRQRoutingInfoLength != NULL)
281 kfree(PCIIRQRoutingInfoLength );
285 if (PCIIRQRoutingInfoLength != NULL)
286 kfree(PCIIRQRoutingInfoLength );
292 if (PCIIRQRoutingInfoLength != NULL)
293 kfree(PCIIRQRoutingInfoLength );
298 int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
300 return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0); //plain (bridges allowed)
304 /* More PCI configuration routines; this time centered around hotplug controller */
310 * Reads configuration for all slots in a PCI bus and saves info.
312 * Note: For non-hot plug busses, the slot # saved is the device #
314 * returns 0 if success
316 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
323 struct pci_func *new_slot;
335 // Decide which slots are supported
338 //*********************************
339 // is_hot_plug is the slot mask
340 //*********************************
341 FirstSupported = is_hot_plug >> 4;
342 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
345 LastSupported = 0x1F;
348 // Save PCI configuration space for all devices in supported slots
349 ctrl->pci_bus->number = busnumber;
350 for (device = FirstSupported; device <= LastSupported; device++) {
352 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
354 if (ID != 0xFFFFFFFF) { // device in slot
355 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
359 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
363 // If multi-function device, set max_functions to 8
364 if (header_type & 0x80)
374 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // P-P Bridge
375 // Recurse the subordinate bus
376 // get the subordinate bus number
377 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
381 sub_bus = (int) secondary_bus;
383 // Save secondary bus cfg spc
384 // with this recursive call.
385 rc = cpqhp_save_config(ctrl, sub_bus, 0);
388 ctrl->pci_bus->number = busnumber;
393 new_slot = cpqhp_slot_find(busnumber, device, index++);
395 (new_slot->function != (u8) function))
396 new_slot = cpqhp_slot_find(busnumber, device, index++);
399 // Setup slot structure.
400 new_slot = cpqhp_slot_create(busnumber);
402 if (new_slot == NULL)
406 new_slot->bus = (u8) busnumber;
407 new_slot->device = (u8) device;
408 new_slot->function = (u8) function;
409 new_slot->is_a_board = 1;
410 new_slot->switch_save = 0x10;
411 // In case of unsupported board
412 new_slot->status = DevError;
413 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
415 for (cloop = 0; cloop < 0x20; cloop++) {
416 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
425 // this loop skips to the next present function
426 // reading in Class Code and Header type.
428 while ((function < max_functions)&&(!stop_it)) {
429 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
430 if (ID == 0xFFFFFFFF) { // nothing there.
432 } else { // Something there
433 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
437 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type);
445 } while (function < max_functions);
446 } // End of IF (device in slot?)
447 else if (is_hot_plug) {
448 // Setup slot structure with entry for empty slot
449 new_slot = cpqhp_slot_create(busnumber);
451 if (new_slot == NULL) {
455 new_slot->bus = (u8) busnumber;
456 new_slot->device = (u8) device;
457 new_slot->function = 0;
458 new_slot->is_a_board = 0;
459 new_slot->presence_save = 0;
460 new_slot->switch_save = 0;
469 * cpqhp_save_slot_config
471 * Saves configuration info for all PCI devices in a given slot
472 * including subordinate busses.
474 * returns 0 if success
476 int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
491 ctrl->pci_bus->number = new_slot->bus;
492 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
494 if (ID != 0xFFFFFFFF) { // device in slot
495 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
496 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
498 if (header_type & 0x80) // Multi-function device
506 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
507 // Recurse the subordinate bus
508 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
510 sub_bus = (int) secondary_bus;
512 // Save the config headers for the secondary bus.
513 rc = cpqhp_save_config(ctrl, sub_bus, 0);
516 ctrl->pci_bus->number = new_slot->bus;
520 new_slot->status = 0;
522 for (cloop = 0; cloop < 0x20; cloop++) {
523 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
530 // this loop skips to the next present function
531 // reading in the Class Code and the Header type.
533 while ((function < max_functions) && (!stop_it)) {
534 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
536 if (ID == 0xFFFFFFFF) { // nothing there.
538 } else { // Something there
539 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
541 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
547 } while (function < max_functions);
548 } // End of IF (device in slot?)
558 * cpqhp_save_base_addr_length
560 * Saves the length of all base address registers for the
561 * specified slot. this is for hot plug REPLACE
563 * returns 0 if success
565 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
575 struct pci_func *next;
577 struct pci_bus *pci_bus = ctrl->pci_bus;
580 func = cpqhp_slot_find(func->bus, func->device, index++);
582 while (func != NULL) {
583 pci_bus->number = func->bus;
584 devfn = PCI_DEVFN(func->device, func->function);
587 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
589 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
591 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
593 sub_bus = (int) secondary_bus;
595 next = cpqhp_slot_list[sub_bus];
597 while (next != NULL) {
598 rc = cpqhp_save_base_addr_length(ctrl, next);
604 pci_bus->number = func->bus;
606 //FIXME: this loop is duplicated in the non-bridge case. The two could be rolled together
607 // Figure out IO and memory base lengths
608 for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
609 temp_register = 0xFFFFFFFF;
610 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
611 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
613 if (base) { // If this register is implemented
616 // set base = amount of IO space requested
617 base = base & 0xFFFFFFFE;
623 base = base & 0xFFFFFFF0;
633 // Save information in slot structure
634 func->base_length[(cloop - 0x10) >> 2] =
636 func->base_type[(cloop - 0x10) >> 2] = type;
638 } // End of base register loop
641 } else if ((header_type & 0x7F) == 0x00) { // PCI-PCI Bridge
642 // Figure out IO and memory base lengths
643 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
644 temp_register = 0xFFFFFFFF;
645 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
646 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
648 if (base) { // If this register is implemented
651 // base = amount of IO space requested
652 base = base & 0xFFFFFFFE;
658 // base = amount of memory space requested
659 base = base & 0xFFFFFFF0;
669 // Save information in slot structure
670 func->base_length[(cloop - 0x10) >> 2] = base;
671 func->base_type[(cloop - 0x10) >> 2] = type;
673 } // End of base register loop
675 } else { // Some other unknown header type
678 // find the next device in this slot
679 func = cpqhp_slot_find(func->bus, func->device, index++);
687 * cpqhp_save_used_resources
689 * Stores used resource information for existing boards. this is
690 * for boards that were in the system when this driver was loaded.
691 * this function is for hot plug ADD
693 * returns 0 if success
695 int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
711 struct pci_resource *mem_node;
712 struct pci_resource *p_mem_node;
713 struct pci_resource *io_node;
714 struct pci_resource *bus_node;
715 struct pci_bus *pci_bus = ctrl->pci_bus;
718 func = cpqhp_slot_find(func->bus, func->device, index++);
720 while ((func != NULL) && func->is_a_board) {
721 pci_bus->number = func->bus;
722 devfn = PCI_DEVFN(func->device, func->function);
724 // Save the command register
725 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
729 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
732 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
734 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
735 // Clear Bridge Control Register
737 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
738 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
739 pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
741 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
745 bus_node->base = secondary_bus;
746 bus_node->length = temp_byte - secondary_bus + 1;
748 bus_node->next = func->bus_head;
749 func->bus_head = bus_node;
751 // Save IO base and Limit registers
752 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
753 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
755 if ((b_base <= b_length) && (save_command & 0x01)) {
756 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
760 io_node->base = (b_base & 0xF0) << 8;
761 io_node->length = (b_length - b_base + 0x10) << 8;
763 io_node->next = func->io_head;
764 func->io_head = io_node;
767 // Save memory base and Limit registers
768 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
769 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
771 if ((w_base <= w_length) && (save_command & 0x02)) {
772 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
776 mem_node->base = w_base << 16;
777 mem_node->length = (w_length - w_base + 0x10) << 16;
779 mem_node->next = func->mem_head;
780 func->mem_head = mem_node;
783 // Save prefetchable memory base and Limit registers
784 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
785 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
787 if ((w_base <= w_length) && (save_command & 0x02)) {
788 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
792 p_mem_node->base = w_base << 16;
793 p_mem_node->length = (w_length - w_base + 0x10) << 16;
795 p_mem_node->next = func->p_mem_head;
796 func->p_mem_head = p_mem_node;
798 // Figure out IO and memory base lengths
799 for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
800 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
802 temp_register = 0xFFFFFFFF;
803 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
804 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
806 temp_register = base;
808 if (base) { // If this register is implemented
809 if (((base & 0x03L) == 0x01)
810 && (save_command & 0x01)) {
812 // set temp_register = amount of IO space requested
813 temp_register = base & 0xFFFFFFFE;
814 temp_register = (~temp_register) + 1;
816 io_node = kmalloc(sizeof(*io_node),
822 save_base & (~0x03L);
823 io_node->length = temp_register;
825 io_node->next = func->io_head;
826 func->io_head = io_node;
828 if (((base & 0x0BL) == 0x08)
829 && (save_command & 0x02)) {
830 // prefetchable memory base
831 temp_register = base & 0xFFFFFFF0;
832 temp_register = (~temp_register) + 1;
834 p_mem_node = kmalloc(sizeof(*p_mem_node),
839 p_mem_node->base = save_base & (~0x0FL);
840 p_mem_node->length = temp_register;
842 p_mem_node->next = func->p_mem_head;
843 func->p_mem_head = p_mem_node;
845 if (((base & 0x0BL) == 0x00)
846 && (save_command & 0x02)) {
847 // prefetchable memory base
848 temp_register = base & 0xFFFFFFF0;
849 temp_register = (~temp_register) + 1;
851 mem_node = kmalloc(sizeof(*mem_node),
856 mem_node->base = save_base & (~0x0FL);
857 mem_node->length = temp_register;
859 mem_node->next = func->mem_head;
860 func->mem_head = mem_node;
864 } // End of base register loop
865 } else if ((header_type & 0x7F) == 0x00) { // Standard header
866 // Figure out IO and memory base lengths
867 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
868 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
870 temp_register = 0xFFFFFFFF;
871 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
872 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
874 temp_register = base;
876 if (base) { // If this register is implemented
877 if (((base & 0x03L) == 0x01)
878 && (save_command & 0x01)) {
880 // set temp_register = amount of IO space requested
881 temp_register = base & 0xFFFFFFFE;
882 temp_register = (~temp_register) + 1;
884 io_node = kmalloc(sizeof(*io_node),
889 io_node->base = save_base & (~0x01L);
890 io_node->length = temp_register;
892 io_node->next = func->io_head;
893 func->io_head = io_node;
895 if (((base & 0x0BL) == 0x08)
896 && (save_command & 0x02)) {
897 // prefetchable memory base
898 temp_register = base & 0xFFFFFFF0;
899 temp_register = (~temp_register) + 1;
901 p_mem_node = kmalloc(sizeof(*p_mem_node),
906 p_mem_node->base = save_base & (~0x0FL);
907 p_mem_node->length = temp_register;
909 p_mem_node->next = func->p_mem_head;
910 func->p_mem_head = p_mem_node;
912 if (((base & 0x0BL) == 0x00)
913 && (save_command & 0x02)) {
914 // prefetchable memory base
915 temp_register = base & 0xFFFFFFF0;
916 temp_register = (~temp_register) + 1;
918 mem_node = kmalloc(sizeof(*mem_node),
923 mem_node->base = save_base & (~0x0FL);
924 mem_node->length = temp_register;
926 mem_node->next = func->mem_head;
927 func->mem_head = mem_node;
931 } // End of base register loop
932 } else { // Some other unknown header type
935 // find the next device in this slot
936 func = cpqhp_slot_find(func->bus, func->device, index++);
944 * cpqhp_configure_board
946 * Copies saved configuration information to one slot.
947 * this is called recursively for bridge devices.
948 * this is for hot plug REPLACE!
950 * returns 0 if success
952 int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
958 struct pci_func *next;
962 struct pci_bus *pci_bus = ctrl->pci_bus;
965 func = cpqhp_slot_find(func->bus, func->device, index++);
967 while (func != NULL) {
968 pci_bus->number = func->bus;
969 devfn = PCI_DEVFN(func->device, func->function);
971 // Start at the top of config space so that the control
972 // registers are programmed last
973 for (cloop = 0x3C; cloop > 0; cloop -= 4) {
974 pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
977 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
979 // If this is a bridge device, restore subordinate devices
980 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
981 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
983 sub_bus = (int) secondary_bus;
985 next = cpqhp_slot_list[sub_bus];
987 while (next != NULL) {
988 rc = cpqhp_configure_board(ctrl, next);
996 // Check all the base Address Registers to make sure
997 // they are the same. If not, the board is different.
999 for (cloop = 16; cloop < 40; cloop += 4) {
1000 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
1002 if (temp != func->config_space[cloop >> 2]) {
1003 dbg("Config space compare failure!!! offset = %x\n", cloop);
1004 dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function);
1005 dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]);
1011 func->configured = 1;
1013 func = cpqhp_slot_find(func->bus, func->device, index++);
1021 * cpqhp_valid_replace
1023 * this function checks to see if a board is the same as the
1024 * one it is replacing. this check will detect if the device's
1025 * vendor or device id's are the same
1027 * returns 0 if the board is the same nonzero otherwise
1029 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1035 u32 temp_register = 0;
1038 struct pci_func *next;
1040 struct pci_bus *pci_bus = ctrl->pci_bus;
1043 if (!func->is_a_board)
1044 return(ADD_NOT_SUPPORTED);
1046 func = cpqhp_slot_find(func->bus, func->device, index++);
1048 while (func != NULL) {
1049 pci_bus->number = func->bus;
1050 devfn = PCI_DEVFN(func->device, func->function);
1052 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1054 // No adapter present
1055 if (temp_register == 0xFFFFFFFF)
1056 return(NO_ADAPTER_PRESENT);
1058 if (temp_register != func->config_space[0])
1059 return(ADAPTER_NOT_SAME);
1061 // Check for same revision number and class code
1062 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1064 // Adapter not the same
1065 if (temp_register != func->config_space[0x08 >> 2])
1066 return(ADAPTER_NOT_SAME);
1069 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1071 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
1072 // In order to continue checking, we must program the
1073 // bus registers in the bridge to respond to accesses
1074 // for it's subordinate bus(es)
1076 temp_register = func->config_space[0x18 >> 2];
1077 pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
1079 secondary_bus = (temp_register >> 8) & 0xFF;
1081 next = cpqhp_slot_list[secondary_bus];
1083 while (next != NULL) {
1084 rc = cpqhp_valid_replace(ctrl, next);
1092 // Check to see if it is a standard config header
1093 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1094 // Check subsystem vendor and ID
1095 pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1097 if (temp_register != func->config_space[0x2C >> 2]) {
1098 // If it's a SMART-2 and the register isn't filled
1099 // in, ignore the difference because
1100 // they just have an old rev of the firmware
1102 if (!((func->config_space[0] == 0xAE100E11)
1103 && (temp_register == 0x00L)))
1104 return(ADAPTER_NOT_SAME);
1106 // Figure out IO and memory base lengths
1107 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1108 temp_register = 0xFFFFFFFF;
1109 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
1110 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
1111 if (base) { // If this register is implemented
1114 // set base = amount of IO space requested
1115 base = base & 0xFFFFFFFE;
1121 base = base & 0xFFFFFFF0;
1131 // Check information in slot structure
1132 if (func->base_length[(cloop - 0x10) >> 2] != base)
1133 return(ADAPTER_NOT_SAME);
1135 if (func->base_type[(cloop - 0x10) >> 2] != type)
1136 return(ADAPTER_NOT_SAME);
1138 } // End of base register loop
1140 } // End of (type 0 config space) else
1142 // this is not a type 0 or 1 config space header so
1143 // we don't know how to do it
1144 return(DEVICE_TYPE_NOT_SUPPORTED);
1147 // Get the next function
1148 func = cpqhp_slot_find(func->bus, func->device, index++);
1157 * cpqhp_find_available_resources
1159 * Finds available memory, IO, and IRQ resources for programming
1160 * devices which may be added to the system
1161 * this function is for hot plug ADD!
1163 * returns 0 if success
1165 int cpqhp_find_available_resources (struct controller *ctrl, void *rom_start)
1171 struct pci_func *func = NULL;
1174 struct pci_resource *mem_node;
1175 struct pci_resource *p_mem_node;
1176 struct pci_resource *io_node;
1177 struct pci_resource *bus_node;
1178 void *rom_resource_table;
1180 rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
1181 dbg("rom_resource_table = %p\n", rom_resource_table);
1183 if (rom_resource_table == NULL) {
1186 // Sum all resources and setup resource maps
1187 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1188 dbg("unused_IRQ = %x\n", unused_IRQ);
1191 while (unused_IRQ) {
1192 if (unused_IRQ & 1) {
1193 cpqhp_disk_irq = temp;
1196 unused_IRQ = unused_IRQ >> 1;
1200 dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq);
1201 unused_IRQ = unused_IRQ >> 1;
1204 while (unused_IRQ) {
1205 if (unused_IRQ & 1) {
1206 cpqhp_nic_irq = temp;
1209 unused_IRQ = unused_IRQ >> 1;
1213 dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq);
1214 unused_IRQ = readl(rom_resource_table + PCIIRQ);
1218 if (!cpqhp_nic_irq) {
1219 cpqhp_nic_irq = ctrl->cfgspc_irq;
1222 if (!cpqhp_disk_irq) {
1223 cpqhp_disk_irq = ctrl->cfgspc_irq;
1226 dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq);
1228 rc = compaq_nvram_load(rom_start, ctrl);
1232 one_slot = rom_resource_table + sizeof (struct hrt);
1234 i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
1235 dbg("number_of_entries = %d\n", i);
1237 if (!readb(one_slot + SECONDARY_BUS))
1240 dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n");
1242 while (i && readb(one_slot + SECONDARY_BUS)) {
1243 u8 dev_func = readb(one_slot + DEV_FUNC);
1244 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
1245 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
1246 u8 max_bus = readb(one_slot + MAX_BUS);
1247 u16 io_base = readw(one_slot + IO_BASE);
1248 u16 io_length = readw(one_slot + IO_LENGTH);
1249 u16 mem_base = readw(one_slot + MEM_BASE);
1250 u16 mem_length = readw(one_slot + MEM_LENGTH);
1251 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
1252 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
1254 dbg("%2.2x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x |%2.2x %2.2x %2.2x\n",
1255 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1256 primary_bus, secondary_bus, max_bus);
1258 // If this entry isn't for our controller's bus, ignore it
1259 if (primary_bus != ctrl->bus) {
1261 one_slot += sizeof (struct slot_rt);
1264 // find out if this entry is for an occupied slot
1265 ctrl->pci_bus->number = primary_bus;
1266 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1267 dbg("temp_D_word = %x\n", temp_dword);
1269 if (temp_dword != 0xFFFFFFFF) {
1271 func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0);
1273 while (func && (func->function != (dev_func & 0x07))) {
1274 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index);
1275 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1278 // If we can't find a match, skip this table entry
1281 one_slot += sizeof (struct slot_rt);
1284 // this may not work and shouldn't be used
1285 if (secondary_bus != primary_bus)
1297 // If we've got a valid IO base, use it
1299 temp_dword = io_base + io_length;
1301 if ((io_base) && (temp_dword < 0x10000)) {
1302 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
1306 io_node->base = io_base;
1307 io_node->length = io_length;
1309 dbg("found io_node(base, length) = %x, %x\n",
1310 io_node->base, io_node->length);
1311 dbg("populated slot =%d \n", populated_slot);
1312 if (!populated_slot) {
1313 io_node->next = ctrl->io_head;
1314 ctrl->io_head = io_node;
1316 io_node->next = func->io_head;
1317 func->io_head = io_node;
1321 // If we've got a valid memory base, use it
1322 temp_dword = mem_base + mem_length;
1323 if ((mem_base) && (temp_dword < 0x10000)) {
1324 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
1328 mem_node->base = mem_base << 16;
1330 mem_node->length = mem_length << 16;
1332 dbg("found mem_node(base, length) = %x, %x\n",
1333 mem_node->base, mem_node->length);
1334 dbg("populated slot =%d \n", populated_slot);
1335 if (!populated_slot) {
1336 mem_node->next = ctrl->mem_head;
1337 ctrl->mem_head = mem_node;
1339 mem_node->next = func->mem_head;
1340 func->mem_head = mem_node;
1344 // If we've got a valid prefetchable memory base, and
1345 // the base + length isn't greater than 0xFFFF
1346 temp_dword = pre_mem_base + pre_mem_length;
1347 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1348 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
1352 p_mem_node->base = pre_mem_base << 16;
1354 p_mem_node->length = pre_mem_length << 16;
1355 dbg("found p_mem_node(base, length) = %x, %x\n",
1356 p_mem_node->base, p_mem_node->length);
1357 dbg("populated slot =%d \n", populated_slot);
1359 if (!populated_slot) {
1360 p_mem_node->next = ctrl->p_mem_head;
1361 ctrl->p_mem_head = p_mem_node;
1363 p_mem_node->next = func->p_mem_head;
1364 func->p_mem_head = p_mem_node;
1368 // If we've got a valid bus number, use it
1369 // The second condition is to ignore bus numbers on
1370 // populated slots that don't have PCI-PCI bridges
1371 if (secondary_bus && (secondary_bus != primary_bus)) {
1372 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
1376 bus_node->base = secondary_bus;
1377 bus_node->length = max_bus - secondary_bus + 1;
1378 dbg("found bus_node(base, length) = %x, %x\n",
1379 bus_node->base, bus_node->length);
1380 dbg("populated slot =%d \n", populated_slot);
1381 if (!populated_slot) {
1382 bus_node->next = ctrl->bus_head;
1383 ctrl->bus_head = bus_node;
1385 bus_node->next = func->bus_head;
1386 func->bus_head = bus_node;
1391 one_slot += sizeof (struct slot_rt);
1394 // If all of the following fail, we don't have any resources for
1397 rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1398 rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1399 rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1400 rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1407 * cpqhp_return_board_resources
1409 * this routine returns all resources allocated to a board to
1410 * the available pool.
1412 * returns 0 if success
1414 int cpqhp_return_board_resources(struct pci_func * func, struct resource_lists * resources)
1417 struct pci_resource *node;
1418 struct pci_resource *t_node;
1419 dbg("%s\n", __FUNCTION__);
1424 node = func->io_head;
1425 func->io_head = NULL;
1427 t_node = node->next;
1428 return_resource(&(resources->io_head), node);
1432 node = func->mem_head;
1433 func->mem_head = NULL;
1435 t_node = node->next;
1436 return_resource(&(resources->mem_head), node);
1440 node = func->p_mem_head;
1441 func->p_mem_head = NULL;
1443 t_node = node->next;
1444 return_resource(&(resources->p_mem_head), node);
1448 node = func->bus_head;
1449 func->bus_head = NULL;
1451 t_node = node->next;
1452 return_resource(&(resources->bus_head), node);
1456 rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head));
1457 rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head));
1458 rc |= cpqhp_resource_sort_and_combine(&(resources->io_head));
1459 rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head));
1466 * cpqhp_destroy_resource_list
1468 * Puts node back in the resource list pointed to by head
1470 void cpqhp_destroy_resource_list (struct resource_lists * resources)
1472 struct pci_resource *res, *tres;
1474 res = resources->io_head;
1475 resources->io_head = NULL;
1483 res = resources->mem_head;
1484 resources->mem_head = NULL;
1492 res = resources->p_mem_head;
1493 resources->p_mem_head = NULL;
1501 res = resources->bus_head;
1502 resources->bus_head = NULL;
1513 * cpqhp_destroy_board_resources
1515 * Puts node back in the resource list pointed to by head
1517 void cpqhp_destroy_board_resources (struct pci_func * func)
1519 struct pci_resource *res, *tres;
1521 res = func->io_head;
1522 func->io_head = NULL;
1530 res = func->mem_head;
1531 func->mem_head = NULL;
1539 res = func->p_mem_head;
1540 func->p_mem_head = NULL;
1548 res = func->bus_head;
1549 func->bus_head = NULL;