patch-2_6_7-vs1_9_1_12
[linux-2.6.git] / drivers / pci / hotplug / shpchp_pci.c
1 /*
2  * Standard Hot Plug Controller Driver
3  *
4  * Copyright (C) 1995,2001 Compaq Computer Corporation
5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6  * Copyright (C) 2001 IBM Corp.
7  * Copyright (C) 2003-2004 Intel Corporation
8  *
9  * All rights reserved.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19  * NON INFRINGEMENT.  See the GNU General Public License for more
20  * details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25  *
26  * Send feedback to <greg@kroah.com>, <dely.l.sy@intel.com>
27  *
28  */
29
30 #include <linux/config.h>
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/types.h>
34 #include <linux/slab.h>
35 #include <linux/workqueue.h>
36 #include <linux/proc_fs.h>
37 #include <linux/pci.h>
38 #include "../pci.h"
39 #include "shpchp.h"
40 #ifndef CONFIG_IA64
41 #include "../../../arch/i386/pci/pci.h"    /* horrible hack showing how processor dependant we are... */
42 #endif
43
44 int shpchp_configure_device (struct controller* ctrl, struct pci_func* func)  
45 {
46         unsigned char bus;
47         struct pci_bus *child;
48         int num;
49
50         if (func->pci_dev == NULL)
51                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
52
53         /* Still NULL ? Well then scan for it ! */
54         if (func->pci_dev == NULL) {
55                 num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function));
56                 if (num) {
57                         dbg("%s: subordiante %p number %x\n", __FUNCTION__, ctrl->pci_dev->subordinate,
58                                 ctrl->pci_dev->subordinate->number);
59                         pci_bus_add_devices(ctrl->pci_dev->subordinate);
60                 }
61                 
62                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
63                 if (func->pci_dev == NULL) {
64                         dbg("ERROR: pci_dev still null\n");
65                         return 0;
66                 }
67         }
68
69         if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
70                 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
71                 child = pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
72                 pci_do_scan_bus(child);
73
74         }
75
76         return 0;
77 }
78
79
80 int shpchp_unconfigure_device(struct pci_func* func) 
81 {
82         int rc = 0;
83         int j;
84         
85         dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus,
86                                 func->device, func->function);
87
88         for (j=0; j<8 ; j++) {
89                 struct pci_dev* temp = pci_find_slot(func->bus,
90                                 (func->device << 3) | j);
91                 if (temp) {
92                         pci_remove_bus_device(temp);
93                 }
94         }
95         return rc;
96 }
97
98 /*
99  * shpchp_set_irq
100  *
101  * @bus_num: bus number of PCI device
102  * @dev_num: device number of PCI device
103  * @slot: pointer to u8 where slot number will be returned
104  */
105 int shpchp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
106 {
107 #if defined(CONFIG_X86) && !defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_64)
108         int rc;
109         u16 temp_word;
110         struct pci_dev fakedev;
111         struct pci_bus fakebus;
112
113         fakedev.devfn = dev_num << 3;
114         fakedev.bus = &fakebus;
115         fakebus.number = bus_num;
116         dbg("%s: dev %d, bus %d, pin %d, num %d\n",
117             __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
118         rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
119         dbg("%s: rc %d\n", __FUNCTION__, rc);
120         if (!rc)
121                 return !rc;
122
123         /* set the Edge Level Control Register (ELCR) */
124         temp_word = inb(0x4d0);
125         temp_word |= inb(0x4d1) << 8;
126
127         temp_word |= 0x01 << irq_num;
128
129         /* This should only be for x86 as it sets the Edge Level Control Register */
130         outb((u8) (temp_word & 0xFF), 0x4d0);
131         outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
132 #endif
133         return 0;
134 }
135
136 /* More PCI configuration routines; this time centered around hotplug controller */
137
138
139 /*
140  * shpchp_save_config
141  *
142  * Reads configuration for all slots in a PCI bus and saves info.
143  *
144  * Note:  For non-hot plug busses, the slot # saved is the device #
145  *
146  * returns 0 if success
147  */
148 int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num)
149 {
150         int rc;
151         u8 class_code;
152         u8 header_type;
153         u32 ID;
154         u8 secondary_bus;
155         struct pci_func *new_slot;
156         int sub_bus;
157         int FirstSupported;
158         int LastSupported;
159         int max_functions;
160         int function;
161         u8 DevError;
162         int device = 0;
163         int cloop = 0;
164         int stop_it;
165         int index;
166         int is_hot_plug = num_ctlr_slots || first_device_num;
167         struct pci_bus lpci_bus, *pci_bus;
168
169         dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
170                                 num_ctlr_slots, first_device_num);
171
172         memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
173         pci_bus = &lpci_bus;
174
175         dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
176                                 num_ctlr_slots, first_device_num);
177
178         /*   Decide which slots are supported */
179         if (is_hot_plug) {
180                 /*********************************
181                  *  is_hot_plug is the slot mask
182                  *********************************/
183                 FirstSupported = first_device_num;
184                 LastSupported = FirstSupported + num_ctlr_slots - 1;
185         } else {
186                 FirstSupported = 0;
187                 LastSupported = 0x1F;
188         }
189
190         dbg("FirstSupported = %d, LastSupported = %d\n", FirstSupported,
191                                         LastSupported);
192
193         /*   Save PCI configuration space for all devices in supported slots */
194         pci_bus->number = busnumber;
195         for (device = FirstSupported; device <= LastSupported; device++) {
196                 ID = 0xFFFFFFFF;
197                 rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0),
198                                         PCI_VENDOR_ID, &ID);
199
200                 if (ID != 0xFFFFFFFF) {   /*  device in slot */
201                         rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
202                                         0x0B, &class_code);
203                         if (rc)
204                                 return rc;
205
206                         rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
207                                         PCI_HEADER_TYPE, &header_type);
208                         if (rc)
209                                 return rc;
210
211                         dbg("class_code = %x, header_type = %x\n", class_code, header_type);
212
213                         /* If multi-function device, set max_functions to 8 */
214                         if (header_type & 0x80)
215                                 max_functions = 8;
216                         else
217                                 max_functions = 1;
218
219                         function = 0;
220
221                         do {
222                                 DevError = 0;
223
224                                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {   /* P-P Bridge */
225                                         /* Recurse the subordinate bus
226                                          * get the subordinate bus number
227                                          */
228                                         rc = pci_bus_read_config_byte(pci_bus,
229                                                 PCI_DEVFN(device, function), 
230                                                 PCI_SECONDARY_BUS, &secondary_bus);
231                                         if (rc) {
232                                                 return rc;
233                                         } else {
234                                                 sub_bus = (int) secondary_bus;
235
236                                                 /* Save secondary bus cfg spc with this recursive call. */
237                                                 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
238                                                 if (rc)
239                                                         return rc;
240                                         }
241                                 }
242
243                                 index = 0;
244                                 new_slot = shpchp_slot_find(busnumber, device, index++);
245
246                                 dbg("new_slot = %p\n", new_slot);
247
248                                 while (new_slot && (new_slot->function != (u8) function)) {
249                                         new_slot = shpchp_slot_find(busnumber, device, index++);
250                                         dbg("new_slot = %p\n", new_slot);
251                                 }
252                                 if (!new_slot) {
253                                         /* Setup slot structure. */
254                                         new_slot = shpchp_slot_create(busnumber);
255                                         dbg("new_slot = %p\n", new_slot);
256
257                                         if (new_slot == NULL)
258                                                 return(1);
259                                 }
260
261                                 new_slot->bus = (u8) busnumber;
262                                 new_slot->device = (u8) device;
263                                 new_slot->function = (u8) function;
264                                 new_slot->is_a_board = 1;
265                                 new_slot->switch_save = 0x10;
266                                 /* In case of unsupported board */
267                                 new_slot->status = DevError;
268                                 new_slot->pci_dev = pci_find_slot(new_slot->bus,
269                                         (new_slot->device << 3) | new_slot->function);
270                                 dbg("new_slot->pci_dev = %p\n", new_slot->pci_dev);
271
272                                 for (cloop = 0; cloop < 0x20; cloop++) {
273                                         rc = pci_bus_read_config_dword(pci_bus,
274                                                 PCI_DEVFN(device, function), 
275                                                 cloop << 2,
276                                                 (u32 *) &(new_slot->config_space [cloop]));
277                                         /* dbg("new_slot->config_space[%x] = %x\n",
278                                                 cloop, new_slot->config_space[cloop]); */
279                                         if (rc)
280                                                 return rc;
281                                 }
282
283                                 function++;
284
285                                 stop_it = 0;
286
287                                 /*  this loop skips to the next present function
288                                  *  reading in Class Code and Header type.
289                                  */
290
291                                 while ((function < max_functions)&&(!stop_it)) {
292                                         rc = pci_bus_read_config_dword(pci_bus,
293                                                 PCI_DEVFN(device, function),
294                                                 PCI_VENDOR_ID, &ID);
295
296                                         if (ID == 0xFFFFFFFF) {  /* nothing there. */
297                                                 function++;
298                                                 dbg("Nothing there\n");
299                                         } else {  /* Something there */
300                                                 rc = pci_bus_read_config_byte(pci_bus,
301                                                         PCI_DEVFN(device, function), 
302                                                         0x0B, &class_code);
303                                                 if (rc)
304                                                         return rc;
305
306                                                 rc = pci_bus_read_config_byte(pci_bus,
307                                                         PCI_DEVFN(device, function), 
308                                                         PCI_HEADER_TYPE, &header_type);
309                                                 if (rc)
310                                                         return rc;
311
312                                                 dbg("class_code = %x, header_type = %x\n",
313                                                         class_code, header_type);
314                                                 stop_it++;
315                                         }
316                                 }
317
318                         } while (function < max_functions);
319                         /* End of IF (device in slot?) */
320                 } else if (is_hot_plug) {
321                         /* Setup slot structure with entry for empty slot */
322                         new_slot = shpchp_slot_create(busnumber);
323
324                         if (new_slot == NULL) {
325                                 return(1);
326                         }
327                         dbg("new_slot = %p\n", new_slot);
328
329                         new_slot->bus = (u8) busnumber;
330                         new_slot->device = (u8) device;
331                         new_slot->function = 0;
332                         new_slot->is_a_board = 0;
333                         new_slot->presence_save = 0;
334                         new_slot->switch_save = 0;
335                 }
336         }                       /* End of FOR loop */
337
338         return(0);
339 }
340
341
342 /*
343  * shpchp_save_slot_config
344  *
345  * Saves configuration info for all PCI devices in a given slot
346  * including subordinate busses.
347  *
348  * returns 0 if success
349  */
350 int shpchp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
351 {
352         int rc;
353         u8 class_code;
354         u8 header_type;
355         u32 ID;
356         u8 secondary_bus;
357         int sub_bus;
358         int max_functions;
359         int function;
360         int cloop = 0;
361         int stop_it;
362         struct pci_bus lpci_bus, *pci_bus;
363         memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
364         pci_bus = &lpci_bus;
365         pci_bus->number = new_slot->bus;
366
367         ID = 0xFFFFFFFF;
368
369         pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, 0),
370                                         PCI_VENDOR_ID, &ID);
371
372         if (ID != 0xFFFFFFFF) {   /*  device in slot */
373                 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
374                                         0x0B, &class_code);
375
376                 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
377                                         PCI_HEADER_TYPE, &header_type);
378
379                 if (header_type & 0x80) /* Multi-function device */
380                         max_functions = 8;
381                 else
382                         max_functions = 1;
383
384                 function = 0;
385
386                 do {
387                         if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     /* PCI-PCI Bridge */
388                                 /*  Recurse the subordinate bus */
389                                 pci_bus_read_config_byte(pci_bus,
390                                         PCI_DEVFN(new_slot->device, function), 
391                                         PCI_SECONDARY_BUS, &secondary_bus);
392
393                                 sub_bus = (int) secondary_bus;
394
395                                 /* Save the config headers for the secondary bus. */
396                                 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
397
398                                 if (rc)
399                                         return rc;
400
401                         }       /* End of IF */
402
403                         new_slot->status = 0;
404
405                         for (cloop = 0; cloop < 0x20; cloop++) {
406                                 pci_bus_read_config_dword(pci_bus,
407                                         PCI_DEVFN(new_slot->device, function), 
408                                         cloop << 2,
409                                         (u32 *) &(new_slot->config_space [cloop]));
410                         }
411
412                         function++;
413
414                         stop_it = 0;
415
416                         /*  this loop skips to the next present function
417                          *  reading in the Class Code and the Header type.
418                          */
419
420                         while ((function < max_functions) && (!stop_it)) {
421                                 pci_bus_read_config_dword(pci_bus,
422                                         PCI_DEVFN(new_slot->device, function),
423                                         PCI_VENDOR_ID, &ID);
424
425                                 if (ID == 0xFFFFFFFF) {  /* nothing there. */
426                                         function++;
427                                 } else {  /* Something there */
428                                         pci_bus_read_config_byte(pci_bus,
429                                                 PCI_DEVFN(new_slot->device, function),
430                                                 0x0B, &class_code);
431
432                                         pci_bus_read_config_byte(pci_bus,
433                                                 PCI_DEVFN(new_slot->device, function),
434                                                 PCI_HEADER_TYPE, &header_type);
435
436                                         stop_it++;
437                                 }
438                         }
439
440                 } while (function < max_functions);
441         }                       /* End of IF (device in slot?) */
442         else {
443                 return 2;
444         }
445
446         return 0;
447 }
448
449
450 /*
451  * shpchp_save_used_resources
452  *
453  * Stores used resource information for existing boards.  this is
454  * for boards that were in the system when this driver was loaded.
455  * this function is for hot plug ADD
456  *
457  * returns 0 if success
458  * if disable  == 1(DISABLE_CARD),
459  *  it loops for all functions of the slot and disables them.
460  * else, it just get resources of the function and return.
461  */
462 int shpchp_save_used_resources(struct controller *ctrl, struct pci_func *func, int disable)
463 {
464         u8 cloop;
465         u8 header_type;
466         u8 secondary_bus;
467         u8 temp_byte;
468         u16 command;
469         u16 save_command;
470         u16 w_base, w_length;
471         u32 temp_register;
472         u32 save_base;
473         u32 base, length;
474         u64 base64 = 0;
475         int index = 0;
476         unsigned int devfn;
477         struct pci_resource *mem_node = NULL;
478         struct pci_resource *p_mem_node = NULL;
479         struct pci_resource *t_mem_node;
480         struct pci_resource *io_node;
481         struct pci_resource *bus_node;
482         struct pci_bus lpci_bus, *pci_bus;
483         memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
484         pci_bus = &lpci_bus;
485
486         if (disable)
487                 func = shpchp_slot_find(func->bus, func->device, index++);
488
489         while ((func != NULL) && func->is_a_board) {
490                 pci_bus->number = func->bus;
491                 devfn = PCI_DEVFN(func->device, func->function);
492
493                 /* Save the command register */
494                 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
495
496                 if (disable) {
497                         /* disable card */
498                         command = 0x00;
499                         pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
500                 }
501
502                 /* Check for Bridge */
503                 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
504
505                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     /* PCI-PCI Bridge */
506                         dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n",
507                                         func->bus, func->device, save_command);
508                         if (disable) {
509                                 /* Clear Bridge Control Register */
510                                 command = 0x00;
511                                 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
512                         }
513
514                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
515                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
516
517                         bus_node = kmalloc(sizeof(struct pci_resource),
518                                                 GFP_KERNEL);
519                         if (!bus_node)
520                                 return -ENOMEM;
521
522                         bus_node->base = (ulong)secondary_bus;
523                         bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
524
525                         bus_node->next = func->bus_head;
526                         func->bus_head = bus_node;
527
528                         /* Save IO base and Limit registers */
529                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &temp_byte);
530                         base = temp_byte;
531                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
532                         length = temp_byte;
533
534                         if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
535                                 io_node = kmalloc(sizeof(struct pci_resource),
536                                                         GFP_KERNEL);
537                                 if (!io_node)
538                                         return -ENOMEM;
539
540                                 io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
541                                 io_node->length = (ulong)(length - base + 0x10) << 8;
542
543                                 io_node->next = func->io_head;
544                                 func->io_head = io_node;
545                         }
546
547                         /* Save memory base and Limit registers */
548                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
549                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
550
551                         if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
552                                 mem_node = kmalloc(sizeof(struct pci_resource),
553                                                 GFP_KERNEL);
554                                 if (!mem_node)
555                                         return -ENOMEM;
556
557                                 mem_node->base = (ulong)w_base << 16;
558                                 mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
559
560                                 mem_node->next = func->mem_head;
561                                 func->mem_head = mem_node;
562                         }
563                         /* Save prefetchable memory base and Limit registers */
564                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
565                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
566
567                         if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
568                                 p_mem_node = kmalloc(sizeof(struct pci_resource),
569                                                 GFP_KERNEL);
570                                 if (!p_mem_node)
571                                         return -ENOMEM;
572
573                                 p_mem_node->base = (ulong)w_base << 16;
574                                 p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
575
576                                 p_mem_node->next = func->p_mem_head;
577                                 func->p_mem_head = p_mem_node;
578                         }
579                 } else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
580                         dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n",
581                                         func->bus, func->device, save_command);
582
583                         /* Figure out IO and memory base lengths */
584                         for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
585                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
586
587                                 temp_register = 0xFFFFFFFF;
588                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
589                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
590
591                                 if (!disable)
592                                         pci_bus_write_config_dword(pci_bus, devfn, cloop, save_base);
593
594                                 if (!temp_register)
595                                         continue;
596
597                                 base = temp_register;
598
599                                 if ((base & PCI_BASE_ADDRESS_SPACE_IO) &&
600                                                 (!disable || (save_command & PCI_COMMAND_IO))) {
601                                         /* IO base */
602                                         /* set temp_register = amount of IO space requested */
603                                         base = base & 0xFFFFFFFCL;
604                                         base = (~base) + 1;
605
606                                         io_node =  kmalloc(sizeof (struct pci_resource),
607                                                                 GFP_KERNEL);
608                                         if (!io_node)
609                                                 return -ENOMEM;
610
611                                         io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
612                                         io_node->length = (ulong)base;
613                                         dbg("sur adapter: IO bar=0x%x(length=0x%x)\n",
614                                                 io_node->base, io_node->length);
615
616                                         io_node->next = func->io_head;
617                                         func->io_head = io_node;
618                                 } else {  /* map Memory */
619                                         int prefetchable = 1;
620                                         /* struct pci_resources **res_node; */
621                                         char *res_type_str = "PMEM";
622                                         u32 temp_register2;
623
624                                         t_mem_node = kmalloc(sizeof (struct pci_resource),
625                                                                 GFP_KERNEL);
626                                         if (!t_mem_node)
627                                                 return -ENOMEM;
628
629                                         if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) &&
630                                                         (!disable || (save_command & PCI_COMMAND_MEMORY))) {
631                                                 prefetchable = 0;
632                                                 mem_node = t_mem_node;
633                                                 res_type_str++;
634                                         } else
635                                                 p_mem_node = t_mem_node;
636
637                                         base = base & 0xFFFFFFF0L;
638                                         base = (~base) + 1;
639
640                                         switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
641                                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
642                                                 if (prefetchable) {
643                                                         p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
644                                                         p_mem_node->length = (ulong)base;
645                                                         dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
646                                                                 res_type_str, 
647                                                                 p_mem_node->base,
648                                                                 p_mem_node->length);
649
650                                                         p_mem_node->next = func->p_mem_head;
651                                                         func->p_mem_head = p_mem_node;
652                                                 } else {
653                                                         mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
654                                                         mem_node->length = (ulong)base;
655                                                         dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
656                                                                 res_type_str, 
657                                                                 mem_node->base,
658                                                                 mem_node->length);
659
660                                                         mem_node->next = func->mem_head;
661                                                         func->mem_head = mem_node;
662                                                 }
663                                                 break;
664                                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
665                                                 pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
666                                                 base64 = temp_register2;
667                                                 base64 = (base64 << 32) | save_base;
668
669                                                 if (temp_register2) {
670                                                         dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n", 
671                                                                 res_type_str, temp_register2, (u32)base64);
672                                                         base64 &= 0x00000000FFFFFFFFL;
673                                                 }
674
675                                                 if (prefetchable) {
676                                                         p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
677                                                         p_mem_node->length = base;
678                                                         dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
679                                                                 res_type_str, 
680                                                                 p_mem_node->base,
681                                                                 p_mem_node->length);
682
683                                                         p_mem_node->next = func->p_mem_head;
684                                                         func->p_mem_head = p_mem_node;
685                                                 } else {
686                                                         mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
687                                                         mem_node->length = base;
688                                                         dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
689                                                                 res_type_str, 
690                                                                 mem_node->base,
691                                                                 mem_node->length);
692
693                                                         mem_node->next = func->mem_head;
694                                                         func->mem_head = mem_node;
695                                                 }
696                                                 cloop += 4;
697                                                 break;
698                                         default:
699                                                 dbg("asur: reserved BAR type=0x%x\n",
700                                                         temp_register);
701                                                 break;
702                                         }
703                                 } 
704                         }       /* End of base register loop */
705                 } else {        /* Some other unknown header type */
706                         dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n",
707                                         func->bus, func->device);
708                 }
709
710                 /* find the next device in this slot */
711                 if (!disable)
712                         break;
713                 func = shpchp_slot_find(func->bus, func->device, index++);
714         }
715
716         return 0;
717 }
718
719 /**
720  * kfree_resource_list: release memory of all list members
721  * @res: resource list to free
722  */
723 static inline void
724 return_resource_list(struct pci_resource **func, struct pci_resource **res)
725 {
726         struct pci_resource *node;
727         struct pci_resource *t_node;
728
729         node = *func;
730         *func = NULL;
731         while (node) {
732                 t_node = node->next;
733                 return_resource(res, node);
734                 node = t_node;
735         }
736 }
737
738 /*
739  * shpchp_return_board_resources
740  *
741  * this routine returns all resources allocated to a board to
742  * the available pool.
743  *
744  * returns 0 if success
745  */
746 int shpchp_return_board_resources(struct pci_func * func,
747                                         struct resource_lists * resources)
748 {
749         int rc;
750         dbg("%s\n", __FUNCTION__);
751
752         if (!func)
753                 return 1;
754
755         return_resource_list(&(func->io_head),&(resources->io_head));
756         return_resource_list(&(func->mem_head),&(resources->mem_head));
757         return_resource_list(&(func->p_mem_head),&(resources->p_mem_head));
758         return_resource_list(&(func->bus_head),&(resources->bus_head));
759
760         rc = shpchp_resource_sort_and_combine(&(resources->mem_head));
761         rc |= shpchp_resource_sort_and_combine(&(resources->p_mem_head));
762         rc |= shpchp_resource_sort_and_combine(&(resources->io_head));
763         rc |= shpchp_resource_sort_and_combine(&(resources->bus_head));
764
765         return rc;
766 }
767
768 /**
769  * kfree_resource_list: release memory of all list members
770  * @res: resource list to free
771  */
772 static inline void
773 kfree_resource_list(struct pci_resource **r)
774 {
775         struct pci_resource *res, *tres;
776
777         res = *r;
778         *r = NULL;
779
780         while (res) {
781                 tres = res;
782                 res = res->next;
783                 kfree(tres);
784         }
785 }
786
787 /**
788  * shpchp_destroy_resource_list: put node back in the resource list
789  * @resources: list to put nodes back
790  */
791 void shpchp_destroy_resource_list(struct resource_lists *resources)
792 {
793         kfree_resource_list(&(resources->io_head));
794         kfree_resource_list(&(resources->mem_head));
795         kfree_resource_list(&(resources->p_mem_head));
796         kfree_resource_list(&(resources->bus_head));
797 }
798
799 /**
800  * shpchp_destroy_board_resources: put node back in the resource list
801  * @resources: list to put nodes back
802  */
803 void shpchp_destroy_board_resources(struct pci_func * func)
804 {
805         kfree_resource_list(&(func->io_head));
806         kfree_resource_list(&(func->mem_head));
807         kfree_resource_list(&(func->p_mem_head));
808         kfree_resource_list(&(func->bus_head));
809 }