2 * Standard Hot Plug Controller Driver
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * Send feedback to <greg@kroah.com>, <dely.l.sy@intel.com>
30 #include <linux/config.h>
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/types.h>
34 #include <linux/slab.h>
35 #include <linux/workqueue.h>
36 #include <linux/proc_fs.h>
37 #include <linux/pci.h>
41 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependant we are... */
44 int shpchp_configure_device (struct controller* ctrl, struct pci_func* func)
47 struct pci_bus *child;
50 if (func->pci_dev == NULL)
51 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
53 /* Still NULL ? Well then scan for it ! */
54 if (func->pci_dev == NULL) {
55 num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function));
57 dbg("%s: subordiante %p number %x\n", __FUNCTION__, ctrl->pci_dev->subordinate,
58 ctrl->pci_dev->subordinate->number);
59 pci_bus_add_devices(ctrl->pci_dev->subordinate);
61 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
62 if (func->pci_dev == NULL) {
63 dbg("ERROR: pci_dev still null\n");
68 if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
69 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
70 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
71 pci_do_scan_bus(child);
79 int shpchp_unconfigure_device(struct pci_func* func)
84 dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, func->device, func->function);
86 for (j=0; j<8 ; j++) {
87 struct pci_dev* temp = pci_find_slot(func->bus, (func->device << 3) | j);
89 pci_remove_bus_device(temp);
98 * @bus_num: bus number of PCI device
99 * @dev_num: device number of PCI device
100 * @slot: pointer to u8 where slot number will be returned
102 int shpchp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
104 #if defined(CONFIG_X86) && !defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_64)
107 struct pci_dev fakedev;
108 struct pci_bus fakebus;
110 fakedev.devfn = dev_num << 3;
111 fakedev.bus = &fakebus;
112 fakebus.number = bus_num;
113 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
114 __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
115 rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
116 dbg("%s: rc %d\n", __FUNCTION__, rc);
120 /* set the Edge Level Control Register (ELCR) */
121 temp_word = inb(0x4d0);
122 temp_word |= inb(0x4d1) << 8;
124 temp_word |= 0x01 << irq_num;
126 /* This should only be for x86 as it sets the Edge Level Control Register */
127 outb((u8) (temp_word & 0xFF), 0x4d0);
128 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
133 /* More PCI configuration routines; this time centered around hotplug controller */
139 * Reads configuration for all slots in a PCI bus and saves info.
141 * Note: For non-hot plug busses, the slot # saved is the device #
143 * returns 0 if success
145 int shpchp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num)
152 struct pci_func *new_slot;
163 int is_hot_plug = num_ctlr_slots || first_device_num;
164 struct pci_bus lpci_bus, *pci_bus;
166 dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__, num_ctlr_slots, first_device_num);
168 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
171 dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__, num_ctlr_slots, first_device_num);
173 /* Decide which slots are supported */
175 /*********************************
176 * is_hot_plug is the slot mask
177 *********************************/
178 FirstSupported = first_device_num;
179 LastSupported = FirstSupported + num_ctlr_slots - 1;
182 LastSupported = 0x1F;
185 dbg("FirstSupported = %d, LastSupported = %d\n", FirstSupported, LastSupported);
187 /* Save PCI configuration space for all devices in supported slots */
188 pci_bus->number = busnumber;
189 for (device = FirstSupported; device <= LastSupported; device++) {
191 rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
193 if (ID != 0xFFFFFFFF) { /* device in slot */
194 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
198 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
202 dbg("class_code = %x, header_type = %x\n", class_code, header_type);
204 /* If multi-function device, set max_functions to 8 */
205 if (header_type & 0x80)
215 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* P-P Bridge */
216 /* Recurse the subordinate bus
217 * get the subordinate bus number
219 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, function),
220 PCI_SECONDARY_BUS, &secondary_bus);
224 sub_bus = (int) secondary_bus;
226 /* Save secondary bus cfg spc with this recursive call. */
227 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
234 new_slot = shpchp_slot_find(busnumber, device, index++);
236 dbg("new_slot = %p\n", new_slot);
238 while (new_slot && (new_slot->function != (u8) function)) {
239 new_slot = shpchp_slot_find(busnumber, device, index++);
240 dbg("new_slot = %p\n", new_slot);
243 /* Setup slot structure. */
244 new_slot = shpchp_slot_create(busnumber);
245 dbg("new_slot = %p\n", new_slot);
247 if (new_slot == NULL)
251 new_slot->bus = (u8) busnumber;
252 new_slot->device = (u8) device;
253 new_slot->function = (u8) function;
254 new_slot->is_a_board = 1;
255 new_slot->switch_save = 0x10;
256 /* In case of unsupported board */
257 new_slot->status = DevError;
258 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
259 dbg("new_slot->pci_dev = %p\n", new_slot->pci_dev);
261 for (cloop = 0; cloop < 0x20; cloop++) {
262 rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, function),
263 cloop << 2, (u32 *) & (new_slot->config_space [cloop]));
264 /* dbg("new_slot->config_space[%x] = %x\n", cloop, new_slot->config_space[cloop]); */
273 /* this loop skips to the next present function
274 * reading in Class Code and Header type.
277 while ((function < max_functions)&&(!stop_it)) {
278 rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
280 if (ID == 0xFFFFFFFF) { /* nothing there. */
282 dbg("Nothing there\n");
283 } else { /* Something there */
284 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, function),
289 rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, function),
290 PCI_HEADER_TYPE, &header_type);
294 dbg("class_code = %x, header_type = %x\n", class_code, header_type);
299 } while (function < max_functions);
300 /* End of IF (device in slot?) */
301 } else if (is_hot_plug) {
302 /* Setup slot structure with entry for empty slot */
303 new_slot = shpchp_slot_create(busnumber);
305 if (new_slot == NULL) {
308 dbg("new_slot = %p\n", new_slot);
310 new_slot->bus = (u8) busnumber;
311 new_slot->device = (u8) device;
312 new_slot->function = 0;
313 new_slot->is_a_board = 0;
314 new_slot->presence_save = 0;
315 new_slot->switch_save = 0;
317 } /* End of FOR loop */
324 * shpchp_save_slot_config
326 * Saves configuration info for all PCI devices in a given slot
327 * including subordinate busses.
329 * returns 0 if success
331 int shpchp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
343 struct pci_bus lpci_bus, *pci_bus;
344 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
346 pci_bus->number = new_slot->bus;
350 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
352 if (ID != 0xFFFFFFFF) { /* device in slot */
353 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
355 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
357 if (header_type & 0x80) /* Multi-function device */
365 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
366 /* Recurse the subordinate bus */
367 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, function),
368 PCI_SECONDARY_BUS, &secondary_bus);
370 sub_bus = (int) secondary_bus;
372 /* Save the config headers for the secondary bus. */
373 rc = shpchp_save_config(ctrl, sub_bus, 0, 0);
380 new_slot->status = 0;
382 for (cloop = 0; cloop < 0x20; cloop++) {
383 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, function),
384 cloop << 2, (u32 *) & (new_slot->config_space [cloop]));
391 /* this loop skips to the next present function
392 * reading in the Class Code and the Header type.
395 while ((function < max_functions) && (!stop_it)) {
396 pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
398 if (ID == 0xFFFFFFFF) { /* nothing there. */
400 } else { /* Something there */
401 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
403 pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE,
410 } while (function < max_functions);
411 } /* End of IF (device in slot?) */
421 * shpchp_save_used_resources
423 * Stores used resource information for existing boards. this is
424 * for boards that were in the system when this driver was loaded.
425 * this function is for hot plug ADD
427 * returns 0 if success
428 * if disable == 1(DISABLE_CARD),
429 * it loops for all functions of the slot and disables them.
430 * else, it just get resources of the function and return.
432 int shpchp_save_used_resources (struct controller *ctrl, struct pci_func *func, int disable)
440 u16 w_base, w_length;
447 struct pci_resource *mem_node = NULL;
448 struct pci_resource *p_mem_node = NULL;
449 struct pci_resource *t_mem_node;
450 struct pci_resource *io_node;
451 struct pci_resource *bus_node;
452 struct pci_bus lpci_bus, *pci_bus;
453 memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
457 func = shpchp_slot_find(func->bus, func->device, index++);
459 while ((func != NULL) && func->is_a_board) {
460 pci_bus->number = func->bus;
461 devfn = PCI_DEVFN(func->device, func->function);
463 /* Save the command register */
464 pci_bus_read_config_word (pci_bus, devfn, PCI_COMMAND, &save_command);
469 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
472 /* Check for Bridge */
473 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
475 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
476 dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n", func->bus, func->device, save_command);
478 /* Clear Bridge Control Register */
480 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
483 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
484 pci_bus_read_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
486 bus_node =(struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
490 bus_node->base = (ulong)secondary_bus;
491 bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
493 bus_node->next = func->bus_head;
494 func->bus_head = bus_node;
496 /* Save IO base and Limit registers */
497 pci_bus_read_config_byte (pci_bus, devfn, PCI_IO_BASE, &temp_byte);
499 pci_bus_read_config_byte (pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
502 if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
503 io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
507 io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
508 io_node->length = (ulong)(length - base + 0x10) << 8;
510 io_node->next = func->io_head;
511 func->io_head = io_node;
514 /* Save memory base and Limit registers */
515 pci_bus_read_config_word (pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
516 pci_bus_read_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
518 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
519 mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
523 mem_node->base = (ulong)w_base << 16;
524 mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
526 mem_node->next = func->mem_head;
527 func->mem_head = mem_node;
529 /* Save prefetchable memory base and Limit registers */
530 pci_bus_read_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
531 pci_bus_read_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
533 if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
534 p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
538 p_mem_node->base = (ulong)w_base << 16;
539 p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
541 p_mem_node->next = func->p_mem_head;
542 func->p_mem_head = p_mem_node;
544 } else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
545 dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n", func->bus, func->device, save_command);
547 /* Figure out IO and memory base lengths */
548 for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
549 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
551 temp_register = 0xFFFFFFFF;
552 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
553 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp_register);
556 pci_bus_write_config_dword (pci_bus, devfn, cloop, save_base);
562 base = temp_register;
564 if ((base & PCI_BASE_ADDRESS_SPACE_IO) && (!disable || (save_command & PCI_COMMAND_IO))) {
566 /* set temp_register = amount of IO space requested */
567 base = base & 0xFFFFFFFCL;
570 io_node = (struct pci_resource *) kmalloc(sizeof (struct pci_resource), GFP_KERNEL);
574 io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
575 io_node->length = (ulong)base;
576 dbg("sur adapter: IO bar=0x%x(length=0x%x)\n", io_node->base, io_node->length);
578 io_node->next = func->io_head;
579 func->io_head = io_node;
580 } else { /* map Memory */
581 int prefetchable = 1;
582 /* struct pci_resources **res_node; */
583 char *res_type_str = "PMEM";
586 t_mem_node = (struct pci_resource *) kmalloc(sizeof (struct pci_resource), GFP_KERNEL);
590 if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
592 mem_node = t_mem_node;
595 p_mem_node = t_mem_node;
597 base = base & 0xFFFFFFF0L;
600 switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
601 case PCI_BASE_ADDRESS_MEM_TYPE_32:
603 p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
604 p_mem_node->length = (ulong)base;
605 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n", res_type_str,
606 p_mem_node->base, p_mem_node->length);
608 p_mem_node->next = func->p_mem_head;
609 func->p_mem_head = p_mem_node;
611 mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
612 mem_node->length = (ulong)base;
613 dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n", res_type_str,
614 mem_node->base, mem_node->length);
616 mem_node->next = func->mem_head;
617 func->mem_head = mem_node;
620 case PCI_BASE_ADDRESS_MEM_TYPE_64:
621 pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
622 base64 = temp_register2;
623 base64 = (base64 << 32) | save_base;
625 if (temp_register2) {
626 dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n",
627 res_type_str, temp_register2, (u32)base64);
628 base64 &= 0x00000000FFFFFFFFL;
632 p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
633 p_mem_node->length = base;
634 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n", res_type_str,
635 p_mem_node->base, p_mem_node->length);
637 p_mem_node->next = func->p_mem_head;
638 func->p_mem_head = p_mem_node;
640 mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
641 mem_node->length = base;
642 dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n", res_type_str,
643 mem_node->base, mem_node->length);
645 mem_node->next = func->mem_head;
646 func->mem_head = mem_node;
651 dbg("asur: reserved BAR type=0x%x\n", temp_register);
655 } /* End of base register loop */
656 } else { /* Some other unknown header type */
657 dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n", func->bus, func->device);
660 /* find the next device in this slot */
663 func = shpchp_slot_find(func->bus, func->device, index++);
671 * shpchp_return_board_resources
673 * this routine returns all resources allocated to a board to
674 * the available pool.
676 * returns 0 if success
678 int shpchp_return_board_resources(struct pci_func * func, struct resource_lists * resources)
681 struct pci_resource *node;
682 struct pci_resource *t_node;
683 dbg("%s\n", __FUNCTION__);
688 node = func->io_head;
689 func->io_head = NULL;
692 return_resource(&(resources->io_head), node);
696 node = func->mem_head;
697 func->mem_head = NULL;
700 return_resource(&(resources->mem_head), node);
704 node = func->p_mem_head;
705 func->p_mem_head = NULL;
708 return_resource(&(resources->p_mem_head), node);
712 node = func->bus_head;
713 func->bus_head = NULL;
716 return_resource(&(resources->bus_head), node);
720 rc |= shpchp_resource_sort_and_combine(&(resources->mem_head));
721 rc |= shpchp_resource_sort_and_combine(&(resources->p_mem_head));
722 rc |= shpchp_resource_sort_and_combine(&(resources->io_head));
723 rc |= shpchp_resource_sort_and_combine(&(resources->bus_head));
730 * shpchp_destroy_resource_list
732 * Puts node back in the resource list pointed to by head
734 void shpchp_destroy_resource_list (struct resource_lists * resources)
736 struct pci_resource *res, *tres;
738 res = resources->io_head;
739 resources->io_head = NULL;
747 res = resources->mem_head;
748 resources->mem_head = NULL;
756 res = resources->p_mem_head;
757 resources->p_mem_head = NULL;
765 res = resources->bus_head;
766 resources->bus_head = NULL;
777 * shpchp_destroy_board_resources
779 * Puts node back in the resource list pointed to by head
781 void shpchp_destroy_board_resources (struct pci_func * func)
783 struct pci_resource *res, *tres;
786 func->io_head = NULL;
794 res = func->mem_head;
795 func->mem_head = NULL;
803 res = func->p_mem_head;
804 func->p_mem_head = NULL;
812 res = func->bus_head;
813 func->bus_head = NULL;