1 //#define dprintk(x) printk x
4 /*------------------------------------------------------------------------------
6 *----------------------------------------------------------------------------*/
7 #define MAXIMUM_NUM_CONTAINERS 31
8 #define MAXIMUM_NUM_ADAPTERS 8
10 #define AAC_NUM_FIB 578
11 //#define AAC_NUM_IO_FIB 512
12 #define AAC_NUM_IO_FIB 100
14 #define AAC_MAX_TARGET (MAXIMUM_NUM_CONTAINERS+1)
15 #define AAC_MAX_LUN (8)
17 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
20 * These macros convert from physical channels to virtual channels
22 #define CONTAINER_CHANNEL (0)
23 #define aac_phys_to_logical(x) (x+1)
24 #define aac_logical_to_phys(x) (x?x-1:0)
26 #define AAC_DETAILED_STATUS_INFO
40 * DON'T CHANGE THE ORDER, this is set by the firmware
53 #define CT_RAID10 10 /* stripe of mirror */
54 #define CT_RAID00 11 /* stripe of stripe */
55 #define CT_VOLUME_OF_MIRRORS 12 /* volume of mirror */
56 #define CT_PSEUDO_RAID 13 /* really raid4 */
57 #define CT_LAST_VOLUME_TYPE 14
60 * Types of objects addressable in some fashion by the client.
61 * This is a superset of those objects handled just by the filesystem
62 * and includes "raw" objects that an administrator would use to
63 * configure containers and filesystems.
66 #define FT_REG 1 /* regular file */
67 #define FT_DIR 2 /* directory */
68 #define FT_BLK 3 /* "block" device - reserved */
69 #define FT_CHR 4 /* "character special" device - reserved */
70 #define FT_LNK 5 /* symbolic link */
71 #define FT_SOCK 6 /* socket */
72 #define FT_FIFO 7 /* fifo */
73 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
74 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/target/lun */
75 #define FT_SLICE 10 /* virtual disk - raw volume - slice */
76 #define FT_PARTITION 11 /* FSA partition - carved out of a slice - building block for containers */
77 #define FT_VOLUME 12 /* Container - Volume Set */
78 #define FT_STRIPE 13 /* Container - Stripe Set */
79 #define FT_MIRROR 14 /* Container - Mirror Set */
80 #define FT_RAID5 15 /* Container - Raid 5 Set */
81 #define FT_DATABASE 16 /* Storage object with "foreign" content manager */
84 * Host side memory scatter gather list
85 * Used by the adapter for read, write, and readdirplus operations
86 * We have separate 32 and 64 bit version because even
87 * on 64 bit systems not all cards support the 64 bit version
90 u32 addr; /* 32-bit address. */
91 u32 count; /* Length. */
95 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
96 u32 count; /* Length. */
102 * This is the SGMAP structure for all commands that use
108 struct sgentry sg[1];
113 struct sgentry64 sg[1];
118 u8 buildnum; /* e.g., 588 */
119 u8 usec; /* e.g., 588 */
120 u8 via; /* e.g., 1 = FSU,
123 u8 year; /* e.g., 1997 = 97 */
125 * unsigned Month :4; // 1 - 12
126 * unsigned Day :6; // 1 - 32
127 * unsigned Hour :6; // 0 - 23
128 * unsigned Minute :6; // 0 - 60
129 * unsigned Second :6; // 0 - 60
131 u32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */
136 * Define all the constants needed for the communication interface
140 * Define how many queue entries each queue will have and the total
141 * number of entries for the entire communication interface. Also define
142 * how many queues we support.
144 * This has to match the controller
147 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response
148 #define HOST_HIGH_CMD_ENTRIES 4
149 #define HOST_NORM_CMD_ENTRIES 8
150 #define ADAP_HIGH_CMD_ENTRIES 4
151 #define ADAP_NORM_CMD_ENTRIES 512
152 #define HOST_HIGH_RESP_ENTRIES 4
153 #define HOST_NORM_RESP_ENTRIES 512
154 #define ADAP_HIGH_RESP_ENTRIES 4
155 #define ADAP_NORM_RESP_ENTRIES 8
157 #define TOTAL_QUEUE_ENTRIES \
158 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
159 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
163 * Set the queues on a 16 byte alignment
166 #define QUEUE_ALIGNMENT 16
169 * The queue headers define the Communication Region queues. These
170 * are physically contiguous and accessible by both the adapter and the
171 * host. Even though all queue headers are in the same contiguous block
172 * they will be represented as individual units in the data structures.
176 u32 size; /* Size in bytes of Fib which this QE points to */
177 u32 addr; /* Receiver address of the FIB */
181 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped
182 * adjacently and in that order.
186 u64 header_addr; /* Address to hand the adapter to access to this queue head */
187 u32 *producer; /* The producer index for this queue (host address) */
188 u32 *consumer; /* The consumer index for this queue (host address) */
192 * Define all the events which the adapter would like to notify
196 #define HostNormCmdQue 1 /* Change in host normal priority command queue */
197 #define HostHighCmdQue 2 /* Change in host high priority command queue */
198 #define HostNormRespQue 3 /* Change in host normal priority response queue */
199 #define HostHighRespQue 4 /* Change in host high priority response queue */
200 #define AdapNormRespNotFull 5
201 #define AdapHighRespNotFull 6
202 #define AdapNormCmdNotFull 7
203 #define AdapHighCmdNotFull 8
204 #define SynchCommandComplete 9
205 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */
208 * Define all the events the host wishes to notify the
209 * adapter of. The first four values much match the Qid the
210 * corresponding queue.
213 #define AdapNormCmdQue 2
214 #define AdapHighCmdQue 3
215 #define AdapNormRespQue 6
216 #define AdapHighRespQue 7
217 #define HostShutdown 8
218 #define HostPowerFail 9
219 #define FatalCommError 10
220 #define HostNormRespNotFull 11
221 #define HostHighRespNotFull 12
222 #define HostNormCmdNotFull 13
223 #define HostHighCmdNotFull 14
225 #define AdapPrintfDone 16
228 * Define all the queues that the adapter and host use to communicate
229 * Number them to match the physical queue layout.
232 enum aac_queue_types {
233 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */
234 HostHighCmdQueue, /* Adapter to host high priority command traffic */
235 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */
236 AdapHighCmdQueue, /* Host to adapter high priority command traffic */
237 HostNormRespQueue, /* Adapter to host normal priority response traffic */
238 HostHighRespQueue, /* Adapter to host high priority response traffic */
239 AdapNormRespQueue, /* Host to adapter normal priority response traffic */
240 AdapHighRespQueue /* Host to adapter high priority response traffic */
244 * Implement our own version of these so we have 64 bit compatability
245 * The adapter uses these and can only handle 32 bit addresses
248 struct aac_list_head {
253 #define AAC_INIT_LIST_HEAD(ptr) do { \
254 (ptr)->next = (u32)(ulong)(ptr); \
255 (ptr)->prev = (u32)(ulong)(ptr); \
258 * aac_list_empty - tests whether a list is empty
259 * @head: the list to test.
261 static __inline__ int aac_list_empty(struct aac_list_head *head)
263 return head->next == ((u32)(ulong)head);
267 * Insert a new entry between two known consecutive entries.
269 * This is only for internal list manipulation where we know
270 * the prev/next entries already!
272 static __inline__ void aac_list_add(struct aac_list_head * n,
273 struct aac_list_head * prev,
274 struct aac_list_head * next)
276 next->prev = (u32)(ulong)n;
277 n->next = (u32)(ulong)next;
278 n->prev = (u32)(ulong)prev;
279 prev->next = (u32)(ulong)n;
283 * list_add_tail - add a new entry
284 * @new: new entry to be added
285 * @head: list head to add it before
287 * Insert a new entry before the specified head.
288 * This is useful for implementing queues.
290 static __inline__ void aac_list_add_tail(struct aac_list_head *n, struct aac_list_head *head)
292 aac_list_add(n, (struct aac_list_head*)(ulong)(head->prev), head);
296 * Delete a list entry by making the prev/next entries
297 * point to each other.
299 * This is only for internal list manipulation where we know
300 * the prev/next entries already!
302 static __inline__ void __aac_list_del(struct aac_list_head * p,
303 struct aac_list_head * n)
305 n->prev = (u32)(ulong)p;
306 p->next = (u32)(ulong)n;
310 * aac_list_del - deletes entry from list.
311 * @entry: the element to delete from the list.
312 * Note: list_empty on entry does not return true after this, the entry is in an undefined state.
314 static __inline__ void aac_list_del(struct aac_list_head *entry)
316 __aac_list_del((struct aac_list_head*)(ulong)entry->prev,(struct aac_list_head*)(ulong) entry->next);
317 entry->next = entry->prev = 0;
321 * aac_list_entry - get the struct for this entry
322 * @ptr: the &struct list_head pointer.
323 * @type: the type of the struct this is embedded in.
324 * @member: the name of the list_struct within the struct.
326 #define aac_list_entry(ptr, type, member) \
327 ((type *)((char *)(ptr)-(ulong)(&((type *)0)->member)))
330 * Assign type values to the FSA communication data structures
333 #define FIB_MAGIC 0x0001
336 * Define the priority levels the FSA communication routines support.
344 * Define the FIB. The FIB is the where all the requested data and
345 * command information are put to the application on the FSA adapter.
348 u32 XferState; // Current transfer state for this CCB
349 u16 Command; // Routing information for the destination
350 u8 StructType; // Type FIB
351 u8 Flags; // Flags for FIB
352 u16 Size; // Size of this FIB in bytes
353 u16 SenderSize; // Size of the FIB in the sender (for response sizing)
354 u32 SenderFibAddress; // Host defined data in the FIB
355 u32 ReceiverFibAddress; // Logical address of this FIB for the adapter
356 u32 SenderData; // Place holder for the sender to store data
359 u32 _ReceiverTimeStart; // Timestamp for receipt of fib
360 u32 _ReceiverTimeDone; // Timestamp for completion of fib
362 struct aac_list_head _FibLinks; // Used to link Adapter Initiated Fibs on the host
363 // struct list_head _FibLinks; // Used to link Adapter Initiated Fibs on the host
367 #define FibLinks _u._FibLinks
369 #define FIB_DATA_SIZE_IN_BYTES (512 - sizeof(struct aac_fibhdr))
373 struct aac_fibhdr header;
374 u8 data[FIB_DATA_SIZE_IN_BYTES]; // Command specific data
381 #define TestCommandResponse 1
382 #define TestAdapterCommand 2
384 * Lowlevel and comm commands
386 #define LastTestCommand 100
387 #define ReinitHostNormCommandQueue 101
388 #define ReinitHostHighCommandQueue 102
389 #define ReinitHostHighRespQueue 103
390 #define ReinitHostNormRespQueue 104
391 #define ReinitAdapNormCommandQueue 105
392 #define ReinitAdapHighCommandQueue 107
393 #define ReinitAdapHighRespQueue 108
394 #define ReinitAdapNormRespQueue 109
395 #define InterfaceShutdown 110
396 #define DmaCommandFib 120
397 #define StartProfile 121
398 #define TermProfile 122
399 #define SpeedTest 123
400 #define TakeABreakPt 124
401 #define RequestPerfData 125
402 #define SetInterruptDefTimer 126
403 #define SetInterruptDefCount 127
404 #define GetInterruptDefStatus 128
405 #define LastCommCommand 129
407 * Filesystem commands
409 #define NuFileSystem 300
411 #define HostFileSystem 302
412 #define LastFileSystemCommand 303
416 #define ContainerCommand 500
417 #define ContainerCommand64 501
421 #define ClusterCommand 550
423 * Scsi Port commands (scsi passthrough)
425 #define ScsiPortCommand 600
426 #define ScsiPortCommand64 601
428 * Misc house keeping and generic adapter initiated commands
430 #define AifRequest 700
431 #define CheckRevision 701
432 #define FsaHostShutdown 702
433 #define RequestAdapterInfo 703
434 #define IsAdapterPaused 704
435 #define SendHostTime 705
436 #define LastMiscCommand 706
439 // Commands that will target the failover level on the FSA adapter
442 enum fib_xfer_state {
444 AdapterOwned = (1<<1),
445 FibInitialized = (1<<2),
447 AllocatedFromPool = (1<<4),
448 SentFromHost = (1<<5),
449 SentFromAdapter = (1<<6),
450 ResponseExpected = (1<<7),
451 NoResponseExpected = (1<<8),
452 AdapterProcessed = (1<<9),
453 HostProcessed = (1<<10),
454 HighPriority = (1<<11),
455 NormalPriority = (1<<12),
457 AsyncIo = (1<<13), // rpbfix: remove with new regime
458 PageFileIo = (1<<14), // rpbfix: remove with new regime
459 ShutdownRequest = (1<<15),
460 LazyWrite = (1<<16), // rpbfix: remove with new regime
461 AdapterMicroFib = (1<<17),
462 BIOSFibPath = (1<<18),
463 FastResponseCapable = (1<<19),
464 ApiFib = (1<<20) // Its an API Fib.
468 * The following defines needs to be updated any time there is an
469 * incompatible change made to the aac_init structure.
472 #define ADAPTER_INIT_STRUCT_REVISION 3
476 u32 InitStructRevision;
477 u32 MiniPortRevision;
479 u32 CommHeaderAddress;
480 u32 FastIoCommAreaAddress;
481 u32 AdapterFibsPhysicalAddress;
482 u32 AdapterFibsVirtualAddress;
487 u32 HostPhysMemPages; // number of 4k pages of host physical memory
488 u32 HostElapsedSeconds; // number of seconds since 1970.
493 LOG_INFORMATIONAL = 20,
496 LOG_MEDIUM_ERROR = 50,
500 LOG_WINDBG_PRINT = 90
503 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
504 #define FSAFS_NTC_FIB_CONTEXT 0x030c
510 void (*adapter_interrupt)(struct aac_dev *dev);
511 void (*adapter_notify)(struct aac_dev *dev, u32 event);
512 void (*adapter_enable_int)(struct aac_dev *dev, u32 event);
513 void (*adapter_disable_int)(struct aac_dev *dev, u32 event);
514 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 *status);
515 int (*adapter_check_health)(struct aac_dev *dev);
519 * Define which interrupt handler needs to be installed
522 struct aac_driver_ident
524 int (*init)(struct aac_dev *dev, unsigned long num);
532 * Some adapter firmware needs communication memory
533 * below 2gig. This tells the init function to set the
534 * dma mask such that fib memory will be allocated where the
535 * adapter firmware can get to it.
537 #define AAC_QUIRK_31BIT 1
540 * The adapter interface specs all queues to be located in the same
541 * physically contigous block. The host structure that defines the
542 * commuication queues will assume they are each a separate physically
543 * contigous memory region that will support them all being one big
545 * There is a command and response queue for each level and direction of
546 * commuication. These regions are accessed by both the host and adapter.
550 u64 logical; /*address we give the adapter */
551 struct aac_entry *base; /*system virtual address */
552 struct aac_qhdr headers; /*producer,consumer q headers*/
553 u32 entries; /*Number of queue entries */
554 wait_queue_head_t qfull; /*Event to wait on if q full */
555 wait_queue_head_t cmdready; /*Cmd ready from the adapter */
556 /* This is only valid for adapter to host command queues. */
557 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */
558 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
559 unsigned long SavedIrql; /* Previous IRQL when the spin lock is taken */
560 u32 padding; /* Padding - FIXME - can remove I believe */
561 struct aac_list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
562 // struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
563 /* only valid for command queues which receive entries from the adapter. */
564 struct list_head pendingq; /* A queue of outstanding fib's to the adapter. */
565 u32 numpending; /* Number of entries on outstanding queue. */
566 struct aac_dev * dev; /* Back pointer to adapter structure */
570 * Message queues. The order here is important, see also the
571 * queue type ordering
574 struct aac_queue_block
576 struct aac_queue queue[8];
580 * SaP1 Message Unit Registers
583 struct sa_drawbridge_CSR {
585 u32 reserved[10]; // 00h-27h | Reserved
586 u8 LUT_Offset; // 28h | Looup Table Offset
587 u8 reserved1[3]; // 29h-2bh | Reserved
588 u32 LUT_Data; // 2ch | Looup Table Data
589 u32 reserved2[26]; // 30h-97h | Reserved
590 u16 PRICLEARIRQ; // 98h | Primary Clear Irq
591 u16 SECCLEARIRQ; // 9ah | Secondary Clear Irq
592 u16 PRISETIRQ; // 9ch | Primary Set Irq
593 u16 SECSETIRQ; // 9eh | Secondary Set Irq
594 u16 PRICLEARIRQMASK; // a0h | Primary Clear Irq Mask
595 u16 SECCLEARIRQMASK; // a2h | Secondary Clear Irq Mask
596 u16 PRISETIRQMASK; // a4h | Primary Set Irq Mask
597 u16 SECSETIRQMASK; // a6h | Secondary Set Irq Mask
598 u32 MAILBOX0; // a8h | Scratchpad 0
599 u32 MAILBOX1; // ach | Scratchpad 1
600 u32 MAILBOX2; // b0h | Scratchpad 2
601 u32 MAILBOX3; // b4h | Scratchpad 3
602 u32 MAILBOX4; // b8h | Scratchpad 4
603 u32 MAILBOX5; // bch | Scratchpad 5
604 u32 MAILBOX6; // c0h | Scratchpad 6
605 u32 MAILBOX7; // c4h | Scratchpad 7
607 u32 ROM_Setup_Data; // c8h | Rom Setup and Data
608 u32 ROM_Control_Addr; // cch | Rom Control and Address
610 u32 reserved3[12]; // d0h-ffh | reserved
611 u32 LUT[64]; // 100h-1ffh| Lookup Table Entries
615 // need to add DMA, I2O, UART, etc registers form 80h to 364h
620 #define Mailbox0 SaDbCSR.MAILBOX0
621 #define Mailbox1 SaDbCSR.MAILBOX1
622 #define Mailbox2 SaDbCSR.MAILBOX2
623 #define Mailbox3 SaDbCSR.MAILBOX3
624 #define Mailbox4 SaDbCSR.MAILBOX4
625 #define Mailbox5 SaDbCSR.MAILBOX5
626 #define Mailbox7 SaDbCSR.MAILBOX7
628 #define DoorbellReg_p SaDbCSR.PRISETIRQ
629 #define DoorbellReg_s SaDbCSR.SECSETIRQ
630 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
633 #define DOORBELL_0 cpu_to_le16(0x0001)
634 #define DOORBELL_1 cpu_to_le16(0x0002)
635 #define DOORBELL_2 cpu_to_le16(0x0004)
636 #define DOORBELL_3 cpu_to_le16(0x0008)
637 #define DOORBELL_4 cpu_to_le16(0x0010)
638 #define DOORBELL_5 cpu_to_le16(0x0020)
639 #define DOORBELL_6 cpu_to_le16(0x0040)
642 #define PrintfReady DOORBELL_5
643 #define PrintfDone DOORBELL_5
645 struct sa_registers {
646 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */
650 #define Sa_MINIPORT_REVISION 1
652 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
653 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
654 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
655 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
658 * Rx Message Unit Registers
661 struct rx_mu_registers {
662 // Local | PCI* | Name
664 u32 ARSR; // 1300h | 00h | APIC Register Select Register
665 u32 reserved0; // 1304h | 04h | Reserved
666 u32 AWR; // 1308h | 08h | APIC Window Register
667 u32 reserved1; // 130Ch | 0Ch | Reserved
668 u32 IMRx[2]; // 1310h | 10h | Inbound Message Registers
669 u32 OMRx[2]; // 1318h | 18h | Outbound Message Registers
670 u32 IDR; // 1320h | 20h | Inbound Doorbell Register
671 u32 IISR; // 1324h | 24h | Inbound Interrupt Status Register
672 u32 IIMR; // 1328h | 28h | Inbound Interrupt Mask Register
673 u32 ODR; // 132Ch | 2Ch | Outbound Doorbell Register
674 u32 OISR; // 1330h | 30h | Outbound Interrupt Status Register
675 u32 OIMR; // 1334h | 34h | Outbound Interrupt Mask Register
676 // * Must access through ATU Inbound Translation Window
683 #define InboundMailbox0 IndexRegs.Mailbox[0]
684 #define InboundMailbox1 IndexRegs.Mailbox[1]
685 #define InboundMailbox2 IndexRegs.Mailbox[2]
686 #define InboundMailbox3 IndexRegs.Mailbox[3]
687 #define InboundMailbox4 IndexRegs.Mailbox[4]
689 #define INBOUNDDOORBELL_0 cpu_to_le32(0x00000001)
690 #define INBOUNDDOORBELL_1 cpu_to_le32(0x00000002)
691 #define INBOUNDDOORBELL_2 cpu_to_le32(0x00000004)
692 #define INBOUNDDOORBELL_3 cpu_to_le32(0x00000008)
693 #define INBOUNDDOORBELL_4 cpu_to_le32(0x00000010)
694 #define INBOUNDDOORBELL_5 cpu_to_le32(0x00000020)
695 #define INBOUNDDOORBELL_6 cpu_to_le32(0x00000040)
697 #define OUTBOUNDDOORBELL_0 cpu_to_le32(0x00000001)
698 #define OUTBOUNDDOORBELL_1 cpu_to_le32(0x00000002)
699 #define OUTBOUNDDOORBELL_2 cpu_to_le32(0x00000004)
700 #define OUTBOUNDDOORBELL_3 cpu_to_le32(0x00000008)
701 #define OUTBOUNDDOORBELL_4 cpu_to_le32(0x00000010)
703 #define InboundDoorbellReg MUnit.IDR
704 #define OutboundDoorbellReg MUnit.ODR
706 struct rx_registers {
707 struct rx_mu_registers MUnit; // 1300h - 1334h
708 u32 reserved1[6]; // 1338h - 134ch
709 struct rx_inbound IndexRegs;
712 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
713 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
714 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
715 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
718 * Rkt Message Unit Registers (same as Rx, except a larger reserve region)
721 #define rkt_mu_registers rx_mu_registers
722 #define rkt_inbound rx_inbound
724 struct rkt_registers {
725 struct rkt_mu_registers MUnit; /* 1300h - 1334h */
726 u32 reserved1[1010]; /* 1338h - 22fch */
727 struct rkt_inbound IndexRegs; /* 2300h - */
730 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
731 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
732 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
733 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
737 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
739 struct aac_fib_context {
740 s16 type; // used for verification of structure
742 ulong jiffies; // used for cleanup - dmb changed to ulong
743 struct list_head next; // used to link context's into a linked list
744 struct semaphore wait_sem; // this is used to wait for the next fib to arrive.
745 int wait; // Set to true when thread is in WaitForSingleObject
746 unsigned long count; // total number of FIBs on FibList
747 struct aac_list_head hw_fib_list; // this holds hw_fibs which should be 32 bit addresses
750 struct fsa_scsi_hba {
751 u32 size[MAXIMUM_NUM_CONTAINERS];
752 u32 type[MAXIMUM_NUM_CONTAINERS];
753 u8 valid[MAXIMUM_NUM_CONTAINERS];
754 u8 ro[MAXIMUM_NUM_CONTAINERS];
755 u8 locked[MAXIMUM_NUM_CONTAINERS];
756 u8 deleted[MAXIMUM_NUM_CONTAINERS];
757 char devname[MAXIMUM_NUM_CONTAINERS][8];
761 void *next; /* this is used by the allocator */
765 * The Adapter that this I/O is destined for.
769 * This is the event the sendfib routine will wait on if the
770 * caller did not pass one and this is synch io.
772 struct semaphore event_wait;
773 spinlock_t event_lock;
775 u32 done; /* gets set to 1 when fib is complete */
776 fib_callback callback;
778 u32 flags; // u32 dmb was ulong
780 * The following is used to put this fib context onto the
781 * Outstanding I/O queue.
783 struct list_head queue;
786 struct hw_fib *hw_fib; /* Actual shared object */
787 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/
791 * Adapter Information Block
793 * This is returned by the RequestAdapterInfo block
796 struct aac_adapter_info
814 u32 clusterchannelmask;
824 #define AAC_BAT_REQ_PRESENT (1)
825 #define AAC_BAT_REQ_NOTPRESENT (2)
826 #define AAC_BAT_OPT_PRESENT (3)
827 #define AAC_BAT_OPT_NOTPRESENT (4)
828 #define AAC_BAT_NOT_SUPPORTED (5)
832 #define AAC_CPU_SIMULATOR (1)
833 #define AAC_CPU_I960 (2)
834 #define AAC_CPU_STRONGARM (3)
839 #define AAC_OPT_SNAPSHOT cpu_to_le32(1)
840 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
841 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
842 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
843 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
844 #define AAC_OPT_RAID50 cpu_to_le32(1<<5)
845 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
846 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
847 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
848 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
849 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
850 #define AAC_OPT_ALARM cpu_to_le32(1<<11)
851 #define AAC_OPT_NONDASD cpu_to_le32(1<<12)
855 struct aac_dev *next;
861 * Map for 128 fib objects (64k)
863 dma_addr_t hw_fib_pa;
864 struct hw_fib *hw_fib_va;
869 // dmb struct fib fibs[AAC_NUM_FIB]; /* Doing it here takes up too much from the scsi pool*/
872 struct fib *free_fib;
873 struct fib *timeout_fib;
876 struct aac_queue_block *queues;
878 * The user API will use an IOCTL to register itself to receive
879 * FIBs from the adapter. The following list is used to keep
880 * track of all the threads that have requested these FIBs. The
881 * mutex is used to synchronize access to all data associated
882 * with the adapter fibs.
884 struct list_head fib_list;
886 struct adapter_ops a_ops;
887 unsigned long fsrev; /* Main driver's revision number */
889 struct aac_init *init; /* Holds initialization info to communicate with adapter */
890 // void * init_pa; /* Holds physical address of the init struct */
891 dma_addr_t init_pa; /* Holds physical address of the init struct */
893 struct pci_dev *pdev; /* Our PCI interface */
894 void * printfbuf; /* pointer to buffer used for printf's from the adapter */
895 void * comm_addr; /* Base address of Comm area */
896 dma_addr_t comm_phys; /* Physical Address of Comm area */
899 struct Scsi_Host *scsi_host_ptr;
900 struct fsa_scsi_hba fsa_dev;
905 * The following is the device specific extension.
909 struct sa_registers *sa;
910 struct rx_registers *rx;
911 struct rkt_registers *rkt;
913 u32 OIMR; /* Mask Register Cache */
915 * The following is the number of the individual adapter
919 struct completion aif_completion;
920 struct aac_adapter_info adapter_info;
921 /* These are in adapter info but they are in the io flow so
922 * lets break them out so we don't have to do an AND to check them
928 #define AllocateAndMapFibSpace(dev, MapFibContext) \
929 dev->a_ops.AllocateAndMapFibSpace(dev, MapFibContext)
931 #define UnmapAndFreeFibSpace(dev, MapFibContext) \
932 dev->a_ops.UnmapAndFreeFibSpace(dev, MapFibContext)
934 #define aac_adapter_interrupt(dev) \
935 dev->a_ops.adapter_interrupt(dev)
937 #define aac_adapter_notify(dev, event) \
938 dev->a_ops.adapter_notify(dev, event)
940 #define aac_adapter_enable_int(dev, event) \
941 dev->a_ops.adapter_enable_int(dev, event)
943 #define aac_adapter_disable_int(dev, event) \
944 dev->a_ops.adapter_disable_int(dev, event)
946 #define aac_adapter_check_health(dev) \
947 (dev)->a_ops.adapter_check_health(dev)
950 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
953 * Define the command values
957 #define GetAttributes 1
958 #define SetAttributes 2
964 #define MakeDirectory 8
965 #define SymbolicLink 9
968 #define RemoveDirectoryx 12
971 #define ReadDirectory 15
972 #define ReadDirectoryPlus 16
973 #define FileSystemStatus 17
974 #define FileSystemInfo 18
975 #define PathConfigure 19
982 #define SimReadWrite 26
983 #define SetFileSystemStatus 27
985 #define BlockWrite 29
986 #define NvramIoctl 30
987 #define FsSyncWait 31
988 #define ClearArchiveBit 32
992 #define FaultInsertion 36 /* Fault Insertion Command */
993 #define CrazyCache 37 /* Crazycache */
995 #define MAX_FSACOMMAND_NUM 38
999 * Define the status returns. These are very unixlike although
1000 * most are not in fact used
1013 #define ST_NOTDIR 20
1020 #define ST_WOULDBLOCK 35
1021 #define ST_NAMETOOLONG 63
1022 #define ST_NOTEMPTY 66
1025 #define ST_REMOTE 71
1026 #define ST_BADHANDLE 10001
1027 #define ST_NOT_SYNC 10002
1028 #define ST_BAD_COOKIE 10003
1029 #define ST_NOTSUPP 10004
1030 #define ST_TOOSMALL 10005
1031 #define ST_SERVERFAULT 10006
1032 #define ST_BADTYPE 10007
1033 #define ST_JUKEBOX 10008
1034 #define ST_NOTMOUNTED 10009
1035 #define ST_MAINTMODE 10010
1036 #define ST_STALEACL 10011
1039 * On writes how does the client want the data written.
1042 #define CACHE_CSTABLE 1
1043 #define CACHE_UNSTABLE 2
1046 * Lets the client know at which level the data was commited on
1050 #define CMFILE_SYNCH_NVRAM 1
1051 #define CMDATA_SYNCH_NVRAM 2
1052 #define CMFILE_SYNCH 3
1053 #define CMDATA_SYNCH 4
1054 #define CMUNSTABLE 5
1062 struct sgmap sg; // Must be last in struct because it is variable
1073 struct sgmap64 sg; // Must be last in struct because it is variable
1076 struct aac_read_reply
1088 u32 stable; // Not used
1089 struct sgmap sg; // Must be last in struct because it is variable
1100 struct sgmap64 sg; // Must be last in struct because it is variable
1102 struct aac_write_reply
1117 u32 count; // Data xfer size
1126 #define AAC_SENSE_BUFFERSIZE 30
1128 struct aac_srb_reply
1133 u32 data_xfer_length;
1134 u32 sense_data_size;
1135 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1140 #define SRB_NoDataXfer 0x0000
1141 #define SRB_DisableDisconnect 0x0004
1142 #define SRB_DisableSynchTransfer 0x0008
1143 #define SRB_BypassFrozenQueue 0x0010
1144 #define SRB_DisableAutosense 0x0020
1145 #define SRB_DataIn 0x0040
1146 #define SRB_DataOut 0x0080
1149 * SRB Functions - set in aac_srb->function
1151 #define SRBF_ExecuteScsi 0x0000
1152 #define SRBF_ClaimDevice 0x0001
1153 #define SRBF_IO_Control 0x0002
1154 #define SRBF_ReceiveEvent 0x0003
1155 #define SRBF_ReleaseQueue 0x0004
1156 #define SRBF_AttachDevice 0x0005
1157 #define SRBF_ReleaseDevice 0x0006
1158 #define SRBF_Shutdown 0x0007
1159 #define SRBF_Flush 0x0008
1160 #define SRBF_AbortCommand 0x0010
1161 #define SRBF_ReleaseRecovery 0x0011
1162 #define SRBF_ResetBus 0x0012
1163 #define SRBF_ResetDevice 0x0013
1164 #define SRBF_TerminateIO 0x0014
1165 #define SRBF_FlushQueue 0x0015
1166 #define SRBF_RemoveDevice 0x0016
1167 #define SRBF_DomainValidation 0x0017
1170 * SRB SCSI Status - set in aac_srb->scsi_status
1172 #define SRB_STATUS_PENDING 0x00
1173 #define SRB_STATUS_SUCCESS 0x01
1174 #define SRB_STATUS_ABORTED 0x02
1175 #define SRB_STATUS_ABORT_FAILED 0x03
1176 #define SRB_STATUS_ERROR 0x04
1177 #define SRB_STATUS_BUSY 0x05
1178 #define SRB_STATUS_INVALID_REQUEST 0x06
1179 #define SRB_STATUS_INVALID_PATH_ID 0x07
1180 #define SRB_STATUS_NO_DEVICE 0x08
1181 #define SRB_STATUS_TIMEOUT 0x09
1182 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1183 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1184 #define SRB_STATUS_MESSAGE_REJECTED 0x0D
1185 #define SRB_STATUS_BUS_RESET 0x0E
1186 #define SRB_STATUS_PARITY_ERROR 0x0F
1187 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1188 #define SRB_STATUS_NO_HBA 0x11
1189 #define SRB_STATUS_DATA_OVERRUN 0x12
1190 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1191 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1192 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1193 #define SRB_STATUS_REQUEST_FLUSHED 0x16
1194 #define SRB_STATUS_DELAYED_RETRY 0x17
1195 #define SRB_STATUS_INVALID_LUN 0x20
1196 #define SRB_STATUS_INVALID_TARGET_ID 0x21
1197 #define SRB_STATUS_BAD_FUNCTION 0x22
1198 #define SRB_STATUS_ERROR_RECOVERY 0x23
1199 #define SRB_STATUS_NOT_STARTED 0x24
1200 #define SRB_STATUS_NOT_IN_USE 0x30
1201 #define SRB_STATUS_FORCE_ABORT 0x31
1202 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1205 * Object-Server / Volume-Manager Dispatch Classes
1209 #define VM_NameServe 1
1210 #define VM_ContainerConfig 2
1212 #define VM_FilesystemIoctl 4
1213 #define VM_CloseAll 5
1214 #define VM_CtBlockRead 6
1215 #define VM_CtBlockWrite 7
1216 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
1217 #define VM_SliceBlockWrite 9
1218 #define VM_DriveBlockRead 10 /* raw access to physical devices */
1219 #define VM_DriveBlockWrite 11
1220 #define VM_EnclosureMgt 12 /* enclosure management */
1221 #define VM_Unused 13 /* used to be diskset management */
1222 #define VM_CtBlockVerify 14
1223 #define VM_CtPerf 15 /* performance test */
1224 #define VM_CtBlockRead64 16
1225 #define VM_CtBlockWrite64 17
1226 #define VM_CtBlockVerify64 18
1227 #define VM_CtHostRead64 19
1228 #define VM_CtHostWrite64 20
1230 #define MAX_VMCOMMAND_NUM 21 /* used for sizing stats array - leave last */
1233 * Descriptive information (eg, vital stats)
1234 * that a content manager might report. The
1235 * FileArray filesystem component is one example
1236 * of a content manager. Raw mode might be
1241 u32 fsTotalSize; /* Consumed by fs, incl. metadata */
1244 u32 fsMaxExtendSize;
1249 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1251 union aac_contentinfo {
1252 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1256 * Query for "mountable" objects, ie, objects that are typically
1257 * associated with a drive letter on the client (host) side.
1262 u8 name[16]; // if applicable
1263 struct creation_info create_info; // if applicable
1265 u32 vol; // substrate structure
1266 u32 obj; // FT_FILESYS, FT_DATABASE, etc.
1267 u32 state; // unready for mounting, readonly, etc.
1268 union aac_contentinfo fileinfo; // Info specific to content manager (eg, filesystem)
1269 u32 altoid; // != oid <==> snapshot or broken mirror exists
1272 #define FSCS_NOTCLEAN 0x0001 /* fsck is neccessary before mounting */
1273 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */
1274 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */
1276 struct aac_query_mount {
1284 u32 type; /* should be same as that requested */
1286 struct aac_mntent mnt[1];
1290 * The following command is sent to shut down each container.
1298 struct aac_query_disk
1312 struct aac_delete_disk {
1332 * Ugly - non Linux like ioctl coding for back compat.
1335 #define CTL_CODE(function, method) ( \
1336 (4<< 16) | ((function) << 2) | (method) \
1340 * Define the method codes for how buffers are passed for I/O and FS
1344 #define METHOD_BUFFERED 0
1345 #define METHOD_NEITHER 3
1351 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1352 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1353 #define FSACTL_DELETE_DISK 0x163
1354 #define FSACTL_QUERY_DISK 0x173
1355 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1356 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1357 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1358 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1359 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1360 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1366 * If this value is set to 1 then interrupt moderation will occur
1367 * in the base commuication support.
1374 * Statistical counters in debug mode
1380 u32 NoResponseRecved;
1388 extern struct aac_common aac_config;
1392 * The following macro is used when sending and receiving FIBs. It is
1393 * only used for debugging.
1397 #define FIB_COUNTER_INCREMENT(counter) (counter)++
1399 #define FIB_COUNTER_INCREMENT(counter)
1403 * Adapter direct commands
1404 * Monitor/Kernel API
1407 #define BREAKPOINT_REQUEST cpu_to_le32(0x00000004)
1408 #define INIT_STRUCT_BASE_ADDRESS cpu_to_le32(0x00000005)
1409 #define READ_PERMANENT_PARAMETERS cpu_to_le32(0x0000000a)
1410 #define WRITE_PERMANENT_PARAMETERS cpu_to_le32(0x0000000b)
1411 #define HOST_CRASHING cpu_to_le32(0x0000000d)
1412 #define SEND_SYNCHRONOUS_FIB cpu_to_le32(0x0000000c)
1413 #define GET_ADAPTER_PROPERTIES cpu_to_le32(0x00000019)
1414 #define RE_INIT_ADAPTER cpu_to_le32(0x000000ee)
1417 * Adapter Status Register
1419 * Phase Staus mailbox is 32bits:
1420 * <31:16> = Phase Status
1423 * The adapter reports is present state through the phase. Only
1424 * a single phase should be ever be set. Each phase can have multiple
1425 * phase status bits to provide more detailed information about the
1426 * state of the board. Care should be taken to ensure that any phase
1427 * status bits that are set when changing the phase are also valid
1428 * for the new phase or be cleared out. Adapter software (monitor,
1429 * iflash, kernel) is responsible for properly maintining the phase
1430 * status mailbox when it is running.
1434 * Phases are bit oriented. It is NOT valid to have multiple bits set
1437 #define SELF_TEST_FAILED cpu_to_le32(0x00000004)
1438 #define KERNEL_UP_AND_RUNNING cpu_to_le32(0x00000080)
1439 #define KERNEL_PANIC cpu_to_le32(0x00000100)
1442 * Doorbell bit defines
1445 #define DoorBellPrintfDone cpu_to_le32(1<<5) // Host -> Adapter
1446 #define DoorBellAdapterNormCmdReady cpu_to_le32(1<<1) // Adapter -> Host
1447 #define DoorBellAdapterNormRespReady cpu_to_le32(1<<2) // Adapter -> Host
1448 #define DoorBellAdapterNormCmdNotFull cpu_to_le32(1<<3) // Adapter -> Host
1449 #define DoorBellAdapterNormRespNotFull cpu_to_le32(1<<4) // Adapter -> Host
1450 #define DoorBellPrintfReady cpu_to_le32(1<<5) // Adapter -> Host
1453 * For FIB communication, we need all of the following things
1454 * to send back to the user.
1457 #define AifCmdEventNotify 1 /* Notify of event */
1458 #define AifCmdJobProgress 2 /* Progress report */
1459 #define AifCmdAPIReport 3 /* Report from other user of API */
1460 #define AifCmdDriverNotify 4 /* Notify host driver of event */
1461 #define AifReqJobList 100 /* Gets back complete job list */
1462 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */
1463 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */
1464 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */
1465 #define AifReqTerminateJob 104 /* Terminates job */
1466 #define AifReqSuspendJob 105 /* Suspends a job */
1467 #define AifReqResumeJob 106 /* Resumes a job */
1468 #define AifReqSendAPIReport 107 /* API generic report requests */
1469 #define AifReqAPIJobStart 108 /* Start a job from the API */
1470 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */
1471 #define AifReqAPIJobFinish 110 /* Finish a job from the API */
1474 * Adapter Initiated FIB command structures. Start with the adapter
1475 * initiated FIBs that really come from the adapter, and get responded
1480 u32 command; /* Tell host what type of notify this is */
1481 u32 seqnum; /* To allow ordering of reports (if necessary) */
1482 u8 data[1]; /* Undefined length (from kernel viewpoint) */
1486 * Convert capacity to cylinders
1487 * accounting for the fact capacity could be a 64 bit value
1490 static inline u32 cap_to_cyls(sector_t capacity, u32 divisor)
1492 sector_div(capacity, divisor);
1493 return (u32)capacity;
1498 const char *aac_driverinfo(struct Scsi_Host *);
1499 struct fib *fib_alloc(struct aac_dev *dev);
1500 int fib_setup(struct aac_dev *dev);
1501 void fib_map_free(struct aac_dev *dev);
1502 void fib_free(struct fib * context);
1503 void fib_init(struct fib * context);
1504 void fib_dealloc(struct fib * context);
1505 void aac_printf(struct aac_dev *dev, u32 val);
1506 int fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
1507 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
1508 int aac_consumer_avail(struct aac_dev * dev, struct aac_queue * q);
1509 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
1510 int fib_complete(struct fib * context);
1511 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib->data)
1512 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
1513 int aac_get_containers(struct aac_dev *dev);
1514 int aac_scsi_cmd(struct scsi_cmnd *cmd);
1515 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void *arg);
1516 int aac_do_ioctl(struct aac_dev * dev, int cmd, void *arg);
1517 int aac_rx_init(struct aac_dev *dev, unsigned long devNumber);
1518 int aac_rkt_init(struct aac_dev *dev, unsigned long devNumber);
1519 int aac_sa_init(struct aac_dev *dev, unsigned long devNumber);
1520 unsigned int aac_response_normal(struct aac_queue * q);
1521 unsigned int aac_command_normal(struct aac_queue * q);
1522 int aac_command_thread(struct aac_dev * dev);
1523 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
1524 int fib_adapter_complete(struct fib * fibptr, unsigned short size);
1525 struct aac_driver_ident* aac_get_driver_ident(int devtype);
1526 int aac_get_adapter_info(struct aac_dev* dev);
1527 int aac_send_shutdown(struct aac_dev *dev);