drivers/scsi/gdth.c

   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-04 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-04 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.2.x, 2.4.x, 2.6.x supported                           *
  31  *                                                                      *
  32  * $Log: gdth.c,v $
  33  * Revision 1.73  2004/03/31 13:33:03  achim
  34  * Special command 0xfd implemented to detect 64-bit DMA support
  35  *
  36  * Revision 1.72  2004/03/17 08:56:04  achim
  37  * 64-bit DMA only enabled if FW >= x.43
  38  *
  39  * Revision 1.71  2004/03/05 15:51:29  achim
  40  * Screen service: separate message buffer, bugfixes
  41  *
  42  * Revision 1.70  2004/02/27 12:19:07  achim
  43  * Bugfix: Reset bit in config (0xfe) call removed
  44  *
  45  * Revision 1.69  2004/02/20 09:50:24  achim
  46  * Compatibility changes for kernels < 2.4.20
  47  * Bugfix screen service command size
  48  * pci_set_dma_mask() error handling added
  49  *
  50  * Revision 1.68  2004/02/19 15:46:54  achim
  51  * 64-bit DMA bugfixes
  52  * Drive size bugfix for drives > 1TB
  53  *
  54  * Revision 1.67  2004/01/14 13:11:57  achim
  55  * Tool access over /proc no longer supported
  56  * Bugfixes IOCTLs
  57  *
  58  * Revision 1.66  2003/12/19 15:04:06  achim
  59  * Bugfixes support for drives > 2TB
  60  *
  61  * Revision 1.65  2003/12/15 11:21:56  achim
  62  * 64-bit DMA support added
  63  * Support for drives > 2 TB implemented
  64  * Kernels 2.2.x, 2.4.x, 2.6.x supported
  65  *
  66  * Revision 1.64  2003/09/17 08:30:26  achim
  67  * EISA/ISA controller scan disabled
  68  * Command line switch probe_eisa_isa added
  69  *
  70  * Revision 1.63  2003/07/12 14:01:00  Daniele Bellucci <bellucda@tiscali.it>
  71  * Minor cleanups in gdth_ioctl.
  72  *
  73  * Revision 1.62  2003/02/27 15:01:59  achim
  74  * Dynamic DMA mapping implemented
  75  * New (character device) IOCTL interface added
  76  * Other controller related changes made
  77  *
  78  * Revision 1.61  2002/11/08 13:09:52  boji
  79  * Added support for XSCALE based RAID Controllers
  80  * Fixed SCREENSERVICE initialization in SMP cases
  81  * Added checks for gdth_polling before GDTH_HA_LOCK
  82  *
  83  * Revision 1.60  2002/02/05 09:35:22  achim
  84  * MODULE_LICENSE only if kernel >= 2.4.11
  85  *
  86  * Revision 1.59  2002/01/30 09:46:33  achim
  87  * Small changes
  88  *
  89  * Revision 1.58  2002/01/29 15:30:02  achim
  90  * Set default value of shared_access to Y
  91  * New status S_CACHE_RESERV for clustering added
  92  *
  93  * Revision 1.57  2001/08/21 11:16:35  achim
  94  * Bugfix free_irq()
  95  *
  96  * Revision 1.56  2001/08/09 11:19:39  achim
  97  * struct scsi_host_template changes
  98  *
  99  * Revision 1.55  2001/08/09 10:11:28  achim
 100  * Command HOST_UNFREEZE_IO before cache service init.
 101  *
 102  * Revision 1.54  2001/07/20 13:48:12  achim
 103  * Expand: gdth_analyse_hdrive() removed
 104  *
 105  * Revision 1.53  2001/07/17 09:52:49  achim
 106  * Small OEM related change
 107  *
 108  * Revision 1.52  2001/06/19 15:06:20  achim
 109  * New host command GDT_UNFREEZE_IO added
 110  *
 111  * Revision 1.51  2001/05/22 06:42:37  achim
 112  * PCI: Subdevice ID added
 113  *
 114  * Revision 1.50  2001/05/17 13:42:16  achim
 115  * Support for Intel Storage RAID Controllers added
 116  *
 117  * Revision 1.50  2001/05/17 12:12:34  achim
 118  * Support for Intel Storage RAID Controllers added
 119  *
 120  * Revision 1.49  2001/03/15 15:07:17  achim
 121  * New __setup interface for boot command line options added
 122  *
 123  * Revision 1.48  2001/02/06 12:36:28  achim
 124  * Bugfix Cluster protocol
 125  *
 126  * Revision 1.47  2001/01/10 14:42:06  achim
 127  * New switch shared_access added
 128  *
 129  * Revision 1.46  2001/01/09 08:11:35  achim
 130  * gdth_command() removed
 131  * meaning of Scsi_Pointer members changed
 132  *
 133  * Revision 1.45  2000/11/16 12:02:24  achim
 134  * Changes for kernel 2.4
 135  *
 136  * Revision 1.44  2000/10/11 08:44:10  achim
 137  * Clustering changes: New flag media_changed added
 138  *
 139  * Revision 1.43  2000/09/20 12:59:01  achim
 140  * DPMEM remap functions for all PCI controller types implemented
 141  * Small changes for ia64 platform
 142  *
 143  * Revision 1.42  2000/07/20 09:04:50  achim
 144  * Small changes for kernel 2.4
 145  *
 146  * Revision 1.41  2000/07/04 14:11:11  achim
 147  * gdth_analyse_hdrive() added to rescan drives after online expansion
 148  *
 149  * Revision 1.40  2000/06/27 11:24:16  achim
 150  * Changes Clustering, Screenservice
 151  *
 152  * Revision 1.39  2000/06/15 13:09:04  achim
 153  * Changes for gdth_do_cmd()
 154  *
 155  * Revision 1.38  2000/06/15 12:08:43  achim
 156  * Bugfix gdth_sync_event(), service SCREENSERVICE
 157  * Data direction for command 0xc2 changed to DOU
 158  *
 159  * Revision 1.37  2000/05/25 13:50:10  achim
 160  * New driver parameter virt_ctr added
 161  *
 162  * Revision 1.36  2000/05/04 08:50:46  achim
 163  * Event buffer now in gdth_ha_str
 164  *
 165  * Revision 1.35  2000/03/03 10:44:08  achim
 166  * New event_string only valid for the RP controller family
 167  *
 168  * Revision 1.34  2000/03/02 14:55:29  achim
 169  * New mechanism for async. event handling implemented
 170  *
 171  * Revision 1.33  2000/02/21 15:37:37  achim
 172  * Bugfix Alpha platform + DPMEM above 4GB
 173  *
 174  * Revision 1.32  2000/02/14 16:17:37  achim
 175  * Bugfix sense_buffer[] + raw devices
 176  *
 177  * Revision 1.31  2000/02/10 10:29:00  achim
 178  * Delete sense_buffer[0], if command OK
 179  *
 180  * Revision 1.30  1999/11/02 13:42:39  achim
 181  * ARRAY_DRV_LIST2 implemented
 182  * Now 255 log. and 100 host drives supported
 183  *
 184  * Revision 1.29  1999/10/05 13:28:47  achim
 185  * GDT_CLUST_RESET added
 186  *
 187  * Revision 1.28  1999/08/12 13:44:54  achim
 188  * MOUNTALL removed
 189  * Cluster drives -> removeable drives
 190  *
 191  * Revision 1.27  1999/06/22 07:22:38  achim
 192  * Small changes
 193  *
 194  * Revision 1.26  1999/06/10 16:09:12  achim
 195  * Cluster Host Drive support: Bugfixes
 196  *
 197  * Revision 1.25  1999/06/01 16:03:56  achim
 198  * gdth_init_pci(): Manipulate config. space to start RP controller
 199  *
 200  * Revision 1.24  1999/05/26 11:53:06  achim
 201  * Cluster Host Drive support added
 202  *
 203  * Revision 1.23  1999/03/26 09:12:31  achim
 204  * Default value for hdr_channel set to 0
 205  *
 206  * Revision 1.22  1999/03/22 16:27:16  achim
 207  * Bugfix: gdth_store_event() must not be locked with GDTH_LOCK_HA()
 208  *
 209  * Revision 1.21  1999/03/16 13:40:34  achim
 210  * Problems with reserved drives solved
 211  * gdth_eh_bus_reset() implemented
 212  *
 213  * Revision 1.20  1999/03/10 09:08:13  achim
 214  * Bugfix: Corrections in gdth_direction_tab[] made
 215  * Bugfix: Increase command timeout (gdth_update_timeout()) NOT in gdth_putq()
 216  *
 217  * Revision 1.19  1999/03/05 14:38:16  achim
 218  * Bugfix: Heads/Sectors mapping for reserved devices possibly wrong
 219  * -> gdth_eval_mapping() implemented, changes in gdth_bios_param()
 220  * INIT_RETRIES set to 100s to avoid DEINIT-Timeout for controllers
 221  * with BIOS disabled and memory test set to Intensive
 222  * Enhanced /proc support
 223  *
 224  * Revision 1.18  1999/02/24 09:54:33  achim
 225  * Command line parameter hdr_channel implemented
 226  * Bugfix for EISA controllers + Linux 2.2.x
 227  *
 228  * Revision 1.17  1998/12/17 15:58:11  achim
 229  * Command line parameters implemented
 230  * Changes for Alpha platforms
 231  * PCI controller scan changed
 232  * SMP support improved (spin_lock_irqsave(),...)
 233  * New async. events, new scan/reserve commands included
 234  *
 235  * Revision 1.16  1998/09/28 16:08:46  achim
 236  * GDT_PCIMPR: DPMEM remapping, if required
 237  * mdelay() added
 238  *
 239  * Revision 1.15  1998/06/03 14:54:06  achim
 240  * gdth_delay(), gdth_flush() implemented
 241  * Bugfix: gdth_release() changed
 242  *
 243  * Revision 1.14  1998/05/22 10:01:17  achim
 244  * mj: pcibios_strerror() removed
 245  * Improved SMP support (if version >= 2.1.95)
 246  * gdth_halt(): halt_called flag added (if version < 2.1)
 247  *
 248  * Revision 1.13  1998/04/16 09:14:57  achim
 249  * Reserve drives (for raw service) implemented
 250  * New error handling code enabled
 251  * Get controller name from board_info() IOCTL
 252  * Final round of PCI device driver patches by Martin Mares
 253  *
 254  * Revision 1.12  1998/03/03 09:32:37  achim
 255  * Fibre channel controller support added
 256  *
 257  * Revision 1.11  1998/01/27 16:19:14  achim
 258  * SA_SHIRQ added
 259  * add_timer()/del_timer() instead of GDTH_TIMER
 260  * scsi_add_timer()/scsi_del_timer() instead of SCSI_TIMER
 261  * New error handling included
 262  *
 263  * Revision 1.10  1997/10/31 12:29:57  achim
 264  * Read heads/sectors from host drive
 265  *
 266  * Revision 1.9  1997/09/04 10:07:25  achim
 267  * IO-mapping with virt_to_bus(), gdth_readb(), gdth_writeb(), ...
 268  * register_reboot_notifier() to get a notify on shutown used
 269  *
 270  * Revision 1.8  1997/04/02 12:14:30  achim
 271  * Version 1.00 (see gdth.h), tested with kernel 2.0.29
 272  *
 273  * Revision 1.7  1997/03/12 13:33:37  achim
 274  * gdth_reset() changed, new async. events
 275  *
 276  * Revision 1.6  1997/03/04 14:01:11  achim
 277  * Shutdown routine gdth_halt() implemented
 278  *
 279  * Revision 1.5  1997/02/21 09:08:36  achim
 280  * New controller included (RP, RP1, RP2 series)
 281  * IOCTL interface implemented
 282  *
 283  * Revision 1.4  1996/07/05 12:48:55  achim
 284  * Function gdth_bios_param() implemented
 285  * New constant GDTH_MAXC_P_L inserted
 286  * GDT_WRITE_THR, GDT_EXT_INFO implemented
 287  * Function gdth_reset() changed
 288  *
 289  * Revision 1.3  1996/05/10 09:04:41  achim
 290  * Small changes for Linux 1.2.13
 291  *
 292  * Revision 1.2  1996/05/09 12:45:27  achim
 293  * Loadable module support implemented
 294  * /proc support corrections made
 295  *
 296  * Revision 1.1  1996/04/11 07:35:57  achim
 297  * Initial revision
 298  *
 299  ************************************************************************/
 300
 301 /* All GDT Disk Array Controllers are fully supported by this driver.
 302  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
 303  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
 304  * list of all controller types.
 305  *
 306  * If you have one or more GDT3000/3020 EISA controllers with
 307  * controller BIOS disabled, you have to set the IRQ values with the
 308  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
 309  * the IRQ values for the EISA controllers.
 310  *
 311  * After the optional list of IRQ values, other possible
 312  * command line options are:
 313  * disable:Y                    disable driver
 314  * disable:N                    enable driver
 315  * reserve_mode:0               reserve no drives for the raw service
 316  * reserve_mode:1               reserve all not init., removable drives
 317  * reserve_mode:2               reserve all not init. drives
 318  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
 319  *                              h- controller no., b- channel no.,
 320  *                              t- target ID, l- LUN
 321  * reverse_scan:Y               reverse scan order for PCI controllers
 322  * reverse_scan:N               scan PCI controllers like BIOS
 323  * max_ids:x                    x - target ID count per channel (1..MAXID)
 324  * rescan:Y                     rescan all channels/IDs
 325  * rescan:N                     use all devices found until now
 326  * virt_ctr:Y                   map every channel to a virtual controller
 327  * virt_ctr:N                   use multi channel support
 328  * hdr_channel:x                x - number of virtual bus for host drives
 329  * shared_access:Y              disable driver reserve/release protocol to
 330  *                              access a shared resource from several nodes,
 331  *                              appropriate controller firmware required
 332  * shared_access:N              enable driver reserve/release protocol
 333  * probe_eisa_isa:Y             scan for EISA/ISA controllers
 334  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
 335  * force_dma32:Y                use only 32 bit DMA mode
 336  * force_dma32:N                use 64 bit DMA mode, if supported
 337  *
 338  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
 339  *                          max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
 340  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
 341  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
 342  *
 343  * When loading the gdth driver as a module, the same options are available.
 344  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
 345  * options changes slightly. You must replace all ',' between options
 346  * with ' ' and all ':' with '=' and you must use
 347  * '1' in place of 'Y' and '0' in place of 'N'.
 348  *
 349  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
 350  *           max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0
 351  *           probe_eisa_isa=0 force_dma32=0"
 352  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
 353  */
 354
 355 /* The meaning of the Scsi_Pointer members in this driver is as follows:
 356  * ptr:                     Chaining
 357  * this_residual:           Command priority
 358  * buffer:                  phys. DMA sense buffer
 359  * dma_handle:              phys. DMA buffer (kernel >= 2.4.0)
 360  * buffers_residual:        Timeout value
 361  * Status:                  Command status (gdth_do_cmd()), DMA mem. mappings
 362  * Message:                 Additional info (gdth_do_cmd()), DMA direction
 363  * have_data_in:            Flag for gdth_wait_completion()
 364  * sent_command:            Opcode special command
 365  * phase:                   Service/parameter/return code special command
 366  */
 367
 368
 369 /* interrupt coalescing */
 370 /* #define INT_COAL */
 371
 372 /* statistics */
 373 #define GDTH_STATISTICS
 374
 375 #include <linux/module.h>
 376
 377 #include <linux/version.h>
 378 #include <linux/kernel.h>
 379 #include <linux/types.h>
 380 #include <linux/pci.h>
 381 #include <linux/string.h>
 382 #include <linux/ctype.h>
 383 #include <linux/ioport.h>
 384 #include <linux/delay.h>
 385 #include <linux/sched.h>
 386 #include <linux/interrupt.h>
 387 #include <linux/in.h>
 388 #include <linux/proc_fs.h>
 389 #include <linux/time.h>
 390 #include <linux/timer.h>
 391 #include <linux/dma-mapping.h>
 392 #ifdef GDTH_RTC
 393 #include <linux/mc146818rtc.h>
 394 #endif
 395 #include <linux/reboot.h>
 396
 397 #include <asm/dma.h>
 398 #include <asm/system.h>
 399 #include <asm/io.h>
 400 #include <asm/uaccess.h>
 401 #include <linux/spinlock.h>
 402 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 403 #include <linux/blkdev.h>
 404 #else
 405 #include <linux/blk.h>
 406 #include "sd.h"
 407 #endif
 408
 409 #include "scsi.h"
 410 #include <scsi/scsi_host.h>
 411 #include "gdth.h"
 412 #include "gdth_kcompat.h"
 413
 414 static void gdth_delay(int milliseconds);
 415 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
 416 static irqreturn_t gdth_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 417 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
 418 static int gdth_async_event(int hanum);
 419 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 420
 421 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
 422 static void gdth_next(int hanum);
 423 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
 424 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
 425 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
 426                                       ushort idx, gdth_evt_data *evt);
 427 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 428 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
 429                                gdth_evt_str *estr);
 430 static void gdth_clear_events(void);
 431
 432 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
 433                                     char *buffer,ushort count);
 434 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
 435 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
 436
 437 static int gdth_search_eisa(ushort eisa_adr);
 438 static int gdth_search_isa(ulong32 bios_adr);
 439 static int gdth_search_pci(gdth_pci_str *pcistr);
 440 static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 441                             ushort vendor, ushort dev);
 442 static void gdth_sort_pci(gdth_pci_str *pcistr, int cnt);
 443 static int gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha);
 444 static int gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha);
 445 static int gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha);
 446
 447 static void gdth_enable_int(int hanum);
 448 static int gdth_get_status(unchar *pIStatus,int irq);
 449 static int gdth_test_busy(int hanum);
 450 static int gdth_get_cmd_index(int hanum);
 451 static void gdth_release_event(int hanum);
 452 static int gdth_wait(int hanum,int index,ulong32 time);
 453 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
 454                              ulong64 p2,ulong64 p3);
 455 static int gdth_search_drives(int hanum);
 456 static int gdth_analyse_hdrive(int hanum, ushort hdrive);
 457
 458 static const char *gdth_ctr_name(int hanum);
 459
 460 static int gdth_open(struct inode *inode, struct file *filep);
 461 static int gdth_close(struct inode *inode, struct file *filep);
 462 static int gdth_ioctl(struct inode *inode, struct file *filep,
 463                       unsigned int cmd, unsigned long arg);
 464
 465 static void gdth_flush(int hanum);
 466 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
 467
 468 #ifdef DEBUG_GDTH
 469 static unchar   DebugState = DEBUG_GDTH;
 470
 471 #ifdef __SERIAL__
 472 #define MAX_SERBUF 160
 473 static void ser_init(void);
 474 static void ser_puts(char *str);
 475 static void ser_putc(char c);
 476 static int  ser_printk(const char *fmt, ...);
 477 static char strbuf[MAX_SERBUF+1];
 478 #ifdef __COM2__
 479 #define COM_BASE 0x2f8
 480 #else
 481 #define COM_BASE 0x3f8
 482 #endif
 483 static void ser_init()
 484 {
 485     unsigned port=COM_BASE;
 486
 487     outb(0x80,port+3);
 488     outb(0,port+1);
 489     /* 19200 Baud, if 9600: outb(12,port) */
 490     outb(6, port);
 491     outb(3,port+3);
 492     outb(0,port+1);
 493     /*
 494     ser_putc('I');
 495     ser_putc(' ');
 496     */
 497 }
 498
 499 static void ser_puts(char *str)
 500 {
 501     char *ptr;
 502
 503     ser_init();
 504     for (ptr=str;*ptr;++ptr)
 505         ser_putc(*ptr);
 506 }
 507
 508 static void ser_putc(char c)
 509 {
 510     unsigned port=COM_BASE;
 511
 512     while ((inb(port+5) & 0x20)==0);
 513     outb(c,port);
 514     if (c==0x0a)
 515     {
 516         while ((inb(port+5) & 0x20)==0);
 517         outb(0x0d,port);
 518     }
 519 }
 520
 521 static int ser_printk(const char *fmt, ...)
 522 {
 523     va_list args;
 524     int i;
 525
 526     va_start(args,fmt);
 527     i = vsprintf(strbuf,fmt,args);
 528     ser_puts(strbuf);
 529     va_end(args);
 530     return i;
 531 }
 532
 533 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 534 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 535 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 536
 537 #else /* !__SERIAL__ */
 538 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 539 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 540 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 541 #endif
 542
 543 #else /* !DEBUG */
 544 #define TRACE(a)
 545 #define TRACE2(a)
 546 #define TRACE3(a)
 547 #endif
 548
 549 #ifdef GDTH_STATISTICS
 550 static ulong32 max_rq=0, max_index=0, max_sg=0;
 551 #ifdef INT_COAL
 552 static ulong32 max_int_coal=0;
 553 #endif
 554 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 555 static struct timer_list gdth_timer;
 556 #endif
 557
 558 #define PTR2USHORT(a)   (ushort)(ulong)(a)
 559 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 560 #define INDEX_OK(i,t)   ((i)<sizeof(t)/sizeof((t)[0]))
 561
 562 #define NUMDATA(a)      ( (gdth_num_str  *)((a)->hostdata))
 563 #define HADATA(a)       (&((gdth_ext_str *)((a)->hostdata))->haext)
 564 #define CMDDATA(a)      (&((gdth_ext_str *)((a)->hostdata))->cmdext)
 565
 566 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 567
 568 #define gdth_readb(addr)        readb(addr)
 569 #define gdth_readw(addr)        readw(addr)
 570 #define gdth_readl(addr)        readl(addr)
 571 #define gdth_writeb(b,addr)     writeb((b),(addr))
 572 #define gdth_writew(b,addr)     writew((b),(addr))
 573 #define gdth_writel(b,addr)     writel((b),(addr))
 574
 575 static unchar   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 576 static unchar   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 577 static unchar   gdth_polling;                           /* polling if TRUE */
 578 static unchar   gdth_from_wait  = FALSE;                /* gdth_wait() */
 579 static int      wait_index,wait_hanum;                  /* gdth_wait() */
 580 static int      gdth_ctr_count  = 0;                    /* controller count */
 581 static int      gdth_ctr_vcount = 0;                    /* virt. ctr. count */
 582 static int      gdth_ctr_released = 0;                  /* gdth_release() */
 583 static struct Scsi_Host *gdth_ctr_tab[MAXHA];           /* controller table */
 584 static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS];   /* virt. ctr. table */
 585 static unchar   gdth_write_through = FALSE;             /* write through */
 586 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 587 static int elastidx;
 588 static int eoldidx;
 589 static int major;
 590
 591 #define DIN     1                               /* IN data direction */
 592 #define DOU     2                               /* OUT data direction */
 593 #define DNO     DIN                             /* no data transfer */
 594 #define DUN     DIN                             /* unknown data direction */
 595 static unchar gdth_direction_tab[0x100] = {
 596     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 597     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 598     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 599     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 600     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 601     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 602     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 603     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 604     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 605     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 606     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 607     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 608     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 609     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 610     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 611     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 612 };
 613
 614 /* LILO and modprobe/insmod parameters */
 615 /* IRQ list for GDT3000/3020 EISA controllers */
 616 static int irq[MAXHA] __initdata =
 617 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 618  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 619 /* disable driver flag */
 620 static int disable __initdata = 0;
 621 /* reserve flag */
 622 static int reserve_mode = 1;
 623 /* reserve list */
 624 static int reserve_list[MAX_RES_ARGS] =
 625 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 626  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 627  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 628 /* scan order for PCI controllers */
 629 static int reverse_scan = 0;
 630 /* virtual channel for the host drives */
 631 static int hdr_channel = 0;
 632 /* max. IDs per channel */
 633 static int max_ids = MAXID;
 634 /* rescan all IDs */
 635 static int rescan = 0;
 636 /* map channels to virtual controllers */
 637 static int virt_ctr = 0;
 638 /* shared access */
 639 static int shared_access = 1;
 640 /* enable support for EISA and ISA controllers */
 641 static int probe_eisa_isa = 0;
 642 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 643 static int force_dma32 = 0;
 644
 645 /* parameters for modprobe/insmod */
 646 module_param_array(irq, int, NULL, 0);
 647 module_param(disable, int, 0);
 648 module_param(reserve_mode, int, 0);
 649 module_param_array(reserve_list, int, NULL, 0);
 650 module_param(reverse_scan, int, 0);
 651 module_param(hdr_channel, int, 0);
 652 module_param(max_ids, int, 0);
 653 module_param(rescan, int, 0);
 654 module_param(virt_ctr, int, 0);
 655 module_param(shared_access, int, 0);
 656 module_param(probe_eisa_isa, int, 0);
 657 module_param(force_dma32, int, 0);
 658 MODULE_AUTHOR("Achim Leubner");
 659 MODULE_LICENSE("GPL");
 660 MODULE_VERSION(GDTH_VERSION_STR);
 661
 662 /* ioctl interface */
 663 static struct file_operations gdth_fops = {
 664     .ioctl   = gdth_ioctl,
 665     .open    = gdth_open,
 666     .release = gdth_close,
 667 };
 668
 669 #include "gdth_proc.h"
 670 #include "gdth_proc.c"
 671
 672 /* notifier block to get a notify on system shutdown/halt/reboot */
 673 static struct notifier_block gdth_notifier = {
 674     gdth_halt, NULL, 0
 675 };
 676 static int notifier_disabled = 0;
 677
 678 static void gdth_delay(int milliseconds)
 679 {
 680     if (milliseconds == 0) {
 681         udelay(1);
 682     } else {
 683         mdelay(milliseconds);
 684     }
 685 }
 686
 687 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
 688 {
 689     *cyls = size /HEADS/SECS;
 690     if (*cyls <= MAXCYLS) {
 691         *heads = HEADS;
 692         *secs = SECS;
 693     } else {                                        /* too high for 64*32 */
 694         *cyls = size /MEDHEADS/MEDSECS;
 695         if (*cyls <= MAXCYLS) {
 696             *heads = MEDHEADS;
 697             *secs = MEDSECS;
 698         } else {                                    /* too high for 127*63 */
 699             *cyls = size /BIGHEADS/BIGSECS;
 700             *heads = BIGHEADS;
 701             *secs = BIGSECS;
 702         }
 703     }
 704 }
 705
 706 /* controller search and initialization functions */
 707
 708 static int __init gdth_search_eisa(ushort eisa_adr)
 709 {
 710     ulong32 id;
 711
 712     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 713     id = inl(eisa_adr+ID0REG);
 714     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 715         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 716             return 0;                           /* not EISA configured */
 717         return 1;
 718     }
 719     if (id == GDT3_ID)                          /* GDT3000 */
 720         return 1;
 721
 722     return 0;
 723 }
 724
 725
 726 static int __init gdth_search_isa(ulong32 bios_adr)
 727 {
 728     void __iomem *addr;
 729     ulong32 id;
 730
 731     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 732     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
 733         id = gdth_readl(addr);
 734         iounmap(addr);
 735         if (id == GDT2_ID)                          /* GDT2000 */
 736             return 1;
 737     }
 738     return 0;
 739 }
 740
 741
 742 static int __init gdth_search_pci(gdth_pci_str *pcistr)
 743 {
 744     ushort device, cnt;
 745
 746     TRACE(("gdth_search_pci()\n"));
 747
 748     cnt = 0;
 749     for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
 750         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 751     for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
 752          device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
 753         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 754     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 755                     PCI_DEVICE_ID_VORTEX_GDTNEWRX);
 756     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 757                     PCI_DEVICE_ID_VORTEX_GDTNEWRX2);
 758     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 759                     PCI_DEVICE_ID_INTEL_SRC);
 760     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 761                     PCI_DEVICE_ID_INTEL_SRC_XSCALE);
 762     return cnt;
 763 }
 764
 765 /* Vortex only makes RAID controllers.
 766  * We do not really want to specify all 550 ids here, so wildcard match.
 767  */
 768 static struct pci_device_id gdthtable[] __attribute_used__ = {
 769     {PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
 770     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
 771     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
 772     {0}
 773 };
 774 MODULE_DEVICE_TABLE(pci,gdthtable);
 775
 776 static void __init gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 777                                            ushort vendor, ushort device)
 778 {
 779     ulong base0, base1, base2;
 780     struct pci_dev *pdev;
 781
 782     TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 783           *cnt, vendor, device));
 784
 785     pdev = NULL;
 786     while ((pdev = pci_find_device(vendor, device, pdev))
 787            != NULL) {
 788         if (pci_enable_device(pdev))
 789             continue;
 790         if (*cnt >= MAXHA)
 791             return;
 792         /* GDT PCI controller found, resources are already in pdev */
 793         pcistr[*cnt].pdev = pdev;
 794         pcistr[*cnt].vendor_id = vendor;
 795         pcistr[*cnt].device_id = device;
 796         pcistr[*cnt].subdevice_id = pdev->subsystem_device;
 797         pcistr[*cnt].bus = pdev->bus->number;
 798         pcistr[*cnt].device_fn = pdev->devfn;
 799         pcistr[*cnt].irq = pdev->irq;
 800         base0 = pci_resource_flags(pdev, 0);
 801         base1 = pci_resource_flags(pdev, 1);
 802         base2 = pci_resource_flags(pdev, 2);
 803         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 804             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 805             if (!(base0 & IORESOURCE_MEM))
 806                 continue;
 807             pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
 808         } else {                                  /* GDT6110, GDT6120, .. */
 809             if (!(base0 & IORESOURCE_MEM) ||
 810                 !(base2 & IORESOURCE_MEM) ||
 811                 !(base1 & IORESOURCE_IO))
 812                 continue;
 813             pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
 814             pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
 815             pcistr[*cnt].io    = pci_resource_start(pdev, 1);
 816         }
 817         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 818                 pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
 819                 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
 820         (*cnt)++;
 821     }
 822 }
 823
 824
 825 static void __init gdth_sort_pci(gdth_pci_str *pcistr, int cnt)
 826 {
 827     gdth_pci_str temp;
 828     int i, changed;
 829
 830     TRACE(("gdth_sort_pci() cnt %d\n",cnt));
 831     if (cnt == 0)
 832         return;
 833
 834     do {
 835         changed = FALSE;
 836         for (i = 0; i < cnt-1; ++i) {
 837             if (!reverse_scan) {
 838                 if ((pcistr[i].bus > pcistr[i+1].bus) ||
 839                     (pcistr[i].bus == pcistr[i+1].bus &&
 840                      PCI_SLOT(pcistr[i].device_fn) >
 841                      PCI_SLOT(pcistr[i+1].device_fn))) {
 842                     temp = pcistr[i];
 843                     pcistr[i] = pcistr[i+1];
 844                     pcistr[i+1] = temp;
 845                     changed = TRUE;
 846                 }
 847             } else {
 848                 if ((pcistr[i].bus < pcistr[i+1].bus) ||
 849                     (pcistr[i].bus == pcistr[i+1].bus &&
 850                      PCI_SLOT(pcistr[i].device_fn) <
 851                      PCI_SLOT(pcistr[i+1].device_fn))) {
 852                     temp = pcistr[i];
 853                     pcistr[i] = pcistr[i+1];
 854                     pcistr[i+1] = temp;
 855                     changed = TRUE;
 856                 }
 857             }
 858         }
 859     } while (changed);
 860 }
 861
 862
 863 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
 864 {
 865     ulong32 retries,id;
 866     unchar prot_ver,eisacf,i,irq_found;
 867
 868     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 869
 870     /* disable board interrupts, deinitialize services */
 871     outb(0xff,eisa_adr+EDOORREG);
 872     outb(0x00,eisa_adr+EDENABREG);
 873     outb(0x00,eisa_adr+EINTENABREG);
 874
 875     outb(0xff,eisa_adr+LDOORREG);
 876     retries = INIT_RETRIES;
 877     gdth_delay(20);
 878     while (inb(eisa_adr+EDOORREG) != 0xff) {
 879         if (--retries == 0) {
 880             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 881             return 0;
 882         }
 883         gdth_delay(1);
 884         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 885     }
 886     prot_ver = inb(eisa_adr+MAILBOXREG);
 887     outb(0xff,eisa_adr+EDOORREG);
 888     if (prot_ver != PROTOCOL_VERSION) {
 889         printk("GDT-EISA: Illegal protocol version\n");
 890         return 0;
 891     }
 892     ha->bmic = eisa_adr;
 893     ha->brd_phys = (ulong32)eisa_adr >> 12;
 894
 895     outl(0,eisa_adr+MAILBOXREG);
 896     outl(0,eisa_adr+MAILBOXREG+4);
 897     outl(0,eisa_adr+MAILBOXREG+8);
 898     outl(0,eisa_adr+MAILBOXREG+12);
 899
 900     /* detect IRQ */
 901     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
 902         ha->oem_id = OEM_ID_ICP;
 903         ha->type = GDT_EISA;
 904         ha->stype = id;
 905         outl(1,eisa_adr+MAILBOXREG+8);
 906         outb(0xfe,eisa_adr+LDOORREG);
 907         retries = INIT_RETRIES;
 908         gdth_delay(20);
 909         while (inb(eisa_adr+EDOORREG) != 0xfe) {
 910             if (--retries == 0) {
 911                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
 912                 return 0;
 913             }
 914             gdth_delay(1);
 915         }
 916         ha->irq = inb(eisa_adr+MAILBOXREG);
 917         outb(0xff,eisa_adr+EDOORREG);
 918         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
 919         /* check the result */
 920         if (ha->irq == 0) {
 921                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
 922                 for (i = 0, irq_found = FALSE;
 923                      i < MAXHA && irq[i] != 0xff; ++i) {
 924                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
 925                     irq_found = TRUE;
 926                     break;
 927                 }
 928                 }
 929             if (irq_found) {
 930                 ha->irq = irq[i];
 931                 irq[i] = 0;
 932                 printk("GDT-EISA: Can not detect controller IRQ,\n");
 933                 printk("Use IRQ setting from command line (IRQ = %d)\n",
 934                        ha->irq);
 935             } else {
 936                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
 937                 printk("the controller BIOS or use command line parameters\n");
 938                 return 0;
 939             }
 940         }
 941     } else {
 942         eisacf = inb(eisa_adr+EISAREG) & 7;
 943         if (eisacf > 4)                         /* level triggered */
 944             eisacf -= 4;
 945         ha->irq = gdth_irq_tab[eisacf];
 946         ha->oem_id = OEM_ID_ICP;
 947         ha->type = GDT_EISA;
 948         ha->stype = id;
 949     }
 950
 951     ha->dma64_support = 0;
 952     return 1;
 953 }
 954
 955
 956 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
 957 {
 958     register gdt2_dpram_str __iomem *dp2_ptr;
 959     int i;
 960     unchar irq_drq,prot_ver;
 961     ulong32 retries;
 962
 963     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
 964
 965     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
 966     if (ha->brd == NULL) {
 967         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
 968         return 0;
 969     }
 970     dp2_ptr = ha->brd;
 971     gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
 972     /* reset interface area */
 973     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
 974     if (gdth_readl(&dp2_ptr->u) != 0) {
 975         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
 976         iounmap(ha->brd);
 977         return 0;
 978     }
 979
 980     /* disable board interrupts, read DRQ and IRQ */
 981     gdth_writeb(0xff, &dp2_ptr->io.irqdel);
 982     gdth_writeb(0x00, &dp2_ptr->io.irqen);
 983     gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status);
 984     gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
 985
 986     irq_drq = gdth_readb(&dp2_ptr->io.rq);
 987     for (i=0; i<3; ++i) {
 988         if ((irq_drq & 1)==0)
 989             break;
 990         irq_drq >>= 1;
 991     }
 992     ha->drq = gdth_drq_tab[i];
 993
 994     irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3;
 995     for (i=1; i<5; ++i) {
 996         if ((irq_drq & 1)==0)
 997             break;
 998         irq_drq >>= 1;
 999     }
1000     ha->irq = gdth_irq_tab[i];
1001
1002     /* deinitialize services */
1003     gdth_writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
1004     gdth_writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
1005     gdth_writeb(0, &dp2_ptr->io.event);
1006     retries = INIT_RETRIES;
1007     gdth_delay(20);
1008     while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
1009         if (--retries == 0) {
1010             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
1011             iounmap(ha->brd);
1012             return 0;
1013         }
1014         gdth_delay(1);
1015     }
1016     prot_ver = (unchar)gdth_readl(&dp2_ptr->u.ic.S_Info[0]);
1017     gdth_writeb(0, &dp2_ptr->u.ic.Status);
1018     gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1019     if (prot_ver != PROTOCOL_VERSION) {
1020         printk("GDT-ISA: Illegal protocol version\n");
1021         iounmap(ha->brd);
1022         return 0;
1023     }
1024
1025     ha->oem_id = OEM_ID_ICP;
1026     ha->type = GDT_ISA;
1027     ha->ic_all_size = sizeof(dp2_ptr->u);
1028     ha->stype= GDT2_ID;
1029     ha->brd_phys = bios_adr >> 4;
1030
1031     /* special request to controller BIOS */
1032     gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
1033     gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
1034     gdth_writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
1035     gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
1036     gdth_writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
1037     gdth_writeb(0, &dp2_ptr->io.event);
1038     retries = INIT_RETRIES;
1039     gdth_delay(20);
1040     while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
1041         if (--retries == 0) {
1042             printk("GDT-ISA: Initialization error\n");
1043             iounmap(ha->brd);
1044             return 0;
1045         }
1046         gdth_delay(1);
1047     }
1048     gdth_writeb(0, &dp2_ptr->u.ic.Status);
1049     gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1050
1051     ha->dma64_support = 0;
1052     return 1;
1053 }
1054
1055
1056 static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha)
1057 {
1058     register gdt6_dpram_str __iomem *dp6_ptr;
1059     register gdt6c_dpram_str __iomem *dp6c_ptr;
1060     register gdt6m_dpram_str __iomem *dp6m_ptr;
1061     ulong32 retries;
1062     unchar prot_ver;
1063     ushort command;
1064     int i, found = FALSE;
1065
1066     TRACE(("gdth_init_pci()\n"));
1067
1068     if (pcistr->vendor_id == PCI_VENDOR_ID_INTEL)
1069         ha->oem_id = OEM_ID_INTEL;
1070     else
1071         ha->oem_id = OEM_ID_ICP;
1072     ha->brd_phys = (pcistr->bus << 8) | (pcistr->device_fn & 0xf8);
1073     ha->stype = (ulong32)pcistr->device_id;
1074     ha->subdevice_id = pcistr->subdevice_id;
1075     ha->irq = pcistr->irq;
1076     ha->pdev = pcistr->pdev;
1077
1078     if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
1079         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1080         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
1081         if (ha->brd == NULL) {
1082             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1083             return 0;
1084         }
1085         /* check and reset interface area */
1086         dp6_ptr = ha->brd;
1087         gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1088         if (gdth_readl(&dp6_ptr->u) != DPMEM_MAGIC) {
1089             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1090                    pcistr->dpmem);
1091             found = FALSE;
1092             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1093                 iounmap(ha->brd);
1094                 ha->brd = ioremap(i, sizeof(ushort));
1095                 if (ha->brd == NULL) {
1096                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1097                     return 0;
1098                 }
1099                 if (gdth_readw(ha->brd) != 0xffff) {
1100                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
1101                     continue;
1102                 }
1103                 iounmap(ha->brd);
1104                 pci_write_config_dword(pcistr->pdev,
1105                                        PCI_BASE_ADDRESS_0, i);
1106                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
1107                 if (ha->brd == NULL) {
1108                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1109                     return 0;
1110                 }
1111                 dp6_ptr = ha->brd;
1112                 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1113                 if (gdth_readl(&dp6_ptr->u) == DPMEM_MAGIC) {
1114                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1115                     found = TRUE;
1116                     break;
1117                 }
1118             }
1119             if (!found) {
1120                 printk("GDT-PCI: No free address found!\n");
1121                 iounmap(ha->brd);
1122                 return 0;
1123             }
1124         }
1125         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
1126         if (gdth_readl(&dp6_ptr->u) != 0) {
1127             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1128             iounmap(ha->brd);
1129             return 0;
1130         }
1131
1132         /* disable board interrupts, deinit services */
1133         gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1134         gdth_writeb(0x00, &dp6_ptr->io.irqen);
1135         gdth_writeb(0x00, &dp6_ptr->u.ic.S_Status);
1136         gdth_writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
1137
1138         gdth_writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
1139         gdth_writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
1140         gdth_writeb(0, &dp6_ptr->io.event);
1141         retries = INIT_RETRIES;
1142         gdth_delay(20);
1143         while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
1144             if (--retries == 0) {
1145                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1146                 iounmap(ha->brd);
1147                 return 0;
1148             }
1149             gdth_delay(1);
1150         }
1151         prot_ver = (unchar)gdth_readl(&dp6_ptr->u.ic.S_Info[0]);
1152         gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1153         gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1154         if (prot_ver != PROTOCOL_VERSION) {
1155             printk("GDT-PCI: Illegal protocol version\n");
1156             iounmap(ha->brd);
1157             return 0;
1158         }
1159
1160         ha->type = GDT_PCI;
1161         ha->ic_all_size = sizeof(dp6_ptr->u);
1162
1163         /* special command to controller BIOS */
1164         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
1165         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
1166         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
1167         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
1168         gdth_writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
1169         gdth_writeb(0, &dp6_ptr->io.event);
1170         retries = INIT_RETRIES;
1171         gdth_delay(20);
1172         while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
1173             if (--retries == 0) {
1174                 printk("GDT-PCI: Initialization error\n");
1175                 iounmap(ha->brd);
1176                 return 0;
1177             }
1178             gdth_delay(1);
1179         }
1180         gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1181         gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1182
1183         ha->dma64_support = 0;
1184
1185     } else if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
1186         ha->plx = (gdt6c_plx_regs *)pcistr->io;
1187         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
1188             pcistr->dpmem,ha->irq));
1189         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
1190         if (ha->brd == NULL) {
1191             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1192             iounmap(ha->brd);
1193             return 0;
1194         }
1195         /* check and reset interface area */
1196         dp6c_ptr = ha->brd;
1197         gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1198         if (gdth_readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
1199             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1200                    pcistr->dpmem);
1201             found = FALSE;
1202             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1203                 iounmap(ha->brd);
1204                 ha->brd = ioremap(i, sizeof(ushort));
1205                 if (ha->brd == NULL) {
1206                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1207                     return 0;
1208                 }
1209                 if (gdth_readw(ha->brd) != 0xffff) {
1210                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1211                     continue;
1212                 }
1213                 iounmap(ha->brd);
1214                 pci_write_config_dword(pcistr->pdev,
1215                                        PCI_BASE_ADDRESS_2, i);
1216                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1217                 if (ha->brd == NULL) {
1218                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1219                     return 0;
1220                 }
1221                 dp6c_ptr = ha->brd;
1222                 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1223                 if (gdth_readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1224                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1225                     found = TRUE;
1226                     break;
1227                 }
1228             }
1229             if (!found) {
1230                 printk("GDT-PCI: No free address found!\n");
1231                 iounmap(ha->brd);
1232                 return 0;
1233             }
1234         }
1235         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1236         if (gdth_readl(&dp6c_ptr->u) != 0) {
1237             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1238             iounmap(ha->brd);
1239             return 0;
1240         }
1241
1242         /* disable board interrupts, deinit services */
1243         outb(0x00,PTR2USHORT(&ha->plx->control1));
1244         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1245
1246         gdth_writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1247         gdth_writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1248
1249         gdth_writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1250         gdth_writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1251
1252         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1253
1254         retries = INIT_RETRIES;
1255         gdth_delay(20);
1256         while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1257             if (--retries == 0) {
1258                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1259                 iounmap(ha->brd);
1260                 return 0;
1261             }
1262             gdth_delay(1);
1263         }
1264         prot_ver = (unchar)gdth_readl(&dp6c_ptr->u.ic.S_Info[0]);
1265         gdth_writeb(0, &dp6c_ptr->u.ic.Status);
1266         if (prot_ver != PROTOCOL_VERSION) {
1267             printk("GDT-PCI: Illegal protocol version\n");
1268             iounmap(ha->brd);
1269             return 0;
1270         }
1271
1272         ha->type = GDT_PCINEW;
1273         ha->ic_all_size = sizeof(dp6c_ptr->u);
1274
1275         /* special command to controller BIOS */
1276         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1277         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1278         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1279         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1280         gdth_writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1281
1282         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1283
1284         retries = INIT_RETRIES;
1285         gdth_delay(20);
1286         while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1287             if (--retries == 0) {
1288                 printk("GDT-PCI: Initialization error\n");
1289                 iounmap(ha->brd);
1290                 return 0;
1291             }
1292             gdth_delay(1);
1293         }
1294         gdth_writeb(0, &dp6c_ptr->u.ic.S_Status);
1295
1296         ha->dma64_support = 0;
1297
1298     } else {                                            /* MPR */
1299         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1300         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1301         if (ha->brd == NULL) {
1302             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1303             return 0;
1304         }
1305
1306         /* manipulate config. space to enable DPMEM, start RP controller */
1307         pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1308         command |= 6;
1309         pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1310         if (pci_resource_start(pcistr->pdev, 8) == 1UL)
1311             pci_resource_start(pcistr->pdev, 8) = 0UL;
1312         i = 0xFEFF0001UL;
1313         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1314         gdth_delay(1);
1315         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1316                                pci_resource_start(pcistr->pdev, 8));
1317
1318         dp6m_ptr = ha->brd;
1319
1320         /* Ensure that it is safe to access the non HW portions of DPMEM.
1321          * Aditional check needed for Xscale based RAID controllers */
1322         while( ((int)gdth_readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1323             gdth_delay(1);
1324
1325         /* check and reset interface area */
1326         gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1327         if (gdth_readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1328             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1329                    pcistr->dpmem);
1330             found = FALSE;
1331             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1332                 iounmap(ha->brd);
1333                 ha->brd = ioremap(i, sizeof(ushort));
1334                 if (ha->brd == NULL) {
1335                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1336                     return 0;
1337                 }
1338                 if (gdth_readw(ha->brd) != 0xffff) {
1339                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1340                     continue;
1341                 }
1342                 iounmap(ha->brd);
1343                 pci_write_config_dword(pcistr->pdev,
1344                                        PCI_BASE_ADDRESS_0, i);
1345                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1346                 if (ha->brd == NULL) {
1347                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1348                     return 0;
1349                 }
1350                 dp6m_ptr = ha->brd;
1351                 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1352                 if (gdth_readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1353                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1354                     found = TRUE;
1355                     break;
1356                 }
1357             }
1358             if (!found) {
1359                 printk("GDT-PCI: No free address found!\n");
1360                 iounmap(ha->brd);
1361                 return 0;
1362             }
1363         }
1364         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1365
1366         /* disable board interrupts, deinit services */
1367         gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1368                     &dp6m_ptr->i960r.edoor_en_reg);
1369         gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1370         gdth_writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1371         gdth_writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1372
1373         gdth_writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1374         gdth_writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1375         gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1376         retries = INIT_RETRIES;
1377         gdth_delay(20);
1378         while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1379             if (--retries == 0) {
1380                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1381                 iounmap(ha->brd);
1382                 return 0;
1383             }
1384             gdth_delay(1);
1385         }
1386         prot_ver = (unchar)gdth_readl(&dp6m_ptr->u.ic.S_Info[0]);
1387         gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1388         if (prot_ver != PROTOCOL_VERSION) {
1389             printk("GDT-PCI: Illegal protocol version\n");
1390             iounmap(ha->brd);
1391             return 0;
1392         }
1393
1394         ha->type = GDT_PCIMPR;
1395         ha->ic_all_size = sizeof(dp6m_ptr->u);
1396
1397         /* special command to controller BIOS */
1398         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1399         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1400         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1401         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1402         gdth_writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1403         gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1404         retries = INIT_RETRIES;
1405         gdth_delay(20);
1406         while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1407             if (--retries == 0) {
1408                 printk("GDT-PCI: Initialization error\n");
1409                 iounmap(ha->brd);
1410                 return 0;
1411             }
1412             gdth_delay(1);
1413         }
1414         gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1415
1416         /* read FW version to detect 64-bit DMA support */
1417         gdth_writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1418         gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1419         retries = INIT_RETRIES;
1420         gdth_delay(20);
1421         while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1422             if (--retries == 0) {
1423                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1424                 iounmap(ha->brd);
1425                 return 0;
1426             }
1427             gdth_delay(1);
1428         }
1429         prot_ver = (unchar)(gdth_readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1430         gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1431         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1432             ha->dma64_support = 0;
1433         else
1434             ha->dma64_support = 1;
1435     }
1436
1437     return 1;
1438 }
1439
1440
1441 /* controller protocol functions */
1442
1443 static void __init gdth_enable_int(int hanum)
1444 {
1445     gdth_ha_str *ha;
1446     ulong flags;
1447     gdt2_dpram_str __iomem *dp2_ptr;
1448     gdt6_dpram_str __iomem *dp6_ptr;
1449     gdt6m_dpram_str __iomem *dp6m_ptr;
1450
1451     TRACE(("gdth_enable_int() hanum %d\n",hanum));
1452     ha = HADATA(gdth_ctr_tab[hanum]);
1453     spin_lock_irqsave(&ha->smp_lock, flags);
1454
1455     if (ha->type == GDT_EISA) {
1456         outb(0xff, ha->bmic + EDOORREG);
1457         outb(0xff, ha->bmic + EDENABREG);
1458         outb(0x01, ha->bmic + EINTENABREG);
1459     } else if (ha->type == GDT_ISA) {
1460         dp2_ptr = ha->brd;
1461         gdth_writeb(1, &dp2_ptr->io.irqdel);
1462         gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1463         gdth_writeb(1, &dp2_ptr->io.irqen);
1464     } else if (ha->type == GDT_PCI) {
1465         dp6_ptr = ha->brd;
1466         gdth_writeb(1, &dp6_ptr->io.irqdel);
1467         gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1468         gdth_writeb(1, &dp6_ptr->io.irqen);
1469     } else if (ha->type == GDT_PCINEW) {
1470         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1471         outb(0x03, PTR2USHORT(&ha->plx->control1));
1472     } else if (ha->type == GDT_PCIMPR) {
1473         dp6m_ptr = ha->brd;
1474         gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1475         gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1476                     &dp6m_ptr->i960r.edoor_en_reg);
1477     }
1478     spin_unlock_irqrestore(&ha->smp_lock, flags);
1479 }
1480
1481
1482 static int gdth_get_status(unchar *pIStatus,int irq)
1483 {
1484     register gdth_ha_str *ha;
1485     int i;
1486
1487     TRACE(("gdth_get_status() irq %d ctr_count %d\n",
1488            irq,gdth_ctr_count));
1489
1490     *pIStatus = 0;
1491     for (i=0; i<gdth_ctr_count; ++i) {
1492         ha = HADATA(gdth_ctr_tab[i]);
1493         if (ha->irq != (unchar)irq)             /* check IRQ */
1494             continue;
1495         if (ha->type == GDT_EISA)
1496             *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1497         else if (ha->type == GDT_ISA)
1498             *pIStatus =
1499                 gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1500         else if (ha->type == GDT_PCI)
1501             *pIStatus =
1502                 gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1503         else if (ha->type == GDT_PCINEW)
1504             *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1505         else if (ha->type == GDT_PCIMPR)
1506             *pIStatus =
1507                 gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1508
1509         if (*pIStatus)
1510             return i;                           /* board found */
1511     }
1512     return -1;
1513 }
1514
1515
1516 static int gdth_test_busy(int hanum)
1517 {
1518     register gdth_ha_str *ha;
1519     register int gdtsema0 = 0;
1520
1521     TRACE(("gdth_test_busy() hanum %d\n",hanum));
1522
1523     ha = HADATA(gdth_ctr_tab[hanum]);
1524     if (ha->type == GDT_EISA)
1525         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1526     else if (ha->type == GDT_ISA)
1527         gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1528     else if (ha->type == GDT_PCI)
1529         gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1530     else if (ha->type == GDT_PCINEW)
1531         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1532     else if (ha->type == GDT_PCIMPR)
1533         gdtsema0 =
1534             (int)gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1535
1536     return (gdtsema0 & 1);
1537 }
1538
1539
1540 static int gdth_get_cmd_index(int hanum)
1541 {
1542     register gdth_ha_str *ha;
1543     int i;
1544
1545     TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
1546
1547     ha = HADATA(gdth_ctr_tab[hanum]);
1548     for (i=0; i<GDTH_MAXCMDS; ++i) {
1549         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1550             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1551             ha->cmd_tab[i].service = ha->pccb->Service;
1552             ha->pccb->CommandIndex = (ulong32)i+2;
1553             return (i+2);
1554         }
1555     }
1556     return 0;
1557 }
1558
1559
1560 static void gdth_set_sema0(int hanum)
1561 {
1562     register gdth_ha_str *ha;
1563
1564     TRACE(("gdth_set_sema0() hanum %d\n",hanum));
1565
1566     ha = HADATA(gdth_ctr_tab[hanum]);
1567     if (ha->type == GDT_EISA) {
1568         outb(1, ha->bmic + SEMA0REG);
1569     } else if (ha->type == GDT_ISA) {
1570         gdth_writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1571     } else if (ha->type == GDT_PCI) {
1572         gdth_writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1573     } else if (ha->type == GDT_PCINEW) {
1574         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1575     } else if (ha->type == GDT_PCIMPR) {
1576         gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1577     }
1578 }
1579
1580
1581 static void gdth_copy_command(int hanum)
1582 {
1583     register gdth_ha_str *ha;
1584     register gdth_cmd_str *cmd_ptr;
1585     register gdt6m_dpram_str __iomem *dp6m_ptr;
1586     register gdt6c_dpram_str __iomem *dp6c_ptr;
1587     gdt6_dpram_str __iomem *dp6_ptr;
1588     gdt2_dpram_str __iomem *dp2_ptr;
1589     ushort cp_count,dp_offset,cmd_no;
1590
1591     TRACE(("gdth_copy_command() hanum %d\n",hanum));
1592
1593     ha = HADATA(gdth_ctr_tab[hanum]);
1594     cp_count = ha->cmd_len;
1595     dp_offset= ha->cmd_offs_dpmem;
1596     cmd_no   = ha->cmd_cnt;
1597     cmd_ptr  = ha->pccb;
1598
1599     ++ha->cmd_cnt;
1600     if (ha->type == GDT_EISA)
1601         return;                                 /* no DPMEM, no copy */
1602
1603     /* set cpcount dword aligned */
1604     if (cp_count & 3)
1605         cp_count += (4 - (cp_count & 3));
1606
1607     ha->cmd_offs_dpmem += cp_count;
1608
1609     /* set offset and service, copy command to DPMEM */
1610     if (ha->type == GDT_ISA) {
1611         dp2_ptr = ha->brd;
1612         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1613                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1614         gdth_writew((ushort)cmd_ptr->Service,
1615                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1616         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1617     } else if (ha->type == GDT_PCI) {
1618         dp6_ptr = ha->brd;
1619         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1620                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1621         gdth_writew((ushort)cmd_ptr->Service,
1622                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1623         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1624     } else if (ha->type == GDT_PCINEW) {
1625         dp6c_ptr = ha->brd;
1626         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1627                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1628         gdth_writew((ushort)cmd_ptr->Service,
1629                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1630         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1631     } else if (ha->type == GDT_PCIMPR) {
1632         dp6m_ptr = ha->brd;
1633         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1634                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1635         gdth_writew((ushort)cmd_ptr->Service,
1636                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1637         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1638     }
1639 }
1640
1641
1642 static void gdth_release_event(int hanum)
1643 {
1644     register gdth_ha_str *ha;
1645
1646     TRACE(("gdth_release_event() hanum %d\n",hanum));
1647     ha = HADATA(gdth_ctr_tab[hanum]);
1648
1649 #ifdef GDTH_STATISTICS
1650     {
1651         ulong32 i,j;
1652         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1653             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1654                 ++i;
1655         }
1656         if (max_index < i) {
1657             max_index = i;
1658             TRACE3(("GDT: max_index = %d\n",(ushort)i));
1659         }
1660     }
1661 #endif
1662
1663     if (ha->pccb->OpCode == GDT_INIT)
1664         ha->pccb->Service |= 0x80;
1665
1666     if (ha->type == GDT_EISA) {
1667         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1668             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1669         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1670     } else if (ha->type == GDT_ISA) {
1671         gdth_writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1672     } else if (ha->type == GDT_PCI) {
1673         gdth_writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1674     } else if (ha->type == GDT_PCINEW) {
1675         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1676     } else if (ha->type == GDT_PCIMPR) {
1677         gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1678     }
1679 }
1680
1681
1682 static int gdth_wait(int hanum,int index,ulong32 time)
1683 {
1684     gdth_ha_str *ha;
1685     int answer_found = FALSE;
1686
1687     TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
1688
1689     ha = HADATA(gdth_ctr_tab[hanum]);
1690     if (index == 0)
1691         return 1;                               /* no wait required */
1692
1693     gdth_from_wait = TRUE;
1694     do {
1695         gdth_interrupt((int)ha->irq,ha,NULL);
1696         if (wait_hanum==hanum && wait_index==index) {
1697             answer_found = TRUE;
1698             break;
1699         }
1700         gdth_delay(1);
1701     } while (--time);
1702     gdth_from_wait = FALSE;
1703
1704     while (gdth_test_busy(hanum))
1705         gdth_delay(0);
1706
1707     return (answer_found);
1708 }
1709
1710
1711 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
1712                              ulong64 p2,ulong64 p3)
1713 {
1714     register gdth_ha_str *ha;
1715     register gdth_cmd_str *cmd_ptr;
1716     int retries,index;
1717
1718     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1719
1720     ha = HADATA(gdth_ctr_tab[hanum]);
1721     cmd_ptr = ha->pccb;
1722     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1723
1724     /* make command  */
1725     for (retries = INIT_RETRIES;;) {
1726         cmd_ptr->Service          = service;
1727         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1728         if (!(index=gdth_get_cmd_index(hanum))) {
1729             TRACE(("GDT: No free command index found\n"));
1730             return 0;
1731         }
1732         gdth_set_sema0(hanum);
1733         cmd_ptr->OpCode           = opcode;
1734         cmd_ptr->BoardNode        = LOCALBOARD;
1735         if (service == CACHESERVICE) {
1736             if (opcode == GDT_IOCTL) {
1737                 cmd_ptr->u.ioctl.subfunc = p1;
1738                 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1739                 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1740                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1741             } else {
1742                 if (ha->cache_feat & GDT_64BIT) {
1743                     cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1744                     cmd_ptr->u.cache64.BlockNo  = p2;
1745                 } else {
1746                     cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1747                     cmd_ptr->u.cache.BlockNo  = (ulong32)p2;
1748                 }
1749             }
1750         } else if (service == SCSIRAWSERVICE) {
1751             if (ha->raw_feat & GDT_64BIT) {
1752                 cmd_ptr->u.raw64.direction  = p1;
1753                 cmd_ptr->u.raw64.bus        = (unchar)p2;
1754                 cmd_ptr->u.raw64.target     = (unchar)p3;
1755                 cmd_ptr->u.raw64.lun        = (unchar)(p3 >> 8);
1756             } else {
1757                 cmd_ptr->u.raw.direction  = p1;
1758                 cmd_ptr->u.raw.bus        = (unchar)p2;
1759                 cmd_ptr->u.raw.target     = (unchar)p3;
1760                 cmd_ptr->u.raw.lun        = (unchar)(p3 >> 8);
1761             }
1762         } else if (service == SCREENSERVICE) {
1763             if (opcode == GDT_REALTIME) {
1764                 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1765                 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1766                 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1767             }
1768         }
1769         ha->cmd_len          = sizeof(gdth_cmd_str);
1770         ha->cmd_offs_dpmem   = 0;
1771         ha->cmd_cnt          = 0;
1772         gdth_copy_command(hanum);
1773         gdth_release_event(hanum);
1774         gdth_delay(20);
1775         if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
1776             printk("GDT: Initialization error (timeout service %d)\n",service);
1777             return 0;
1778         }
1779         if (ha->status != S_BSY || --retries == 0)
1780             break;
1781         gdth_delay(1);
1782     }
1783
1784     return (ha->status != S_OK ? 0:1);
1785 }
1786
1787
1788 /* search for devices */
1789
1790 static int __init gdth_search_drives(int hanum)
1791 {
1792     register gdth_ha_str *ha;
1793     ushort cdev_cnt, i;
1794     int ok;
1795     ulong32 bus_no, drv_cnt, drv_no, j;
1796     gdth_getch_str *chn;
1797     gdth_drlist_str *drl;
1798     gdth_iochan_str *ioc;
1799     gdth_raw_iochan_str *iocr;
1800     gdth_arcdl_str *alst;
1801     gdth_alist_str *alst2;
1802     gdth_oem_str_ioctl *oemstr;
1803 #ifdef INT_COAL
1804     gdth_perf_modes *pmod;
1805 #endif
1806
1807 #ifdef GDTH_RTC
1808     unchar rtc[12];
1809     ulong flags;
1810 #endif
1811
1812     TRACE(("gdth_search_drives() hanum %d\n",hanum));
1813     ha = HADATA(gdth_ctr_tab[hanum]);
1814     ok = 0;
1815
1816     /* initialize controller services, at first: screen service */
1817     ha->screen_feat = 0;
1818     if (!force_dma32) {
1819         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_X_INIT_SCR,0,0,0);
1820         if (ok)
1821             ha->screen_feat = GDT_64BIT;
1822     }
1823     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1824         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0);
1825     if (!ok) {
1826         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1827                hanum, ha->status);
1828         return 0;
1829     }
1830     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1831
1832 #ifdef GDTH_RTC
1833     /* read realtime clock info, send to controller */
1834     /* 1. wait for the falling edge of update flag */
1835     spin_lock_irqsave(&rtc_lock, flags);
1836     for (j = 0; j < 1000000; ++j)
1837         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1838             break;
1839     for (j = 0; j < 1000000; ++j)
1840         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1841             break;
1842     /* 2. read info */
1843     do {
1844         for (j = 0; j < 12; ++j)
1845             rtc[j] = CMOS_READ(j);
1846     } while (rtc[0] != CMOS_READ(0));
1847     spin_lock_irqrestore(&rtc_lock, flags);
1848     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1849             *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1850     /* 3. send to controller firmware */
1851     gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
1852                       *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1853 #endif
1854
1855     /* unfreeze all IOs */
1856     gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
1857
1858     /* initialize cache service */
1859     ha->cache_feat = 0;
1860     if (!force_dma32) {
1861         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INIT_HOST,LINUX_OS,0,0);
1862         if (ok)
1863             ha->cache_feat = GDT_64BIT;
1864     }
1865     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1866         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0);
1867     if (!ok) {
1868         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1869                hanum, ha->status);
1870         return 0;
1871     }
1872     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1873     cdev_cnt = (ushort)ha->info;
1874     ha->fw_vers = ha->service;
1875
1876 #ifdef INT_COAL
1877     if (ha->type == GDT_PCIMPR) {
1878         /* set perf. modes */
1879         pmod = (gdth_perf_modes *)ha->pscratch;
1880         pmod->version          = 1;
1881         pmod->st_mode          = 1;    /* enable one status buffer */
1882         *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1883         pmod->st_buff_indx1    = COALINDEX;
1884         pmod->st_buff_addr2    = 0;
1885         pmod->st_buff_u_addr2  = 0;
1886         pmod->st_buff_indx2    = 0;
1887         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1888         pmod->cmd_mode         = 0;    // disable all cmd buffers
1889         pmod->cmd_buff_addr1   = 0;
1890         pmod->cmd_buff_u_addr1 = 0;
1891         pmod->cmd_buff_indx1   = 0;
1892         pmod->cmd_buff_addr2   = 0;
1893         pmod->cmd_buff_u_addr2 = 0;
1894         pmod->cmd_buff_indx2   = 0;
1895         pmod->cmd_buff_size    = 0;
1896         pmod->reserved1        = 0;
1897         pmod->reserved2        = 0;
1898         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,SET_PERF_MODES,
1899                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
1900             printk("GDT-HA %d: Interrupt coalescing activated\n", hanum);
1901         }
1902     }
1903 #endif
1904
1905     /* detect number of buses - try new IOCTL */
1906     iocr = (gdth_raw_iochan_str *)ha->pscratch;
1907     iocr->hdr.version        = 0xffffffff;
1908     iocr->hdr.list_entries   = MAXBUS;
1909     iocr->hdr.first_chan     = 0;
1910     iocr->hdr.last_chan      = MAXBUS-1;
1911     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
1912     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
1913                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
1914         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1915         ha->bus_cnt = iocr->hdr.chan_count;
1916         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1917             if (iocr->list[bus_no].proc_id < MAXID)
1918                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
1919             else
1920                 ha->bus_id[bus_no] = 0xff;
1921         }
1922     } else {
1923         /* old method */
1924         chn = (gdth_getch_str *)ha->pscratch;
1925         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
1926             chn->channel_no = bus_no;
1927             if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
1928                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
1929                                    IO_CHANNEL | INVALID_CHANNEL,
1930                                    sizeof(gdth_getch_str))) {
1931                 if (bus_no == 0) {
1932                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1933                            hanum, ha->status);
1934                     return 0;
1935                 }
1936                 break;
1937             }
1938             if (chn->siop_id < MAXID)
1939                 ha->bus_id[bus_no] = chn->siop_id;
1940             else
1941                 ha->bus_id[bus_no] = 0xff;
1942         }
1943         ha->bus_cnt = (unchar)bus_no;
1944     }
1945     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1946
1947     /* read cache configuration */
1948     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
1949                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
1950         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1951                hanum, ha->status);
1952         return 0;
1953     }
1954     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
1955     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1956             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
1957             ha->cpar.write_back,ha->cpar.block_size));
1958
1959     /* read board info and features */
1960     ha->more_proc = FALSE;
1961     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
1962                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
1963         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
1964                sizeof(gdth_binfo_str));
1965         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
1966                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
1967             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1968             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
1969             ha->more_proc = TRUE;
1970         }
1971     } else {
1972         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1973         strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
1974     }
1975     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
1976
1977     /* read more informations */
1978     if (ha->more_proc) {
1979         /* physical drives, channel addresses */
1980         ioc = (gdth_iochan_str *)ha->pscratch;
1981         ioc->hdr.version        = 0xffffffff;
1982         ioc->hdr.list_entries   = MAXBUS;
1983         ioc->hdr.first_chan     = 0;
1984         ioc->hdr.last_chan      = MAXBUS-1;
1985         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
1986         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
1987                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
1988             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1989                 ha->raw[bus_no].address = ioc->list[bus_no].address;
1990                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
1991             }
1992         } else {
1993             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1994                 ha->raw[bus_no].address = IO_CHANNEL;
1995                 ha->raw[bus_no].local_no = bus_no;
1996             }
1997         }
1998         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1999             chn = (gdth_getch_str *)ha->pscratch;
2000             chn->channel_no = ha->raw[bus_no].local_no;
2001             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2002                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
2003                                   ha->raw[bus_no].address | INVALID_CHANNEL,
2004                                   sizeof(gdth_getch_str))) {
2005                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
2006                 TRACE2(("Channel %d: %d phys. drives\n",
2007                         bus_no,chn->drive_cnt));
2008             }
2009             if (ha->raw[bus_no].pdev_cnt > 0) {
2010                 drl = (gdth_drlist_str *)ha->pscratch;
2011                 drl->sc_no = ha->raw[bus_no].local_no;
2012                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
2013                 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2014                                       SCSI_DR_LIST | L_CTRL_PATTERN,
2015                                       ha->raw[bus_no].address | INVALID_CHANNEL,
2016                                       sizeof(gdth_drlist_str))) {
2017                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
2018                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
2019                 } else {
2020                     ha->raw[bus_no].pdev_cnt = 0;
2021                 }
2022             }
2023         }
2024
2025         /* logical drives */
2026         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
2027                               INVALID_CHANNEL,sizeof(ulong32))) {
2028             drv_cnt = *(ulong32 *)ha->pscratch;
2029             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
2030                                   INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
2031                 for (j = 0; j < drv_cnt; ++j) {
2032                     drv_no = ((ulong32 *)ha->pscratch)[j];
2033                     if (drv_no < MAX_LDRIVES) {
2034                         ha->hdr[drv_no].is_logdrv = TRUE;
2035                         TRACE2(("Drive %d is log. drive\n",drv_no));
2036                     }
2037                 }
2038             }
2039             alst = (gdth_arcdl_str *)ha->pscratch;
2040             alst->entries_avail = MAX_LDRIVES;
2041             alst->first_entry = 0;
2042             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
2043             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2044                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
2045                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
2046                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
2047                 for (j = 0; j < alst->entries_init; ++j) {
2048                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
2049                     ha->hdr[j].is_master = alst->list[j].is_master;
2050                     ha->hdr[j].is_parity = alst->list[j].is_parity;
2051                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
2052                     ha->hdr[j].master_no = alst->list[j].cd_handle;
2053                 }
2054             } else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2055                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
2056                                          0, 35 * sizeof(gdth_alist_str))) {
2057                 for (j = 0; j < 35; ++j) {
2058                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
2059                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
2060                     ha->hdr[j].is_master = alst2->is_master;
2061                     ha->hdr[j].is_parity = alst2->is_parity;
2062                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
2063                     ha->hdr[j].master_no = alst2->cd_handle;
2064                 }
2065             }
2066         }
2067     }
2068
2069     /* initialize raw service */
2070     ha->raw_feat = 0;
2071     if (!force_dma32) {
2072         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_X_INIT_RAW,0,0,0);
2073         if (ok)
2074             ha->raw_feat = GDT_64BIT;
2075     }
2076     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
2077         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0);
2078     if (!ok) {
2079         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
2080                hanum, ha->status);
2081         return 0;
2082     }
2083     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
2084
2085     /* set/get features raw service (scatter/gather) */
2086     if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
2087                           0,0)) {
2088         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
2089         if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
2090             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
2091                     ha->info));
2092             ha->raw_feat |= (ushort)ha->info;
2093         }
2094     }
2095
2096     /* set/get features cache service (equal to raw service) */
2097     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
2098                           SCATTER_GATHER,0)) {
2099         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
2100         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
2101             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
2102                     ha->info));
2103             ha->cache_feat |= (ushort)ha->info;
2104         }
2105     }
2106
2107     /* reserve drives for raw service */
2108     if (reserve_mode != 0) {
2109         gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
2110                           reserve_mode == 1 ? 1 : 3, 0, 0);
2111         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
2112                 ha->status));
2113     }
2114     for (i = 0; i < MAX_RES_ARGS; i += 4) {
2115         if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
2116             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
2117             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
2118                     reserve_list[i], reserve_list[i+1],
2119                     reserve_list[i+2], reserve_list[i+3]));
2120             if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
2121                                    reserve_list[i+1], reserve_list[i+2] |
2122                                    (reserve_list[i+3] << 8))) {
2123                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
2124                        hanum, ha->status);
2125              }
2126         }
2127     }
2128
2129     /* Determine OEM string using IOCTL */
2130     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
2131     oemstr->params.ctl_version = 0x01;
2132     oemstr->params.buffer_size = sizeof(oemstr->text);
2133     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2134                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
2135                           sizeof(gdth_oem_str_ioctl))) {
2136         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
2137         printk("GDT-HA %d: Vendor: %s Name: %s\n",
2138                hanum,oemstr->text.oem_company_name,ha->binfo.type_string);
2139         /* Save the Host Drive inquiry data */
2140 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2141         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
2142                 sizeof(ha->oem_name));
2143 #else
2144         strncpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,7);
2145         ha->oem_name[7] = '\0';
2146 #endif
2147     } else {
2148         /* Old method, based on PCI ID */
2149         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
2150         printk("GDT-HA %d: Name: %s\n",
2151                hanum,ha->binfo.type_string);
2152 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2153         if (ha->oem_id == OEM_ID_INTEL)
2154             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
2155         else
2156             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
2157 #else
2158         if (ha->oem_id == OEM_ID_INTEL)
2159             strcpy(ha->oem_name,"Intel  ");
2160         else
2161             strcpy(ha->oem_name,"ICP    ");
2162 #endif
2163     }
2164
2165     /* scanning for host drives */
2166     for (i = 0; i < cdev_cnt; ++i)
2167         gdth_analyse_hdrive(hanum,i);
2168
2169     TRACE(("gdth_search_drives() OK\n"));
2170     return 1;
2171 }
2172
2173 static int gdth_analyse_hdrive(int hanum,ushort hdrive)
2174 {
2175     register gdth_ha_str *ha;
2176     ulong32 drv_cyls;
2177     int drv_hds, drv_secs;
2178
2179     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
2180     if (hdrive >= MAX_HDRIVES)
2181         return 0;
2182     ha = HADATA(gdth_ctr_tab[hanum]);
2183
2184     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
2185         return 0;
2186     ha->hdr[hdrive].present = TRUE;
2187     ha->hdr[hdrive].size = ha->info;
2188
2189     /* evaluate mapping (sectors per head, heads per cylinder) */
2190     ha->hdr[hdrive].size &= ~SECS32;
2191     if (ha->info2 == 0) {
2192         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
2193     } else {
2194         drv_hds = ha->info2 & 0xff;
2195         drv_secs = (ha->info2 >> 8) & 0xff;
2196         drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
2197     }
2198     ha->hdr[hdrive].heads = (unchar)drv_hds;
2199     ha->hdr[hdrive].secs  = (unchar)drv_secs;
2200     /* round size */
2201     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
2202
2203     if (ha->cache_feat & GDT_64BIT) {
2204         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INFO,hdrive,0,0)
2205             && ha->info2 != 0) {
2206             ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
2207         }
2208     }
2209     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
2210             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
2211
2212     /* get informations about device */
2213     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
2214         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
2215                 hdrive,ha->info));
2216         ha->hdr[hdrive].devtype = (ushort)ha->info;
2217     }
2218
2219     /* cluster info */
2220     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
2221         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
2222                 hdrive,ha->info));
2223         if (!shared_access)
2224             ha->hdr[hdrive].cluster_type = (unchar)ha->info;
2225     }
2226
2227     /* R/W attributes */
2228     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
2229         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
2230                 hdrive,ha->info));
2231         ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
2232     }
2233
2234     return 1;
2235 }
2236
2237
2238 /* command queueing/sending functions */
2239
2240 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
2241 {
2242     register gdth_ha_str *ha;
2243     register Scsi_Cmnd *pscp;
2244     register Scsi_Cmnd *nscp;
2245     ulong flags;
2246     unchar b, t;
2247
2248     TRACE(("gdth_putq() priority %d\n",priority));
2249     ha = HADATA(gdth_ctr_tab[hanum]);
2250     spin_lock_irqsave(&ha->smp_lock, flags);
2251
2252     scp->SCp.this_residual = (int)priority;
2253     b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
2254     t = scp->device->id;
2255     if (priority >= DEFAULT_PRI) {
2256         if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2257             (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) {
2258             TRACE2(("gdth_putq(): locked IO -> update_timeout()\n"));
2259             scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
2260         }
2261     }
2262
2263     if (ha->req_first==NULL) {
2264         ha->req_first = scp;                    /* queue was empty */
2265         scp->SCp.ptr = NULL;
2266     } else {                                    /* queue not empty */
2267         pscp = ha->req_first;
2268         nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2269         /* priority: 0-highest,..,0xff-lowest */
2270         while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
2271             pscp = nscp;
2272             nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2273         }
2274         pscp->SCp.ptr = (char *)scp;
2275         scp->SCp.ptr  = (char *)nscp;
2276     }
2277     spin_unlock_irqrestore(&ha->smp_lock, flags);
2278
2279 #ifdef GDTH_STATISTICS
2280     flags = 0;
2281     for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2282         ++flags;
2283     if (max_rq < flags) {
2284         max_rq = flags;
2285         TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2286     }
2287 #endif
2288 }
2289
2290 static void gdth_next(int hanum)
2291 {
2292     register gdth_ha_str *ha;
2293     register Scsi_Cmnd *pscp;
2294     register Scsi_Cmnd *nscp;
2295     unchar b, t, l, firsttime;
2296     unchar this_cmd, next_cmd;
2297     ulong flags = 0;
2298     int cmd_index;
2299
2300     TRACE(("gdth_next() hanum %d\n",hanum));
2301     ha = HADATA(gdth_ctr_tab[hanum]);
2302     if (!gdth_polling)
2303         spin_lock_irqsave(&ha->smp_lock, flags);
2304
2305     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2306     this_cmd = firsttime = TRUE;
2307     next_cmd = gdth_polling ? FALSE:TRUE;
2308     cmd_index = 0;
2309
2310     for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2311         if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2312             pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2313         b = virt_ctr ? NUMDATA(nscp->device->host)->busnum : nscp->device->channel;
2314         t = nscp->device->id;
2315         l = nscp->device->lun;
2316         if (nscp->SCp.this_residual >= DEFAULT_PRI) {
2317             if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2318                 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2319                 continue;
2320         }
2321
2322         if (firsttime) {
2323             if (gdth_test_busy(hanum)) {        /* controller busy ? */
2324                 TRACE(("gdth_next() controller %d busy !\n",hanum));
2325                 if (!gdth_polling) {
2326                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2327                     return;
2328                 }
2329                 while (gdth_test_busy(hanum))
2330                     gdth_delay(1);
2331             }
2332             firsttime = FALSE;
2333         }
2334
2335         if (nscp->done != gdth_scsi_done || nscp->cmnd[0] != 0xff) {
2336         if (nscp->SCp.phase == -1) {
2337             nscp->SCp.phase = CACHESERVICE;           /* default: cache svc. */
2338             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2339                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2340                         b, t, l));
2341                 /* TEST_UNIT_READY -> set scan mode */
2342                 if ((ha->scan_mode & 0x0f) == 0) {
2343                     if (b == 0 && t == 0 && l == 0) {
2344                         ha->scan_mode |= 1;
2345                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2346                     }
2347                 } else if ((ha->scan_mode & 0x0f) == 1) {
2348                     if (b == 0 && ((t == 0 && l == 1) ||
2349                          (t == 1 && l == 0))) {
2350                         nscp->SCp.sent_command = GDT_SCAN_START;
2351                         nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2352                             | SCSIRAWSERVICE;
2353                         ha->scan_mode = 0x12;
2354                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2355                                 ha->scan_mode));
2356                     } else {
2357                         ha->scan_mode &= 0x10;
2358                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2359                     }
2360                 } else if (ha->scan_mode == 0x12) {
2361                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2362                         nscp->SCp.phase = SCSIRAWSERVICE;
2363                         nscp->SCp.sent_command = GDT_SCAN_END;
2364                         ha->scan_mode &= 0x10;
2365                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2366                                 ha->scan_mode));
2367                     }
2368                 }
2369             }
2370             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2371                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2372                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2373                 /* always GDT_CLUST_INFO! */
2374                 nscp->SCp.sent_command = GDT_CLUST_INFO;
2375             }
2376         }
2377         }
2378
2379         if (nscp->SCp.sent_command != -1) {
2380             if ((nscp->SCp.phase & 0xff) == CACHESERVICE) {
2381                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2382                     this_cmd = FALSE;
2383                 next_cmd = FALSE;
2384             } else if ((nscp->SCp.phase & 0xff) == SCSIRAWSERVICE) {
2385                 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2386                     this_cmd = FALSE;
2387                 next_cmd = FALSE;
2388             } else {
2389                 memset((char*)nscp->sense_buffer,0,16);
2390                 nscp->sense_buffer[0] = 0x70;
2391                 nscp->sense_buffer[2] = NOT_READY;
2392                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2393                 if (!nscp->SCp.have_data_in)
2394                     nscp->SCp.have_data_in++;
2395                 else
2396                     nscp->scsi_done(nscp);
2397             }
2398         } else if (nscp->done == gdth_scsi_done && nscp->cmnd[0] == 0xff) {
2399             if (!(cmd_index=gdth_special_cmd(hanum,nscp)))
2400                 this_cmd = FALSE;
2401             next_cmd = FALSE;
2402         } else if (b != ha->virt_bus) {
2403             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2404                 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2405                 this_cmd = FALSE;
2406             else
2407                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2408         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2409             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2410                     nscp->cmnd[0], b, t, l));
2411             nscp->result = DID_BAD_TARGET << 16;
2412             if (!nscp->SCp.have_data_in)
2413                 nscp->SCp.have_data_in++;
2414             else
2415                 nscp->scsi_done(nscp);
2416         } else {
2417             switch (nscp->cmnd[0]) {
2418               case TEST_UNIT_READY:
2419               case INQUIRY:
2420               case REQUEST_SENSE:
2421               case READ_CAPACITY:
2422               case VERIFY:
2423               case START_STOP:
2424               case MODE_SENSE:
2425               case SERVICE_ACTION_IN:
2426                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2427                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2428                        nscp->cmnd[4],nscp->cmnd[5]));
2429                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2430                     /* return UNIT_ATTENTION */
2431                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2432                              nscp->cmnd[0], t));
2433                     ha->hdr[t].media_changed = FALSE;
2434                     memset((char*)nscp->sense_buffer,0,16);
2435                     nscp->sense_buffer[0] = 0x70;
2436                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2437                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2438                     if (!nscp->SCp.have_data_in)
2439                         nscp->SCp.have_data_in++;
2440                     else
2441                         nscp->scsi_done(nscp);
2442                 } else if (gdth_internal_cache_cmd(hanum,nscp))
2443                     nscp->scsi_done(nscp);
2444                 break;
2445
2446               case ALLOW_MEDIUM_REMOVAL:
2447                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2448                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2449                        nscp->cmnd[4],nscp->cmnd[5]));
2450                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2451                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2452                     nscp->result = DID_OK << 16;
2453                     nscp->sense_buffer[0] = 0;
2454                     if (!nscp->SCp.have_data_in)
2455                         nscp->SCp.have_data_in++;
2456                     else
2457                         nscp->scsi_done(nscp);
2458                 } else {
2459                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2460                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2461                            nscp->cmnd[4],nscp->cmnd[3]));
2462                     if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2463                         this_cmd = FALSE;
2464                 }
2465                 break;
2466
2467               case RESERVE:
2468               case RELEASE:
2469                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2470                         "RESERVE" : "RELEASE"));
2471                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2472                     this_cmd = FALSE;
2473                 break;
2474
2475               case READ_6:
2476               case WRITE_6:
2477               case READ_10:
2478               case WRITE_10:
2479               case READ_16:
2480               case WRITE_16:
2481                 if (ha->hdr[t].media_changed) {
2482                     /* return UNIT_ATTENTION */
2483                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2484                              nscp->cmnd[0], t));
2485                     ha->hdr[t].media_changed = FALSE;
2486                     memset((char*)nscp->sense_buffer,0,16);
2487                     nscp->sense_buffer[0] = 0x70;
2488                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2489                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2490                     if (!nscp->SCp.have_data_in)
2491                         nscp->SCp.have_data_in++;
2492                     else
2493                         nscp->scsi_done(nscp);
2494                 } else if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2495                     this_cmd = FALSE;
2496                 break;
2497
2498               default:
2499                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2500                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2501                         nscp->cmnd[4],nscp->cmnd[5]));
2502                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2503                        hanum, nscp->cmnd[0]);
2504                 nscp->result = DID_ABORT << 16;
2505                 if (!nscp->SCp.have_data_in)
2506                     nscp->SCp.have_data_in++;
2507                 else
2508                     nscp->scsi_done(nscp);
2509                 break;
2510             }
2511         }
2512
2513         if (!this_cmd)
2514             break;
2515         if (nscp == ha->req_first)
2516             ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2517         else
2518             pscp->SCp.ptr = nscp->SCp.ptr;
2519         if (!next_cmd)
2520             break;
2521     }
2522
2523     if (ha->cmd_cnt > 0) {
2524         gdth_release_event(hanum);
2525     }
2526
2527     if (!gdth_polling)
2528         spin_unlock_irqrestore(&ha->smp_lock, flags);
2529
2530     if (gdth_polling && ha->cmd_cnt > 0) {
2531         if (!gdth_wait(hanum,cmd_index,POLL_TIMEOUT))
2532             printk("GDT-HA %d: Command %d timed out !\n",
2533                    hanum,cmd_index);
2534     }
2535 }
2536
2537 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
2538                                     char *buffer,ushort count)
2539 {
2540     ushort cpcount,i;
2541     ushort cpsum,cpnow;
2542     struct scatterlist *sl;
2543     gdth_ha_str *ha;
2544     char *address;
2545
2546     cpcount = count<=(ushort)scp->bufflen ? count:(ushort)scp->bufflen;
2547     ha = HADATA(gdth_ctr_tab[hanum]);
2548
2549     if (scp->use_sg) {
2550         sl = (struct scatterlist *)scp->request_buffer;
2551         for (i=0,cpsum=0; i<scp->use_sg; ++i,++sl) {
2552             unsigned long flags;
2553             cpnow = (ushort)sl->length;
2554             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2555                           cpnow,cpsum,cpcount,(ushort)scp->bufflen));
2556             if (cpsum+cpnow > cpcount)
2557                 cpnow = cpcount - cpsum;
2558             cpsum += cpnow;
2559             if (!sl->page) {
2560                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2561                        hanum);
2562                 return;
2563             }
2564             local_irq_save(flags);
2565             address = kmap_atomic(sl->page, KM_BIO_SRC_IRQ) + sl->offset;
2566             memcpy(address,buffer,cpnow);
2567             flush_dcache_page(sl->page);
2568             kunmap_atomic(address, KM_BIO_SRC_IRQ);
2569             local_irq_restore(flags);
2570             if (cpsum == cpcount)
2571                 break;
2572             buffer += cpnow;
2573         }
2574     } else {
2575         TRACE(("copy_internal() count %d\n",cpcount));
2576         memcpy((char*)scp->request_buffer,buffer,cpcount);
2577     }
2578 }
2579
2580 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp)
2581 {
2582     register gdth_ha_str *ha;
2583     unchar t;
2584     gdth_inq_data inq;
2585     gdth_rdcap_data rdc;
2586     gdth_sense_data sd;
2587     gdth_modep_data mpd;
2588
2589     ha = HADATA(gdth_ctr_tab[hanum]);
2590     t  = scp->device->id;
2591     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2592            scp->cmnd[0],t));
2593
2594     scp->result = DID_OK << 16;
2595     scp->sense_buffer[0] = 0;
2596
2597     switch (scp->cmnd[0]) {
2598       case TEST_UNIT_READY:
2599       case VERIFY:
2600       case START_STOP:
2601         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2602         break;
2603
2604       case INQUIRY:
2605         TRACE2(("Inquiry hdrive %d devtype %d\n",
2606                 t,ha->hdr[t].devtype));
2607         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2608         /* you can here set all disks to removable, if you want to do
2609            a flush using the ALLOW_MEDIUM_REMOVAL command */
2610         inq.modif_rmb = 0x00;
2611         if ((ha->hdr[t].devtype & 1) ||
2612             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2613             inq.modif_rmb = 0x80;
2614         inq.version   = 2;
2615         inq.resp_aenc = 2;
2616         inq.add_length= 32;
2617         strcpy(inq.vendor,ha->oem_name);
2618         sprintf(inq.product,"Host Drive  #%02d",t);
2619         strcpy(inq.revision,"   ");
2620         gdth_copy_internal_data(hanum,scp,(char*)&inq,sizeof(gdth_inq_data));
2621         break;
2622
2623       case REQUEST_SENSE:
2624         TRACE2(("Request sense hdrive %d\n",t));
2625         sd.errorcode = 0x70;
2626         sd.segno     = 0x00;
2627         sd.key       = NO_SENSE;
2628         sd.info      = 0;
2629         sd.add_length= 0;
2630         gdth_copy_internal_data(hanum,scp,(char*)&sd,sizeof(gdth_sense_data));
2631         break;
2632
2633       case MODE_SENSE:
2634         TRACE2(("Mode sense hdrive %d\n",t));
2635         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2636         mpd.hd.data_length = sizeof(gdth_modep_data);
2637         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2638         mpd.hd.bd_length   = sizeof(mpd.bd);
2639         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2640         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2641         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2642         gdth_copy_internal_data(hanum,scp,(char*)&mpd,sizeof(gdth_modep_data));
2643         break;
2644
2645       case READ_CAPACITY:
2646         TRACE2(("Read capacity hdrive %d\n",t));
2647         if (ha->hdr[t].size > (ulong64)0xffffffff)
2648             rdc.last_block_no = 0xffffffff;
2649         else
2650             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2651         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2652         gdth_copy_internal_data(hanum,scp,(char*)&rdc,sizeof(gdth_rdcap_data));
2653         break;
2654
2655       case SERVICE_ACTION_IN:
2656         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2657             (ha->cache_feat & GDT_64BIT)) {
2658             gdth_rdcap16_data rdc16;
2659
2660             TRACE2(("Read capacity (16) hdrive %d\n",t));
2661             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2662             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2663             gdth_copy_internal_data(hanum,scp,(char*)&rdc16,sizeof(gdth_rdcap16_data));
2664         } else {
2665             scp->result = DID_ABORT << 16;
2666         }
2667         break;
2668
2669       default:
2670         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2671         break;
2672     }
2673
2674     if (!scp->SCp.have_data_in)
2675         scp->SCp.have_data_in++;
2676     else
2677         return 1;
2678
2679     return 0;
2680 }
2681
2682 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive)
2683 {
2684     register gdth_ha_str *ha;
2685     register gdth_cmd_str *cmdp;
2686     struct scatterlist *sl;
2687     ulong32 cnt, blockcnt;
2688     ulong64 no, blockno;
2689     dma_addr_t phys_addr;
2690     int i, cmd_index, read_write, sgcnt, mode64;
2691     struct page *page;
2692     ulong offset;
2693
2694     ha = HADATA(gdth_ctr_tab[hanum]);
2695     cmdp = ha->pccb;
2696     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2697                  scp->cmnd[0],scp->cmd_len,hdrive));
2698
2699     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2700         return 0;
2701
2702     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2703     /* test for READ_16, WRITE_16 if !mode64 ? ---
2704        not required, should not occur due to error return on
2705        READ_CAPACITY_16 */
2706
2707     cmdp->Service = CACHESERVICE;
2708     cmdp->RequestBuffer = scp;
2709     /* search free command index */
2710     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2711         TRACE(("GDT: No free command index found\n"));
2712         return 0;
2713     }
2714     /* if it's the first command, set command semaphore */
2715     if (ha->cmd_cnt == 0)
2716         gdth_set_sema0(hanum);
2717
2718     /* fill command */
2719     read_write = 0;
2720     if (scp->SCp.sent_command != -1)
2721         cmdp->OpCode = scp->SCp.sent_command;   /* special cache cmd. */
2722     else if (scp->cmnd[0] == RESERVE)
2723         cmdp->OpCode = GDT_RESERVE_DRV;
2724     else if (scp->cmnd[0] == RELEASE)
2725         cmdp->OpCode = GDT_RELEASE_DRV;
2726     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2727         if (scp->cmnd[4] & 1)                   /* prevent ? */
2728             cmdp->OpCode = GDT_MOUNT;
2729         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2730             cmdp->OpCode = GDT_UNMOUNT;
2731         else
2732             cmdp->OpCode = GDT_FLUSH;
2733     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2734                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2735     ) {
2736         read_write = 1;
2737         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2738                                    (ha->cache_feat & GDT_WR_THROUGH)))
2739             cmdp->OpCode = GDT_WRITE_THR;
2740         else
2741             cmdp->OpCode = GDT_WRITE;
2742     } else {
2743         read_write = 2;
2744         cmdp->OpCode = GDT_READ;
2745     }
2746
2747     cmdp->BoardNode = LOCALBOARD;
2748     if (mode64) {
2749         cmdp->u.cache64.DeviceNo = hdrive;
2750         cmdp->u.cache64.BlockNo  = 1;
2751         cmdp->u.cache64.sg_canz  = 0;
2752     } else {
2753         cmdp->u.cache.DeviceNo = hdrive;
2754         cmdp->u.cache.BlockNo  = 1;
2755         cmdp->u.cache.sg_canz  = 0;
2756     }
2757
2758     if (read_write) {
2759         if (scp->cmd_len == 16) {
2760             memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2761             blockno = be64_to_cpu(no);
2762             memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2763             blockcnt = be32_to_cpu(cnt);
2764         } else if (scp->cmd_len == 10) {
2765             memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2766             blockno = be32_to_cpu(no);
2767             memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2768             blockcnt = be16_to_cpu(cnt);
2769         } else {
2770             memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2771             blockno = be32_to_cpu(no) & 0x001fffffUL;
2772             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2773         }
2774         if (mode64) {
2775             cmdp->u.cache64.BlockNo = blockno;
2776             cmdp->u.cache64.BlockCnt = blockcnt;
2777         } else {
2778             cmdp->u.cache.BlockNo = (ulong32)blockno;
2779             cmdp->u.cache.BlockCnt = blockcnt;
2780         }
2781
2782         if (scp->use_sg) {
2783             sl = (struct scatterlist *)scp->request_buffer;
2784             sgcnt = scp->use_sg;
2785             scp->SCp.Status = GDTH_MAP_SG;
2786             scp->SCp.Message = (read_write == 1 ?
2787                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2788             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2789             if (mode64) {
2790                 cmdp->u.cache64.DestAddr= (ulong64)-1;
2791                 cmdp->u.cache64.sg_canz = sgcnt;
2792                 for (i=0; i<sgcnt; ++i,++sl) {
2793                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2794 #ifdef GDTH_DMA_STATISTICS
2795                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2796                         ha->dma64_cnt++;
2797                     else
2798                         ha->dma32_cnt++;
2799 #endif
2800                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2801                 }
2802             } else {
2803                 cmdp->u.cache.DestAddr= 0xffffffff;
2804                 cmdp->u.cache.sg_canz = sgcnt;
2805                 for (i=0; i<sgcnt; ++i,++sl) {
2806                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2807 #ifdef GDTH_DMA_STATISTICS
2808                     ha->dma32_cnt++;
2809 #endif
2810                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2811                 }
2812             }
2813
2814 #ifdef GDTH_STATISTICS
2815             if (max_sg < (ulong32)sgcnt) {
2816                 max_sg = (ulong32)sgcnt;
2817                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2818             }
2819 #endif
2820
2821         } else if (scp->request_bufflen) {
2822             scp->SCp.Status = GDTH_MAP_SINGLE;
2823             scp->SCp.Message = (read_write == 1 ?
2824                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2825             page = virt_to_page(scp->request_buffer);
2826             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2827             phys_addr = pci_map_page(ha->pdev,page,offset,
2828                                      scp->request_bufflen,scp->SCp.Message);
2829             scp->SCp.dma_handle = phys_addr;
2830             if (mode64) {
2831                 if (ha->cache_feat & SCATTER_GATHER) {
2832                     cmdp->u.cache64.DestAddr = (ulong64)-1;
2833                     cmdp->u.cache64.sg_canz = 1;
2834                     cmdp->u.cache64.sg_lst[0].sg_ptr = phys_addr;
2835                     cmdp->u.cache64.sg_lst[0].sg_len = scp->request_bufflen;
2836                     cmdp->u.cache64.sg_lst[1].sg_len = 0;
2837                 } else {
2838                     cmdp->u.cache64.DestAddr  = phys_addr;
2839                     cmdp->u.cache64.sg_canz= 0;
2840                 }
2841             } else {
2842                 if (ha->cache_feat & SCATTER_GATHER) {
2843                     cmdp->u.cache.DestAddr = 0xffffffff;
2844                     cmdp->u.cache.sg_canz = 1;
2845                     cmdp->u.cache.sg_lst[0].sg_ptr = phys_addr;
2846                     cmdp->u.cache.sg_lst[0].sg_len = scp->request_bufflen;
2847                     cmdp->u.cache.sg_lst[1].sg_len = 0;
2848                 } else {
2849                     cmdp->u.cache.DestAddr  = phys_addr;
2850                     cmdp->u.cache.sg_canz= 0;
2851                 }
2852             }
2853         }
2854     }
2855     /* evaluate command size, check space */
2856     if (mode64) {
2857         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2858                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2859                cmdp->u.cache64.sg_lst[0].sg_ptr,
2860                cmdp->u.cache64.sg_lst[0].sg_len));
2861         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2862                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2863         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2864             (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2865     } else {
2866         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2867                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2868                cmdp->u.cache.sg_lst[0].sg_ptr,
2869                cmdp->u.cache.sg_lst[0].sg_len));
2870         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2871                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2872         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2873             (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2874     }
2875     if (ha->cmd_len & 3)
2876         ha->cmd_len += (4 - (ha->cmd_len & 3));
2877
2878     if (ha->cmd_cnt > 0) {
2879         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2880             ha->ic_all_size) {
2881             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2882             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2883             return 0;
2884         }
2885     }
2886
2887     /* copy command */
2888     gdth_copy_command(hanum);
2889     return cmd_index;
2890 }
2891
2892 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b)
2893 {
2894     register gdth_ha_str *ha;
2895     register gdth_cmd_str *cmdp;
2896     struct scatterlist *sl;
2897     ushort i;
2898     dma_addr_t phys_addr, sense_paddr;
2899     int cmd_index, sgcnt, mode64;
2900     unchar t,l;
2901     struct page *page;
2902     ulong offset;
2903
2904     ha = HADATA(gdth_ctr_tab[hanum]);
2905     t = scp->device->id;
2906     l = scp->device->lun;
2907     cmdp = ha->pccb;
2908     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2909            scp->cmnd[0],b,t,l));
2910
2911     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2912         return 0;
2913
2914     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
2915
2916     cmdp->Service = SCSIRAWSERVICE;
2917     cmdp->RequestBuffer = scp;
2918     /* search free command index */
2919     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2920         TRACE(("GDT: No free command index found\n"));
2921         return 0;
2922     }
2923     /* if it's the first command, set command semaphore */
2924     if (ha->cmd_cnt == 0)
2925         gdth_set_sema0(hanum);
2926
2927     /* fill command */
2928     if (scp->SCp.sent_command != -1) {
2929         cmdp->OpCode           = scp->SCp.sent_command; /* special raw cmd. */
2930         cmdp->BoardNode        = LOCALBOARD;
2931         if (mode64) {
2932             cmdp->u.raw64.direction = (scp->SCp.phase >> 8);
2933             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2934                     cmdp->OpCode, cmdp->u.raw64.direction));
2935             /* evaluate command size */
2936             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
2937         } else {
2938             cmdp->u.raw.direction  = (scp->SCp.phase >> 8);
2939             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2940                     cmdp->OpCode, cmdp->u.raw.direction));
2941             /* evaluate command size */
2942             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2943         }
2944
2945     } else {
2946         page = virt_to_page(scp->sense_buffer);
2947         offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
2948         sense_paddr = pci_map_page(ha->pdev,page,offset,
2949                                    16,PCI_DMA_FROMDEVICE);
2950         scp->SCp.buffer = (struct scatterlist *)((ulong32)sense_paddr);
2951         /* high part, if 64bit */
2952         scp->host_scribble = (char *)(ulong32)((ulong64)sense_paddr >> 32);
2953         cmdp->OpCode           = GDT_WRITE;             /* always */
2954         cmdp->BoardNode        = LOCALBOARD;
2955         if (mode64) {
2956             cmdp->u.raw64.reserved   = 0;
2957             cmdp->u.raw64.mdisc_time = 0;
2958             cmdp->u.raw64.mcon_time  = 0;
2959             cmdp->u.raw64.clen       = scp->cmd_len;
2960             cmdp->u.raw64.target     = t;
2961             cmdp->u.raw64.lun        = l;
2962             cmdp->u.raw64.bus        = b;
2963             cmdp->u.raw64.priority   = 0;
2964             cmdp->u.raw64.sdlen      = scp->request_bufflen;
2965             cmdp->u.raw64.sense_len  = 16;
2966             cmdp->u.raw64.sense_data = sense_paddr;
2967             cmdp->u.raw64.direction  =
2968                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2969             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
2970         } else {
2971             cmdp->u.raw.reserved   = 0;
2972             cmdp->u.raw.mdisc_time = 0;
2973             cmdp->u.raw.mcon_time  = 0;
2974             cmdp->u.raw.clen       = scp->cmd_len;
2975             cmdp->u.raw.target     = t;
2976             cmdp->u.raw.lun        = l;
2977             cmdp->u.raw.bus        = b;
2978             cmdp->u.raw.priority   = 0;
2979             cmdp->u.raw.link_p     = 0;
2980             cmdp->u.raw.sdlen      = scp->request_bufflen;
2981             cmdp->u.raw.sense_len  = 16;
2982             cmdp->u.raw.sense_data = sense_paddr;
2983             cmdp->u.raw.direction  =
2984                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2985             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2986         }
2987
2988         if (scp->use_sg) {
2989             sl = (struct scatterlist *)scp->request_buffer;
2990             sgcnt = scp->use_sg;
2991             scp->SCp.Status = GDTH_MAP_SG;
2992             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
2993             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2994             if (mode64) {
2995                 cmdp->u.raw64.sdata = (ulong64)-1;
2996                 cmdp->u.raw64.sg_ranz = sgcnt;
2997                 for (i=0; i<sgcnt; ++i,++sl) {
2998                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2999 #ifdef GDTH_DMA_STATISTICS
3000                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
3001                         ha->dma64_cnt++;
3002                     else
3003                         ha->dma32_cnt++;
3004 #endif
3005                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
3006                 }
3007             } else {
3008                 cmdp->u.raw.sdata = 0xffffffff;
3009                 cmdp->u.raw.sg_ranz = sgcnt;
3010                 for (i=0; i<sgcnt; ++i,++sl) {
3011                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
3012 #ifdef GDTH_DMA_STATISTICS
3013                     ha->dma32_cnt++;
3014 #endif
3015                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
3016                 }
3017             }
3018
3019 #ifdef GDTH_STATISTICS
3020             if (max_sg < sgcnt) {
3021                 max_sg = sgcnt;
3022                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
3023             }
3024 #endif
3025
3026         } else {
3027             scp->SCp.Status = GDTH_MAP_SINGLE;
3028             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
3029             page = virt_to_page(scp->request_buffer);
3030             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
3031             phys_addr = pci_map_page(ha->pdev,page,offset,
3032                                      scp->request_bufflen,scp->SCp.Message);
3033             scp->SCp.dma_handle = phys_addr;
3034
3035             if (mode64) {
3036                 if (ha->raw_feat & SCATTER_GATHER) {
3037                     cmdp->u.raw64.sdata  = (ulong64)-1;
3038                     cmdp->u.raw64.sg_ranz= 1;
3039                     cmdp->u.raw64.sg_lst[0].sg_ptr = phys_addr;
3040                     cmdp->u.raw64.sg_lst[0].sg_len = scp->request_bufflen;
3041                     cmdp->u.raw64.sg_lst[1].sg_len = 0;
3042                 } else {
3043                     cmdp->u.raw64.sdata  = phys_addr;
3044                     cmdp->u.raw64.sg_ranz= 0;
3045                 }
3046             } else {
3047                 if (ha->raw_feat & SCATTER_GATHER) {
3048                     cmdp->u.raw.sdata  = 0xffffffff;
3049                     cmdp->u.raw.sg_ranz= 1;
3050                     cmdp->u.raw.sg_lst[0].sg_ptr = phys_addr;
3051                     cmdp->u.raw.sg_lst[0].sg_len = scp->request_bufflen;
3052                     cmdp->u.raw.sg_lst[1].sg_len = 0;
3053                 } else {
3054                     cmdp->u.raw.sdata  = phys_addr;
3055                     cmdp->u.raw.sg_ranz= 0;
3056                 }
3057             }
3058         }
3059         if (mode64) {
3060             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3061                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
3062                    cmdp->u.raw64.sg_lst[0].sg_ptr,
3063                    cmdp->u.raw64.sg_lst[0].sg_len));
3064             /* evaluate command size */
3065             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
3066                 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
3067         } else {
3068             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3069                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
3070                    cmdp->u.raw.sg_lst[0].sg_ptr,
3071                    cmdp->u.raw.sg_lst[0].sg_len));
3072             /* evaluate command size */
3073             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
3074                 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
3075         }
3076     }
3077     /* check space */
3078     if (ha->cmd_len & 3)
3079         ha->cmd_len += (4 - (ha->cmd_len & 3));
3080
3081     if (ha->cmd_cnt > 0) {
3082         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3083             ha->ic_all_size) {
3084             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
3085             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3086             return 0;
3087         }
3088     }
3089
3090     /* copy command */
3091     gdth_copy_command(hanum);
3092     return cmd_index;
3093 }
3094
3095 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp)
3096 {
3097     register gdth_ha_str *ha;
3098     register gdth_cmd_str *cmdp;
3099     int cmd_index;
3100
3101     ha  = HADATA(gdth_ctr_tab[hanum]);
3102     cmdp= ha->pccb;
3103     TRACE2(("gdth_special_cmd(): "));
3104
3105     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3106         return 0;
3107
3108     memcpy( cmdp, scp->request_buffer, sizeof(gdth_cmd_str));
3109     cmdp->RequestBuffer = scp;
3110
3111     /* search free command index */
3112     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
3113         TRACE(("GDT: No free command index found\n"));
3114         return 0;
3115     }
3116
3117     /* if it's the first command, set command semaphore */
3118     if (ha->cmd_cnt == 0)
3119        gdth_set_sema0(hanum);
3120
3121     /* evaluate command size, check space */
3122     if (cmdp->OpCode == GDT_IOCTL) {
3123         TRACE2(("IOCTL\n"));
3124         ha->cmd_len =
3125             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
3126     } else if (cmdp->Service == CACHESERVICE) {
3127         TRACE2(("cache command %d\n",cmdp->OpCode));
3128         if (ha->cache_feat & GDT_64BIT)
3129             ha->cmd_len =
3130                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
3131         else
3132             ha->cmd_len =
3133                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
3134     } else if (cmdp->Service == SCSIRAWSERVICE) {
3135         TRACE2(("raw command %d\n",cmdp->OpCode));
3136         if (ha->raw_feat & GDT_64BIT)
3137             ha->cmd_len =
3138                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
3139         else
3140             ha->cmd_len =
3141                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
3142     }
3143
3144     if (ha->cmd_len & 3)
3145         ha->cmd_len += (4 - (ha->cmd_len & 3));
3146
3147     if (ha->cmd_cnt > 0) {
3148         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3149             ha->ic_all_size) {
3150             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
3151             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3152             return 0;
3153         }
3154     }
3155
3156     /* copy command */
3157     gdth_copy_command(hanum);
3158     return cmd_index;
3159 }
3160
3161
3162 /* Controller event handling functions */
3163 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
3164                                       ushort idx, gdth_evt_data *evt)
3165 {
3166     gdth_evt_str *e;
3167     struct timeval tv;
3168
3169     /* no GDTH_LOCK_HA() ! */
3170     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
3171     if (source == 0)                        /* no source -> no event */
3172         return NULL;
3173
3174     if (ebuffer[elastidx].event_source == source &&
3175         ebuffer[elastidx].event_idx == idx &&
3176         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
3177             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
3178             (char *)&evt->eu, evt->size)) ||
3179         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
3180             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
3181             (char *)&evt->event_string)))) {
3182         e = &ebuffer[elastidx];
3183         do_gettimeofday(&tv);
3184         e->last_stamp = tv.tv_sec;
3185         ++e->same_count;
3186     } else {
3187         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
3188             ++elastidx;
3189             if (elastidx == MAX_EVENTS)
3190                 elastidx = 0;
3191             if (elastidx == eoldidx) {              /* reached mark ? */
3192                 ++eoldidx;
3193                 if (eoldidx == MAX_EVENTS)
3194                     eoldidx = 0;
3195             }
3196         }
3197         e = &ebuffer[elastidx];
3198         e->event_source = source;
3199         e->event_idx = idx;
3200         do_gettimeofday(&tv);
3201         e->first_stamp = e->last_stamp = tv.tv_sec;
3202         e->same_count = 1;
3203         e->event_data = *evt;
3204         e->application = 0;
3205     }
3206     return e;
3207 }
3208
3209 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
3210 {
3211     gdth_evt_str *e;
3212     int eindex;
3213     ulong flags;
3214
3215     TRACE2(("gdth_read_event() handle %d\n", handle));
3216     spin_lock_irqsave(&ha->smp_lock, flags);
3217     if (handle == -1)
3218         eindex = eoldidx;
3219     else
3220         eindex = handle;
3221     estr->event_source = 0;
3222
3223     if (eindex >= MAX_EVENTS) {
3224         spin_unlock_irqrestore(&ha->smp_lock, flags);
3225         return eindex;
3226     }
3227     e = &ebuffer[eindex];
3228     if (e->event_source != 0) {
3229         if (eindex != elastidx) {
3230             if (++eindex == MAX_EVENTS)
3231                 eindex = 0;
3232         } else {
3233             eindex = -1;
3234         }
3235         memcpy(estr, e, sizeof(gdth_evt_str));
3236     }
3237     spin_unlock_irqrestore(&ha->smp_lock, flags);
3238     return eindex;
3239 }
3240
3241 static void gdth_readapp_event(gdth_ha_str *ha,
3242                                unchar application, gdth_evt_str *estr)
3243 {
3244     gdth_evt_str *e;
3245     int eindex;
3246     ulong flags;
3247     unchar found = FALSE;
3248
3249     TRACE2(("gdth_readapp_event() app. %d\n", application));
3250     spin_lock_irqsave(&ha->smp_lock, flags);
3251     eindex = eoldidx;
3252     for (;;) {
3253         e = &ebuffer[eindex];
3254         if (e->event_source == 0)
3255             break;
3256         if ((e->application & application) == 0) {
3257             e->application |= application;
3258             found = TRUE;
3259             break;
3260         }
3261         if (eindex == elastidx)
3262             break;
3263         if (++eindex == MAX_EVENTS)
3264             eindex = 0;
3265     }
3266     if (found)
3267         memcpy(estr, e, sizeof(gdth_evt_str));
3268     else
3269         estr->event_source = 0;
3270     spin_unlock_irqrestore(&ha->smp_lock, flags);
3271 }
3272
3273 static void gdth_clear_events(void)
3274 {
3275     TRACE(("gdth_clear_events()"));
3276
3277     eoldidx = elastidx = 0;
3278     ebuffer[0].event_source = 0;
3279 }
3280
3281
3282 /* SCSI interface functions */
3283
3284 static irqreturn_t gdth_interrupt(int irq,void *dev_id,struct pt_regs *regs)
3285 {
3286     gdth_ha_str *ha2 = (gdth_ha_str *)dev_id;
3287     register gdth_ha_str *ha;
3288     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
3289     gdt6_dpram_str __iomem *dp6_ptr;
3290     gdt2_dpram_str __iomem *dp2_ptr;
3291     Scsi_Cmnd *scp;
3292     int hanum, rval, i;
3293     unchar IStatus;
3294     ushort Service;
3295     ulong flags = 0;
3296 #ifdef INT_COAL
3297     int coalesced = FALSE;
3298     int next = FALSE;
3299     gdth_coal_status *pcs = NULL;
3300     int act_int_coal = 0;
3301 #endif
3302
3303     TRACE(("gdth_interrupt() IRQ %d\n",irq));
3304
3305     /* if polling and not from gdth_wait() -> return */
3306     if (gdth_polling) {
3307         if (!gdth_from_wait) {
3308             return IRQ_HANDLED;
3309         }
3310     }
3311
3312     if (!gdth_polling)
3313         spin_lock_irqsave(&ha2->smp_lock, flags);
3314     wait_index = 0;
3315
3316     /* search controller */
3317     if ((hanum = gdth_get_status(&IStatus,irq)) == -1) {
3318         /* spurious interrupt */
3319         if (!gdth_polling)
3320             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3321             return IRQ_HANDLED;
3322     }
3323     ha = HADATA(gdth_ctr_tab[hanum]);
3324
3325 #ifdef GDTH_STATISTICS
3326     ++act_ints;
3327 #endif
3328
3329 #ifdef INT_COAL
3330     /* See if the fw is returning coalesced status */
3331     if (IStatus == COALINDEX) {
3332         /* Coalesced status.  Setup the initial status
3333            buffer pointer and flags */
3334         pcs = ha->coal_stat;
3335         coalesced = TRUE;
3336         next = TRUE;
3337     }
3338
3339     do {
3340         if (coalesced) {
3341             /* For coalesced requests all status
3342                information is found in the status buffer */
3343             IStatus = (unchar)(pcs->status & 0xff);
3344         }
3345 #endif
3346
3347         if (ha->type == GDT_EISA) {
3348             if (IStatus & 0x80) {                       /* error flag */
3349                 IStatus &= ~0x80;
3350                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3351                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3352             } else                                      /* no error */
3353                 ha->status = S_OK;
3354             ha->info = inl(ha->bmic + MAILBOXREG+12);
3355             ha->service = inw(ha->bmic + MAILBOXREG+10);
3356             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3357
3358             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3359             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3360         } else if (ha->type == GDT_ISA) {
3361             dp2_ptr = ha->brd;
3362             if (IStatus & 0x80) {                       /* error flag */
3363                 IStatus &= ~0x80;
3364                 ha->status = gdth_readw(&dp2_ptr->u.ic.Status);
3365                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3366             } else                                      /* no error */
3367                 ha->status = S_OK;
3368             ha->info = gdth_readl(&dp2_ptr->u.ic.Info[0]);
3369             ha->service = gdth_readw(&dp2_ptr->u.ic.Service);
3370             ha->info2 = gdth_readl(&dp2_ptr->u.ic.Info[1]);
3371
3372             gdth_writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3373             gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3374             gdth_writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3375         } else if (ha->type == GDT_PCI) {
3376             dp6_ptr = ha->brd;
3377             if (IStatus & 0x80) {                       /* error flag */
3378                 IStatus &= ~0x80;
3379                 ha->status = gdth_readw(&dp6_ptr->u.ic.Status);
3380                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3381             } else                                      /* no error */
3382                 ha->status = S_OK;
3383             ha->info = gdth_readl(&dp6_ptr->u.ic.Info[0]);
3384             ha->service = gdth_readw(&dp6_ptr->u.ic.Service);
3385             ha->info2 = gdth_readl(&dp6_ptr->u.ic.Info[1]);
3386
3387             gdth_writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3388             gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3389             gdth_writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3390         } else if (ha->type == GDT_PCINEW) {
3391             if (IStatus & 0x80) {                       /* error flag */
3392                 IStatus &= ~0x80;
3393                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3394                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3395             } else
3396                 ha->status = S_OK;
3397             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3398             ha->service = inw(PTR2USHORT(&ha->plx->service));
3399             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3400
3401             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3402             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3403         } else if (ha->type == GDT_PCIMPR) {
3404             dp6m_ptr = ha->brd;
3405             if (IStatus & 0x80) {                       /* error flag */
3406                 IStatus &= ~0x80;
3407 #ifdef INT_COAL
3408                 if (coalesced)
3409                     ha->status = pcs->ext_status && 0xffff;
3410                 else
3411 #endif
3412                     ha->status = gdth_readw(&dp6m_ptr->i960r.status);
3413                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3414             } else                                      /* no error */
3415                 ha->status = S_OK;
3416 #ifdef INT_COAL
3417             /* get information */
3418             if (coalesced) {
3419                 ha->info = pcs->info0;
3420                 ha->info2 = pcs->info1;
3421                 ha->service = (pcs->ext_status >> 16) && 0xffff;
3422             } else
3423 #endif
3424             {
3425                 ha->info = gdth_readl(&dp6m_ptr->i960r.info[0]);
3426                 ha->service = gdth_readw(&dp6m_ptr->i960r.service);
3427                 ha->info2 = gdth_readl(&dp6m_ptr->i960r.info[1]);
3428             }
3429             /* event string */
3430             if (IStatus == ASYNCINDEX) {
3431                 if (ha->service != SCREENSERVICE &&
3432                     (ha->fw_vers & 0xff) >= 0x1a) {
3433                     ha->dvr.severity = gdth_readb
3434                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3435                     for (i = 0; i < 256; ++i) {
3436                         ha->dvr.event_string[i] = gdth_readb
3437                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3438                         if (ha->dvr.event_string[i] == 0)
3439                             break;
3440                     }
3441                 }
3442             }
3443 #ifdef INT_COAL
3444             /* Make sure that non coalesced interrupts get cleared
3445                before being handled by gdth_async_event/gdth_sync_event */
3446             if (!coalesced)
3447 #endif
3448             {
3449                 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3450                 gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3451             }
3452         } else {
3453             TRACE2(("gdth_interrupt() unknown controller type\n"));
3454             if (!gdth_polling)
3455                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3456             return IRQ_HANDLED;
3457         }
3458
3459         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3460                IStatus,ha->status,ha->info));
3461
3462         if (gdth_from_wait) {
3463             wait_hanum = hanum;
3464             wait_index = (int)IStatus;
3465         }
3466
3467         if (IStatus == ASYNCINDEX) {
3468             TRACE2(("gdth_interrupt() async. event\n"));
3469             gdth_async_event(hanum);
3470             if (!gdth_polling)
3471                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3472             gdth_next(hanum);
3473             return IRQ_HANDLED;
3474         }
3475
3476         if (IStatus == SPEZINDEX) {
3477             TRACE2(("Service unknown or not initialized !\n"));
3478             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3479             ha->dvr.eu.driver.ionode = hanum;
3480             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3481             if (!gdth_polling)
3482                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3483             return IRQ_HANDLED;
3484         }
3485         scp     = ha->cmd_tab[IStatus-2].cmnd;
3486         Service = ha->cmd_tab[IStatus-2].service;
3487         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3488         if (scp == UNUSED_CMND) {
3489             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3490             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3491             ha->dvr.eu.driver.ionode = hanum;
3492             ha->dvr.eu.driver.index = IStatus;
3493             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3494             if (!gdth_polling)
3495                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3496             return IRQ_HANDLED;
3497         }
3498         if (scp == INTERNAL_CMND) {
3499             TRACE(("gdth_interrupt() answer to internal command\n"));
3500             if (!gdth_polling)
3501                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3502             return IRQ_HANDLED;
3503         }
3504
3505         TRACE(("gdth_interrupt() sync. status\n"));
3506         rval = gdth_sync_event(hanum,Service,IStatus,scp);
3507         if (!gdth_polling)
3508             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3509         if (rval == 2) {
3510             gdth_putq(hanum,scp,scp->SCp.this_residual);
3511         } else if (rval == 1) {
3512             scp->scsi_done(scp);
3513         }
3514
3515 #ifdef INT_COAL
3516         if (coalesced) {
3517             /* go to the next status in the status buffer */
3518             ++pcs;
3519 #ifdef GDTH_STATISTICS
3520             ++act_int_coal;
3521             if (act_int_coal > max_int_coal) {
3522                 max_int_coal = act_int_coal;
3523                 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3524             }
3525 #endif
3526             /* see if there is another status */
3527             if (pcs->status == 0)
3528                 /* Stop the coalesce loop */
3529                 next = FALSE;
3530         }
3531     } while (next);
3532
3533     /* coalescing only for new GDT_PCIMPR controllers available */
3534     if (ha->type == GDT_PCIMPR && coalesced) {
3535         gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3536         gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3537     }
3538 #endif
3539
3540     gdth_next(hanum);
3541     return IRQ_HANDLED;
3542 }
3543
3544 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp)
3545 {
3546     register gdth_ha_str *ha;
3547     gdth_msg_str *msg;
3548     gdth_cmd_str *cmdp;
3549     unchar b, t;
3550
3551     ha   = HADATA(gdth_ctr_tab[hanum]);
3552     cmdp = ha->pccb;
3553     TRACE(("gdth_sync_event() serv %d status %d\n",
3554            service,ha->status));
3555
3556     if (service == SCREENSERVICE) {
3557         msg  = ha->pmsg;
3558         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3559                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3560         if (msg->msg_len > MSGLEN+1)
3561             msg->msg_len = MSGLEN+1;
3562         if (msg->msg_len)
3563             if (!(msg->msg_answer && msg->msg_ext)) {
3564                 msg->msg_text[msg->msg_len] = '\0';
3565                 printk("%s",msg->msg_text);
3566             }
3567
3568         if (msg->msg_ext && !msg->msg_answer) {
3569             while (gdth_test_busy(hanum))
3570                 gdth_delay(0);
3571             cmdp->Service       = SCREENSERVICE;
3572             cmdp->RequestBuffer = SCREEN_CMND;
3573             gdth_get_cmd_index(hanum);
3574             gdth_set_sema0(hanum);
3575             cmdp->OpCode        = GDT_READ;
3576             cmdp->BoardNode     = LOCALBOARD;
3577             cmdp->u.screen.reserved  = 0;
3578             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3579             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3580             ha->cmd_offs_dpmem = 0;
3581             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3582                 + sizeof(ulong64);
3583             ha->cmd_cnt = 0;
3584             gdth_copy_command(hanum);
3585             gdth_release_event(hanum);
3586             return 0;
3587         }
3588
3589         if (msg->msg_answer && msg->msg_alen) {
3590             /* default answers (getchar() not possible) */
3591             if (msg->msg_alen == 1) {
3592                 msg->msg_alen = 0;
3593                 msg->msg_len = 1;
3594                 msg->msg_text[0] = 0;
3595             } else {
3596                 msg->msg_alen -= 2;
3597                 msg->msg_len = 2;
3598                 msg->msg_text[0] = 1;
3599                 msg->msg_text[1] = 0;
3600             }
3601             msg->msg_ext    = 0;
3602             msg->msg_answer = 0;
3603             while (gdth_test_busy(hanum))
3604                 gdth_delay(0);
3605             cmdp->Service       = SCREENSERVICE;
3606             cmdp->RequestBuffer = SCREEN_CMND;
3607             gdth_get_cmd_index(hanum);
3608             gdth_set_sema0(hanum);
3609             cmdp->OpCode        = GDT_WRITE;
3610             cmdp->BoardNode     = LOCALBOARD;
3611             cmdp->u.screen.reserved  = 0;
3612             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3613             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3614             ha->cmd_offs_dpmem = 0;
3615             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3616                 + sizeof(ulong64);
3617             ha->cmd_cnt = 0;
3618             gdth_copy_command(hanum);
3619             gdth_release_event(hanum);
3620             return 0;
3621         }
3622         printk("\n");
3623
3624     } else {
3625         b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
3626         t = scp->device->id;
3627         if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3628             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3629         }
3630         /* cache or raw service */
3631         if (ha->status == S_BSY) {
3632             TRACE2(("Controller busy -> retry !\n"));
3633             if (scp->SCp.sent_command == GDT_MOUNT)
3634                 scp->SCp.sent_command = GDT_CLUST_INFO;
3635             /* retry */
3636             return 2;
3637         }
3638         if (scp->SCp.Status == GDTH_MAP_SG)
3639             pci_unmap_sg(ha->pdev,scp->request_buffer,
3640                          scp->use_sg,scp->SCp.Message);
3641         else if (scp->SCp.Status == GDTH_MAP_SINGLE)
3642             pci_unmap_page(ha->pdev,scp->SCp.dma_handle,
3643                            scp->request_bufflen,scp->SCp.Message);
3644         if (scp->SCp.buffer) {
3645             dma_addr_t addr;
3646             addr = (dma_addr_t)(ulong32)scp->SCp.buffer;
3647             if (scp->host_scribble)
3648                 addr += (dma_addr_t)((ulong64)(ulong32)scp->host_scribble << 32);
3649             pci_unmap_page(ha->pdev,addr,16,PCI_DMA_FROMDEVICE);
3650         }
3651
3652         if (ha->status == S_OK) {
3653             scp->SCp.Status = S_OK;
3654             scp->SCp.Message = ha->info;
3655             if (scp->SCp.sent_command != -1) {
3656                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3657                         scp->SCp.sent_command));
3658                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3659                 if (scp->SCp.sent_command == GDT_CLUST_INFO) {
3660                     ha->hdr[t].cluster_type = (unchar)ha->info;
3661                     if (!(ha->hdr[t].cluster_type &
3662                         CLUSTER_MOUNTED)) {
3663                         /* NOT MOUNTED -> MOUNT */
3664                         scp->SCp.sent_command = GDT_MOUNT;
3665                         if (ha->hdr[t].cluster_type &
3666                             CLUSTER_RESERVED) {
3667                             /* cluster drive RESERVED (on the other node) */
3668                             scp->SCp.phase = -2;      /* reservation conflict */
3669                         }
3670                     } else {
3671                         scp->SCp.sent_command = -1;
3672                     }
3673                 } else {
3674                     if (scp->SCp.sent_command == GDT_MOUNT) {
3675                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3676                         ha->hdr[t].media_changed = TRUE;
3677                     } else if (scp->SCp.sent_command == GDT_UNMOUNT) {
3678                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3679                         ha->hdr[t].media_changed = TRUE;
3680                     }
3681                     scp->SCp.sent_command = -1;
3682                 }
3683                 /* retry */
3684                 scp->SCp.this_residual = HIGH_PRI;
3685                 return 2;
3686             } else {
3687                 /* RESERVE/RELEASE ? */
3688                 if (scp->cmnd[0] == RESERVE) {
3689                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3690                 } else if (scp->cmnd[0] == RELEASE) {
3691                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3692                 }
3693                 scp->result = DID_OK << 16;
3694                 scp->sense_buffer[0] = 0;
3695             }
3696         } else {
3697             scp->SCp.Status = ha->status;
3698             scp->SCp.Message = ha->info;
3699
3700             if (scp->SCp.sent_command != -1) {
3701                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3702                         scp->SCp.sent_command, ha->status));
3703                 if (scp->SCp.sent_command == GDT_SCAN_START ||
3704                     scp->SCp.sent_command == GDT_SCAN_END) {
3705                     scp->SCp.sent_command = -1;
3706                     /* retry */
3707                     scp->SCp.this_residual = HIGH_PRI;
3708                     return 2;
3709                 }
3710                 memset((char*)scp->sense_buffer,0,16);
3711                 scp->sense_buffer[0] = 0x70;
3712                 scp->sense_buffer[2] = NOT_READY;
3713                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3714             } else if (service == CACHESERVICE) {
3715                 if (ha->status == S_CACHE_UNKNOWN &&
3716                     (ha->hdr[t].cluster_type &
3717                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3718                     /* bus reset -> force GDT_CLUST_INFO */
3719                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3720                 }
3721                 memset((char*)scp->sense_buffer,0,16);
3722                 if (ha->status == (ushort)S_CACHE_RESERV) {
3723                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3724                 } else {
3725                     scp->sense_buffer[0] = 0x70;
3726                     scp->sense_buffer[2] = NOT_READY;
3727                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3728                 }
3729                 if (scp->done != gdth_scsi_done) {
3730                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3731                     ha->dvr.eu.sync.ionode  = hanum;
3732                     ha->dvr.eu.sync.service = service;
3733                     ha->dvr.eu.sync.status  = ha->status;
3734                     ha->dvr.eu.sync.info    = ha->info;
3735                     ha->dvr.eu.sync.hostdrive = t;
3736                     if (ha->status >= 0x8000)
3737                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3738                     else
3739                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3740                 }
3741             } else {
3742                 /* sense buffer filled from controller firmware (DMA) */
3743                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3744                     scp->result = DID_BAD_TARGET << 16;
3745                 } else {
3746                     scp->result = (DID_OK << 16) | ha->info;
3747                 }
3748             }
3749         }
3750         if (!scp->SCp.have_data_in)
3751             scp->SCp.have_data_in++;
3752         else
3753             return 1;
3754     }
3755
3756     return 0;
3757 }
3758
3759 static char *async_cache_tab[] = {
3760 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3761         "GDT HA %u, service %u, async. status %u/%lu unknown",
3762 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3763         "GDT HA %u, service %u, async. status %u/%lu unknown",
3764 /* 2*/  "\005\000\002\006\004"
3765         "GDT HA %u, Host Drive %lu not ready",
3766 /* 3*/  "\005\000\002\006\004"
3767         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3768 /* 4*/  "\005\000\002\006\004"
3769         "GDT HA %u, mirror update on Host Drive %lu failed",
3770 /* 5*/  "\005\000\002\006\004"
3771         "GDT HA %u, Mirror Drive %lu failed",
3772 /* 6*/  "\005\000\002\006\004"
3773         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3774 /* 7*/  "\005\000\002\006\004"
3775         "GDT HA %u, Host Drive %lu write protected",
3776 /* 8*/  "\005\000\002\006\004"
3777         "GDT HA %u, media changed in Host Drive %lu",
3778 /* 9*/  "\005\000\002\006\004"
3779         "GDT HA %u, Host Drive %lu is offline",
3780 /*10*/  "\005\000\002\006\004"
3781         "GDT HA %u, media change of Mirror Drive %lu",
3782 /*11*/  "\005\000\002\006\004"
3783         "GDT HA %u, Mirror Drive %lu is write protected",
3784 /*12*/  "\005\000\002\006\004"
3785         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3786 /*13*/  "\007\000\002\006\002\010\002"
3787         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3788 /*14*/  "\005\000\002\006\002"
3789         "GDT HA %u, Array Drive %u: FAIL state entered",
3790 /*15*/  "\005\000\002\006\002"
3791         "GDT HA %u, Array Drive %u: error",
3792 /*16*/  "\007\000\002\006\002\010\002"
3793         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3794 /*17*/  "\005\000\002\006\002"
3795         "GDT HA %u, Array Drive %u: parity build failed",
3796 /*18*/  "\005\000\002\006\002"
3797         "GDT HA %u, Array Drive %u: drive rebuild failed",
3798 /*19*/  "\005\000\002\010\002"
3799         "GDT HA %u, Test of Hot Fix %u failed",
3800 /*20*/  "\005\000\002\006\002"
3801         "GDT HA %u, Array Drive %u: drive build finished successfully",
3802 /*21*/  "\005\000\002\006\002"
3803         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3804 /*22*/  "\007\000\002\006\002\010\002"
3805         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3806 /*23*/  "\005\000\002\006\002"
3807         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3808 /*24*/  "\005\000\002\010\002"
3809         "GDT HA %u, mirror update on Cache Drive %u completed",
3810 /*25*/  "\005\000\002\010\002"
3811         "GDT HA %u, mirror update on Cache Drive %lu failed",
3812 /*26*/  "\005\000\002\006\002"
3813         "GDT HA %u, Array Drive %u: drive rebuild started",
3814 /*27*/  "\005\000\002\012\001"
3815         "GDT HA %u, Fault bus %u: SHELF OK detected",
3816 /*28*/  "\005\000\002\012\001"
3817         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3818 /*29*/  "\007\000\002\012\001\013\001"
3819         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3820 /*30*/  "\007\000\002\012\001\013\001"
3821         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3822 /*31*/  "\007\000\002\012\001\013\001"
3823         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3824 /*32*/  "\007\000\002\012\001\013\001"
3825         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3826 /*33*/  "\007\000\002\012\001\013\001"
3827         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3828 /*34*/  "\011\000\002\012\001\013\001\006\004"
3829         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3830 /*35*/  "\007\000\002\012\001\013\001"
3831         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3832 /*36*/  "\007\000\002\012\001\013\001"
3833         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3834 /*37*/  "\007\000\002\012\001\006\004"
3835         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3836 /*38*/  "\007\000\002\012\001\013\001"
3837         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3838 /*39*/  "\007\000\002\012\001\013\001"
3839         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3840 /*40*/  "\007\000\002\012\001\013\001"
3841         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3842 /*41*/  "\007\000\002\012\001\013\001"
3843         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3844 /*42*/  "\005\000\002\006\002"
3845         "GDT HA %u, Array Drive %u: drive build started",
3846 /*43*/  "\003\000\002"
3847         "GDT HA %u, DRAM parity error detected",
3848 /*44*/  "\005\000\002\006\002"
3849         "GDT HA %u, Mirror Drive %u: update started",
3850 /*45*/  "\007\000\002\006\002\010\002"
3851         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3852 /*46*/  "\005\000\002\006\002"
3853         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3854 /*47*/  "\005\000\002\006\002"
3855         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3856 /*48*/  "\005\000\002\006\002"
3857         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3858 /*49*/  "\005\000\002\006\002"
3859         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3860 /*50*/  "\007\000\002\012\001\013\001"
3861         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3862 /*51*/  "\005\000\002\006\002"
3863         "GDT HA %u, Array Drive %u: expand started",
3864 /*52*/  "\005\000\002\006\002"
3865         "GDT HA %u, Array Drive %u: expand finished successfully",
3866 /*53*/  "\005\000\002\006\002"
3867         "GDT HA %u, Array Drive %u: expand failed",
3868 /*54*/  "\003\000\002"
3869         "GDT HA %u, CPU temperature critical",
3870 /*55*/  "\003\000\002"
3871         "GDT HA %u, CPU temperature OK",
3872 /*56*/  "\005\000\002\006\004"
3873         "GDT HA %u, Host drive %lu created",
3874 /*57*/  "\005\000\002\006\002"
3875         "GDT HA %u, Array Drive %u: expand restarted",
3876 /*58*/  "\005\000\002\006\002"
3877         "GDT HA %u, Array Drive %u: expand stopped",
3878 /*59*/  "\005\000\002\010\002"
3879         "GDT HA %u, Mirror Drive %u: drive build quited",
3880 /*60*/  "\005\000\002\006\002"
3881         "GDT HA %u, Array Drive %u: parity build quited",
3882 /*61*/  "\005\000\002\006\002"
3883         "GDT HA %u, Array Drive %u: drive rebuild quited",
3884 /*62*/  "\005\000\002\006\002"
3885         "GDT HA %u, Array Drive %u: parity verify started",
3886 /*63*/  "\005\000\002\006\002"
3887         "GDT HA %u, Array Drive %u: parity verify done",
3888 /*64*/  "\005\000\002\006\002"
3889         "GDT HA %u, Array Drive %u: parity verify failed",
3890 /*65*/  "\005\000\002\006\002"
3891         "GDT HA %u, Array Drive %u: parity error detected",
3892 /*66*/  "\005\000\002\006\002"
3893         "GDT HA %u, Array Drive %u: parity verify quited",
3894 /*67*/  "\005\000\002\006\002"
3895         "GDT HA %u, Host Drive %u reserved",
3896 /*68*/  "\005\000\002\006\002"
3897         "GDT HA %u, Host Drive %u mounted and released",
3898 /*69*/  "\005\000\002\006\002"
3899         "GDT HA %u, Host Drive %u released",
3900 /*70*/  "\003\000\002"
3901         "GDT HA %u, DRAM error detected and corrected with ECC",
3902 /*71*/  "\003\000\002"
3903         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3904 /*72*/  "\011\000\002\012\001\013\001\014\001"
3905         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3906 /*73*/  "\005\000\002\006\002"
3907         "GDT HA %u, Host drive %u resetted locally",
3908 /*74*/  "\005\000\002\006\002"
3909         "GDT HA %u, Host drive %u resetted remotely",
3910 /*75*/  "\003\000\002"
3911         "GDT HA %u, async. status 75 unknown",
3912 };
3913
3914
3915 static int gdth_async_event(int hanum)
3916 {
3917     gdth_ha_str *ha;
3918     gdth_cmd_str *cmdp;
3919     int cmd_index;
3920
3921     ha  = HADATA(gdth_ctr_tab[hanum]);
3922     cmdp= ha->pccb;
3923     TRACE2(("gdth_async_event() ha %d serv %d\n",
3924             hanum,ha->service));
3925
3926     if (ha->service == SCREENSERVICE) {
3927         if (ha->status == MSG_REQUEST) {
3928             while (gdth_test_busy(hanum))
3929                 gdth_delay(0);
3930             cmdp->Service       = SCREENSERVICE;
3931             cmdp->RequestBuffer = SCREEN_CMND;
3932             cmd_index = gdth_get_cmd_index(hanum);
3933             gdth_set_sema0(hanum);
3934             cmdp->OpCode        = GDT_READ;
3935             cmdp->BoardNode     = LOCALBOARD;
3936             cmdp->u.screen.reserved  = 0;
3937             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3938             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3939             ha->cmd_offs_dpmem = 0;
3940             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3941                 + sizeof(ulong64);
3942             ha->cmd_cnt = 0;
3943             gdth_copy_command(hanum);
3944             if (ha->type == GDT_EISA)
3945                 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
3946             else if (ha->type == GDT_ISA)
3947                 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
3948             else
3949                 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
3950                        (ushort)((ha->brd_phys>>3)&0x1f));
3951             gdth_release_event(hanum);
3952         }
3953
3954     } else {
3955         if (ha->type == GDT_PCIMPR &&
3956             (ha->fw_vers & 0xff) >= 0x1a) {
3957             ha->dvr.size = 0;
3958             ha->dvr.eu.async.ionode = hanum;
3959             ha->dvr.eu.async.status  = ha->status;
3960             /* severity and event_string already set! */
3961         } else {
3962             ha->dvr.size = sizeof(ha->dvr.eu.async);
3963             ha->dvr.eu.async.ionode   = hanum;
3964             ha->dvr.eu.async.service = ha->service;
3965             ha->dvr.eu.async.status  = ha->status;
3966             ha->dvr.eu.async.info    = ha->info;
3967             *(ulong32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
3968         }
3969         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3970         gdth_log_event( &ha->dvr, NULL );
3971
3972         /* new host drive from expand? */
3973         if (ha->service == CACHESERVICE && ha->status == 56) {
3974             TRACE2(("gdth_async_event(): new host drive %d created\n",
3975                     (ushort)ha->info));
3976             /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
3977         }
3978     }
3979     return 1;
3980 }
3981
3982 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3983 {
3984     gdth_stackframe stack;
3985     char *f = NULL;
3986     int i,j;
3987
3988     TRACE2(("gdth_log_event()\n"));
3989     if (dvr->size == 0) {
3990         if (buffer == NULL) {
3991             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3992         } else {
3993             sprintf(buffer,"Adapter %d: %s\n",
3994                 dvr->eu.async.ionode,dvr->event_string);
3995         }
3996     } else if (dvr->eu.async.service == CACHESERVICE &&
3997         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3998         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3999                 dvr->eu.async.status));
4000
4001         f = async_cache_tab[dvr->eu.async.status];
4002
4003         /* i: parameter to push, j: stack element to fill */
4004         for (j=0,i=1; i < f[0]; i+=2) {
4005             switch (f[i+1]) {
4006               case 4:
4007                 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
4008                 break;
4009               case 2:
4010                 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
4011                 break;
4012               case 1:
4013                 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
4014                 break;
4015               default:
4016                 break;
4017             }
4018         }
4019
4020         if (buffer == NULL) {
4021             printk(&f[(int)f[0]],stack);
4022             printk("\n");
4023         } else {
4024             sprintf(buffer,&f[(int)f[0]],stack);
4025         }
4026
4027     } else {
4028         if (buffer == NULL) {
4029             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
4030                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4031         } else {
4032             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
4033                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4034         }
4035     }
4036 }
4037
4038 #ifdef GDTH_STATISTICS
4039 static void gdth_timeout(ulong data)
4040 {
4041     ulong32 i;
4042     Scsi_Cmnd *nscp;
4043     gdth_ha_str *ha;
4044     ulong flags;
4045     int hanum = 0;
4046
4047     ha = HADATA(gdth_ctr_tab[hanum]);
4048     spin_lock_irqsave(&ha->smp_lock, flags);
4049
4050     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
4051         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
4052             ++act_stats;
4053
4054     for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
4055         ++act_rq;
4056
4057     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
4058             act_ints, act_ios, act_stats, act_rq));
4059     act_ints = act_ios = 0;
4060
4061     gdth_timer.expires = jiffies + 30 * HZ;
4062     add_timer(&gdth_timer);
4063     spin_unlock_irqrestore(&ha->smp_lock, flags);
4064 }
4065 #endif
4066
4067 static void __init internal_setup(char *str,int *ints)
4068 {
4069     int i, argc;
4070     char *cur_str, *argv;
4071
4072     TRACE2(("internal_setup() str %s ints[0] %d\n",
4073             str ? str:"NULL", ints ? ints[0]:0));
4074
4075     /* read irq[] from ints[] */
4076     if (ints) {
4077         argc = ints[0];
4078         if (argc > 0) {
4079             if (argc > MAXHA)
4080                 argc = MAXHA;
4081             for (i = 0; i < argc; ++i)
4082                 irq[i] = ints[i+1];
4083         }
4084     }
4085
4086     /* analyse string */
4087     argv = str;
4088     while (argv && (cur_str = strchr(argv, ':'))) {
4089         int val = 0, c = *++cur_str;
4090
4091         if (c == 'n' || c == 'N')
4092             val = 0;
4093         else if (c == 'y' || c == 'Y')
4094             val = 1;
4095         else
4096             val = (int)simple_strtoul(cur_str, NULL, 0);
4097
4098         if (!strncmp(argv, "disable:", 8))
4099             disable = val;
4100         else if (!strncmp(argv, "reserve_mode:", 13))
4101             reserve_mode = val;
4102         else if (!strncmp(argv, "reverse_scan:", 13))
4103             reverse_scan = val;
4104         else if (!strncmp(argv, "hdr_channel:", 12))
4105             hdr_channel = val;
4106         else if (!strncmp(argv, "max_ids:", 8))
4107             max_ids = val;
4108         else if (!strncmp(argv, "rescan:", 7))
4109             rescan = val;
4110         else if (!strncmp(argv, "virt_ctr:", 9))
4111             virt_ctr = val;
4112         else if (!strncmp(argv, "shared_access:", 14))
4113             shared_access = val;
4114         else if (!strncmp(argv, "probe_eisa_isa:", 15))
4115             probe_eisa_isa = val;
4116         else if (!strncmp(argv, "reserve_list:", 13)) {
4117             reserve_list[0] = val;
4118             for (i = 1; i < MAX_RES_ARGS; i++) {
4119                 cur_str = strchr(cur_str, ',');
4120                 if (!cur_str)
4121                     break;
4122                 if (!isdigit((int)*++cur_str)) {
4123                     --cur_str;
4124                     break;
4125                 }
4126                 reserve_list[i] =
4127                     (int)simple_strtoul(cur_str, NULL, 0);
4128             }
4129             if (!cur_str)
4130                 break;
4131             argv = ++cur_str;
4132             continue;
4133         }
4134
4135         if ((argv = strchr(argv, ',')))
4136             ++argv;
4137     }
4138 }
4139
4140 int __init option_setup(char *str)
4141 {
4142     int ints[MAXHA];
4143     char *cur = str;
4144     int i = 1;
4145
4146     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
4147
4148     while (cur && isdigit(*cur) && i <= MAXHA) {
4149         ints[i++] = simple_strtoul(cur, NULL, 0);
4150         if ((cur = strchr(cur, ',')) != NULL) cur++;
4151     }
4152
4153     ints[0] = i - 1;
4154     internal_setup(cur, ints);
4155     return 1;
4156 }
4157
4158 static int __init gdth_detect(struct scsi_host_template *shtp)
4159 {
4160     struct Scsi_Host *shp;
4161     gdth_pci_str pcistr[MAXHA];
4162     gdth_ha_str *ha;
4163     ulong32 isa_bios;
4164     ushort eisa_slot;
4165     int i,hanum,cnt,ctr,err;
4166     unchar b;
4167
4168
4169 #ifdef DEBUG_GDTH
4170     printk("GDT: This driver contains debugging information !! Trace level = %d\n",
4171         DebugState);
4172     printk("     Destination of debugging information: ");
4173 #ifdef __SERIAL__
4174 #ifdef __COM2__
4175     printk("Serial port COM2\n");
4176 #else
4177     printk("Serial port COM1\n");
4178 #endif
4179 #else
4180     printk("Console\n");
4181 #endif
4182     gdth_delay(3000);
4183 #endif
4184
4185     TRACE(("gdth_detect()\n"));
4186
4187     if (disable) {
4188         printk("GDT-HA: Controller driver disabled from command line !\n");
4189         return 0;
4190     }
4191
4192     printk("GDT-HA: Storage RAID Controller Driver. Version: %s \n",GDTH_VERSION_STR);
4193     /* initializations */
4194     gdth_polling = TRUE; b = 0;
4195     gdth_clear_events();
4196
4197     /* As default we do not probe for EISA or ISA controllers */
4198     if (probe_eisa_isa) {
4199         /* scanning for controllers, at first: ISA controller */
4200         for (isa_bios=0xc8000UL; isa_bios<=0xd8000UL; isa_bios+=0x8000UL) {
4201             dma_addr_t scratch_dma_handle;
4202             scratch_dma_handle = 0;
4203
4204             if (gdth_ctr_count >= MAXHA)
4205                 break;
4206             if (gdth_search_isa(isa_bios)) {        /* controller found */
4207                 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4208                 if (shp == NULL)
4209                     continue;
4210
4211                 ha = HADATA(shp);
4212                 if (!gdth_init_isa(isa_bios,ha)) {
4213                     scsi_unregister(shp);
4214                     continue;
4215                 }
4216 #ifdef __ia64__
4217                 break;
4218 #else
4219                 /* controller found and initialized */
4220                 printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4221                        isa_bios,ha->irq,ha->drq);
4222
4223                 if (request_irq(ha->irq,gdth_interrupt,SA_INTERRUPT,"gdth",ha)) {
4224                     printk("GDT-ISA: Unable to allocate IRQ\n");
4225                     scsi_unregister(shp);
4226                     continue;
4227                 }
4228                 if (request_dma(ha->drq,"gdth")) {
4229                     printk("GDT-ISA: Unable to allocate DMA channel\n");
4230                     free_irq(ha->irq,ha);
4231                     scsi_unregister(shp);
4232                     continue;
4233                 }
4234                 set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4235                 enable_dma(ha->drq);
4236                 shp->unchecked_isa_dma = 1;
4237                 shp->irq = ha->irq;
4238                 shp->dma_channel = ha->drq;
4239                 hanum = gdth_ctr_count;
4240                 gdth_ctr_tab[gdth_ctr_count++] = shp;
4241                 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4242
4243                 NUMDATA(shp)->hanum = (ushort)hanum;
4244                 NUMDATA(shp)->busnum= 0;
4245
4246                 ha->pccb = CMDDATA(shp);
4247                 ha->ccb_phys = 0L;
4248                 ha->pdev = NULL;
4249                 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4250                                                     &scratch_dma_handle);
4251                 ha->scratch_phys = scratch_dma_handle;
4252                 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4253                                                 &scratch_dma_handle);
4254                 ha->msg_phys = scratch_dma_handle;
4255 #ifdef INT_COAL
4256                 ha->coal_stat = (gdth_coal_status *)
4257                     pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4258                         MAXOFFSETS, &scratch_dma_handle);
4259                 ha->coal_stat_phys = scratch_dma_handle;
4260 #endif
4261
4262                 ha->scratch_busy = FALSE;
4263                 ha->req_first = NULL;
4264                 ha->tid_cnt = MAX_HDRIVES;
4265                 if (max_ids > 0 && max_ids < ha->tid_cnt)
4266                     ha->tid_cnt = max_ids;
4267                 for (i=0; i<GDTH_MAXCMDS; ++i)
4268                     ha->cmd_tab[i].cmnd = UNUSED_CMND;
4269                 ha->scan_mode = rescan ? 0x10 : 0;
4270
4271                 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4272                     !gdth_search_drives(hanum)) {
4273                     printk("GDT-ISA: Error during device scan\n");
4274                     --gdth_ctr_count;
4275                     --gdth_ctr_vcount;
4276
4277 #ifdef INT_COAL
4278                     if (ha->coal_stat)
4279                         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4280                                             MAXOFFSETS, ha->coal_stat,
4281                                             ha->coal_stat_phys);
4282 #endif
4283                     if (ha->pscratch)
4284                         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4285                                             ha->pscratch, ha->scratch_phys);
4286                     if (ha->pmsg)
4287                         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4288                                             ha->pmsg, ha->msg_phys);
4289
4290                     free_irq(ha->irq,ha);
4291                     scsi_unregister(shp);
4292                     continue;
4293                 }
4294                 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4295                     hdr_channel = ha->bus_cnt;
4296                 ha->virt_bus = hdr_channel;
4297
4298 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) && \
4299     LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4300                 shp->highmem_io  = 0;
4301 #endif
4302                 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4303                     shp->max_cmd_len = 16;
4304
4305                 shp->max_id      = ha->tid_cnt;
4306                 shp->max_lun     = MAXLUN;
4307                 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4308                 if (virt_ctr) {
4309                     virt_ctr = 1;
4310                     /* register addit. SCSI channels as virtual controllers */
4311                     for (b = 1; b < ha->bus_cnt + 1; ++b) {
4312                         shp = scsi_register(shtp,sizeof(gdth_num_str));
4313                         shp->unchecked_isa_dma = 1;
4314                         shp->irq = ha->irq;
4315                         shp->dma_channel = ha->drq;
4316                         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4317                         NUMDATA(shp)->hanum = (ushort)hanum;
4318                         NUMDATA(shp)->busnum = b;
4319                     }
4320                 }
4321
4322                 spin_lock_init(&ha->smp_lock);
4323                 gdth_enable_int(hanum);
4324 #endif /* !__ia64__ */
4325             }
4326         }
4327
4328         /* scanning for EISA controllers */
4329         for (eisa_slot=0x1000; eisa_slot<=0x8000; eisa_slot+=0x1000) {
4330             dma_addr_t scratch_dma_handle;
4331             scratch_dma_handle = 0;
4332
4333             if (gdth_ctr_count >= MAXHA)
4334                 break;
4335             if (gdth_search_eisa(eisa_slot)) {      /* controller found */
4336                 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4337                 if (shp == NULL)
4338                     continue;
4339
4340                 ha = HADATA(shp);
4341                 if (!gdth_init_eisa(eisa_slot,ha)) {
4342                     scsi_unregister(shp);
4343                     continue;
4344                 }
4345                 /* controller found and initialized */
4346                 printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4347                        eisa_slot>>12,ha->irq);
4348
4349                 if (request_irq(ha->irq,gdth_interrupt,SA_INTERRUPT,"gdth",ha)) {
4350                     printk("GDT-EISA: Unable to allocate IRQ\n");
4351                     scsi_unregister(shp);
4352                     continue;
4353                 }
4354                 shp->unchecked_isa_dma = 0;
4355                 shp->irq = ha->irq;
4356                 shp->dma_channel = 0xff;
4357                 hanum = gdth_ctr_count;
4358                 gdth_ctr_tab[gdth_ctr_count++] = shp;
4359                 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4360
4361                 NUMDATA(shp)->hanum = (ushort)hanum;
4362                 NUMDATA(shp)->busnum= 0;
4363                 TRACE2(("EISA detect Bus 0: hanum %d\n",
4364                         NUMDATA(shp)->hanum));
4365
4366                 ha->pccb = CMDDATA(shp);
4367                 ha->ccb_phys = 0L;
4368
4369                 ha->pdev = NULL;
4370                 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4371                                                     &scratch_dma_handle);
4372                 ha->scratch_phys = scratch_dma_handle;
4373                 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4374                                                 &scratch_dma_handle);
4375                 ha->msg_phys = scratch_dma_handle;
4376 #ifdef INT_COAL
4377                 ha->coal_stat = (gdth_coal_status *)
4378                     pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4379                                          MAXOFFSETS, &scratch_dma_handle);
4380                 ha->coal_stat_phys = scratch_dma_handle;
4381 #endif
4382                 ha->ccb_phys =
4383                     pci_map_single(ha->pdev,ha->pccb,
4384                                    sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4385                 ha->scratch_busy = FALSE;
4386                 ha->req_first = NULL;
4387                 ha->tid_cnt = MAX_HDRIVES;
4388                 if (max_ids > 0 && max_ids < ha->tid_cnt)
4389                     ha->tid_cnt = max_ids;
4390                 for (i=0; i<GDTH_MAXCMDS; ++i)
4391                     ha->cmd_tab[i].cmnd = UNUSED_CMND;
4392                 ha->scan_mode = rescan ? 0x10 : 0;
4393
4394                 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4395                     !gdth_search_drives(hanum)) {
4396                     printk("GDT-EISA: Error during device scan\n");
4397                     --gdth_ctr_count;
4398                     --gdth_ctr_vcount;
4399 #ifdef INT_COAL
4400                     if (ha->coal_stat)
4401                         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4402                                             MAXOFFSETS, ha->coal_stat,
4403                                             ha->coal_stat_phys);
4404 #endif
4405                     if (ha->pscratch)
4406                         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4407                                             ha->pscratch, ha->scratch_phys);
4408                     if (ha->pmsg)
4409                         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4410                                             ha->pmsg, ha->msg_phys);
4411                     if (ha->ccb_phys)
4412                         pci_unmap_single(ha->pdev,ha->ccb_phys,
4413                                         sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4414                     free_irq(ha->irq,ha);
4415                     scsi_unregister(shp);
4416                     continue;
4417                 }
4418                 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4419                     hdr_channel = ha->bus_cnt;
4420                 ha->virt_bus = hdr_channel;
4421
4422 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) && \
4423     LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4424                 shp->highmem_io  = 0;
4425 #endif
4426                 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4427                     shp->max_cmd_len = 16;
4428
4429                 shp->max_id      = ha->tid_cnt;
4430                 shp->max_lun     = MAXLUN;
4431                 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4432                 if (virt_ctr) {
4433                     virt_ctr = 1;
4434                     /* register addit. SCSI channels as virtual controllers */
4435                     for (b = 1; b < ha->bus_cnt + 1; ++b) {
4436                         shp = scsi_register(shtp,sizeof(gdth_num_str));
4437                         shp->unchecked_isa_dma = 0;
4438                         shp->irq = ha->irq;
4439                         shp->dma_channel = 0xff;
4440                         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4441                         NUMDATA(shp)->hanum = (ushort)hanum;
4442                         NUMDATA(shp)->busnum = b;
4443                     }
4444                 }
4445
4446                 spin_lock_init(&ha->smp_lock);
4447                 gdth_enable_int(hanum);
4448             }
4449         }
4450     }
4451
4452     /* scanning for PCI controllers */
4453     cnt = gdth_search_pci(pcistr);
4454     printk("GDT-HA: Found %d PCI Storage RAID Controllers\n",cnt);
4455     gdth_sort_pci(pcistr,cnt);
4456     for (ctr = 0; ctr < cnt; ++ctr) {
4457         dma_addr_t scratch_dma_handle;
4458         scratch_dma_handle = 0;
4459
4460         if (gdth_ctr_count >= MAXHA)
4461             break;
4462         shp = scsi_register(shtp,sizeof(gdth_ext_str));
4463         if (shp == NULL)
4464             continue;
4465
4466         ha = HADATA(shp);
4467         if (!gdth_init_pci(&pcistr[ctr],ha)) {
4468             scsi_unregister(shp);
4469             continue;
4470         }
4471         /* controller found and initialized */
4472         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4473                pcistr[ctr].bus,PCI_SLOT(pcistr[ctr].device_fn),ha->irq);
4474
4475         if (request_irq(ha->irq, gdth_interrupt,
4476                         SA_INTERRUPT|SA_SHIRQ, "gdth", ha))
4477         {
4478             printk("GDT-PCI: Unable to allocate IRQ\n");
4479             scsi_unregister(shp);
4480             continue;
4481         }
4482         shp->unchecked_isa_dma = 0;
4483         shp->irq = ha->irq;
4484         shp->dma_channel = 0xff;
4485         hanum = gdth_ctr_count;
4486         gdth_ctr_tab[gdth_ctr_count++] = shp;
4487         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4488
4489         NUMDATA(shp)->hanum = (ushort)hanum;
4490         NUMDATA(shp)->busnum= 0;
4491
4492         ha->pccb = CMDDATA(shp);
4493         ha->ccb_phys = 0L;
4494
4495         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4496                                             &scratch_dma_handle);
4497         ha->scratch_phys = scratch_dma_handle;
4498         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4499                                         &scratch_dma_handle);
4500         ha->msg_phys = scratch_dma_handle;
4501 #ifdef INT_COAL
4502         ha->coal_stat = (gdth_coal_status *)
4503             pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4504                                  MAXOFFSETS, &scratch_dma_handle);
4505         ha->coal_stat_phys = scratch_dma_handle;
4506 #endif
4507         ha->scratch_busy = FALSE;
4508         ha->req_first = NULL;
4509         ha->tid_cnt = pcistr[ctr].device_id >= 0x200 ? MAXID : MAX_HDRIVES;
4510         if (max_ids > 0 && max_ids < ha->tid_cnt)
4511             ha->tid_cnt = max_ids;
4512         for (i=0; i<GDTH_MAXCMDS; ++i)
4513             ha->cmd_tab[i].cmnd = UNUSED_CMND;
4514         ha->scan_mode = rescan ? 0x10 : 0;
4515
4516         err = FALSE;
4517         if (ha->pscratch == NULL || ha->pmsg == NULL ||
4518             !gdth_search_drives(hanum)) {
4519             err = TRUE;
4520         } else {
4521             if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4522                 hdr_channel = ha->bus_cnt;
4523             ha->virt_bus = hdr_channel;
4524
4525
4526 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4527             scsi_set_pci_device(shp, pcistr[ctr].pdev);
4528 #endif
4529             if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat &GDT_64BIT)||
4530                 /* 64-bit DMA only supported from FW >= x.43 */
4531                 (!ha->dma64_support)) {
4532                 if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
4533                     printk(KERN_WARNING "GDT-PCI %d: Unable to set 32-bit DMA\n", hanum);
4534                     err = TRUE;
4535                 }
4536             } else {
4537                 shp->max_cmd_len = 16;
4538                 if (!pci_set_dma_mask(pcistr[ctr].pdev, DMA_64BIT_MASK)) {
4539                     printk("GDT-PCI %d: 64-bit DMA enabled\n", hanum);
4540                 } else if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
4541                     printk(KERN_WARNING "GDT-PCI %d: Unable to set 64/32-bit DMA\n", hanum);
4542                     err = TRUE;
4543                 }
4544             }
4545         }
4546
4547         if (err) {
4548             printk("GDT-PCI %d: Error during device scan\n", hanum);
4549             --gdth_ctr_count;
4550             --gdth_ctr_vcount;
4551 #ifdef INT_COAL
4552             if (ha->coal_stat)
4553                 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4554                                     MAXOFFSETS, ha->coal_stat,
4555                                     ha->coal_stat_phys);
4556 #endif
4557             if (ha->pscratch)
4558                 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4559                                     ha->pscratch, ha->scratch_phys);
4560             if (ha->pmsg)
4561                 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4562                                     ha->pmsg, ha->msg_phys);
4563             free_irq(ha->irq,ha);
4564             scsi_unregister(shp);
4565             continue;
4566         }
4567
4568         shp->max_id      = ha->tid_cnt;
4569         shp->max_lun     = MAXLUN;
4570         shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4571         if (virt_ctr) {
4572             virt_ctr = 1;
4573             /* register addit. SCSI channels as virtual controllers */
4574             for (b = 1; b < ha->bus_cnt + 1; ++b) {
4575                 shp = scsi_register(shtp,sizeof(gdth_num_str));
4576                 shp->unchecked_isa_dma = 0;
4577                 shp->irq = ha->irq;
4578                 shp->dma_channel = 0xff;
4579                 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4580                 NUMDATA(shp)->hanum = (ushort)hanum;
4581                 NUMDATA(shp)->busnum = b;
4582             }
4583         }
4584
4585         spin_lock_init(&ha->smp_lock);
4586         gdth_enable_int(hanum);
4587     }
4588
4589     TRACE2(("gdth_detect() %d controller detected\n",gdth_ctr_count));
4590     if (gdth_ctr_count > 0) {
4591 #ifdef GDTH_STATISTICS
4592         TRACE2(("gdth_detect(): Initializing timer !\n"));
4593         init_timer(&gdth_timer);
4594         gdth_timer.expires = jiffies + HZ;
4595         gdth_timer.data = 0L;
4596         gdth_timer.function = gdth_timeout;
4597         add_timer(&gdth_timer);
4598 #endif
4599         major = register_chrdev(0,"gdth",&gdth_fops);
4600         notifier_disabled = 0;
4601         register_reboot_notifier(&gdth_notifier);
4602     }
4603     gdth_polling = FALSE;
4604     return gdth_ctr_vcount;
4605 }
4606
4607 static int gdth_release(struct Scsi_Host *shp)
4608 {
4609     int hanum;
4610     gdth_ha_str *ha;
4611
4612     TRACE2(("gdth_release()\n"));
4613     if (NUMDATA(shp)->busnum == 0) {
4614         hanum = NUMDATA(shp)->hanum;
4615         ha    = HADATA(gdth_ctr_tab[hanum]);
4616         if (ha->sdev) {
4617             scsi_free_host_dev(ha->sdev);
4618             ha->sdev = NULL;
4619         }
4620         gdth_flush(hanum);
4621
4622         if (shp->irq) {
4623             free_irq(shp->irq,ha);
4624         }
4625 #ifndef __ia64__
4626         if (shp->dma_channel != 0xff) {
4627             free_dma(shp->dma_channel);
4628         }
4629 #endif
4630 #ifdef INT_COAL
4631         if (ha->coal_stat)
4632             pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4633                                 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
4634 #endif
4635         if (ha->pscratch)
4636             pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4637                                 ha->pscratch, ha->scratch_phys);
4638         if (ha->pmsg)
4639             pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4640                                 ha->pmsg, ha->msg_phys);
4641         if (ha->ccb_phys)
4642             pci_unmap_single(ha->pdev,ha->ccb_phys,
4643                              sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4644         gdth_ctr_released++;
4645         TRACE2(("gdth_release(): HA %d of %d\n",
4646                 gdth_ctr_released, gdth_ctr_count));
4647
4648         if (gdth_ctr_released == gdth_ctr_count) {
4649 #ifdef GDTH_STATISTICS
4650             del_timer(&gdth_timer);
4651 #endif
4652             unregister_chrdev(major,"gdth");
4653             unregister_reboot_notifier(&gdth_notifier);
4654         }
4655     }
4656
4657     scsi_unregister(shp);
4658     return 0;
4659 }
4660
4661
4662 static const char *gdth_ctr_name(int hanum)
4663 {
4664     gdth_ha_str *ha;
4665
4666     TRACE2(("gdth_ctr_name()\n"));
4667
4668     ha    = HADATA(gdth_ctr_tab[hanum]);
4669
4670     if (ha->type == GDT_EISA) {
4671         switch (ha->stype) {
4672           case GDT3_ID:
4673             return("GDT3000/3020");
4674           case GDT3A_ID:
4675             return("GDT3000A/3020A/3050A");
4676           case GDT3B_ID:
4677             return("GDT3000B/3010A");
4678         }
4679     } else if (ha->type == GDT_ISA) {
4680         return("GDT2000/2020");
4681     } else if (ha->type == GDT_PCI) {
4682         switch (ha->stype) {
4683           case PCI_DEVICE_ID_VORTEX_GDT60x0:
4684             return("GDT6000/6020/6050");
4685           case PCI_DEVICE_ID_VORTEX_GDT6000B:
4686             return("GDT6000B/6010");
4687         }
4688     }
4689     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
4690
4691     return("");
4692 }
4693
4694 static const char *gdth_info(struct Scsi_Host *shp)
4695 {
4696     int hanum;
4697     gdth_ha_str *ha;
4698
4699     TRACE2(("gdth_info()\n"));
4700     hanum = NUMDATA(shp)->hanum;
4701     ha    = HADATA(gdth_ctr_tab[hanum]);
4702
4703     return ((const char *)ha->binfo.type_string);
4704 }
4705
4706 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
4707 {
4708     int i, hanum;
4709     gdth_ha_str *ha;
4710     ulong flags;
4711     Scsi_Cmnd *cmnd;
4712     unchar b;
4713
4714     TRACE2(("gdth_eh_bus_reset()\n"));
4715
4716     hanum = NUMDATA(scp->device->host)->hanum;
4717     b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
4718     ha    = HADATA(gdth_ctr_tab[hanum]);
4719
4720     /* clear command tab */
4721     spin_lock_irqsave(&ha->smp_lock, flags);
4722     for (i = 0; i < GDTH_MAXCMDS; ++i) {
4723         cmnd = ha->cmd_tab[i].cmnd;
4724         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
4725             ha->cmd_tab[i].cmnd = UNUSED_CMND;
4726     }
4727     spin_unlock_irqrestore(&ha->smp_lock, flags);
4728
4729     if (b == ha->virt_bus) {
4730         /* host drives */
4731         for (i = 0; i < MAX_HDRIVES; ++i) {
4732             if (ha->hdr[i].present) {
4733                 spin_lock_irqsave(&ha->smp_lock, flags);
4734                 gdth_polling = TRUE;
4735                 while (gdth_test_busy(hanum))
4736                     gdth_delay(0);
4737                 if (gdth_internal_cmd(hanum, CACHESERVICE,
4738                                       GDT_CLUST_RESET, i, 0, 0))
4739                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4740                 gdth_polling = FALSE;
4741                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4742             }
4743         }
4744     } else {
4745         /* raw devices */
4746         spin_lock_irqsave(&ha->smp_lock, flags);
4747         for (i = 0; i < MAXID; ++i)
4748             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4749         gdth_polling = TRUE;
4750         while (gdth_test_busy(hanum))
4751             gdth_delay(0);
4752         gdth_internal_cmd(hanum, SCSIRAWSERVICE, GDT_RESET_BUS,
4753                           BUS_L2P(ha,b), 0, 0);
4754         gdth_polling = FALSE;
4755         spin_unlock_irqrestore(&ha->smp_lock, flags);
4756     }
4757     return SUCCESS;
4758 }
4759
4760 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4761 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
4762 #else
4763 static int gdth_bios_param(Disk *disk,kdev_t dev,int *ip)
4764 #endif
4765 {
4766     unchar b, t;
4767     int hanum;
4768     gdth_ha_str *ha;
4769     struct scsi_device *sd;
4770     unsigned capacity;
4771
4772 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4773     sd = sdev;
4774     capacity = cap;
4775 #else
4776     sd = disk->device;
4777     capacity = disk->capacity;
4778 #endif
4779     hanum = NUMDATA(sd->host)->hanum;
4780     b = virt_ctr ? NUMDATA(sd->host)->busnum : sd->channel;
4781     t = sd->id;
4782     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4783     ha = HADATA(gdth_ctr_tab[hanum]);
4784
4785     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4786         /* raw device or host drive without mapping information */
4787         TRACE2(("Evaluate mapping\n"));
4788         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
4789     } else {
4790         ip[0] = ha->hdr[t].heads;
4791         ip[1] = ha->hdr[t].secs;
4792         ip[2] = capacity / ip[0] / ip[1];
4793     }
4794
4795     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4796             ip[0],ip[1],ip[2]));
4797     return 0;
4798 }
4799
4800
4801 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *))
4802 {
4803     int hanum;
4804     int priority;
4805
4806     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4807
4808     scp->scsi_done = (void *)done;
4809     scp->SCp.have_data_in = 1;
4810     scp->SCp.phase = -1;
4811     scp->SCp.sent_command = -1;
4812     scp->SCp.Status = GDTH_MAP_NONE;
4813     scp->SCp.buffer = (struct scatterlist *)NULL;
4814
4815     hanum = NUMDATA(scp->device->host)->hanum;
4816 #ifdef GDTH_STATISTICS
4817     ++act_ios;
4818 #endif
4819
4820     priority = DEFAULT_PRI;
4821     if (scp->done == gdth_scsi_done)
4822         priority = scp->SCp.this_residual;
4823     gdth_update_timeout(hanum, scp, scp->timeout_per_command * 6);
4824     gdth_putq( hanum, scp, priority );
4825     gdth_next( hanum );
4826     return 0;
4827 }
4828
4829
4830 static int gdth_open(struct inode *inode, struct file *filep)
4831 {
4832     gdth_ha_str *ha;
4833     int i;
4834
4835     for (i = 0; i < gdth_ctr_count; i++) {
4836         ha = HADATA(gdth_ctr_tab[i]);
4837         if (!ha->sdev)
4838             ha->sdev = scsi_get_host_dev(gdth_ctr_tab[i]);
4839     }
4840
4841     TRACE(("gdth_open()\n"));
4842     return 0;
4843 }
4844
4845 static int gdth_close(struct inode *inode, struct file *filep)
4846 {
4847     TRACE(("gdth_close()\n"));
4848     return 0;
4849 }
4850
4851 static int ioc_event(void __user *arg)
4852 {
4853     gdth_ioctl_event evt;
4854     gdth_ha_str *ha;
4855     ulong flags;
4856
4857     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)) ||
4858         evt.ionode >= gdth_ctr_count)
4859         return -EFAULT;
4860     ha = HADATA(gdth_ctr_tab[evt.ionode]);
4861
4862     if (evt.erase == 0xff) {
4863         if (evt.event.event_source == ES_TEST)
4864             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4865         else if (evt.event.event_source == ES_DRIVER)
4866             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4867         else if (evt.event.event_source == ES_SYNC)
4868             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4869         else
4870             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4871         spin_lock_irqsave(&ha->smp_lock, flags);
4872         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4873                          &evt.event.event_data);
4874         spin_unlock_irqrestore(&ha->smp_lock, flags);
4875     } else if (evt.erase == 0xfe) {
4876         gdth_clear_events();
4877     } else if (evt.erase == 0) {
4878         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4879     } else {
4880         gdth_readapp_event(ha, evt.erase, &evt.event);
4881     }
4882     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4883         return -EFAULT;
4884     return 0;
4885 }
4886
4887 static int ioc_lockdrv(void __user *arg)
4888 {
4889     gdth_ioctl_lockdrv ldrv;
4890     unchar i, j;
4891     ulong flags;
4892     gdth_ha_str *ha;
4893
4894     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)) ||
4895         ldrv.ionode >= gdth_ctr_count)
4896         return -EFAULT;
4897     ha = HADATA(gdth_ctr_tab[ldrv.ionode]);
4898
4899     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4900         j = ldrv.drives[i];
4901         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4902             continue;
4903         if (ldrv.lock) {
4904             spin_lock_irqsave(&ha->smp_lock, flags);
4905             ha->hdr[j].lock = 1;
4906             spin_unlock_irqrestore(&ha->smp_lock, flags);
4907             gdth_wait_completion(ldrv.ionode, ha->bus_cnt, j);
4908             gdth_stop_timeout(ldrv.ionode, ha->bus_cnt, j);
4909         } else {
4910             spin_lock_irqsave(&ha->smp_lock, flags);
4911             ha->hdr[j].lock = 0;
4912             spin_unlock_irqrestore(&ha->smp_lock, flags);
4913             gdth_start_timeout(ldrv.ionode, ha->bus_cnt, j);
4914             gdth_next(ldrv.ionode);
4915         }
4916     }
4917     return 0;
4918 }
4919
4920 static int ioc_resetdrv(void __user *arg, char *cmnd)
4921 {
4922     gdth_ioctl_reset res;
4923     gdth_cmd_str cmd;
4924     int hanum;
4925     gdth_ha_str *ha;
4926 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4927     Scsi_Request *srp;
4928 #else
4929     Scsi_Cmnd *scp;
4930 #endif
4931
4932     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4933         res.ionode >= gdth_ctr_count || res.number >= MAX_HDRIVES)
4934         return -EFAULT;
4935     hanum = res.ionode;
4936     ha = HADATA(gdth_ctr_tab[hanum]);
4937
4938     if (!ha->hdr[res.number].present)
4939         return 0;
4940     memset(&cmd, 0, sizeof(gdth_cmd_str));
4941     cmd.Service = CACHESERVICE;
4942     cmd.OpCode = GDT_CLUST_RESET;
4943     if (ha->cache_feat & GDT_64BIT)
4944         cmd.u.cache64.DeviceNo = res.number;
4945     else
4946         cmd.u.cache.DeviceNo = res.number;
4947 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4948     srp  = scsi_allocate_request(ha->sdev, GFP_KERNEL);
4949     if (!srp)
4950         return -ENOMEM;
4951     srp->sr_cmd_len = 12;
4952     srp->sr_use_sg = 0;
4953     gdth_do_req(srp, &cmd, cmnd, 30);
4954     res.status = (ushort)srp->sr_command->SCp.Status;
4955     scsi_release_request(srp);
4956 #else
4957     scp  = scsi_allocate_device(ha->sdev, 1, FALSE);
4958     if (!scp)
4959         return -ENOMEM;
4960     scp->cmd_len = 12;
4961     scp->use_sg = 0;
4962     gdth_do_cmd(scp, &cmd, cmnd, 30);
4963     res.status = (ushort)scp->SCp.Status;
4964     scsi_release_command(scp);
4965 #endif
4966
4967     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4968         return -EFAULT;
4969     return 0;
4970 }
4971
4972 static int ioc_general(void __user *arg, char *cmnd)
4973 {
4974     gdth_ioctl_general gen;
4975     char *buf = NULL;
4976     ulong64 paddr;
4977     int hanum;
4978         gdth_ha_str *ha;
4979 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4980         Scsi_Request *srp;
4981 #else
4982         Scsi_Cmnd *scp;
4983 #endif
4984
4985     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)) ||
4986         gen.ionode >= gdth_ctr_count)
4987         return -EFAULT;
4988     hanum = gen.ionode;
4989     ha = HADATA(gdth_ctr_tab[hanum]);
4990     if (gen.data_len + gen.sense_len != 0) {
4991         if (!(buf = gdth_ioctl_alloc(hanum, gen.data_len + gen.sense_len,
4992                                      FALSE, &paddr)))
4993             return -EFAULT;
4994         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4995                            gen.data_len + gen.sense_len)) {
4996             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
4997             return -EFAULT;
4998         }
4999
5000         if (gen.command.OpCode == GDT_IOCTL) {
5001             gen.command.u.ioctl.p_param = paddr;
5002         } else if (gen.command.Service == CACHESERVICE) {
5003             if (ha->cache_feat & GDT_64BIT) {
5004                 /* copy elements from 32-bit IOCTL structure */
5005                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
5006                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
5007                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
5008                 /* addresses */
5009                 if (ha->cache_feat & SCATTER_GATHER) {
5010                     gen.command.u.cache64.DestAddr = (ulong64)-1;
5011                     gen.command.u.cache64.sg_canz = 1;
5012                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
5013                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
5014                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
5015                 } else {
5016                     gen.command.u.cache64.DestAddr = paddr;
5017                     gen.command.u.cache64.sg_canz = 0;
5018                 }
5019             } else {
5020                 if (ha->cache_feat & SCATTER_GATHER) {
5021                     gen.command.u.cache.DestAddr = 0xffffffff;
5022                     gen.command.u.cache.sg_canz = 1;
5023                     gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
5024                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
5025                     gen.command.u.cache.sg_lst[1].sg_len = 0;
5026                 } else {
5027                     gen.command.u.cache.DestAddr = paddr;
5028                     gen.command.u.cache.sg_canz = 0;
5029                 }
5030             }
5031         } else if (gen.command.Service == SCSIRAWSERVICE) {
5032             if (ha->raw_feat & GDT_64BIT) {
5033                 /* copy elements from 32-bit IOCTL structure */
5034                 char cmd[16];
5035                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
5036                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
5037                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
5038                 gen.command.u.raw64.target = gen.command.u.raw.target;
5039                 memcpy(cmd, gen.command.u.raw.cmd, 16);
5040                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
5041                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
5042                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
5043                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
5044                 /* addresses */
5045                 if (ha->raw_feat & SCATTER_GATHER) {
5046                     gen.command.u.raw64.sdata = (ulong64)-1;
5047                     gen.command.u.raw64.sg_ranz = 1;
5048                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
5049                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
5050                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
5051                 } else {
5052                     gen.command.u.raw64.sdata = paddr;
5053                     gen.command.u.raw64.sg_ranz = 0;
5054                 }
5055                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
5056             } else {
5057                 if (ha->raw_feat & SCATTER_GATHER) {
5058                     gen.command.u.raw.sdata = 0xffffffff;
5059                     gen.command.u.raw.sg_ranz = 1;
5060                     gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
5061                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
5062                     gen.command.u.raw.sg_lst[1].sg_len = 0;
5063                 } else {
5064                     gen.command.u.raw.sdata = paddr;
5065                     gen.command.u.raw.sg_ranz = 0;
5066                 }
5067                 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
5068             }
5069         } else {
5070             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5071             return -EFAULT;
5072         }
5073     }
5074
5075 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5076     srp  = scsi_allocate_request(ha->sdev, GFP_KERNEL);
5077     if (!srp)
5078         return -ENOMEM;
5079     srp->sr_cmd_len = 12;
5080     srp->sr_use_sg = 0;
5081     gdth_do_req(srp, &gen.command, cmnd, gen.timeout);
5082     gen.status = srp->sr_command->SCp.Status;
5083     gen.info = srp->sr_command->SCp.Message;
5084     scsi_release_request(srp);
5085 #else
5086     scp  = scsi_allocate_device(ha->sdev, 1, FALSE);
5087     if (!scp)
5088         return -ENOMEM;
5089     scp->cmd_len = 12;
5090     scp->use_sg = 0;
5091     gdth_do_cmd(scp, &gen.command, cmnd, gen.timeout);
5092     gen.status = scp->SCp.Status;
5093     gen.info = scp->SCp.Message;
5094     scsi_release_command(scp);
5095 #endif
5096
5097     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
5098                      gen.data_len + gen.sense_len)) {
5099         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5100         return -EFAULT;
5101     }
5102     if (copy_to_user(arg, &gen,
5103         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
5104         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5105         return -EFAULT;
5106     }
5107     gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5108     return 0;
5109 }
5110
5111 static int ioc_hdrlist(void __user *arg, char *cmnd)
5112 {
5113     gdth_ioctl_rescan *rsc;
5114     gdth_cmd_str *cmd;
5115     gdth_ha_str *ha;
5116     unchar i;
5117     int hanum, rc = -ENOMEM;
5118 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5119     Scsi_Request *srp;
5120 #else
5121     Scsi_Cmnd *scp;
5122 #endif
5123
5124     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
5125     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
5126     if (!rsc || !cmd)
5127         goto free_fail;
5128
5129     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
5130         rsc->ionode >= gdth_ctr_count) {
5131         rc = -EFAULT;
5132         goto free_fail;
5133     }
5134     hanum = rsc->ionode;
5135     ha = HADATA(gdth_ctr_tab[hanum]);
5136     memset(cmd, 0, sizeof(gdth_cmd_str));
5137
5138 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5139     srp  = scsi_allocate_request(ha->sdev, GFP_KERNEL);
5140     if (!srp)
5141         goto free_fail;
5142     srp->sr_cmd_len = 12;
5143     srp->sr_use_sg = 0;
5144 #else
5145     scp  = scsi_allocate_device(ha->sdev, 1, FALSE);
5146     if (!scp)
5147         goto free_fail;
5148     scp->cmd_len = 12;
5149     scp->use_sg = 0;
5150 #endif
5151
5152     for (i = 0; i < MAX_HDRIVES; ++i) {
5153         if (!ha->hdr[i].present) {
5154             rsc->hdr_list[i].bus = 0xff;
5155             continue;
5156         }
5157         rsc->hdr_list[i].bus = ha->virt_bus;
5158         rsc->hdr_list[i].target = i;
5159         rsc->hdr_list[i].lun = 0;
5160         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5161         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
5162             cmd->Service = CACHESERVICE;
5163             cmd->OpCode = GDT_CLUST_INFO;
5164             if (ha->cache_feat & GDT_64BIT)
5165                 cmd->u.cache64.DeviceNo = i;
5166             else
5167                 cmd->u.cache.DeviceNo = i;
5168 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5169             gdth_do_req(srp, cmd, cmnd, 30);
5170             if (srp->sr_command->SCp.Status == S_OK)
5171                 rsc->hdr_list[i].cluster_type = srp->sr_command->SCp.Message;
5172 #else
5173             gdth_do_cmd(scp, cmd, cmnd, 30);
5174             if (scp->SCp.Status == S_OK)
5175                 rsc->hdr_list[i].cluster_type = scp->SCp.Message;
5176 #endif
5177         }
5178     }
5179 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5180     scsi_release_request(srp);
5181 #else
5182     scsi_release_command(scp);
5183 #endif
5184
5185     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
5186         rc = -EFAULT;
5187     else
5188         rc = 0;
5189
5190 free_fail:
5191     kfree(rsc);
5192     kfree(cmd);
5193     return rc;
5194 }
5195
5196 static int ioc_rescan(void __user *arg, char *cmnd)
5197 {
5198     gdth_ioctl_rescan *rsc;
5199     gdth_cmd_str *cmd;
5200     ushort i, status, hdr_cnt;
5201     ulong32 info;
5202     int hanum, cyls, hds, secs;
5203     int rc = -ENOMEM;
5204     ulong flags;
5205     gdth_ha_str *ha;
5206 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5207     Scsi_Request *srp;
5208 #else
5209     Scsi_Cmnd *scp;
5210 #endif
5211
5212     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
5213     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
5214     if (!cmd || !rsc)
5215         goto free_fail;
5216
5217     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
5218         rsc->ionode >= gdth_ctr_count) {
5219         rc = -EFAULT;
5220         goto free_fail;
5221     }
5222     hanum = rsc->ionode;
5223     ha = HADATA(gdth_ctr_tab[hanum]);
5224     memset(cmd, 0, sizeof(gdth_cmd_str));
5225
5226 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5227     srp  = scsi_allocate_request(ha->sdev, GFP_KERNEL);
5228     if (!srp)
5229         goto free_fail;
5230     srp->sr_cmd_len = 12;
5231     srp->sr_use_sg = 0;
5232 #else
5233     scp  = scsi_allocate_device(ha->sdev, 1, FALSE);
5234     if (!scp)
5235         goto free_fail;
5236     scp->cmd_len = 12;
5237     scp->use_sg = 0;
5238 #endif
5239
5240     if (rsc->flag == 0) {
5241         /* old method: re-init. cache service */
5242         cmd->Service = CACHESERVICE;
5243         if (ha->cache_feat & GDT_64BIT) {
5244             cmd->OpCode = GDT_X_INIT_HOST;
5245             cmd->u.cache64.DeviceNo = LINUX_OS;
5246         } else {
5247             cmd->OpCode = GDT_INIT;
5248             cmd->u.cache.DeviceNo = LINUX_OS;
5249         }
5250 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5251         gdth_do_req(srp, cmd, cmnd, 30);
5252         status = (ushort)srp->sr_command->SCp.Status;
5253         info = (ulong32)srp->sr_command->SCp.Message;
5254 #elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
5255         gdth_do_cmd(scp, cmd, cmnd, 30);
5256         status = (ushort)scp->SCp.Status;
5257         info = (ulong32)scp->SCp.Message;
5258 #else
5259         gdth_do_cmd(&scp, cmd, cmnd, 30);
5260         status = (ushort)scp.SCp.Status;
5261         info = (ulong32)scp.SCp.Message;
5262 #endif
5263         i = 0;
5264         hdr_cnt = (status == S_OK ? (ushort)info : 0);
5265     } else {
5266         i = rsc->hdr_no;
5267         hdr_cnt = i + 1;
5268     }
5269
5270     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
5271         cmd->Service = CACHESERVICE;
5272         cmd->OpCode = GDT_INFO;
5273         if (ha->cache_feat & GDT_64BIT)
5274             cmd->u.cache64.DeviceNo = i;
5275         else
5276             cmd->u.cache.DeviceNo = i;
5277 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5278         gdth_do_req(srp, cmd, cmnd, 30);
5279         status = (ushort)srp->sr_command->SCp.Status;
5280         info = (ulong32)srp->sr_command->SCp.Message;
5281 #else
5282         gdth_do_cmd(scp, cmd, cmnd, 30);
5283         status = (ushort)scp->SCp.Status;
5284         info = (ulong32)scp->SCp.Message;
5285 #endif
5286         spin_lock_irqsave(&ha->smp_lock, flags);
5287         rsc->hdr_list[i].bus = ha->virt_bus;
5288         rsc->hdr_list[i].target = i;
5289         rsc->hdr_list[i].lun = 0;
5290         if (status != S_OK) {
5291             ha->hdr[i].present = FALSE;
5292         } else {
5293             ha->hdr[i].present = TRUE;
5294             ha->hdr[i].size = info;
5295             /* evaluate mapping */
5296             ha->hdr[i].size &= ~SECS32;
5297             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
5298             ha->hdr[i].heads = hds;
5299             ha->hdr[i].secs = secs;
5300             /* round size */
5301             ha->hdr[i].size = cyls * hds * secs;
5302         }
5303         spin_unlock_irqrestore(&ha->smp_lock, flags);
5304         if (status != S_OK)
5305             continue;
5306
5307         /* extended info, if GDT_64BIT, for drives > 2 TB */
5308         /* but we need ha->info2, not yet stored in scp->SCp */
5309
5310         /* devtype, cluster info, R/W attribs */
5311         cmd->Service = CACHESERVICE;
5312         cmd->OpCode = GDT_DEVTYPE;
5313         if (ha->cache_feat & GDT_64BIT)
5314             cmd->u.cache64.DeviceNo = i;
5315         else
5316             cmd->u.cache.DeviceNo = i;
5317 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5318         gdth_do_req(srp, cmd, cmnd, 30);
5319         status = (ushort)srp->sr_command->SCp.Status;
5320         info = (ulong32)srp->sr_command->SCp.Message;
5321 #else
5322         gdth_do_cmd(scp, cmd, cmnd, 30);
5323         status = (ushort)scp->SCp.Status;
5324         info = (ulong32)scp->SCp.Message;
5325 #endif
5326         spin_lock_irqsave(&ha->smp_lock, flags);
5327         ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
5328         spin_unlock_irqrestore(&ha->smp_lock, flags);
5329
5330         cmd->Service = CACHESERVICE;
5331         cmd->OpCode = GDT_CLUST_INFO;
5332         if (ha->cache_feat & GDT_64BIT)
5333             cmd->u.cache64.DeviceNo = i;
5334         else
5335             cmd->u.cache.DeviceNo = i;
5336 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5337         gdth_do_req(srp, cmd, cmnd, 30);
5338         status = (ushort)srp->sr_command->SCp.Status;
5339         info = (ulong32)srp->sr_command->SCp.Message;
5340 #else
5341         gdth_do_cmd(scp, cmd, cmnd, 30);
5342         status = (ushort)scp->SCp.Status;
5343         info = (ulong32)scp->SCp.Message;
5344 #endif
5345         spin_lock_irqsave(&ha->smp_lock, flags);
5346         ha->hdr[i].cluster_type =
5347             ((status == S_OK && !shared_access) ? (ushort)info : 0);
5348         spin_unlock_irqrestore(&ha->smp_lock, flags);
5349         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5350
5351         cmd->Service = CACHESERVICE;
5352         cmd->OpCode = GDT_RW_ATTRIBS;
5353         if (ha->cache_feat & GDT_64BIT)
5354             cmd->u.cache64.DeviceNo = i;
5355         else
5356             cmd->u.cache.DeviceNo = i;
5357 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5358         gdth_do_req(srp, cmd, cmnd, 30);
5359         status = (ushort)srp->sr_command->SCp.Status;
5360         info = (ulong32)srp->sr_command->SCp.Message;
5361 #else
5362         gdth_do_cmd(scp, cmd, cmnd, 30);
5363         status = (ushort)scp->SCp.Status;
5364         info = (ulong32)scp->SCp.Message;
5365 #endif
5366         spin_lock_irqsave(&ha->smp_lock, flags);
5367         ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
5368         spin_unlock_irqrestore(&ha->smp_lock, flags);
5369     }
5370 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5371     scsi_release_request(srp);
5372 #else
5373     scsi_release_command(scp);
5374 #endif
5375
5376     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
5377         rc = -EFAULT;
5378     else
5379         rc = 0;
5380
5381 free_fail:
5382     kfree(rsc);
5383     kfree(cmd);
5384     return rc;
5385 }
5386
5387 static int gdth_ioctl(struct inode *inode, struct file *filep,
5388                       unsigned int cmd, unsigned long arg)
5389 {
5390     gdth_ha_str *ha;
5391     Scsi_Cmnd *scp;
5392     ulong flags;
5393     char cmnd[MAX_COMMAND_SIZE];
5394     void __user *argp = (void __user *)arg;
5395
5396     memset(cmnd, 0xff, 12);
5397
5398     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
5399
5400     switch (cmd) {
5401       case GDTIOCTL_CTRCNT:
5402       {
5403         int cnt = gdth_ctr_count;
5404         if (put_user(cnt, (int __user *)argp))
5405                 return -EFAULT;
5406         break;
5407       }
5408
5409       case GDTIOCTL_DRVERS:
5410       {
5411         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
5412         if (put_user(ver, (int __user *)argp))
5413                 return -EFAULT;
5414         break;
5415       }
5416
5417       case GDTIOCTL_OSVERS:
5418       {
5419         gdth_ioctl_osvers osv;
5420
5421         osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
5422         osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
5423         osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
5424         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
5425                 return -EFAULT;
5426         break;
5427       }
5428
5429       case GDTIOCTL_CTRTYPE:
5430       {
5431         gdth_ioctl_ctrtype ctrt;
5432
5433         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
5434             ctrt.ionode >= gdth_ctr_count)
5435             return -EFAULT;
5436         ha = HADATA(gdth_ctr_tab[ctrt.ionode]);
5437         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
5438             ctrt.type = (unchar)((ha->stype>>20) - 0x10);
5439         } else {
5440             if (ha->type != GDT_PCIMPR) {
5441                 ctrt.type = (unchar)((ha->stype<<4) + 6);
5442             } else {
5443                 ctrt.type =
5444                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
5445                 if (ha->stype >= 0x300)
5446                     ctrt.ext_type = 0x6000 | ha->subdevice_id;
5447                 else
5448                     ctrt.ext_type = 0x6000 | ha->stype;
5449             }
5450             ctrt.device_id = ha->stype;
5451             ctrt.sub_device_id = ha->subdevice_id;
5452         }
5453         ctrt.info = ha->brd_phys;
5454         ctrt.oem_id = ha->oem_id;
5455         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
5456             return -EFAULT;
5457         break;
5458       }
5459
5460       case GDTIOCTL_GENERAL:
5461         return ioc_general(argp, cmnd);
5462
5463       case GDTIOCTL_EVENT:
5464         return ioc_event(argp);
5465
5466       case GDTIOCTL_LOCKDRV:
5467         return ioc_lockdrv(argp);
5468
5469       case GDTIOCTL_LOCKCHN:
5470       {
5471         gdth_ioctl_lockchn lchn;
5472         unchar i, j;
5473
5474         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
5475             lchn.ionode >= gdth_ctr_count)
5476             return -EFAULT;
5477         ha = HADATA(gdth_ctr_tab[lchn.ionode]);
5478
5479         i = lchn.channel;
5480         if (i < ha->bus_cnt) {
5481             if (lchn.lock) {
5482                 spin_lock_irqsave(&ha->smp_lock, flags);
5483                 ha->raw[i].lock = 1;
5484                 spin_unlock_irqrestore(&ha->smp_lock, flags);
5485                 for (j = 0; j < ha->tid_cnt; ++j) {
5486                     gdth_wait_completion(lchn.ionode, i, j);
5487                     gdth_stop_timeout(lchn.ionode, i, j);
5488                 }
5489             } else {
5490                 spin_lock_irqsave(&ha->smp_lock, flags);
5491                 ha->raw[i].lock = 0;
5492                 spin_unlock_irqrestore(&ha->smp_lock, flags);
5493                 for (j = 0; j < ha->tid_cnt; ++j) {
5494                     gdth_start_timeout(lchn.ionode, i, j);
5495                     gdth_next(lchn.ionode);
5496                 }
5497             }
5498         }
5499         break;
5500       }
5501
5502       case GDTIOCTL_RESCAN:
5503         return ioc_rescan(argp, cmnd);
5504
5505       case GDTIOCTL_HDRLIST:
5506         return ioc_hdrlist(argp, cmnd);
5507
5508       case GDTIOCTL_RESET_BUS:
5509       {
5510         gdth_ioctl_reset res;
5511         int hanum, rval;
5512
5513         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
5514             res.ionode >= gdth_ctr_count)
5515             return -EFAULT;
5516         hanum = res.ionode;
5517         ha = HADATA(gdth_ctr_tab[hanum]);
5518
5519         /* Because we need a Scsi_Cmnd struct., we make a scsi_allocate device also for kernels >=2.6.x */
5520 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5521         scp  = scsi_get_command(ha->sdev, GFP_KERNEL);
5522         if (!scp)
5523             return -ENOMEM;
5524         scp->cmd_len = 12;
5525         scp->use_sg = 0;
5526         scp->device->channel = virt_ctr ? 0 : res.number;
5527         rval = gdth_eh_bus_reset(scp);
5528         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
5529         scsi_put_command(scp);
5530 #else
5531         scp  = scsi_allocate_device(ha->sdev, 1, FALSE);
5532         if (!scp)
5533             return -ENOMEM;
5534         scp->cmd_len = 12;
5535         scp->use_sg = 0;
5536         scp->channel = virt_ctr ? 0 : res.number;
5537         rval = gdth_eh_bus_reset(scp);
5538         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
5539         scsi_release_command(scp);
5540 #endif
5541         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
5542             return -EFAULT;
5543         break;
5544       }
5545
5546       case GDTIOCTL_RESET_DRV:
5547         return ioc_resetdrv(argp, cmnd);
5548
5549       default:
5550         break;
5551     }
5552     return 0;
5553 }
5554
5555
5556 /* flush routine */
5557 static void gdth_flush(int hanum)
5558 {
5559     int             i;
5560     gdth_ha_str     *ha;
5561     gdth_cmd_str    gdtcmd;
5562 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5563     Scsi_Request    *srp;
5564 #else
5565     Scsi_Cmnd       *scp;
5566 #endif
5567     struct scsi_device     *sdev;
5568     char            cmnd[MAX_COMMAND_SIZE];
5569     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5570
5571     TRACE2(("gdth_flush() hanum %d\n",hanum));
5572     ha = HADATA(gdth_ctr_tab[hanum]);
5573
5574 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5575     sdev = scsi_get_host_dev(gdth_ctr_tab[hanum]);
5576     srp  = scsi_allocate_request(sdev, GFP_KERNEL);
5577     if (!srp)
5578         return;
5579     srp->sr_cmd_len = 12;
5580     srp->sr_use_sg = 0;
5581 #else
5582     sdev = scsi_get_host_dev(gdth_ctr_tab[hanum]);
5583     scp  = scsi_allocate_device(sdev, 1, FALSE);
5584     if (!scp)
5585         return;
5586     scp->cmd_len = 12;
5587     scp->use_sg = 0;
5588 #endif
5589
5590     for (i = 0; i < MAX_HDRIVES; ++i) {
5591         if (ha->hdr[i].present) {
5592             gdtcmd.BoardNode = LOCALBOARD;
5593             gdtcmd.Service = CACHESERVICE;
5594             gdtcmd.OpCode = GDT_FLUSH;
5595             if (ha->cache_feat & GDT_64BIT) {
5596                 gdtcmd.u.cache64.DeviceNo = i;
5597                 gdtcmd.u.cache64.BlockNo = 1;
5598                 gdtcmd.u.cache64.sg_canz = 0;
5599             } else {
5600                 gdtcmd.u.cache.DeviceNo = i;
5601                 gdtcmd.u.cache.BlockNo = 1;
5602                 gdtcmd.u.cache.sg_canz = 0;
5603             }
5604             TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));
5605 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5606             gdth_do_req(srp, &gdtcmd, cmnd, 30);
5607 #else
5608             gdth_do_cmd(scp, &gdtcmd, cmnd, 30);
5609 #endif
5610         }
5611     }
5612 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5613     scsi_release_request(srp);
5614     scsi_free_host_dev(sdev);
5615 #else
5616     scsi_release_command(scp);
5617     scsi_free_host_dev(sdev);
5618 #endif
5619 }
5620
5621 /* shutdown routine */
5622 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
5623 {
5624     int             hanum;
5625 #ifndef __alpha__
5626     gdth_cmd_str    gdtcmd;
5627 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5628     Scsi_Request    *srp;
5629     struct scsi_device     *sdev;
5630 #else
5631     Scsi_Cmnd       *scp;
5632     struct scsi_device     *sdev;
5633 #endif
5634     char            cmnd[MAX_COMMAND_SIZE];
5635 #endif
5636
5637     if (notifier_disabled)
5638         return NOTIFY_OK;
5639
5640     TRACE2(("gdth_halt() event %d\n",(int)event));
5641     if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5642         return NOTIFY_DONE;
5643
5644     notifier_disabled = 1;
5645     printk("GDT-HA: Flushing all host drives .. ");
5646     for (hanum = 0; hanum < gdth_ctr_count; ++hanum) {
5647         gdth_flush(hanum);
5648
5649 #ifndef __alpha__
5650         /* controller reset */
5651         memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5652         gdtcmd.BoardNode = LOCALBOARD;
5653         gdtcmd.Service = CACHESERVICE;
5654         gdtcmd.OpCode = GDT_RESET;
5655         TRACE2(("gdth_halt(): reset controller %d\n", hanum));
5656 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5657         sdev = scsi_get_host_dev(gdth_ctr_tab[hanum]);
5658         srp  = scsi_allocate_request(sdev, GFP_KERNEL);
5659         if (!srp) {
5660             unregister_reboot_notifier(&gdth_notifier);
5661             return NOTIFY_OK;
5662         }
5663         srp->sr_cmd_len = 12;
5664         srp->sr_use_sg = 0;
5665         gdth_do_req(srp, &gdtcmd, cmnd, 10);
5666         scsi_release_request(srp);
5667         scsi_free_host_dev(sdev);
5668 #else
5669         sdev = scsi_get_host_dev(gdth_ctr_tab[hanum]);
5670         scp  = scsi_allocate_device(sdev, 1, FALSE);
5671         if (!scp) {
5672             unregister_reboot_notifier(&gdth_notifier);
5673             return NOTIFY_OK;
5674         }
5675         scp->cmd_len = 12;
5676         scp->use_sg = 0;
5677         gdth_do_cmd(scp, &gdtcmd, cmnd, 10);
5678         scsi_release_command(scp);
5679         scsi_free_host_dev(sdev);
5680 #endif
5681 #endif
5682     }
5683     printk("Done.\n");
5684
5685 #ifdef GDTH_STATISTICS
5686     del_timer(&gdth_timer);
5687 #endif
5688     return NOTIFY_OK;
5689 }
5690
5691 static struct scsi_host_template driver_template = {
5692         .proc_name              = "gdth",
5693         .proc_info              = gdth_proc_info,
5694         .name                   = "GDT SCSI Disk Array Controller",
5695         .detect                 = gdth_detect,
5696         .release                = gdth_release,
5697         .info                   = gdth_info,
5698         .queuecommand           = gdth_queuecommand,
5699         .eh_bus_reset_handler   = gdth_eh_bus_reset,
5700         .bios_param             = gdth_bios_param,
5701         .can_queue              = GDTH_MAXCMDS,
5702         .this_id                = -1,
5703         .sg_tablesize           = GDTH_MAXSG,
5704         .cmd_per_lun            = GDTH_MAXC_P_L,
5705         .unchecked_isa_dma      = 1,
5706         .use_clustering         = ENABLE_CLUSTERING,
5707 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
5708         .use_new_eh_code        = 1,
5709 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)
5710         .highmem_io             = 1,
5711 #endif
5712 #endif
5713 };
5714
5715 #include "scsi_module.c"
5716 #ifndef MODULE
5717 __setup("gdth=", option_setup);
5718 #endif