1 /************************************************************************
3 * ICP vortex GmbH: GDT ISA/EISA/PCI Disk Array Controllers *
4 * Intel Corporation: Storage RAID Controllers *
7 * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner *
8 * Copyright (C) 2002-04 Intel Corporation *
9 * Copyright (C) 2003-06 Adaptec Inc. *
10 * <achim_leubner@adaptec.com> *
13 * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> *
14 * Johannes Dinner <johannes_dinner@adaptec.com> *
16 * This program is free software; you can redistribute it and/or modify *
17 * it under the terms of the GNU General Public License as published *
18 * by the Free Software Foundation; either version 2 of the License, *
19 * or (at your option) any later version. *
21 * This program is distributed in the hope that it will be useful, *
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
24 * GNU General Public License for more details. *
26 * You should have received a copy of the GNU General Public License *
27 * along with this kernel; if not, write to the Free Software *
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
30 * Linux kernel 2.4.x, 2.6.x supported *
33 * Revision 1.74 2006/04/10 13:44:47 achim
34 * Community changes for 2.6.x
35 * Kernel 2.2.x no longer supported
36 * scsi_request interface removed, thanks to Christoph Hellwig
38 * Revision 1.73 2004/03/31 13:33:03 achim
39 * Special command 0xfd implemented to detect 64-bit DMA support
41 * Revision 1.72 2004/03/17 08:56:04 achim
42 * 64-bit DMA only enabled if FW >= x.43
44 * Revision 1.71 2004/03/05 15:51:29 achim
45 * Screen service: separate message buffer, bugfixes
47 * Revision 1.70 2004/02/27 12:19:07 achim
48 * Bugfix: Reset bit in config (0xfe) call removed
50 * Revision 1.69 2004/02/20 09:50:24 achim
51 * Compatibility changes for kernels < 2.4.20
52 * Bugfix screen service command size
53 * pci_set_dma_mask() error handling added
55 * Revision 1.68 2004/02/19 15:46:54 achim
57 * Drive size bugfix for drives > 1TB
59 * Revision 1.67 2004/01/14 13:11:57 achim
60 * Tool access over /proc no longer supported
63 * Revision 1.66 2003/12/19 15:04:06 achim
64 * Bugfixes support for drives > 2TB
66 * Revision 1.65 2003/12/15 11:21:56 achim
67 * 64-bit DMA support added
68 * Support for drives > 2 TB implemented
69 * Kernels 2.2.x, 2.4.x, 2.6.x supported
71 * Revision 1.64 2003/09/17 08:30:26 achim
72 * EISA/ISA controller scan disabled
73 * Command line switch probe_eisa_isa added
75 * Revision 1.63 2003/07/12 14:01:00 Daniele Bellucci <bellucda@tiscali.it>
76 * Minor cleanups in gdth_ioctl.
78 * Revision 1.62 2003/02/27 15:01:59 achim
79 * Dynamic DMA mapping implemented
80 * New (character device) IOCTL interface added
81 * Other controller related changes made
83 * Revision 1.61 2002/11/08 13:09:52 boji
84 * Added support for XSCALE based RAID Controllers
85 * Fixed SCREENSERVICE initialization in SMP cases
86 * Added checks for gdth_polling before GDTH_HA_LOCK
88 * Revision 1.60 2002/02/05 09:35:22 achim
89 * MODULE_LICENSE only if kernel >= 2.4.11
91 * Revision 1.59 2002/01/30 09:46:33 achim
94 * Revision 1.58 2002/01/29 15:30:02 achim
95 * Set default value of shared_access to Y
96 * New status S_CACHE_RESERV for clustering added
98 * Revision 1.57 2001/08/21 11:16:35 achim
101 * Revision 1.56 2001/08/09 11:19:39 achim
102 * Scsi_Host_Template changes
104 * Revision 1.55 2001/08/09 10:11:28 achim
105 * Command HOST_UNFREEZE_IO before cache service init.
107 * Revision 1.54 2001/07/20 13:48:12 achim
108 * Expand: gdth_analyse_hdrive() removed
110 * Revision 1.53 2001/07/17 09:52:49 achim
111 * Small OEM related change
113 * Revision 1.52 2001/06/19 15:06:20 achim
114 * New host command GDT_UNFREEZE_IO added
116 * Revision 1.51 2001/05/22 06:42:37 achim
117 * PCI: Subdevice ID added
119 * Revision 1.50 2001/05/17 13:42:16 achim
120 * Support for Intel Storage RAID Controllers added
122 * Revision 1.50 2001/05/17 12:12:34 achim
123 * Support for Intel Storage RAID Controllers added
125 * Revision 1.49 2001/03/15 15:07:17 achim
126 * New __setup interface for boot command line options added
128 * Revision 1.48 2001/02/06 12:36:28 achim
129 * Bugfix Cluster protocol
131 * Revision 1.47 2001/01/10 14:42:06 achim
132 * New switch shared_access added
134 * Revision 1.46 2001/01/09 08:11:35 achim
135 * gdth_command() removed
136 * meaning of Scsi_Pointer members changed
138 * Revision 1.45 2000/11/16 12:02:24 achim
139 * Changes for kernel 2.4
141 * Revision 1.44 2000/10/11 08:44:10 achim
142 * Clustering changes: New flag media_changed added
144 * Revision 1.43 2000/09/20 12:59:01 achim
145 * DPMEM remap functions for all PCI controller types implemented
146 * Small changes for ia64 platform
148 * Revision 1.42 2000/07/20 09:04:50 achim
149 * Small changes for kernel 2.4
151 * Revision 1.41 2000/07/04 14:11:11 achim
152 * gdth_analyse_hdrive() added to rescan drives after online expansion
154 * Revision 1.40 2000/06/27 11:24:16 achim
155 * Changes Clustering, Screenservice
157 * Revision 1.39 2000/06/15 13:09:04 achim
158 * Changes for gdth_do_cmd()
160 * Revision 1.38 2000/06/15 12:08:43 achim
161 * Bugfix gdth_sync_event(), service SCREENSERVICE
162 * Data direction for command 0xc2 changed to DOU
164 * Revision 1.37 2000/05/25 13:50:10 achim
165 * New driver parameter virt_ctr added
167 * Revision 1.36 2000/05/04 08:50:46 achim
168 * Event buffer now in gdth_ha_str
170 * Revision 1.35 2000/03/03 10:44:08 achim
171 * New event_string only valid for the RP controller family
173 * Revision 1.34 2000/03/02 14:55:29 achim
174 * New mechanism for async. event handling implemented
176 * Revision 1.33 2000/02/21 15:37:37 achim
177 * Bugfix Alpha platform + DPMEM above 4GB
179 * Revision 1.32 2000/02/14 16:17:37 achim
180 * Bugfix sense_buffer[] + raw devices
182 * Revision 1.31 2000/02/10 10:29:00 achim
183 * Delete sense_buffer[0], if command OK
185 * Revision 1.30 1999/11/02 13:42:39 achim
186 * ARRAY_DRV_LIST2 implemented
187 * Now 255 log. and 100 host drives supported
189 * Revision 1.29 1999/10/05 13:28:47 achim
190 * GDT_CLUST_RESET added
192 * Revision 1.28 1999/08/12 13:44:54 achim
194 * Cluster drives -> removeable drives
196 * Revision 1.27 1999/06/22 07:22:38 achim
199 * Revision 1.26 1999/06/10 16:09:12 achim
200 * Cluster Host Drive support: Bugfixes
202 * Revision 1.25 1999/06/01 16:03:56 achim
203 * gdth_init_pci(): Manipulate config. space to start RP controller
205 * Revision 1.24 1999/05/26 11:53:06 achim
206 * Cluster Host Drive support added
208 * Revision 1.23 1999/03/26 09:12:31 achim
209 * Default value for hdr_channel set to 0
211 * Revision 1.22 1999/03/22 16:27:16 achim
212 * Bugfix: gdth_store_event() must not be locked with GDTH_LOCK_HA()
214 * Revision 1.21 1999/03/16 13:40:34 achim
215 * Problems with reserved drives solved
216 * gdth_eh_bus_reset() implemented
218 * Revision 1.20 1999/03/10 09:08:13 achim
219 * Bugfix: Corrections in gdth_direction_tab[] made
220 * Bugfix: Increase command timeout (gdth_update_timeout()) NOT in gdth_putq()
222 * Revision 1.19 1999/03/05 14:38:16 achim
223 * Bugfix: Heads/Sectors mapping for reserved devices possibly wrong
224 * -> gdth_eval_mapping() implemented, changes in gdth_bios_param()
225 * INIT_RETRIES set to 100s to avoid DEINIT-Timeout for controllers
226 * with BIOS disabled and memory test set to Intensive
227 * Enhanced /proc support
229 * Revision 1.18 1999/02/24 09:54:33 achim
230 * Command line parameter hdr_channel implemented
231 * Bugfix for EISA controllers + Linux 2.2.x
233 * Revision 1.17 1998/12/17 15:58:11 achim
234 * Command line parameters implemented
235 * Changes for Alpha platforms
236 * PCI controller scan changed
237 * SMP support improved (spin_lock_irqsave(),...)
238 * New async. events, new scan/reserve commands included
240 * Revision 1.16 1998/09/28 16:08:46 achim
241 * GDT_PCIMPR: DPMEM remapping, if required
244 * Revision 1.15 1998/06/03 14:54:06 achim
245 * gdth_delay(), gdth_flush() implemented
246 * Bugfix: gdth_release() changed
248 * Revision 1.14 1998/05/22 10:01:17 achim
249 * mj: pcibios_strerror() removed
250 * Improved SMP support (if version >= 2.1.95)
251 * gdth_halt(): halt_called flag added (if version < 2.1)
253 * Revision 1.13 1998/04/16 09:14:57 achim
254 * Reserve drives (for raw service) implemented
255 * New error handling code enabled
256 * Get controller name from board_info() IOCTL
257 * Final round of PCI device driver patches by Martin Mares
259 * Revision 1.12 1998/03/03 09:32:37 achim
260 * Fibre channel controller support added
262 * Revision 1.11 1998/01/27 16:19:14 achim
264 * add_timer()/del_timer() instead of GDTH_TIMER
265 * scsi_add_timer()/scsi_del_timer() instead of SCSI_TIMER
266 * New error handling included
268 * Revision 1.10 1997/10/31 12:29:57 achim
269 * Read heads/sectors from host drive
271 * Revision 1.9 1997/09/04 10:07:25 achim
272 * IO-mapping with virt_to_bus(), gdth_readb(), gdth_writeb(), ...
273 * register_reboot_notifier() to get a notify on shutown used
275 * Revision 1.8 1997/04/02 12:14:30 achim
276 * Version 1.00 (see gdth.h), tested with kernel 2.0.29
278 * Revision 1.7 1997/03/12 13:33:37 achim
279 * gdth_reset() changed, new async. events
281 * Revision 1.6 1997/03/04 14:01:11 achim
282 * Shutdown routine gdth_halt() implemented
284 * Revision 1.5 1997/02/21 09:08:36 achim
285 * New controller included (RP, RP1, RP2 series)
286 * IOCTL interface implemented
288 * Revision 1.4 1996/07/05 12:48:55 achim
289 * Function gdth_bios_param() implemented
290 * New constant GDTH_MAXC_P_L inserted
291 * GDT_WRITE_THR, GDT_EXT_INFO implemented
292 * Function gdth_reset() changed
294 * Revision 1.3 1996/05/10 09:04:41 achim
295 * Small changes for Linux 1.2.13
297 * Revision 1.2 1996/05/09 12:45:27 achim
298 * Loadable module support implemented
299 * /proc support corrections made
301 * Revision 1.1 1996/04/11 07:35:57 achim
304 ************************************************************************/
306 /* All GDT Disk Array Controllers are fully supported by this driver.
307 * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
308 * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
309 * list of all controller types.
311 * If you have one or more GDT3000/3020 EISA controllers with
312 * controller BIOS disabled, you have to set the IRQ values with the
313 * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
314 * the IRQ values for the EISA controllers.
316 * After the optional list of IRQ values, other possible
317 * command line options are:
318 * disable:Y disable driver
319 * disable:N enable driver
320 * reserve_mode:0 reserve no drives for the raw service
321 * reserve_mode:1 reserve all not init., removable drives
322 * reserve_mode:2 reserve all not init. drives
323 * reserve_list:h,b,t,l,h,b,t,l,... reserve particular drive(s) with
324 * h- controller no., b- channel no.,
325 * t- target ID, l- LUN
326 * reverse_scan:Y reverse scan order for PCI controllers
327 * reverse_scan:N scan PCI controllers like BIOS
328 * max_ids:x x - target ID count per channel (1..MAXID)
329 * rescan:Y rescan all channels/IDs
330 * rescan:N use all devices found until now
331 * virt_ctr:Y map every channel to a virtual controller
332 * virt_ctr:N use multi channel support
333 * hdr_channel:x x - number of virtual bus for host drives
334 * shared_access:Y disable driver reserve/release protocol to
335 * access a shared resource from several nodes,
336 * appropriate controller firmware required
337 * shared_access:N enable driver reserve/release protocol
338 * probe_eisa_isa:Y scan for EISA/ISA controllers
339 * probe_eisa_isa:N do not scan for EISA/ISA controllers
340 * force_dma32:Y use only 32 bit DMA mode
341 * force_dma32:N use 64 bit DMA mode, if supported
343 * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
344 * max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
345 * shared_access:Y,probe_eisa_isa:N,force_dma32:N".
346 * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
348 * When loading the gdth driver as a module, the same options are available.
349 * You can set the IRQs with "IRQ=...". However, the syntax to specify the
350 * options changes slightly. You must replace all ',' between options
351 * with ' ' and all ':' with '=' and you must use
352 * '1' in place of 'Y' and '0' in place of 'N'.
354 * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
355 * max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0
356 * probe_eisa_isa=0 force_dma32=0"
357 * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
360 /* The meaning of the Scsi_Pointer members in this driver is as follows:
362 * this_residual: Command priority
363 * buffer: phys. DMA sense buffer
364 * dma_handle: phys. DMA buffer (kernel >= 2.4.0)
365 * buffers_residual: Timeout value
366 * Status: Command status (gdth_do_cmd()), DMA mem. mappings
367 * Message: Additional info (gdth_do_cmd()), DMA direction
368 * have_data_in: Flag for gdth_wait_completion()
369 * sent_command: Opcode special command
370 * phase: Service/parameter/return code special command
374 /* interrupt coalescing */
375 /* #define INT_COAL */
378 #define GDTH_STATISTICS
380 #include <linux/module.h>
382 #include <linux/version.h>
383 #include <linux/kernel.h>
384 #include <linux/types.h>
385 #include <linux/pci.h>
386 #include <linux/string.h>
387 #include <linux/ctype.h>
388 #include <linux/ioport.h>
389 #include <linux/delay.h>
390 #include <linux/sched.h>
391 #include <linux/interrupt.h>
392 #include <linux/in.h>
393 #include <linux/proc_fs.h>
394 #include <linux/time.h>
395 #include <linux/timer.h>
396 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,6)
397 #include <linux/dma-mapping.h>
399 #define DMA_32BIT_MASK 0x00000000ffffffffULL
400 #define DMA_64BIT_MASK 0xffffffffffffffffULL
404 #include <linux/mc146818rtc.h>
406 #include <linux/reboot.h>
409 #include <asm/system.h>
411 #include <asm/uaccess.h>
412 #include <linux/spinlock.h>
413 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
414 #include <linux/blkdev.h>
416 #include <linux/blk.h>
421 #include <scsi/scsi_host.h>
422 #include "gdth_kcompat.h"
425 static void gdth_delay(int milliseconds);
426 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
427 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
428 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
429 static int gdth_async_event(int hanum);
430 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
432 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
433 static void gdth_next(int hanum);
434 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
435 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
436 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
437 ushort idx, gdth_evt_data *evt);
438 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
439 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
441 static void gdth_clear_events(void);
443 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
444 char *buffer,ushort count);
445 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
446 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
448 static int gdth_search_eisa(ushort eisa_adr);
449 static int gdth_search_isa(ulong32 bios_adr);
450 static int gdth_search_pci(gdth_pci_str *pcistr);
451 static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
452 ushort vendor, ushort dev);
453 static void gdth_sort_pci(gdth_pci_str *pcistr, int cnt);
454 static int gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha);
455 static int gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha);
456 static int gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha);
458 static void gdth_enable_int(int hanum);
459 static int gdth_get_status(unchar *pIStatus,int irq);
460 static int gdth_test_busy(int hanum);
461 static int gdth_get_cmd_index(int hanum);
462 static void gdth_release_event(int hanum);
463 static int gdth_wait(int hanum,int index,ulong32 time);
464 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
465 ulong64 p2,ulong64 p3);
466 static int gdth_search_drives(int hanum);
467 static int gdth_analyse_hdrive(int hanum, ushort hdrive);
469 static const char *gdth_ctr_name(int hanum);
471 static int gdth_open(struct inode *inode, struct file *filep);
472 static int gdth_close(struct inode *inode, struct file *filep);
473 static int gdth_ioctl(struct inode *inode, struct file *filep,
474 unsigned int cmd, unsigned long arg);
476 static void gdth_flush(int hanum);
477 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
478 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *));
479 static void gdth_scsi_done(struct scsi_cmnd *scp);
482 static unchar DebugState = DEBUG_GDTH;
485 #define MAX_SERBUF 160
486 static void ser_init(void);
487 static void ser_puts(char *str);
488 static void ser_putc(char c);
489 static int ser_printk(const char *fmt, ...);
490 static char strbuf[MAX_SERBUF+1];
492 #define COM_BASE 0x2f8
494 #define COM_BASE 0x3f8
496 static void ser_init()
498 unsigned port=COM_BASE;
502 /* 19200 Baud, if 9600: outb(12,port) */
512 static void ser_puts(char *str)
517 for (ptr=str;*ptr;++ptr)
521 static void ser_putc(char c)
523 unsigned port=COM_BASE;
525 while ((inb(port+5) & 0x20)==0);
529 while ((inb(port+5) & 0x20)==0);
534 static int ser_printk(const char *fmt, ...)
540 i = vsprintf(strbuf,fmt,args);
546 #define TRACE(a) {if (DebugState==1) {ser_printk a;}}
547 #define TRACE2(a) {if (DebugState==1 || DebugState==2) {ser_printk a;}}
548 #define TRACE3(a) {if (DebugState!=0) {ser_printk a;}}
550 #else /* !__SERIAL__ */
551 #define TRACE(a) {if (DebugState==1) {printk a;}}
552 #define TRACE2(a) {if (DebugState==1 || DebugState==2) {printk a;}}
553 #define TRACE3(a) {if (DebugState!=0) {printk a;}}
562 #ifdef GDTH_STATISTICS
563 static ulong32 max_rq=0, max_index=0, max_sg=0;
565 static ulong32 max_int_coal=0;
567 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
568 static struct timer_list gdth_timer;
571 #define PTR2USHORT(a) (ushort)(ulong)(a)
572 #define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b)
573 #define INDEX_OK(i,t) ((i)<ARRAY_SIZE(t))
575 #define NUMDATA(a) ( (gdth_num_str *)((a)->hostdata))
576 #define HADATA(a) (&((gdth_ext_str *)((a)->hostdata))->haext)
577 #define CMDDATA(a) (&((gdth_ext_str *)((a)->hostdata))->cmdext)
579 #define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b))
581 #define gdth_readb(addr) readb(addr)
582 #define gdth_readw(addr) readw(addr)
583 #define gdth_readl(addr) readl(addr)
584 #define gdth_writeb(b,addr) writeb((b),(addr))
585 #define gdth_writew(b,addr) writew((b),(addr))
586 #define gdth_writel(b,addr) writel((b),(addr))
588 static unchar gdth_drq_tab[4] = {5,6,7,7}; /* DRQ table */
589 static unchar gdth_irq_tab[6] = {0,10,11,12,14,0}; /* IRQ table */
590 static unchar gdth_polling; /* polling if TRUE */
591 static unchar gdth_from_wait = FALSE; /* gdth_wait() */
592 static int wait_index,wait_hanum; /* gdth_wait() */
593 static int gdth_ctr_count = 0; /* controller count */
594 static int gdth_ctr_vcount = 0; /* virt. ctr. count */
595 static int gdth_ctr_released = 0; /* gdth_release() */
596 static struct Scsi_Host *gdth_ctr_tab[MAXHA]; /* controller table */
597 static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS]; /* virt. ctr. table */
598 static unchar gdth_write_through = FALSE; /* write through */
599 static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */
604 #define DIN 1 /* IN data direction */
605 #define DOU 2 /* OUT data direction */
606 #define DNO DIN /* no data transfer */
607 #define DUN DIN /* unknown data direction */
608 static unchar gdth_direction_tab[0x100] = {
609 DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
610 DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
611 DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
612 DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
613 DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
614 DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
615 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
616 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
617 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
618 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
619 DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
620 DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
621 DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
622 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
623 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
624 DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
627 /* LILO and modprobe/insmod parameters */
628 /* IRQ list for GDT3000/3020 EISA controllers */
629 static int irq[MAXHA] __initdata =
630 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
631 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
632 /* disable driver flag */
633 static int disable __initdata = 0;
635 static int reserve_mode = 1;
637 static int reserve_list[MAX_RES_ARGS] =
638 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
639 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
640 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
641 /* scan order for PCI controllers */
642 static int reverse_scan = 0;
643 /* virtual channel for the host drives */
644 static int hdr_channel = 0;
645 /* max. IDs per channel */
646 static int max_ids = MAXID;
648 static int rescan = 0;
649 /* map channels to virtual controllers */
650 static int virt_ctr = 0;
652 static int shared_access = 1;
653 /* enable support for EISA and ISA controllers */
654 static int probe_eisa_isa = 0;
655 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
656 static int force_dma32 = 0;
658 /* parameters for modprobe/insmod */
659 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
660 module_param_array(irq, int, NULL, 0);
661 module_param(disable, int, 0);
662 module_param(reserve_mode, int, 0);
663 module_param_array(reserve_list, int, NULL, 0);
664 module_param(reverse_scan, int, 0);
665 module_param(hdr_channel, int, 0);
666 module_param(max_ids, int, 0);
667 module_param(rescan, int, 0);
668 module_param(virt_ctr, int, 0);
669 module_param(shared_access, int, 0);
670 module_param(probe_eisa_isa, int, 0);
671 module_param(force_dma32, int, 0);
673 MODULE_PARM(irq, "i");
674 MODULE_PARM(disable, "i");
675 MODULE_PARM(reserve_mode, "i");
676 MODULE_PARM(reserve_list, "4-" __MODULE_STRING(MAX_RES_ARGS) "i");
677 MODULE_PARM(reverse_scan, "i");
678 MODULE_PARM(hdr_channel, "i");
679 MODULE_PARM(max_ids, "i");
680 MODULE_PARM(rescan, "i");
681 MODULE_PARM(virt_ctr, "i");
682 MODULE_PARM(shared_access, "i");
683 MODULE_PARM(probe_eisa_isa, "i");
684 MODULE_PARM(force_dma32, "i");
686 MODULE_AUTHOR("Achim Leubner");
687 MODULE_LICENSE("GPL");
688 MODULE_VERSION(GDTH_VERSION_STR);
690 /* ioctl interface */
691 static struct file_operations gdth_fops = {
694 .release = gdth_close,
697 #include "gdth_proc.h"
698 #include "gdth_proc.c"
700 /* notifier block to get a notify on system shutdown/halt/reboot */
701 static struct notifier_block gdth_notifier = {
704 static int notifier_disabled = 0;
706 static void gdth_delay(int milliseconds)
708 if (milliseconds == 0) {
711 mdelay(milliseconds);
715 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
716 static void gdth_scsi_done(struct scsi_cmnd *scp)
718 TRACE2(("gdth_scsi_done()\n"));
721 complete((struct completion *)scp->request);
724 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
725 int timeout, u32 *info)
728 DECLARE_COMPLETION_ONSTACK(wait);
731 scp = kmalloc(sizeof(*scp), GFP_KERNEL);
734 memset(scp, 0, sizeof(*scp));
736 /* use request field to save the ptr. to completion struct. */
737 scp->request = (struct request *)&wait;
738 scp->timeout_per_command = timeout*HZ;
739 scp->request_buffer = gdtcmd;
741 memcpy(scp->cmnd, cmnd, 12);
742 scp->SCp.this_residual = IOCTL_PRI; /* priority */
743 scp->done = gdth_scsi_done; /* some fn. test this */
744 gdth_queuecommand(scp, gdth_scsi_done);
745 wait_for_completion(&wait);
747 rval = scp->SCp.Status;
749 *info = scp->SCp.Message;
754 static void gdth_scsi_done(Scsi_Cmnd *scp)
756 TRACE2(("gdth_scsi_done()\n"));
758 scp->request.rq_status = RQ_SCSI_DONE;
759 if (scp->request.waiting)
760 complete(scp->request.waiting);
763 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
764 int timeout, u32 *info)
766 Scsi_Cmnd *scp = scsi_allocate_device(sdev, 1, FALSE);
767 unsigned bufflen = gdtcmd ? sizeof(gdth_cmd_str) : 0;
768 DECLARE_COMPLETION_ONSTACK(wait);
775 scp->SCp.this_residual = IOCTL_PRI; /* priority */
776 scp->request.rq_status = RQ_SCSI_BUSY;
777 scp->request.waiting = &wait;
778 scsi_do_cmd(scp, cmnd, gdtcmd, bufflen, gdth_scsi_done, timeout*HZ, 1);
779 wait_for_completion(&wait);
781 rval = scp->SCp.Status;
783 *info = scp->SCp.Message;
785 scsi_release_command(scp);
790 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
791 int timeout, u32 *info)
793 struct scsi_device *sdev = scsi_get_host_dev(shost);
794 int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
796 scsi_free_host_dev(sdev);
800 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
802 *cyls = size /HEADS/SECS;
803 if (*cyls <= MAXCYLS) {
806 } else { /* too high for 64*32 */
807 *cyls = size /MEDHEADS/MEDSECS;
808 if (*cyls <= MAXCYLS) {
811 } else { /* too high for 127*63 */
812 *cyls = size /BIGHEADS/BIGSECS;
819 /* controller search and initialization functions */
821 static int __init gdth_search_eisa(ushort eisa_adr)
825 TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
826 id = inl(eisa_adr+ID0REG);
827 if (id == GDT3A_ID || id == GDT3B_ID) { /* GDT3000A or GDT3000B */
828 if ((inb(eisa_adr+EISAREG) & 8) == 0)
829 return 0; /* not EISA configured */
832 if (id == GDT3_ID) /* GDT3000 */
839 static int __init gdth_search_isa(ulong32 bios_adr)
844 TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
845 if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
846 id = gdth_readl(addr);
848 if (id == GDT2_ID) /* GDT2000 */
855 static int __init gdth_search_pci(gdth_pci_str *pcistr)
859 TRACE(("gdth_search_pci()\n"));
862 for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
863 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
864 for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
865 device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
866 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
867 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
868 PCI_DEVICE_ID_VORTEX_GDTNEWRX);
869 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
870 PCI_DEVICE_ID_VORTEX_GDTNEWRX2);
871 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
872 PCI_DEVICE_ID_INTEL_SRC);
873 gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
874 PCI_DEVICE_ID_INTEL_SRC_XSCALE);
878 /* Vortex only makes RAID controllers.
879 * We do not really want to specify all 550 ids here, so wildcard match.
881 static struct pci_device_id gdthtable[] __attribute_used__ = {
882 {PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
883 {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
884 {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
887 MODULE_DEVICE_TABLE(pci,gdthtable);
889 static void __init gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
890 ushort vendor, ushort device)
892 ulong base0, base1, base2;
893 struct pci_dev *pdev;
895 TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
896 *cnt, vendor, device));
899 while ((pdev = pci_find_device(vendor, device, pdev))
901 if (pci_enable_device(pdev))
905 /* GDT PCI controller found, resources are already in pdev */
906 pcistr[*cnt].pdev = pdev;
907 pcistr[*cnt].vendor_id = vendor;
908 pcistr[*cnt].device_id = device;
909 pcistr[*cnt].subdevice_id = pdev->subsystem_device;
910 pcistr[*cnt].bus = pdev->bus->number;
911 pcistr[*cnt].device_fn = pdev->devfn;
912 pcistr[*cnt].irq = pdev->irq;
913 base0 = pci_resource_flags(pdev, 0);
914 base1 = pci_resource_flags(pdev, 1);
915 base2 = pci_resource_flags(pdev, 2);
916 if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */
917 device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */
918 if (!(base0 & IORESOURCE_MEM))
920 pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
921 } else { /* GDT6110, GDT6120, .. */
922 if (!(base0 & IORESOURCE_MEM) ||
923 !(base2 & IORESOURCE_MEM) ||
924 !(base1 & IORESOURCE_IO))
926 pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
927 pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
928 pcistr[*cnt].io = pci_resource_start(pdev, 1);
930 TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
931 pcistr[*cnt].bus, PCI_SLOT(pcistr[*cnt].device_fn),
932 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
938 static void __init gdth_sort_pci(gdth_pci_str *pcistr, int cnt)
943 TRACE(("gdth_sort_pci() cnt %d\n",cnt));
949 for (i = 0; i < cnt-1; ++i) {
951 if ((pcistr[i].bus > pcistr[i+1].bus) ||
952 (pcistr[i].bus == pcistr[i+1].bus &&
953 PCI_SLOT(pcistr[i].device_fn) >
954 PCI_SLOT(pcistr[i+1].device_fn))) {
956 pcistr[i] = pcistr[i+1];
961 if ((pcistr[i].bus < pcistr[i+1].bus) ||
962 (pcistr[i].bus == pcistr[i+1].bus &&
963 PCI_SLOT(pcistr[i].device_fn) <
964 PCI_SLOT(pcistr[i+1].device_fn))) {
966 pcistr[i] = pcistr[i+1];
976 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
979 unchar prot_ver,eisacf,i,irq_found;
981 TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
983 /* disable board interrupts, deinitialize services */
984 outb(0xff,eisa_adr+EDOORREG);
985 outb(0x00,eisa_adr+EDENABREG);
986 outb(0x00,eisa_adr+EINTENABREG);
988 outb(0xff,eisa_adr+LDOORREG);
989 retries = INIT_RETRIES;
991 while (inb(eisa_adr+EDOORREG) != 0xff) {
992 if (--retries == 0) {
993 printk("GDT-EISA: Initialization error (DEINIT failed)\n");
997 TRACE2(("wait for DEINIT: retries=%d\n",retries));
999 prot_ver = inb(eisa_adr+MAILBOXREG);
1000 outb(0xff,eisa_adr+EDOORREG);
1001 if (prot_ver != PROTOCOL_VERSION) {
1002 printk("GDT-EISA: Illegal protocol version\n");
1005 ha->bmic = eisa_adr;
1006 ha->brd_phys = (ulong32)eisa_adr >> 12;
1008 outl(0,eisa_adr+MAILBOXREG);
1009 outl(0,eisa_adr+MAILBOXREG+4);
1010 outl(0,eisa_adr+MAILBOXREG+8);
1011 outl(0,eisa_adr+MAILBOXREG+12);
1014 if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
1015 ha->oem_id = OEM_ID_ICP;
1016 ha->type = GDT_EISA;
1018 outl(1,eisa_adr+MAILBOXREG+8);
1019 outb(0xfe,eisa_adr+LDOORREG);
1020 retries = INIT_RETRIES;
1022 while (inb(eisa_adr+EDOORREG) != 0xfe) {
1023 if (--retries == 0) {
1024 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
1029 ha->irq = inb(eisa_adr+MAILBOXREG);
1030 outb(0xff,eisa_adr+EDOORREG);
1031 TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
1032 /* check the result */
1034 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
1035 for (i = 0, irq_found = FALSE;
1036 i < MAXHA && irq[i] != 0xff; ++i) {
1037 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
1045 printk("GDT-EISA: Can not detect controller IRQ,\n");
1046 printk("Use IRQ setting from command line (IRQ = %d)\n",
1049 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
1050 printk("the controller BIOS or use command line parameters\n");
1055 eisacf = inb(eisa_adr+EISAREG) & 7;
1056 if (eisacf > 4) /* level triggered */
1058 ha->irq = gdth_irq_tab[eisacf];
1059 ha->oem_id = OEM_ID_ICP;
1060 ha->type = GDT_EISA;
1064 ha->dma64_support = 0;
1069 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
1071 register gdt2_dpram_str __iomem *dp2_ptr;
1073 unchar irq_drq,prot_ver;
1076 TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
1078 ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
1079 if (ha->brd == NULL) {
1080 printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
1084 gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
1085 /* reset interface area */
1086 memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
1087 if (gdth_readl(&dp2_ptr->u) != 0) {
1088 printk("GDT-ISA: Initialization error (DPMEM write error)\n");
1093 /* disable board interrupts, read DRQ and IRQ */
1094 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1095 gdth_writeb(0x00, &dp2_ptr->io.irqen);
1096 gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status);
1097 gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
1099 irq_drq = gdth_readb(&dp2_ptr->io.rq);
1100 for (i=0; i<3; ++i) {
1101 if ((irq_drq & 1)==0)
1105 ha->drq = gdth_drq_tab[i];
1107 irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3;
1108 for (i=1; i<5; ++i) {
1109 if ((irq_drq & 1)==0)
1113 ha->irq = gdth_irq_tab[i];
1115 /* deinitialize services */
1116 gdth_writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
1117 gdth_writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
1118 gdth_writeb(0, &dp2_ptr->io.event);
1119 retries = INIT_RETRIES;
1121 while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
1122 if (--retries == 0) {
1123 printk("GDT-ISA: Initialization error (DEINIT failed)\n");
1129 prot_ver = (unchar)gdth_readl(&dp2_ptr->u.ic.S_Info[0]);
1130 gdth_writeb(0, &dp2_ptr->u.ic.Status);
1131 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1132 if (prot_ver != PROTOCOL_VERSION) {
1133 printk("GDT-ISA: Illegal protocol version\n");
1138 ha->oem_id = OEM_ID_ICP;
1140 ha->ic_all_size = sizeof(dp2_ptr->u);
1142 ha->brd_phys = bios_adr >> 4;
1144 /* special request to controller BIOS */
1145 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
1146 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
1147 gdth_writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
1148 gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
1149 gdth_writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
1150 gdth_writeb(0, &dp2_ptr->io.event);
1151 retries = INIT_RETRIES;
1153 while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
1154 if (--retries == 0) {
1155 printk("GDT-ISA: Initialization error\n");
1161 gdth_writeb(0, &dp2_ptr->u.ic.Status);
1162 gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1164 ha->dma64_support = 0;
1169 static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha)
1171 register gdt6_dpram_str __iomem *dp6_ptr;
1172 register gdt6c_dpram_str __iomem *dp6c_ptr;
1173 register gdt6m_dpram_str __iomem *dp6m_ptr;
1177 int i, found = FALSE;
1179 TRACE(("gdth_init_pci()\n"));
1181 if (pcistr->vendor_id == PCI_VENDOR_ID_INTEL)
1182 ha->oem_id = OEM_ID_INTEL;
1184 ha->oem_id = OEM_ID_ICP;
1185 ha->brd_phys = (pcistr->bus << 8) | (pcistr->device_fn & 0xf8);
1186 ha->stype = (ulong32)pcistr->device_id;
1187 ha->subdevice_id = pcistr->subdevice_id;
1188 ha->irq = pcistr->irq;
1189 ha->pdev = pcistr->pdev;
1191 if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6000B) { /* GDT6000/B */
1192 TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1193 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
1194 if (ha->brd == NULL) {
1195 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1198 /* check and reset interface area */
1200 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1201 if (gdth_readl(&dp6_ptr->u) != DPMEM_MAGIC) {
1202 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1205 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1207 ha->brd = ioremap(i, sizeof(ushort));
1208 if (ha->brd == NULL) {
1209 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1212 if (gdth_readw(ha->brd) != 0xffff) {
1213 TRACE2(("init_pci_old() address 0x%x busy\n", i));
1217 pci_write_config_dword(pcistr->pdev,
1218 PCI_BASE_ADDRESS_0, i);
1219 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
1220 if (ha->brd == NULL) {
1221 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1225 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1226 if (gdth_readl(&dp6_ptr->u) == DPMEM_MAGIC) {
1227 printk("GDT-PCI: Use free address at 0x%x\n", i);
1233 printk("GDT-PCI: No free address found!\n");
1238 memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
1239 if (gdth_readl(&dp6_ptr->u) != 0) {
1240 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1245 /* disable board interrupts, deinit services */
1246 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1247 gdth_writeb(0x00, &dp6_ptr->io.irqen);
1248 gdth_writeb(0x00, &dp6_ptr->u.ic.S_Status);
1249 gdth_writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
1251 gdth_writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
1252 gdth_writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
1253 gdth_writeb(0, &dp6_ptr->io.event);
1254 retries = INIT_RETRIES;
1256 while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
1257 if (--retries == 0) {
1258 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1264 prot_ver = (unchar)gdth_readl(&dp6_ptr->u.ic.S_Info[0]);
1265 gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1266 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1267 if (prot_ver != PROTOCOL_VERSION) {
1268 printk("GDT-PCI: Illegal protocol version\n");
1274 ha->ic_all_size = sizeof(dp6_ptr->u);
1276 /* special command to controller BIOS */
1277 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
1278 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
1279 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
1280 gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
1281 gdth_writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
1282 gdth_writeb(0, &dp6_ptr->io.event);
1283 retries = INIT_RETRIES;
1285 while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
1286 if (--retries == 0) {
1287 printk("GDT-PCI: Initialization error\n");
1293 gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1294 gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1296 ha->dma64_support = 0;
1298 } else if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
1299 ha->plx = (gdt6c_plx_regs *)pcistr->io;
1300 TRACE2(("init_pci_new() dpmem %lx irq %d\n",
1301 pcistr->dpmem,ha->irq));
1302 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
1303 if (ha->brd == NULL) {
1304 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1308 /* check and reset interface area */
1310 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1311 if (gdth_readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
1312 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1315 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1317 ha->brd = ioremap(i, sizeof(ushort));
1318 if (ha->brd == NULL) {
1319 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1322 if (gdth_readw(ha->brd) != 0xffff) {
1323 TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1327 pci_write_config_dword(pcistr->pdev,
1328 PCI_BASE_ADDRESS_2, i);
1329 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1330 if (ha->brd == NULL) {
1331 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1335 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1336 if (gdth_readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1337 printk("GDT-PCI: Use free address at 0x%x\n", i);
1343 printk("GDT-PCI: No free address found!\n");
1348 memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1349 if (gdth_readl(&dp6c_ptr->u) != 0) {
1350 printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1355 /* disable board interrupts, deinit services */
1356 outb(0x00,PTR2USHORT(&ha->plx->control1));
1357 outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1359 gdth_writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1360 gdth_writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1362 gdth_writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1363 gdth_writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1365 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1367 retries = INIT_RETRIES;
1369 while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1370 if (--retries == 0) {
1371 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1377 prot_ver = (unchar)gdth_readl(&dp6c_ptr->u.ic.S_Info[0]);
1378 gdth_writeb(0, &dp6c_ptr->u.ic.Status);
1379 if (prot_ver != PROTOCOL_VERSION) {
1380 printk("GDT-PCI: Illegal protocol version\n");
1385 ha->type = GDT_PCINEW;
1386 ha->ic_all_size = sizeof(dp6c_ptr->u);
1388 /* special command to controller BIOS */
1389 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1390 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1391 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1392 gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1393 gdth_writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1395 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1397 retries = INIT_RETRIES;
1399 while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1400 if (--retries == 0) {
1401 printk("GDT-PCI: Initialization error\n");
1407 gdth_writeb(0, &dp6c_ptr->u.ic.S_Status);
1409 ha->dma64_support = 0;
1412 TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1413 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1414 if (ha->brd == NULL) {
1415 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1419 /* manipulate config. space to enable DPMEM, start RP controller */
1420 pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1422 pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1423 if (pci_resource_start(pcistr->pdev, 8) == 1UL)
1424 pci_resource_start(pcistr->pdev, 8) = 0UL;
1426 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1428 pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1429 pci_resource_start(pcistr->pdev, 8));
1433 /* Ensure that it is safe to access the non HW portions of DPMEM.
1434 * Aditional check needed for Xscale based RAID controllers */
1435 while( ((int)gdth_readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1438 /* check and reset interface area */
1439 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1440 if (gdth_readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1441 printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1444 for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1446 ha->brd = ioremap(i, sizeof(ushort));
1447 if (ha->brd == NULL) {
1448 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1451 if (gdth_readw(ha->brd) != 0xffff) {
1452 TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1456 pci_write_config_dword(pcistr->pdev,
1457 PCI_BASE_ADDRESS_0, i);
1458 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1459 if (ha->brd == NULL) {
1460 printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1464 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1465 if (gdth_readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1466 printk("GDT-PCI: Use free address at 0x%x\n", i);
1472 printk("GDT-PCI: No free address found!\n");
1477 memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1479 /* disable board interrupts, deinit services */
1480 gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1481 &dp6m_ptr->i960r.edoor_en_reg);
1482 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1483 gdth_writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1484 gdth_writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1486 gdth_writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1487 gdth_writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1488 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1489 retries = INIT_RETRIES;
1491 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1492 if (--retries == 0) {
1493 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1499 prot_ver = (unchar)gdth_readl(&dp6m_ptr->u.ic.S_Info[0]);
1500 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1501 if (prot_ver != PROTOCOL_VERSION) {
1502 printk("GDT-PCI: Illegal protocol version\n");
1507 ha->type = GDT_PCIMPR;
1508 ha->ic_all_size = sizeof(dp6m_ptr->u);
1510 /* special command to controller BIOS */
1511 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1512 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1513 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1514 gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1515 gdth_writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1516 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1517 retries = INIT_RETRIES;
1519 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1520 if (--retries == 0) {
1521 printk("GDT-PCI: Initialization error\n");
1527 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1529 /* read FW version to detect 64-bit DMA support */
1530 gdth_writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1531 gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1532 retries = INIT_RETRIES;
1534 while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1535 if (--retries == 0) {
1536 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1542 prot_ver = (unchar)(gdth_readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1543 gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1544 if (prot_ver < 0x2b) /* FW < x.43: no 64-bit DMA support */
1545 ha->dma64_support = 0;
1547 ha->dma64_support = 1;
1554 /* controller protocol functions */
1556 static void __init gdth_enable_int(int hanum)
1560 gdt2_dpram_str __iomem *dp2_ptr;
1561 gdt6_dpram_str __iomem *dp6_ptr;
1562 gdt6m_dpram_str __iomem *dp6m_ptr;
1564 TRACE(("gdth_enable_int() hanum %d\n",hanum));
1565 ha = HADATA(gdth_ctr_tab[hanum]);
1566 spin_lock_irqsave(&ha->smp_lock, flags);
1568 if (ha->type == GDT_EISA) {
1569 outb(0xff, ha->bmic + EDOORREG);
1570 outb(0xff, ha->bmic + EDENABREG);
1571 outb(0x01, ha->bmic + EINTENABREG);
1572 } else if (ha->type == GDT_ISA) {
1574 gdth_writeb(1, &dp2_ptr->io.irqdel);
1575 gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1576 gdth_writeb(1, &dp2_ptr->io.irqen);
1577 } else if (ha->type == GDT_PCI) {
1579 gdth_writeb(1, &dp6_ptr->io.irqdel);
1580 gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1581 gdth_writeb(1, &dp6_ptr->io.irqen);
1582 } else if (ha->type == GDT_PCINEW) {
1583 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1584 outb(0x03, PTR2USHORT(&ha->plx->control1));
1585 } else if (ha->type == GDT_PCIMPR) {
1587 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1588 gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1589 &dp6m_ptr->i960r.edoor_en_reg);
1591 spin_unlock_irqrestore(&ha->smp_lock, flags);
1595 static int gdth_get_status(unchar *pIStatus,int irq)
1597 register gdth_ha_str *ha;
1600 TRACE(("gdth_get_status() irq %d ctr_count %d\n",
1601 irq,gdth_ctr_count));
1604 for (i=0; i<gdth_ctr_count; ++i) {
1605 ha = HADATA(gdth_ctr_tab[i]);
1606 if (ha->irq != (unchar)irq) /* check IRQ */
1608 if (ha->type == GDT_EISA)
1609 *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1610 else if (ha->type == GDT_ISA)
1612 gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1613 else if (ha->type == GDT_PCI)
1615 gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1616 else if (ha->type == GDT_PCINEW)
1617 *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1618 else if (ha->type == GDT_PCIMPR)
1620 gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1623 return i; /* board found */
1629 static int gdth_test_busy(int hanum)
1631 register gdth_ha_str *ha;
1632 register int gdtsema0 = 0;
1634 TRACE(("gdth_test_busy() hanum %d\n",hanum));
1636 ha = HADATA(gdth_ctr_tab[hanum]);
1637 if (ha->type == GDT_EISA)
1638 gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1639 else if (ha->type == GDT_ISA)
1640 gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1641 else if (ha->type == GDT_PCI)
1642 gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1643 else if (ha->type == GDT_PCINEW)
1644 gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1645 else if (ha->type == GDT_PCIMPR)
1647 (int)gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1649 return (gdtsema0 & 1);
1653 static int gdth_get_cmd_index(int hanum)
1655 register gdth_ha_str *ha;
1658 TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
1660 ha = HADATA(gdth_ctr_tab[hanum]);
1661 for (i=0; i<GDTH_MAXCMDS; ++i) {
1662 if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1663 ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1664 ha->cmd_tab[i].service = ha->pccb->Service;
1665 ha->pccb->CommandIndex = (ulong32)i+2;
1673 static void gdth_set_sema0(int hanum)
1675 register gdth_ha_str *ha;
1677 TRACE(("gdth_set_sema0() hanum %d\n",hanum));
1679 ha = HADATA(gdth_ctr_tab[hanum]);
1680 if (ha->type == GDT_EISA) {
1681 outb(1, ha->bmic + SEMA0REG);
1682 } else if (ha->type == GDT_ISA) {
1683 gdth_writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1684 } else if (ha->type == GDT_PCI) {
1685 gdth_writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1686 } else if (ha->type == GDT_PCINEW) {
1687 outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1688 } else if (ha->type == GDT_PCIMPR) {
1689 gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1694 static void gdth_copy_command(int hanum)
1696 register gdth_ha_str *ha;
1697 register gdth_cmd_str *cmd_ptr;
1698 register gdt6m_dpram_str __iomem *dp6m_ptr;
1699 register gdt6c_dpram_str __iomem *dp6c_ptr;
1700 gdt6_dpram_str __iomem *dp6_ptr;
1701 gdt2_dpram_str __iomem *dp2_ptr;
1702 ushort cp_count,dp_offset,cmd_no;
1704 TRACE(("gdth_copy_command() hanum %d\n",hanum));
1706 ha = HADATA(gdth_ctr_tab[hanum]);
1707 cp_count = ha->cmd_len;
1708 dp_offset= ha->cmd_offs_dpmem;
1709 cmd_no = ha->cmd_cnt;
1713 if (ha->type == GDT_EISA)
1714 return; /* no DPMEM, no copy */
1716 /* set cpcount dword aligned */
1718 cp_count += (4 - (cp_count & 3));
1720 ha->cmd_offs_dpmem += cp_count;
1722 /* set offset and service, copy command to DPMEM */
1723 if (ha->type == GDT_ISA) {
1725 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1726 &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1727 gdth_writew((ushort)cmd_ptr->Service,
1728 &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1729 memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1730 } else if (ha->type == GDT_PCI) {
1732 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1733 &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1734 gdth_writew((ushort)cmd_ptr->Service,
1735 &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1736 memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1737 } else if (ha->type == GDT_PCINEW) {
1739 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1740 &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1741 gdth_writew((ushort)cmd_ptr->Service,
1742 &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1743 memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1744 } else if (ha->type == GDT_PCIMPR) {
1746 gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1747 &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1748 gdth_writew((ushort)cmd_ptr->Service,
1749 &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1750 memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1755 static void gdth_release_event(int hanum)
1757 register gdth_ha_str *ha;
1759 TRACE(("gdth_release_event() hanum %d\n",hanum));
1760 ha = HADATA(gdth_ctr_tab[hanum]);
1762 #ifdef GDTH_STATISTICS
1765 for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1766 if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1769 if (max_index < i) {
1771 TRACE3(("GDT: max_index = %d\n",(ushort)i));
1776 if (ha->pccb->OpCode == GDT_INIT)
1777 ha->pccb->Service |= 0x80;
1779 if (ha->type == GDT_EISA) {
1780 if (ha->pccb->OpCode == GDT_INIT) /* store DMA buffer */
1781 outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1782 outb(ha->pccb->Service, ha->bmic + LDOORREG);
1783 } else if (ha->type == GDT_ISA) {
1784 gdth_writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1785 } else if (ha->type == GDT_PCI) {
1786 gdth_writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1787 } else if (ha->type == GDT_PCINEW) {
1788 outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1789 } else if (ha->type == GDT_PCIMPR) {
1790 gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1795 static int gdth_wait(int hanum,int index,ulong32 time)
1798 int answer_found = FALSE;
1800 TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
1802 ha = HADATA(gdth_ctr_tab[hanum]);
1804 return 1; /* no wait required */
1806 gdth_from_wait = TRUE;
1808 gdth_interrupt((int)ha->irq,ha);
1809 if (wait_hanum==hanum && wait_index==index) {
1810 answer_found = TRUE;
1815 gdth_from_wait = FALSE;
1817 while (gdth_test_busy(hanum))
1820 return (answer_found);
1824 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
1825 ulong64 p2,ulong64 p3)
1827 register gdth_ha_str *ha;
1828 register gdth_cmd_str *cmd_ptr;
1831 TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1833 ha = HADATA(gdth_ctr_tab[hanum]);
1835 memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1838 for (retries = INIT_RETRIES;;) {
1839 cmd_ptr->Service = service;
1840 cmd_ptr->RequestBuffer = INTERNAL_CMND;
1841 if (!(index=gdth_get_cmd_index(hanum))) {
1842 TRACE(("GDT: No free command index found\n"));
1845 gdth_set_sema0(hanum);
1846 cmd_ptr->OpCode = opcode;
1847 cmd_ptr->BoardNode = LOCALBOARD;
1848 if (service == CACHESERVICE) {
1849 if (opcode == GDT_IOCTL) {
1850 cmd_ptr->u.ioctl.subfunc = p1;
1851 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1852 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1853 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1855 if (ha->cache_feat & GDT_64BIT) {
1856 cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1857 cmd_ptr->u.cache64.BlockNo = p2;
1859 cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1860 cmd_ptr->u.cache.BlockNo = (ulong32)p2;
1863 } else if (service == SCSIRAWSERVICE) {
1864 if (ha->raw_feat & GDT_64BIT) {
1865 cmd_ptr->u.raw64.direction = p1;
1866 cmd_ptr->u.raw64.bus = (unchar)p2;
1867 cmd_ptr->u.raw64.target = (unchar)p3;
1868 cmd_ptr->u.raw64.lun = (unchar)(p3 >> 8);
1870 cmd_ptr->u.raw.direction = p1;
1871 cmd_ptr->u.raw.bus = (unchar)p2;
1872 cmd_ptr->u.raw.target = (unchar)p3;
1873 cmd_ptr->u.raw.lun = (unchar)(p3 >> 8);
1875 } else if (service == SCREENSERVICE) {
1876 if (opcode == GDT_REALTIME) {
1877 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1878 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1879 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1882 ha->cmd_len = sizeof(gdth_cmd_str);
1883 ha->cmd_offs_dpmem = 0;
1885 gdth_copy_command(hanum);
1886 gdth_release_event(hanum);
1888 if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
1889 printk("GDT: Initialization error (timeout service %d)\n",service);
1892 if (ha->status != S_BSY || --retries == 0)
1897 return (ha->status != S_OK ? 0:1);
1901 /* search for devices */
1903 static int __init gdth_search_drives(int hanum)
1905 register gdth_ha_str *ha;
1908 ulong32 bus_no, drv_cnt, drv_no, j;
1909 gdth_getch_str *chn;
1910 gdth_drlist_str *drl;
1911 gdth_iochan_str *ioc;
1912 gdth_raw_iochan_str *iocr;
1913 gdth_arcdl_str *alst;
1914 gdth_alist_str *alst2;
1915 gdth_oem_str_ioctl *oemstr;
1917 gdth_perf_modes *pmod;
1925 TRACE(("gdth_search_drives() hanum %d\n",hanum));
1926 ha = HADATA(gdth_ctr_tab[hanum]);
1929 /* initialize controller services, at first: screen service */
1930 ha->screen_feat = 0;
1932 ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_X_INIT_SCR,0,0,0);
1934 ha->screen_feat = GDT_64BIT;
1936 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1937 ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0);
1939 printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1943 TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1946 /* read realtime clock info, send to controller */
1947 /* 1. wait for the falling edge of update flag */
1948 spin_lock_irqsave(&rtc_lock, flags);
1949 for (j = 0; j < 1000000; ++j)
1950 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1952 for (j = 0; j < 1000000; ++j)
1953 if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1957 for (j = 0; j < 12; ++j)
1958 rtc[j] = CMOS_READ(j);
1959 } while (rtc[0] != CMOS_READ(0));
1960 spin_lock_irqrestore(&rtc_lock, flags);
1961 TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1962 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1963 /* 3. send to controller firmware */
1964 gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
1965 *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1968 /* unfreeze all IOs */
1969 gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
1971 /* initialize cache service */
1974 ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INIT_HOST,LINUX_OS,0,0);
1976 ha->cache_feat = GDT_64BIT;
1978 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1979 ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0);
1981 printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1985 TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1986 cdev_cnt = (ushort)ha->info;
1987 ha->fw_vers = ha->service;
1990 if (ha->type == GDT_PCIMPR) {
1991 /* set perf. modes */
1992 pmod = (gdth_perf_modes *)ha->pscratch;
1994 pmod->st_mode = 1; /* enable one status buffer */
1995 *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1996 pmod->st_buff_indx1 = COALINDEX;
1997 pmod->st_buff_addr2 = 0;
1998 pmod->st_buff_u_addr2 = 0;
1999 pmod->st_buff_indx2 = 0;
2000 pmod->st_buff_size = sizeof(gdth_coal_status) * MAXOFFSETS;
2001 pmod->cmd_mode = 0; // disable all cmd buffers
2002 pmod->cmd_buff_addr1 = 0;
2003 pmod->cmd_buff_u_addr1 = 0;
2004 pmod->cmd_buff_indx1 = 0;
2005 pmod->cmd_buff_addr2 = 0;
2006 pmod->cmd_buff_u_addr2 = 0;
2007 pmod->cmd_buff_indx2 = 0;
2008 pmod->cmd_buff_size = 0;
2009 pmod->reserved1 = 0;
2010 pmod->reserved2 = 0;
2011 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,SET_PERF_MODES,
2012 INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
2013 printk("GDT-HA %d: Interrupt coalescing activated\n", hanum);
2018 /* detect number of buses - try new IOCTL */
2019 iocr = (gdth_raw_iochan_str *)ha->pscratch;
2020 iocr->hdr.version = 0xffffffff;
2021 iocr->hdr.list_entries = MAXBUS;
2022 iocr->hdr.first_chan = 0;
2023 iocr->hdr.last_chan = MAXBUS-1;
2024 iocr->hdr.list_offset = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
2025 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
2026 INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
2027 TRACE2(("IOCHAN_RAW_DESC supported!\n"));
2028 ha->bus_cnt = iocr->hdr.chan_count;
2029 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2030 if (iocr->list[bus_no].proc_id < MAXID)
2031 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
2033 ha->bus_id[bus_no] = 0xff;
2037 chn = (gdth_getch_str *)ha->pscratch;
2038 for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
2039 chn->channel_no = bus_no;
2040 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2041 SCSI_CHAN_CNT | L_CTRL_PATTERN,
2042 IO_CHANNEL | INVALID_CHANNEL,
2043 sizeof(gdth_getch_str))) {
2045 printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
2051 if (chn->siop_id < MAXID)
2052 ha->bus_id[bus_no] = chn->siop_id;
2054 ha->bus_id[bus_no] = 0xff;
2056 ha->bus_cnt = (unchar)bus_no;
2058 TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
2060 /* read cache configuration */
2061 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
2062 INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
2063 printk("GDT-HA %d: Initialization error cache service (code %d)\n",
2067 ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
2068 TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
2069 ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
2070 ha->cpar.write_back,ha->cpar.block_size));
2072 /* read board info and features */
2073 ha->more_proc = FALSE;
2074 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
2075 INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
2076 memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
2077 sizeof(gdth_binfo_str));
2078 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
2079 INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
2080 TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
2081 ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
2082 ha->more_proc = TRUE;
2085 TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
2086 strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
2088 TRACE2(("Controller name: %s\n",ha->binfo.type_string));
2090 /* read more informations */
2091 if (ha->more_proc) {
2092 /* physical drives, channel addresses */
2093 ioc = (gdth_iochan_str *)ha->pscratch;
2094 ioc->hdr.version = 0xffffffff;
2095 ioc->hdr.list_entries = MAXBUS;
2096 ioc->hdr.first_chan = 0;
2097 ioc->hdr.last_chan = MAXBUS-1;
2098 ioc->hdr.list_offset = GDTOFFSOF(gdth_iochan_str, list[0]);
2099 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
2100 INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
2101 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2102 ha->raw[bus_no].address = ioc->list[bus_no].address;
2103 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
2106 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2107 ha->raw[bus_no].address = IO_CHANNEL;
2108 ha->raw[bus_no].local_no = bus_no;
2111 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2112 chn = (gdth_getch_str *)ha->pscratch;
2113 chn->channel_no = ha->raw[bus_no].local_no;
2114 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2115 SCSI_CHAN_CNT | L_CTRL_PATTERN,
2116 ha->raw[bus_no].address | INVALID_CHANNEL,
2117 sizeof(gdth_getch_str))) {
2118 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
2119 TRACE2(("Channel %d: %d phys. drives\n",
2120 bus_no,chn->drive_cnt));
2122 if (ha->raw[bus_no].pdev_cnt > 0) {
2123 drl = (gdth_drlist_str *)ha->pscratch;
2124 drl->sc_no = ha->raw[bus_no].local_no;
2125 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
2126 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2127 SCSI_DR_LIST | L_CTRL_PATTERN,
2128 ha->raw[bus_no].address | INVALID_CHANNEL,
2129 sizeof(gdth_drlist_str))) {
2130 for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
2131 ha->raw[bus_no].id_list[j] = drl->sc_list[j];
2133 ha->raw[bus_no].pdev_cnt = 0;
2138 /* logical drives */
2139 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
2140 INVALID_CHANNEL,sizeof(ulong32))) {
2141 drv_cnt = *(ulong32 *)ha->pscratch;
2142 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
2143 INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
2144 for (j = 0; j < drv_cnt; ++j) {
2145 drv_no = ((ulong32 *)ha->pscratch)[j];
2146 if (drv_no < MAX_LDRIVES) {
2147 ha->hdr[drv_no].is_logdrv = TRUE;
2148 TRACE2(("Drive %d is log. drive\n",drv_no));
2152 alst = (gdth_arcdl_str *)ha->pscratch;
2153 alst->entries_avail = MAX_LDRIVES;
2154 alst->first_entry = 0;
2155 alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
2156 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2157 ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
2158 INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
2159 (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
2160 for (j = 0; j < alst->entries_init; ++j) {
2161 ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
2162 ha->hdr[j].is_master = alst->list[j].is_master;
2163 ha->hdr[j].is_parity = alst->list[j].is_parity;
2164 ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
2165 ha->hdr[j].master_no = alst->list[j].cd_handle;
2167 } else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2168 ARRAY_DRV_LIST | LA_CTRL_PATTERN,
2169 0, 35 * sizeof(gdth_alist_str))) {
2170 for (j = 0; j < 35; ++j) {
2171 alst2 = &((gdth_alist_str *)ha->pscratch)[j];
2172 ha->hdr[j].is_arraydrv = alst2->is_arrayd;
2173 ha->hdr[j].is_master = alst2->is_master;
2174 ha->hdr[j].is_parity = alst2->is_parity;
2175 ha->hdr[j].is_hotfix = alst2->is_hotfix;
2176 ha->hdr[j].master_no = alst2->cd_handle;
2182 /* initialize raw service */
2185 ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_X_INIT_RAW,0,0,0);
2187 ha->raw_feat = GDT_64BIT;
2189 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
2190 ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0);
2192 printk("GDT-HA %d: Initialization error raw service (code %d)\n",
2196 TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
2198 /* set/get features raw service (scatter/gather) */
2199 if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
2201 TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
2202 if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
2203 TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
2205 ha->raw_feat |= (ushort)ha->info;
2209 /* set/get features cache service (equal to raw service) */
2210 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
2211 SCATTER_GATHER,0)) {
2212 TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
2213 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
2214 TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
2216 ha->cache_feat |= (ushort)ha->info;
2220 /* reserve drives for raw service */
2221 if (reserve_mode != 0) {
2222 gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
2223 reserve_mode == 1 ? 1 : 3, 0, 0);
2224 TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
2227 for (i = 0; i < MAX_RES_ARGS; i += 4) {
2228 if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
2229 reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
2230 TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
2231 reserve_list[i], reserve_list[i+1],
2232 reserve_list[i+2], reserve_list[i+3]));
2233 if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
2234 reserve_list[i+1], reserve_list[i+2] |
2235 (reserve_list[i+3] << 8))) {
2236 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
2242 /* Determine OEM string using IOCTL */
2243 oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
2244 oemstr->params.ctl_version = 0x01;
2245 oemstr->params.buffer_size = sizeof(oemstr->text);
2246 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2247 CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
2248 sizeof(gdth_oem_str_ioctl))) {
2249 TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
2250 printk("GDT-HA %d: Vendor: %s Name: %s\n",
2251 hanum,oemstr->text.oem_company_name,ha->binfo.type_string);
2252 /* Save the Host Drive inquiry data */
2253 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2254 strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
2255 sizeof(ha->oem_name));
2257 strncpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,7);
2258 ha->oem_name[7] = '\0';
2261 /* Old method, based on PCI ID */
2262 TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
2263 printk("GDT-HA %d: Name: %s\n",
2264 hanum,ha->binfo.type_string);
2265 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2266 if (ha->oem_id == OEM_ID_INTEL)
2267 strlcpy(ha->oem_name,"Intel ", sizeof(ha->oem_name));
2269 strlcpy(ha->oem_name,"ICP ", sizeof(ha->oem_name));
2271 if (ha->oem_id == OEM_ID_INTEL)
2272 strcpy(ha->oem_name,"Intel ");
2274 strcpy(ha->oem_name,"ICP ");
2278 /* scanning for host drives */
2279 for (i = 0; i < cdev_cnt; ++i)
2280 gdth_analyse_hdrive(hanum,i);
2282 TRACE(("gdth_search_drives() OK\n"));
2286 static int gdth_analyse_hdrive(int hanum,ushort hdrive)
2288 register gdth_ha_str *ha;
2290 int drv_hds, drv_secs;
2292 TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
2293 if (hdrive >= MAX_HDRIVES)
2295 ha = HADATA(gdth_ctr_tab[hanum]);
2297 if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
2299 ha->hdr[hdrive].present = TRUE;
2300 ha->hdr[hdrive].size = ha->info;
2302 /* evaluate mapping (sectors per head, heads per cylinder) */
2303 ha->hdr[hdrive].size &= ~SECS32;
2304 if (ha->info2 == 0) {
2305 gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
2307 drv_hds = ha->info2 & 0xff;
2308 drv_secs = (ha->info2 >> 8) & 0xff;
2309 drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
2311 ha->hdr[hdrive].heads = (unchar)drv_hds;
2312 ha->hdr[hdrive].secs = (unchar)drv_secs;
2314 ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs;
2316 if (ha->cache_feat & GDT_64BIT) {
2317 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INFO,hdrive,0,0)
2318 && ha->info2 != 0) {
2319 ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
2322 TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
2323 hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
2325 /* get informations about device */
2326 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
2327 TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
2329 ha->hdr[hdrive].devtype = (ushort)ha->info;
2333 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
2334 TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
2337 ha->hdr[hdrive].cluster_type = (unchar)ha->info;
2340 /* R/W attributes */
2341 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
2342 TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
2344 ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
2351 /* command queueing/sending functions */
2353 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
2355 register gdth_ha_str *ha;
2356 register Scsi_Cmnd *pscp;
2357 register Scsi_Cmnd *nscp;
2361 TRACE(("gdth_putq() priority %d\n",priority));
2362 ha = HADATA(gdth_ctr_tab[hanum]);
2363 spin_lock_irqsave(&ha->smp_lock, flags);
2365 if (scp->done != gdth_scsi_done) {
2366 scp->SCp.this_residual = (int)priority;
2367 b = virt_ctr ? NUMDATA(scp->device->host)->busnum:scp->device->channel;
2368 t = scp->device->id;
2369 if (priority >= DEFAULT_PRI) {
2370 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2371 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2372 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2373 scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
2378 if (ha->req_first==NULL) {
2379 ha->req_first = scp; /* queue was empty */
2380 scp->SCp.ptr = NULL;
2381 } else { /* queue not empty */
2382 pscp = ha->req_first;
2383 nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2384 /* priority: 0-highest,..,0xff-lowest */
2385 while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
2387 nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2389 pscp->SCp.ptr = (char *)scp;
2390 scp->SCp.ptr = (char *)nscp;
2392 spin_unlock_irqrestore(&ha->smp_lock, flags);
2394 #ifdef GDTH_STATISTICS
2396 for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2398 if (max_rq < flags) {
2400 TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2405 static void gdth_next(int hanum)
2407 register gdth_ha_str *ha;
2408 register Scsi_Cmnd *pscp;
2409 register Scsi_Cmnd *nscp;
2410 unchar b, t, l, firsttime;
2411 unchar this_cmd, next_cmd;
2415 TRACE(("gdth_next() hanum %d\n",hanum));
2416 ha = HADATA(gdth_ctr_tab[hanum]);
2418 spin_lock_irqsave(&ha->smp_lock, flags);
2420 ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2421 this_cmd = firsttime = TRUE;
2422 next_cmd = gdth_polling ? FALSE:TRUE;
2425 for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2426 if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2427 pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2428 if (nscp->done != gdth_scsi_done) {
2430 NUMDATA(nscp->device->host)->busnum : nscp->device->channel;
2431 t = nscp->device->id;
2432 l = nscp->device->lun;
2433 if (nscp->SCp.this_residual >= DEFAULT_PRI) {
2434 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2435 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2442 if (gdth_test_busy(hanum)) { /* controller busy ? */
2443 TRACE(("gdth_next() controller %d busy !\n",hanum));
2444 if (!gdth_polling) {
2445 spin_unlock_irqrestore(&ha->smp_lock, flags);
2448 while (gdth_test_busy(hanum))
2454 if (nscp->done != gdth_scsi_done) {
2455 if (nscp->SCp.phase == -1) {
2456 nscp->SCp.phase = CACHESERVICE; /* default: cache svc. */
2457 if (nscp->cmnd[0] == TEST_UNIT_READY) {
2458 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2460 /* TEST_UNIT_READY -> set scan mode */
2461 if ((ha->scan_mode & 0x0f) == 0) {
2462 if (b == 0 && t == 0 && l == 0) {
2464 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2466 } else if ((ha->scan_mode & 0x0f) == 1) {
2467 if (b == 0 && ((t == 0 && l == 1) ||
2468 (t == 1 && l == 0))) {
2469 nscp->SCp.sent_command = GDT_SCAN_START;
2470 nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2472 ha->scan_mode = 0x12;
2473 TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2476 ha->scan_mode &= 0x10;
2477 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2479 } else if (ha->scan_mode == 0x12) {
2480 if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2481 nscp->SCp.phase = SCSIRAWSERVICE;
2482 nscp->SCp.sent_command = GDT_SCAN_END;
2483 ha->scan_mode &= 0x10;
2484 TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2489 if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2490 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2491 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2492 /* always GDT_CLUST_INFO! */
2493 nscp->SCp.sent_command = GDT_CLUST_INFO;
2498 if (nscp->SCp.sent_command != -1) {
2499 if ((nscp->SCp.phase & 0xff) == CACHESERVICE) {
2500 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2503 } else if ((nscp->SCp.phase & 0xff) == SCSIRAWSERVICE) {
2504 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2508 memset((char*)nscp->sense_buffer,0,16);
2509 nscp->sense_buffer[0] = 0x70;
2510 nscp->sense_buffer[2] = NOT_READY;
2511 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2512 if (!nscp->SCp.have_data_in)
2513 nscp->SCp.have_data_in++;
2515 nscp->scsi_done(nscp);
2517 } else if (nscp->done == gdth_scsi_done) {
2518 if (!(cmd_index=gdth_special_cmd(hanum,nscp)))
2521 } else if (b != ha->virt_bus) {
2522 if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2523 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2526 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2527 } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2528 TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2529 nscp->cmnd[0], b, t, l));
2530 nscp->result = DID_BAD_TARGET << 16;
2531 if (!nscp->SCp.have_data_in)
2532 nscp->SCp.have_data_in++;
2534 nscp->scsi_done(nscp);
2536 switch (nscp->cmnd[0]) {
2537 case TEST_UNIT_READY:
2544 case SERVICE_ACTION_IN:
2545 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2546 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2547 nscp->cmnd[4],nscp->cmnd[5]));
2548 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2549 /* return UNIT_ATTENTION */
2550 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2552 ha->hdr[t].media_changed = FALSE;
2553 memset((char*)nscp->sense_buffer,0,16);
2554 nscp->sense_buffer[0] = 0x70;
2555 nscp->sense_buffer[2] = UNIT_ATTENTION;
2556 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2557 if (!nscp->SCp.have_data_in)
2558 nscp->SCp.have_data_in++;
2560 nscp->scsi_done(nscp);
2561 } else if (gdth_internal_cache_cmd(hanum,nscp))
2562 nscp->scsi_done(nscp);
2565 case ALLOW_MEDIUM_REMOVAL:
2566 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2567 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2568 nscp->cmnd[4],nscp->cmnd[5]));
2569 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2570 TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2571 nscp->result = DID_OK << 16;
2572 nscp->sense_buffer[0] = 0;
2573 if (!nscp->SCp.have_data_in)
2574 nscp->SCp.have_data_in++;
2576 nscp->scsi_done(nscp);
2578 nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2579 TRACE(("Prevent/allow r. %d rem. drive %d\n",
2580 nscp->cmnd[4],nscp->cmnd[3]));
2581 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2588 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2589 "RESERVE" : "RELEASE"));
2590 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2600 if (ha->hdr[t].media_changed) {
2601 /* return UNIT_ATTENTION */
2602 TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2604 ha->hdr[t].media_changed = FALSE;
2605 memset((char*)nscp->sense_buffer,0,16);
2606 nscp->sense_buffer[0] = 0x70;
2607 nscp->sense_buffer[2] = UNIT_ATTENTION;
2608 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2609 if (!nscp->SCp.have_data_in)
2610 nscp->SCp.have_data_in++;
2612 nscp->scsi_done(nscp);
2613 } else if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2618 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2619 nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2620 nscp->cmnd[4],nscp->cmnd[5]));
2621 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2622 hanum, nscp->cmnd[0]);
2623 nscp->result = DID_ABORT << 16;
2624 if (!nscp->SCp.have_data_in)
2625 nscp->SCp.have_data_in++;
2627 nscp->scsi_done(nscp);
2634 if (nscp == ha->req_first)
2635 ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2637 pscp->SCp.ptr = nscp->SCp.ptr;
2642 if (ha->cmd_cnt > 0) {
2643 gdth_release_event(hanum);
2647 spin_unlock_irqrestore(&ha->smp_lock, flags);
2649 if (gdth_polling && ha->cmd_cnt > 0) {
2650 if (!gdth_wait(hanum,cmd_index,POLL_TIMEOUT))
2651 printk("GDT-HA %d: Command %d timed out !\n",
2656 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
2657 char *buffer,ushort count)
2661 struct scatterlist *sl;
2665 cpcount = count<=(ushort)scp->request_bufflen ? count:(ushort)scp->request_bufflen;
2666 ha = HADATA(gdth_ctr_tab[hanum]);
2669 sl = (struct scatterlist *)scp->request_buffer;
2670 for (i=0,cpsum=0; i<scp->use_sg; ++i,++sl) {
2671 unsigned long flags;
2672 cpnow = (ushort)sl->length;
2673 TRACE(("copy_internal() now %d sum %d count %d %d\n",
2674 cpnow,cpsum,cpcount,(ushort)scp->bufflen));
2675 if (cpsum+cpnow > cpcount)
2676 cpnow = cpcount - cpsum;
2679 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2683 local_irq_save(flags);
2684 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2685 address = kmap_atomic(sl->page, KM_BIO_SRC_IRQ) + sl->offset;
2686 memcpy(address,buffer,cpnow);
2687 flush_dcache_page(sl->page);
2688 kunmap_atomic(address, KM_BIO_SRC_IRQ);
2690 address = kmap_atomic(sl->page, KM_BH_IRQ) + sl->offset;
2691 memcpy(address,buffer,cpnow);
2692 flush_dcache_page(sl->page);
2693 kunmap_atomic(address, KM_BH_IRQ);
2695 local_irq_restore(flags);
2696 if (cpsum == cpcount)
2701 TRACE(("copy_internal() count %d\n",cpcount));
2702 memcpy((char*)scp->request_buffer,buffer,cpcount);
2706 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp)
2708 register gdth_ha_str *ha;
2711 gdth_rdcap_data rdc;
2713 gdth_modep_data mpd;
2715 ha = HADATA(gdth_ctr_tab[hanum]);
2716 t = scp->device->id;
2717 TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2720 scp->result = DID_OK << 16;
2721 scp->sense_buffer[0] = 0;
2723 switch (scp->cmnd[0]) {
2724 case TEST_UNIT_READY:
2727 TRACE2(("Test/Verify/Start hdrive %d\n",t));
2731 TRACE2(("Inquiry hdrive %d devtype %d\n",
2732 t,ha->hdr[t].devtype));
2733 inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2734 /* you can here set all disks to removable, if you want to do
2735 a flush using the ALLOW_MEDIUM_REMOVAL command */
2736 inq.modif_rmb = 0x00;
2737 if ((ha->hdr[t].devtype & 1) ||
2738 (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2739 inq.modif_rmb = 0x80;
2743 strcpy(inq.vendor,ha->oem_name);
2744 sprintf(inq.product,"Host Drive #%02d",t);
2745 strcpy(inq.revision," ");
2746 gdth_copy_internal_data(hanum,scp,(char*)&inq,sizeof(gdth_inq_data));
2750 TRACE2(("Request sense hdrive %d\n",t));
2751 sd.errorcode = 0x70;
2756 gdth_copy_internal_data(hanum,scp,(char*)&sd,sizeof(gdth_sense_data));
2760 TRACE2(("Mode sense hdrive %d\n",t));
2761 memset((char*)&mpd,0,sizeof(gdth_modep_data));
2762 mpd.hd.data_length = sizeof(gdth_modep_data);
2763 mpd.hd.dev_par = (ha->hdr[t].devtype&2) ? 0x80:0;
2764 mpd.hd.bd_length = sizeof(mpd.bd);
2765 mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2766 mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2767 mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2768 gdth_copy_internal_data(hanum,scp,(char*)&mpd,sizeof(gdth_modep_data));
2772 TRACE2(("Read capacity hdrive %d\n",t));
2773 if (ha->hdr[t].size > (ulong64)0xffffffff)
2774 rdc.last_block_no = 0xffffffff;
2776 rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2777 rdc.block_length = cpu_to_be32(SECTOR_SIZE);
2778 gdth_copy_internal_data(hanum,scp,(char*)&rdc,sizeof(gdth_rdcap_data));
2781 case SERVICE_ACTION_IN:
2782 if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2783 (ha->cache_feat & GDT_64BIT)) {
2784 gdth_rdcap16_data rdc16;
2786 TRACE2(("Read capacity (16) hdrive %d\n",t));
2787 rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2788 rdc16.block_length = cpu_to_be32(SECTOR_SIZE);
2789 gdth_copy_internal_data(hanum,scp,(char*)&rdc16,sizeof(gdth_rdcap16_data));
2791 scp->result = DID_ABORT << 16;
2796 TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2800 if (!scp->SCp.have_data_in)
2801 scp->SCp.have_data_in++;
2808 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive)
2810 register gdth_ha_str *ha;
2811 register gdth_cmd_str *cmdp;
2812 struct scatterlist *sl;
2813 ulong32 cnt, blockcnt;
2814 ulong64 no, blockno;
2815 dma_addr_t phys_addr;
2816 int i, cmd_index, read_write, sgcnt, mode64;
2820 ha = HADATA(gdth_ctr_tab[hanum]);
2822 TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2823 scp->cmnd[0],scp->cmd_len,hdrive));
2825 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2828 mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2829 /* test for READ_16, WRITE_16 if !mode64 ? ---
2830 not required, should not occur due to error return on
2833 cmdp->Service = CACHESERVICE;
2834 cmdp->RequestBuffer = scp;
2835 /* search free command index */
2836 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2837 TRACE(("GDT: No free command index found\n"));
2840 /* if it's the first command, set command semaphore */
2841 if (ha->cmd_cnt == 0)
2842 gdth_set_sema0(hanum);
2846 if (scp->SCp.sent_command != -1)
2847 cmdp->OpCode = scp->SCp.sent_command; /* special cache cmd. */
2848 else if (scp->cmnd[0] == RESERVE)
2849 cmdp->OpCode = GDT_RESERVE_DRV;
2850 else if (scp->cmnd[0] == RELEASE)
2851 cmdp->OpCode = GDT_RELEASE_DRV;
2852 else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2853 if (scp->cmnd[4] & 1) /* prevent ? */
2854 cmdp->OpCode = GDT_MOUNT;
2855 else if (scp->cmnd[3] & 1) /* removable drive ? */
2856 cmdp->OpCode = GDT_UNMOUNT;
2858 cmdp->OpCode = GDT_FLUSH;
2859 } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2860 scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2863 if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2864 (ha->cache_feat & GDT_WR_THROUGH)))
2865 cmdp->OpCode = GDT_WRITE_THR;
2867 cmdp->OpCode = GDT_WRITE;
2870 cmdp->OpCode = GDT_READ;
2873 cmdp->BoardNode = LOCALBOARD;
2875 cmdp->u.cache64.DeviceNo = hdrive;
2876 cmdp->u.cache64.BlockNo = 1;
2877 cmdp->u.cache64.sg_canz = 0;
2879 cmdp->u.cache.DeviceNo = hdrive;
2880 cmdp->u.cache.BlockNo = 1;
2881 cmdp->u.cache.sg_canz = 0;
2885 if (scp->cmd_len == 16) {
2886 memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2887 blockno = be64_to_cpu(no);
2888 memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2889 blockcnt = be32_to_cpu(cnt);
2890 } else if (scp->cmd_len == 10) {
2891 memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2892 blockno = be32_to_cpu(no);
2893 memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2894 blockcnt = be16_to_cpu(cnt);
2896 memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2897 blockno = be32_to_cpu(no) & 0x001fffffUL;
2898 blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2901 cmdp->u.cache64.BlockNo = blockno;
2902 cmdp->u.cache64.BlockCnt = blockcnt;
2904 cmdp->u.cache.BlockNo = (ulong32)blockno;
2905 cmdp->u.cache.BlockCnt = blockcnt;
2909 sl = (struct scatterlist *)scp->request_buffer;
2910 sgcnt = scp->use_sg;
2911 scp->SCp.Status = GDTH_MAP_SG;
2912 scp->SCp.Message = (read_write == 1 ?
2913 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2914 sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2916 cmdp->u.cache64.DestAddr= (ulong64)-1;
2917 cmdp->u.cache64.sg_canz = sgcnt;
2918 for (i=0; i<sgcnt; ++i,++sl) {
2919 cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2920 #ifdef GDTH_DMA_STATISTICS
2921 if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2926 cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2929 cmdp->u.cache.DestAddr= 0xffffffff;
2930 cmdp->u.cache.sg_canz = sgcnt;
2931 for (i=0; i<sgcnt; ++i,++sl) {
2932 cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2933 #ifdef GDTH_DMA_STATISTICS
2936 cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2940 #ifdef GDTH_STATISTICS
2941 if (max_sg < (ulong32)sgcnt) {
2942 max_sg = (ulong32)sgcnt;
2943 TRACE3(("GDT: max_sg = %d\n",max_sg));
2947 } else if (scp->request_bufflen) {
2948 scp->SCp.Status = GDTH_MAP_SINGLE;
2949 scp->SCp.Message = (read_write == 1 ?
2950 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2951 page = virt_to_page(scp->request_buffer);
2952 offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2953 phys_addr = pci_map_page(ha->pdev,page,offset,
2954 scp->request_bufflen,scp->SCp.Message);
2955 scp->SCp.dma_handle = phys_addr;
2957 if (ha->cache_feat & SCATTER_GATHER) {
2958 cmdp->u.cache64.DestAddr = (ulong64)-1;
2959 cmdp->u.cache64.sg_canz = 1;
2960 cmdp->u.cache64.sg_lst[0].sg_ptr = phys_addr;
2961 cmdp->u.cache64.sg_lst[0].sg_len = scp->request_bufflen;
2962 cmdp->u.cache64.sg_lst[1].sg_len = 0;
2964 cmdp->u.cache64.DestAddr = phys_addr;
2965 cmdp->u.cache64.sg_canz= 0;
2968 if (ha->cache_feat & SCATTER_GATHER) {
2969 cmdp->u.cache.DestAddr = 0xffffffff;
2970 cmdp->u.cache.sg_canz = 1;
2971 cmdp->u.cache.sg_lst[0].sg_ptr = phys_addr;
2972 cmdp->u.cache.sg_lst[0].sg_len = scp->request_bufflen;
2973 cmdp->u.cache.sg_lst[1].sg_len = 0;
2975 cmdp->u.cache.DestAddr = phys_addr;
2976 cmdp->u.cache.sg_canz= 0;
2981 /* evaluate command size, check space */
2983 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2984 cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2985 cmdp->u.cache64.sg_lst[0].sg_ptr,
2986 cmdp->u.cache64.sg_lst[0].sg_len));
2987 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2988 cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2989 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2990 (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2992 TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2993 cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2994 cmdp->u.cache.sg_lst[0].sg_ptr,
2995 cmdp->u.cache.sg_lst[0].sg_len));
2996 TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2997 cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2998 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2999 (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
3001 if (ha->cmd_len & 3)
3002 ha->cmd_len += (4 - (ha->cmd_len & 3));
3004 if (ha->cmd_cnt > 0) {
3005 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3007 TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
3008 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3014 gdth_copy_command(hanum);
3018 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b)
3020 register gdth_ha_str *ha;
3021 register gdth_cmd_str *cmdp;
3022 struct scatterlist *sl;
3024 dma_addr_t phys_addr, sense_paddr;
3025 int cmd_index, sgcnt, mode64;
3030 ha = HADATA(gdth_ctr_tab[hanum]);
3031 t = scp->device->id;
3032 l = scp->device->lun;
3034 TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
3035 scp->cmnd[0],b,t,l));
3037 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3040 mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
3042 cmdp->Service = SCSIRAWSERVICE;
3043 cmdp->RequestBuffer = scp;
3044 /* search free command index */
3045 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
3046 TRACE(("GDT: No free command index found\n"));
3049 /* if it's the first command, set command semaphore */
3050 if (ha->cmd_cnt == 0)
3051 gdth_set_sema0(hanum);
3054 if (scp->SCp.sent_command != -1) {
3055 cmdp->OpCode = scp->SCp.sent_command; /* special raw cmd. */
3056 cmdp->BoardNode = LOCALBOARD;
3058 cmdp->u.raw64.direction = (scp->SCp.phase >> 8);
3059 TRACE2(("special raw cmd 0x%x param 0x%x\n",
3060 cmdp->OpCode, cmdp->u.raw64.direction));
3061 /* evaluate command size */
3062 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
3064 cmdp->u.raw.direction = (scp->SCp.phase >> 8);
3065 TRACE2(("special raw cmd 0x%x param 0x%x\n",
3066 cmdp->OpCode, cmdp->u.raw.direction));
3067 /* evaluate command size */
3068 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
3072 page = virt_to_page(scp->sense_buffer);
3073 offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
3074 sense_paddr = pci_map_page(ha->pdev,page,offset,
3075 16,PCI_DMA_FROMDEVICE);
3076 *(ulong32 *)&scp->SCp.buffer = (ulong32)sense_paddr;
3077 /* high part, if 64bit */
3078 *(ulong32 *)&scp->host_scribble = (ulong32)((ulong64)sense_paddr >> 32);
3079 cmdp->OpCode = GDT_WRITE; /* always */
3080 cmdp->BoardNode = LOCALBOARD;
3082 cmdp->u.raw64.reserved = 0;
3083 cmdp->u.raw64.mdisc_time = 0;
3084 cmdp->u.raw64.mcon_time = 0;
3085 cmdp->u.raw64.clen = scp->cmd_len;
3086 cmdp->u.raw64.target = t;
3087 cmdp->u.raw64.lun = l;
3088 cmdp->u.raw64.bus = b;
3089 cmdp->u.raw64.priority = 0;
3090 cmdp->u.raw64.sdlen = scp->request_bufflen;
3091 cmdp->u.raw64.sense_len = 16;
3092 cmdp->u.raw64.sense_data = sense_paddr;
3093 cmdp->u.raw64.direction =
3094 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
3095 memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
3096 cmdp->u.raw64.sg_ranz = 0;
3098 cmdp->u.raw.reserved = 0;
3099 cmdp->u.raw.mdisc_time = 0;
3100 cmdp->u.raw.mcon_time = 0;
3101 cmdp->u.raw.clen = scp->cmd_len;
3102 cmdp->u.raw.target = t;
3103 cmdp->u.raw.lun = l;
3104 cmdp->u.raw.bus = b;
3105 cmdp->u.raw.priority = 0;
3106 cmdp->u.raw.link_p = 0;
3107 cmdp->u.raw.sdlen = scp->request_bufflen;
3108 cmdp->u.raw.sense_len = 16;
3109 cmdp->u.raw.sense_data = sense_paddr;
3110 cmdp->u.raw.direction =
3111 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
3112 memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
3113 cmdp->u.raw.sg_ranz = 0;
3117 sl = (struct scatterlist *)scp->request_buffer;
3118 sgcnt = scp->use_sg;
3119 scp->SCp.Status = GDTH_MAP_SG;
3120 scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
3121 sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
3123 cmdp->u.raw64.sdata = (ulong64)-1;
3124 cmdp->u.raw64.sg_ranz = sgcnt;
3125 for (i=0; i<sgcnt; ++i,++sl) {
3126 cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
3127 #ifdef GDTH_DMA_STATISTICS
3128 if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
3133 cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
3136 cmdp->u.raw.sdata = 0xffffffff;
3137 cmdp->u.raw.sg_ranz = sgcnt;
3138 for (i=0; i<sgcnt; ++i,++sl) {
3139 cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
3140 #ifdef GDTH_DMA_STATISTICS
3143 cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
3147 #ifdef GDTH_STATISTICS
3148 if (max_sg < sgcnt) {
3150 TRACE3(("GDT: max_sg = %d\n",sgcnt));
3154 } else if (scp->request_bufflen) {
3155 scp->SCp.Status = GDTH_MAP_SINGLE;
3156 scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
3157 page = virt_to_page(scp->request_buffer);
3158 offset = (ulong)scp->request_buffer & ~PAGE_MASK;
3159 phys_addr = pci_map_page(ha->pdev,page,offset,
3160 scp->request_bufflen,scp->SCp.Message);
3161 scp->SCp.dma_handle = phys_addr;
3164 if (ha->raw_feat & SCATTER_GATHER) {
3165 cmdp->u.raw64.sdata = (ulong64)-1;
3166 cmdp->u.raw64.sg_ranz= 1;
3167 cmdp->u.raw64.sg_lst[0].sg_ptr = phys_addr;
3168 cmdp->u.raw64.sg_lst[0].sg_len = scp->request_bufflen;
3169 cmdp->u.raw64.sg_lst[1].sg_len = 0;
3171 cmdp->u.raw64.sdata = phys_addr;
3172 cmdp->u.raw64.sg_ranz= 0;
3175 if (ha->raw_feat & SCATTER_GATHER) {
3176 cmdp->u.raw.sdata = 0xffffffff;
3177 cmdp->u.raw.sg_ranz= 1;
3178 cmdp->u.raw.sg_lst[0].sg_ptr = phys_addr;
3179 cmdp->u.raw.sg_lst[0].sg_len = scp->request_bufflen;
3180 cmdp->u.raw.sg_lst[1].sg_len = 0;
3182 cmdp->u.raw.sdata = phys_addr;
3183 cmdp->u.raw.sg_ranz= 0;
3188 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3189 cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
3190 cmdp->u.raw64.sg_lst[0].sg_ptr,
3191 cmdp->u.raw64.sg_lst[0].sg_len));
3192 /* evaluate command size */
3193 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
3194 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
3196 TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3197 cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
3198 cmdp->u.raw.sg_lst[0].sg_ptr,
3199 cmdp->u.raw.sg_lst[0].sg_len));
3200 /* evaluate command size */
3201 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
3202 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
3206 if (ha->cmd_len & 3)
3207 ha->cmd_len += (4 - (ha->cmd_len & 3));
3209 if (ha->cmd_cnt > 0) {
3210 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3212 TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
3213 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3219 gdth_copy_command(hanum);
3223 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp)
3225 register gdth_ha_str *ha;
3226 register gdth_cmd_str *cmdp;
3229 ha = HADATA(gdth_ctr_tab[hanum]);
3231 TRACE2(("gdth_special_cmd(): "));
3233 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3236 memcpy( cmdp, scp->request_buffer, sizeof(gdth_cmd_str));
3237 cmdp->RequestBuffer = scp;
3239 /* search free command index */
3240 if (!(cmd_index=gdth_get_cmd_index(hanum))) {
3241 TRACE(("GDT: No free command index found\n"));
3245 /* if it's the first command, set command semaphore */
3246 if (ha->cmd_cnt == 0)
3247 gdth_set_sema0(hanum);
3249 /* evaluate command size, check space */
3250 if (cmdp->OpCode == GDT_IOCTL) {
3251 TRACE2(("IOCTL\n"));
3253 GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
3254 } else if (cmdp->Service == CACHESERVICE) {
3255 TRACE2(("cache command %d\n",cmdp->OpCode));
3256 if (ha->cache_feat & GDT_64BIT)
3258 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
3261 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
3262 } else if (cmdp->Service == SCSIRAWSERVICE) {
3263 TRACE2(("raw command %d\n",cmdp->OpCode));
3264 if (ha->raw_feat & GDT_64BIT)
3266 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
3269 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
3272 if (ha->cmd_len & 3)
3273 ha->cmd_len += (4 - (ha->cmd_len & 3));
3275 if (ha->cmd_cnt > 0) {
3276 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3278 TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
3279 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3285 gdth_copy_command(hanum);
3290 /* Controller event handling functions */
3291 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
3292 ushort idx, gdth_evt_data *evt)
3297 /* no GDTH_LOCK_HA() ! */
3298 TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
3299 if (source == 0) /* no source -> no event */
3302 if (ebuffer[elastidx].event_source == source &&
3303 ebuffer[elastidx].event_idx == idx &&
3304 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
3305 !memcmp((char *)&ebuffer[elastidx].event_data.eu,
3306 (char *)&evt->eu, evt->size)) ||
3307 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
3308 !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
3309 (char *)&evt->event_string)))) {
3310 e = &ebuffer[elastidx];
3311 do_gettimeofday(&tv);
3312 e->last_stamp = tv.tv_sec;
3315 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */
3317 if (elastidx == MAX_EVENTS)
3319 if (elastidx == eoldidx) { /* reached mark ? */
3321 if (eoldidx == MAX_EVENTS)
3325 e = &ebuffer[elastidx];
3326 e->event_source = source;
3328 do_gettimeofday(&tv);
3329 e->first_stamp = e->last_stamp = tv.tv_sec;
3331 e->event_data = *evt;
3337 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
3343 TRACE2(("gdth_read_event() handle %d\n", handle));
3344 spin_lock_irqsave(&ha->smp_lock, flags);
3349 estr->event_source = 0;
3351 if (eindex >= MAX_EVENTS) {
3352 spin_unlock_irqrestore(&ha->smp_lock, flags);
3355 e = &ebuffer[eindex];
3356 if (e->event_source != 0) {
3357 if (eindex != elastidx) {
3358 if (++eindex == MAX_EVENTS)
3363 memcpy(estr, e, sizeof(gdth_evt_str));
3365 spin_unlock_irqrestore(&ha->smp_lock, flags);
3369 static void gdth_readapp_event(gdth_ha_str *ha,
3370 unchar application, gdth_evt_str *estr)
3375 unchar found = FALSE;
3377 TRACE2(("gdth_readapp_event() app. %d\n", application));
3378 spin_lock_irqsave(&ha->smp_lock, flags);
3381 e = &ebuffer[eindex];
3382 if (e->event_source == 0)
3384 if ((e->application & application) == 0) {
3385 e->application |= application;
3389 if (eindex == elastidx)
3391 if (++eindex == MAX_EVENTS)
3395 memcpy(estr, e, sizeof(gdth_evt_str));
3397 estr->event_source = 0;
3398 spin_unlock_irqrestore(&ha->smp_lock, flags);
3401 static void gdth_clear_events(void)
3403 TRACE(("gdth_clear_events()"));
3405 eoldidx = elastidx = 0;
3406 ebuffer[0].event_source = 0;
3410 /* SCSI interface functions */
3412 static irqreturn_t gdth_interrupt(int irq,void *dev_id)
3414 gdth_ha_str *ha2 = (gdth_ha_str *)dev_id;
3415 register gdth_ha_str *ha;
3416 gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
3417 gdt6_dpram_str __iomem *dp6_ptr;
3418 gdt2_dpram_str __iomem *dp2_ptr;
3425 int coalesced = FALSE;
3427 gdth_coal_status *pcs = NULL;
3428 int act_int_coal = 0;
3431 TRACE(("gdth_interrupt() IRQ %d\n",irq));
3433 /* if polling and not from gdth_wait() -> return */
3435 if (!gdth_from_wait) {
3441 spin_lock_irqsave(&ha2->smp_lock, flags);
3444 /* search controller */
3445 if ((hanum = gdth_get_status(&IStatus,irq)) == -1) {
3446 /* spurious interrupt */
3448 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3451 ha = HADATA(gdth_ctr_tab[hanum]);
3453 #ifdef GDTH_STATISTICS
3458 /* See if the fw is returning coalesced status */
3459 if (IStatus == COALINDEX) {
3460 /* Coalesced status. Setup the initial status
3461 buffer pointer and flags */
3462 pcs = ha->coal_stat;
3469 /* For coalesced requests all status
3470 information is found in the status buffer */
3471 IStatus = (unchar)(pcs->status & 0xff);
3475 if (ha->type == GDT_EISA) {
3476 if (IStatus & 0x80) { /* error flag */
3478 ha->status = inw(ha->bmic + MAILBOXREG+8);
3479 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3480 } else /* no error */
3482 ha->info = inl(ha->bmic + MAILBOXREG+12);
3483 ha->service = inw(ha->bmic + MAILBOXREG+10);
3484 ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3486 outb(0xff, ha->bmic + EDOORREG); /* acknowledge interrupt */
3487 outb(0x00, ha->bmic + SEMA1REG); /* reset status semaphore */
3488 } else if (ha->type == GDT_ISA) {
3490 if (IStatus & 0x80) { /* error flag */
3492 ha->status = gdth_readw(&dp2_ptr->u.ic.Status);
3493 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3494 } else /* no error */
3496 ha->info = gdth_readl(&dp2_ptr->u.ic.Info[0]);
3497 ha->service = gdth_readw(&dp2_ptr->u.ic.Service);
3498 ha->info2 = gdth_readl(&dp2_ptr->u.ic.Info[1]);
3500 gdth_writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3501 gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3502 gdth_writeb(0, &dp2_ptr->io.Sema1); /* reset status semaphore */
3503 } else if (ha->type == GDT_PCI) {
3505 if (IStatus & 0x80) { /* error flag */
3507 ha->status = gdth_readw(&dp6_ptr->u.ic.Status);
3508 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3509 } else /* no error */
3511 ha->info = gdth_readl(&dp6_ptr->u.ic.Info[0]);
3512 ha->service = gdth_readw(&dp6_ptr->u.ic.Service);
3513 ha->info2 = gdth_readl(&dp6_ptr->u.ic.Info[1]);
3515 gdth_writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3516 gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3517 gdth_writeb(0, &dp6_ptr->io.Sema1); /* reset status semaphore */
3518 } else if (ha->type == GDT_PCINEW) {
3519 if (IStatus & 0x80) { /* error flag */
3521 ha->status = inw(PTR2USHORT(&ha->plx->status));
3522 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3525 ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3526 ha->service = inw(PTR2USHORT(&ha->plx->service));
3527 ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3529 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3530 outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3531 } else if (ha->type == GDT_PCIMPR) {
3533 if (IStatus & 0x80) { /* error flag */
3537 ha->status = pcs->ext_status & 0xffff;
3540 ha->status = gdth_readw(&dp6m_ptr->i960r.status);
3541 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3542 } else /* no error */
3545 /* get information */
3547 ha->info = pcs->info0;
3548 ha->info2 = pcs->info1;
3549 ha->service = (pcs->ext_status >> 16) & 0xffff;
3553 ha->info = gdth_readl(&dp6m_ptr->i960r.info[0]);
3554 ha->service = gdth_readw(&dp6m_ptr->i960r.service);
3555 ha->info2 = gdth_readl(&dp6m_ptr->i960r.info[1]);
3558 if (IStatus == ASYNCINDEX) {
3559 if (ha->service != SCREENSERVICE &&
3560 (ha->fw_vers & 0xff) >= 0x1a) {
3561 ha->dvr.severity = gdth_readb
3562 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3563 for (i = 0; i < 256; ++i) {
3564 ha->dvr.event_string[i] = gdth_readb
3565 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3566 if (ha->dvr.event_string[i] == 0)
3572 /* Make sure that non coalesced interrupts get cleared
3573 before being handled by gdth_async_event/gdth_sync_event */
3577 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3578 gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3581 TRACE2(("gdth_interrupt() unknown controller type\n"));
3583 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3587 TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3588 IStatus,ha->status,ha->info));
3590 if (gdth_from_wait) {
3592 wait_index = (int)IStatus;
3595 if (IStatus == ASYNCINDEX) {
3596 TRACE2(("gdth_interrupt() async. event\n"));
3597 gdth_async_event(hanum);
3599 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3604 if (IStatus == SPEZINDEX) {
3605 TRACE2(("Service unknown or not initialized !\n"));
3606 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3607 ha->dvr.eu.driver.ionode = hanum;
3608 gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3610 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3613 scp = ha->cmd_tab[IStatus-2].cmnd;
3614 Service = ha->cmd_tab[IStatus-2].service;
3615 ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3616 if (scp == UNUSED_CMND) {
3617 TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3618 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3619 ha->dvr.eu.driver.ionode = hanum;
3620 ha->dvr.eu.driver.index = IStatus;
3621 gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3623 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3626 if (scp == INTERNAL_CMND) {
3627 TRACE(("gdth_interrupt() answer to internal command\n"));
3629 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3633 TRACE(("gdth_interrupt() sync. status\n"));
3634 rval = gdth_sync_event(hanum,Service,IStatus,scp);
3636 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3638 gdth_putq(hanum,scp,scp->SCp.this_residual);
3639 } else if (rval == 1) {
3640 scp->scsi_done(scp);
3645 /* go to the next status in the status buffer */
3647 #ifdef GDTH_STATISTICS
3649 if (act_int_coal > max_int_coal) {
3650 max_int_coal = act_int_coal;
3651 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3654 /* see if there is another status */
3655 if (pcs->status == 0)
3656 /* Stop the coalesce loop */
3661 /* coalescing only for new GDT_PCIMPR controllers available */
3662 if (ha->type == GDT_PCIMPR && coalesced) {
3663 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3664 gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3672 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp)
3674 register gdth_ha_str *ha;
3679 ha = HADATA(gdth_ctr_tab[hanum]);
3681 TRACE(("gdth_sync_event() serv %d status %d\n",
3682 service,ha->status));
3684 if (service == SCREENSERVICE) {
3686 TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3687 msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3688 if (msg->msg_len > MSGLEN+1)
3689 msg->msg_len = MSGLEN+1;
3691 if (!(msg->msg_answer && msg->msg_ext)) {
3692 msg->msg_text[msg->msg_len] = '\0';
3693 printk("%s",msg->msg_text);
3696 if (msg->msg_ext && !msg->msg_answer) {
3697 while (gdth_test_busy(hanum))
3699 cmdp->Service = SCREENSERVICE;
3700 cmdp->RequestBuffer = SCREEN_CMND;
3701 gdth_get_cmd_index(hanum);
3702 gdth_set_sema0(hanum);
3703 cmdp->OpCode = GDT_READ;
3704 cmdp->BoardNode = LOCALBOARD;
3705 cmdp->u.screen.reserved = 0;
3706 cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3707 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3708 ha->cmd_offs_dpmem = 0;
3709 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3712 gdth_copy_command(hanum);
3713 gdth_release_event(hanum);
3717 if (msg->msg_answer && msg->msg_alen) {
3718 /* default answers (getchar() not possible) */
3719 if (msg->msg_alen == 1) {
3722 msg->msg_text[0] = 0;
3726 msg->msg_text[0] = 1;
3727 msg->msg_text[1] = 0;
3730 msg->msg_answer = 0;
3731 while (gdth_test_busy(hanum))
3733 cmdp->Service = SCREENSERVICE;
3734 cmdp->RequestBuffer = SCREEN_CMND;
3735 gdth_get_cmd_index(hanum);
3736 gdth_set_sema0(hanum);
3737 cmdp->OpCode = GDT_WRITE;
3738 cmdp->BoardNode = LOCALBOARD;
3739 cmdp->u.screen.reserved = 0;
3740 cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3741 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3742 ha->cmd_offs_dpmem = 0;
3743 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3746 gdth_copy_command(hanum);
3747 gdth_release_event(hanum);
3753 b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
3754 t = scp->device->id;
3755 if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3756 ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3758 /* cache or raw service */
3759 if (ha->status == S_BSY) {
3760 TRACE2(("Controller busy -> retry !\n"));
3761 if (scp->SCp.sent_command == GDT_MOUNT)
3762 scp->SCp.sent_command = GDT_CLUST_INFO;
3766 if (scp->SCp.Status == GDTH_MAP_SG)
3767 pci_unmap_sg(ha->pdev,scp->request_buffer,
3768 scp->use_sg,scp->SCp.Message);
3769 else if (scp->SCp.Status == GDTH_MAP_SINGLE)
3770 pci_unmap_page(ha->pdev,scp->SCp.dma_handle,
3771 scp->request_bufflen,scp->SCp.Message);
3772 if (scp->SCp.buffer) {
3774 addr = (dma_addr_t)*(ulong32 *)&scp->SCp.buffer;
3775 if (scp->host_scribble)
3776 addr += (dma_addr_t)
3777 ((ulong64)(*(ulong32 *)&scp->host_scribble) << 32);
3778 pci_unmap_page(ha->pdev,addr,16,PCI_DMA_FROMDEVICE);
3781 if (ha->status == S_OK) {
3782 scp->SCp.Status = S_OK;
3783 scp->SCp.Message = ha->info;
3784 if (scp->SCp.sent_command != -1) {
3785 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3786 scp->SCp.sent_command));
3787 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3788 if (scp->SCp.sent_command == GDT_CLUST_INFO) {
3789 ha->hdr[t].cluster_type = (unchar)ha->info;
3790 if (!(ha->hdr[t].cluster_type &
3792 /* NOT MOUNTED -> MOUNT */
3793 scp->SCp.sent_command = GDT_MOUNT;
3794 if (ha->hdr[t].cluster_type &
3796 /* cluster drive RESERVED (on the other node) */
3797 scp->SCp.phase = -2; /* reservation conflict */
3800 scp->SCp.sent_command = -1;
3803 if (scp->SCp.sent_command == GDT_MOUNT) {
3804 ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3805 ha->hdr[t].media_changed = TRUE;
3806 } else if (scp->SCp.sent_command == GDT_UNMOUNT) {
3807 ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3808 ha->hdr[t].media_changed = TRUE;
3810 scp->SCp.sent_command = -1;
3813 scp->SCp.this_residual = HIGH_PRI;
3816 /* RESERVE/RELEASE ? */
3817 if (scp->cmnd[0] == RESERVE) {
3818 ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3819 } else if (scp->cmnd[0] == RELEASE) {
3820 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3822 scp->result = DID_OK << 16;
3823 scp->sense_buffer[0] = 0;
3826 scp->SCp.Status = ha->status;
3827 scp->SCp.Message = ha->info;
3829 if (scp->SCp.sent_command != -1) {
3830 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3831 scp->SCp.sent_command, ha->status));
3832 if (scp->SCp.sent_command == GDT_SCAN_START ||
3833 scp->SCp.sent_command == GDT_SCAN_END) {
3834 scp->SCp.sent_command = -1;
3836 scp->SCp.this_residual = HIGH_PRI;
3839 memset((char*)scp->sense_buffer,0,16);
3840 scp->sense_buffer[0] = 0x70;
3841 scp->sense_buffer[2] = NOT_READY;
3842 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3843 } else if (service == CACHESERVICE) {
3844 if (ha->status == S_CACHE_UNKNOWN &&
3845 (ha->hdr[t].cluster_type &
3846 CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3847 /* bus reset -> force GDT_CLUST_INFO */
3848 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3850 memset((char*)scp->sense_buffer,0,16);
3851 if (ha->status == (ushort)S_CACHE_RESERV) {
3852 scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3854 scp->sense_buffer[0] = 0x70;
3855 scp->sense_buffer[2] = NOT_READY;
3856 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3858 if (scp->done != gdth_scsi_done) {
3859 ha->dvr.size = sizeof(ha->dvr.eu.sync);
3860 ha->dvr.eu.sync.ionode = hanum;
3861 ha->dvr.eu.sync.service = service;
3862 ha->dvr.eu.sync.status = ha->status;
3863 ha->dvr.eu.sync.info = ha->info;
3864 ha->dvr.eu.sync.hostdrive = t;
3865 if (ha->status >= 0x8000)
3866 gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3868 gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3871 /* sense buffer filled from controller firmware (DMA) */
3872 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3873 scp->result = DID_BAD_TARGET << 16;
3875 scp->result = (DID_OK << 16) | ha->info;
3879 if (!scp->SCp.have_data_in)
3880 scp->SCp.have_data_in++;
3888 static char *async_cache_tab[] = {
3889 /* 0*/ "\011\000\002\002\002\004\002\006\004"
3890 "GDT HA %u, service %u, async. status %u/%lu unknown",
3891 /* 1*/ "\011\000\002\002\002\004\002\006\004"
3892 "GDT HA %u, service %u, async. status %u/%lu unknown",
3893 /* 2*/ "\005\000\002\006\004"
3894 "GDT HA %u, Host Drive %lu not ready",
3895 /* 3*/ "\005\000\002\006\004"
3896 "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3897 /* 4*/ "\005\000\002\006\004"
3898 "GDT HA %u, mirror update on Host Drive %lu failed",
3899 /* 5*/ "\005\000\002\006\004"
3900 "GDT HA %u, Mirror Drive %lu failed",
3901 /* 6*/ "\005\000\002\006\004"
3902 "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3903 /* 7*/ "\005\000\002\006\004"
3904 "GDT HA %u, Host Drive %lu write protected",
3905 /* 8*/ "\005\000\002\006\004"
3906 "GDT HA %u, media changed in Host Drive %lu",
3907 /* 9*/ "\005\000\002\006\004"
3908 "GDT HA %u, Host Drive %lu is offline",
3909 /*10*/ "\005\000\002\006\004"
3910 "GDT HA %u, media change of Mirror Drive %lu",
3911 /*11*/ "\005\000\002\006\004"
3912 "GDT HA %u, Mirror Drive %lu is write protected",
3913 /*12*/ "\005\000\002\006\004"
3914 "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3915 /*13*/ "\007\000\002\006\002\010\002"
3916 "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3917 /*14*/ "\005\000\002\006\002"
3918 "GDT HA %u, Array Drive %u: FAIL state entered",
3919 /*15*/ "\005\000\002\006\002"
3920 "GDT HA %u, Array Drive %u: error",
3921 /*16*/ "\007\000\002\006\002\010\002"
3922 "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3923 /*17*/ "\005\000\002\006\002"
3924 "GDT HA %u, Array Drive %u: parity build failed",
3925 /*18*/ "\005\000\002\006\002"
3926 "GDT HA %u, Array Drive %u: drive rebuild failed",
3927 /*19*/ "\005\000\002\010\002"
3928 "GDT HA %u, Test of Hot Fix %u failed",
3929 /*20*/ "\005\000\002\006\002"
3930 "GDT HA %u, Array Drive %u: drive build finished successfully",
3931 /*21*/ "\005\000\002\006\002"
3932 "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3933 /*22*/ "\007\000\002\006\002\010\002"
3934 "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3935 /*23*/ "\005\000\002\006\002"
3936 "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3937 /*24*/ "\005\000\002\010\002"
3938 "GDT HA %u, mirror update on Cache Drive %u completed",
3939 /*25*/ "\005\000\002\010\002"
3940 "GDT HA %u, mirror update on Cache Drive %lu failed",
3941 /*26*/ "\005\000\002\006\002"
3942 "GDT HA %u, Array Drive %u: drive rebuild started",
3943 /*27*/ "\005\000\002\012\001"
3944 "GDT HA %u, Fault bus %u: SHELF OK detected",
3945 /*28*/ "\005\000\002\012\001"
3946 "GDT HA %u, Fault bus %u: SHELF not OK detected",
3947 /*29*/ "\007\000\002\012\001\013\001"
3948 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3949 /*30*/ "\007\000\002\012\001\013\001"
3950 "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3951 /*31*/ "\007\000\002\012\001\013\001"
3952 "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3953 /*32*/ "\007\000\002\012\001\013\001"
3954 "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3955 /*33*/ "\007\000\002\012\001\013\001"
3956 "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3957 /*34*/ "\011\000\002\012\001\013\001\006\004"
3958 "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3959 /*35*/ "\007\000\002\012\001\013\001"
3960 "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3961 /*36*/ "\007\000\002\012\001\013\001"
3962 "GDT HA %u, Fault bus %u, ID %u: disk not available",
3963 /*37*/ "\007\000\002\012\001\006\004"
3964 "GDT HA %u, Fault bus %u: swap detected (%lu)",
3965 /*38*/ "\007\000\002\012\001\013\001"
3966 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3967 /*39*/ "\007\000\002\012\001\013\001"
3968 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3969 /*40*/ "\007\000\002\012\001\013\001"
3970 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3971 /*41*/ "\007\000\002\012\001\013\001"
3972 "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3973 /*42*/ "\005\000\002\006\002"
3974 "GDT HA %u, Array Drive %u: drive build started",
3975 /*43*/ "\003\000\002"
3976 "GDT HA %u, DRAM parity error detected",
3977 /*44*/ "\005\000\002\006\002"
3978 "GDT HA %u, Mirror Drive %u: update started",
3979 /*45*/ "\007\000\002\006\002\010\002"
3980 "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3981 /*46*/ "\005\000\002\006\002"
3982 "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3983 /*47*/ "\005\000\002\006\002"
3984 "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3985 /*48*/ "\005\000\002\006\002"
3986 "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3987 /*49*/ "\005\000\002\006\002"
3988 "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3989 /*50*/ "\007\000\002\012\001\013\001"
3990 "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3991 /*51*/ "\005\000\002\006\002"
3992 "GDT HA %u, Array Drive %u: expand started",
3993 /*52*/ "\005\000\002\006\002"
3994 "GDT HA %u, Array Drive %u: expand finished successfully",
3995 /*53*/ "\005\000\002\006\002"
3996 "GDT HA %u, Array Drive %u: expand failed",
3997 /*54*/ "\003\000\002"
3998 "GDT HA %u, CPU temperature critical",
3999 /*55*/ "\003\000\002"
4000 "GDT HA %u, CPU temperature OK",
4001 /*56*/ "\005\000\002\006\004"
4002 "GDT HA %u, Host drive %lu created",
4003 /*57*/ "\005\000\002\006\002"
4004 "GDT HA %u, Array Drive %u: expand restarted",
4005 /*58*/ "\005\000\002\006\002"
4006 "GDT HA %u, Array Drive %u: expand stopped",
4007 /*59*/ "\005\000\002\010\002"
4008 "GDT HA %u, Mirror Drive %u: drive build quited",
4009 /*60*/ "\005\000\002\006\002"
4010 "GDT HA %u, Array Drive %u: parity build quited",
4011 /*61*/ "\005\000\002\006\002"
4012 "GDT HA %u, Array Drive %u: drive rebuild quited",
4013 /*62*/ "\005\000\002\006\002"
4014 "GDT HA %u, Array Drive %u: parity verify started",
4015 /*63*/ "\005\000\002\006\002"
4016 "GDT HA %u, Array Drive %u: parity verify done",
4017 /*64*/ "\005\000\002\006\002"
4018 "GDT HA %u, Array Drive %u: parity verify failed",
4019 /*65*/ "\005\000\002\006\002"
4020 "GDT HA %u, Array Drive %u: parity error detected",
4021 /*66*/ "\005\000\002\006\002"
4022 "GDT HA %u, Array Drive %u: parity verify quited",
4023 /*67*/ "\005\000\002\006\002"
4024 "GDT HA %u, Host Drive %u reserved",
4025 /*68*/ "\005\000\002\006\002"
4026 "GDT HA %u, Host Drive %u mounted and released",
4027 /*69*/ "\005\000\002\006\002"
4028 "GDT HA %u, Host Drive %u released",
4029 /*70*/ "\003\000\002"
4030 "GDT HA %u, DRAM error detected and corrected with ECC",
4031 /*71*/ "\003\000\002"
4032 "GDT HA %u, Uncorrectable DRAM error detected with ECC",
4033 /*72*/ "\011\000\002\012\001\013\001\014\001"
4034 "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
4035 /*73*/ "\005\000\002\006\002"
4036 "GDT HA %u, Host drive %u resetted locally",
4037 /*74*/ "\005\000\002\006\002"
4038 "GDT HA %u, Host drive %u resetted remotely",
4039 /*75*/ "\003\000\002"
4040 "GDT HA %u, async. status 75 unknown",
4044 static int gdth_async_event(int hanum)
4050 ha = HADATA(gdth_ctr_tab[hanum]);
4052 TRACE2(("gdth_async_event() ha %d serv %d\n",
4053 hanum,ha->service));
4055 if (ha->service == SCREENSERVICE) {
4056 if (ha->status == MSG_REQUEST) {
4057 while (gdth_test_busy(hanum))
4059 cmdp->Service = SCREENSERVICE;
4060 cmdp->RequestBuffer = SCREEN_CMND;
4061 cmd_index = gdth_get_cmd_index(hanum);
4062 gdth_set_sema0(hanum);
4063 cmdp->OpCode = GDT_READ;
4064 cmdp->BoardNode = LOCALBOARD;
4065 cmdp->u.screen.reserved = 0;
4066 cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
4067 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
4068 ha->cmd_offs_dpmem = 0;
4069 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
4072 gdth_copy_command(hanum);
4073 if (ha->type == GDT_EISA)
4074 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
4075 else if (ha->type == GDT_ISA)
4076 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
4078 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
4079 (ushort)((ha->brd_phys>>3)&0x1f));
4080 gdth_release_event(hanum);
4084 if (ha->type == GDT_PCIMPR &&
4085 (ha->fw_vers & 0xff) >= 0x1a) {
4087 ha->dvr.eu.async.ionode = hanum;
4088 ha->dvr.eu.async.status = ha->status;
4089 /* severity and event_string already set! */
4091 ha->dvr.size = sizeof(ha->dvr.eu.async);
4092 ha->dvr.eu.async.ionode = hanum;
4093 ha->dvr.eu.async.service = ha->service;
4094 ha->dvr.eu.async.status = ha->status;
4095 ha->dvr.eu.async.info = ha->info;
4096 *(ulong32 *)ha->dvr.eu.async.scsi_coord = ha->info2;
4098 gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
4099 gdth_log_event( &ha->dvr, NULL );
4101 /* new host drive from expand? */
4102 if (ha->service == CACHESERVICE && ha->status == 56) {
4103 TRACE2(("gdth_async_event(): new host drive %d created\n",
4105 /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
4111 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
4113 gdth_stackframe stack;
4117 TRACE2(("gdth_log_event()\n"));
4118 if (dvr->size == 0) {
4119 if (buffer == NULL) {
4120 printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
4122 sprintf(buffer,"Adapter %d: %s\n",
4123 dvr->eu.async.ionode,dvr->event_string);
4125 } else if (dvr->eu.async.service == CACHESERVICE &&
4126 INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
4127 TRACE2(("GDT: Async. event cache service, event no.: %d\n",
4128 dvr->eu.async.status));
4130 f = async_cache_tab[dvr->eu.async.status];
4132 /* i: parameter to push, j: stack element to fill */
4133 for (j=0,i=1; i < f[0]; i+=2) {
4136 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
4139 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
4142 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
4149 if (buffer == NULL) {
4150 printk(&f[(int)f[0]],stack);
4153 sprintf(buffer,&f[(int)f[0]],stack);
4157 if (buffer == NULL) {
4158 printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
4159 dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4161 sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
4162 dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4167 #ifdef GDTH_STATISTICS
4168 static void gdth_timeout(ulong data)
4176 ha = HADATA(gdth_ctr_tab[hanum]);
4177 spin_lock_irqsave(&ha->smp_lock, flags);
4179 for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
4180 if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
4183 for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
4186 TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
4187 act_ints, act_ios, act_stats, act_rq));
4188 act_ints = act_ios = 0;
4190 gdth_timer.expires = jiffies + 30 * HZ;
4191 add_timer(&gdth_timer);
4192 spin_unlock_irqrestore(&ha->smp_lock, flags);
4196 static void __init internal_setup(char *str,int *ints)
4199 char *cur_str, *argv;
4201 TRACE2(("internal_setup() str %s ints[0] %d\n",
4202 str ? str:"NULL", ints ? ints[0]:0));
4204 /* read irq[] from ints[] */
4210 for (i = 0; i < argc; ++i)
4215 /* analyse string */
4217 while (argv && (cur_str = strchr(argv, ':'))) {
4218 int val = 0, c = *++cur_str;
4220 if (c == 'n' || c == 'N')
4222 else if (c == 'y' || c == 'Y')
4225 val = (int)simple_strtoul(cur_str, NULL, 0);
4227 if (!strncmp(argv, "disable:", 8))
4229 else if (!strncmp(argv, "reserve_mode:", 13))
4231 else if (!strncmp(argv, "reverse_scan:", 13))
4233 else if (!strncmp(argv, "hdr_channel:", 12))
4235 else if (!strncmp(argv, "max_ids:", 8))
4237 else if (!strncmp(argv, "rescan:", 7))
4239 else if (!strncmp(argv, "virt_ctr:", 9))
4241 else if (!strncmp(argv, "shared_access:", 14))
4242 shared_access = val;
4243 else if (!strncmp(argv, "probe_eisa_isa:", 15))
4244 probe_eisa_isa = val;
4245 else if (!strncmp(argv, "reserve_list:", 13)) {
4246 reserve_list[0] = val;
4247 for (i = 1; i < MAX_RES_ARGS; i++) {
4248 cur_str = strchr(cur_str, ',');
4251 if (!isdigit((int)*++cur_str)) {
4256 (int)simple_strtoul(cur_str, NULL, 0);
4264 if ((argv = strchr(argv, ',')))
4269 int __init option_setup(char *str)
4275 TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
4277 while (cur && isdigit(*cur) && i <= MAXHA) {
4278 ints[i++] = simple_strtoul(cur, NULL, 0);
4279 if ((cur = strchr(cur, ',')) != NULL) cur++;
4283 internal_setup(cur, ints);
4287 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4288 static int __init gdth_detect(struct scsi_host_template *shtp)
4290 static int __init gdth_detect(Scsi_Host_Template *shtp)
4293 struct Scsi_Host *shp;
4294 gdth_pci_str pcistr[MAXHA];
4298 int i,hanum,cnt,ctr,err;
4303 printk("GDT: This driver contains debugging information !! Trace level = %d\n",
4305 printk(" Destination of debugging information: ");
4308 printk("Serial port COM2\n");
4310 printk("Serial port COM1\n");
4313 printk("Console\n");
4318 TRACE(("gdth_detect()\n"));
4321 printk("GDT-HA: Controller driver disabled from command line !\n");
4325 printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",GDTH_VERSION_STR);
4326 /* initializations */
4327 gdth_polling = TRUE; b = 0;
4328 gdth_clear_events();
4330 /* As default we do not probe for EISA or ISA controllers */
4331 if (probe_eisa_isa) {
4332 /* scanning for controllers, at first: ISA controller */
4333 for (isa_bios=0xc8000UL; isa_bios<=0xd8000UL; isa_bios+=0x8000UL) {
4334 dma_addr_t scratch_dma_handle;
4335 scratch_dma_handle = 0;
4337 if (gdth_ctr_count >= MAXHA)
4339 if (gdth_search_isa(isa_bios)) { /* controller found */
4340 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4345 if (!gdth_init_isa(isa_bios,ha)) {
4346 scsi_unregister(shp);
4352 /* controller found and initialized */
4353 printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4354 isa_bios,ha->irq,ha->drq);
4356 if (request_irq(ha->irq,gdth_interrupt,IRQF_DISABLED,"gdth",ha)) {
4357 printk("GDT-ISA: Unable to allocate IRQ\n");
4358 scsi_unregister(shp);
4361 if (request_dma(ha->drq,"gdth")) {
4362 printk("GDT-ISA: Unable to allocate DMA channel\n");
4363 free_irq(ha->irq,ha);
4364 scsi_unregister(shp);
4367 set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4368 enable_dma(ha->drq);
4369 shp->unchecked_isa_dma = 1;
4371 shp->dma_channel = ha->drq;
4372 hanum = gdth_ctr_count;
4373 gdth_ctr_tab[gdth_ctr_count++] = shp;
4374 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4376 NUMDATA(shp)->hanum = (ushort)hanum;
4377 NUMDATA(shp)->busnum= 0;
4379 ha->pccb = CMDDATA(shp);
4382 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4383 &scratch_dma_handle);
4384 ha->scratch_phys = scratch_dma_handle;
4385 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4386 &scratch_dma_handle);
4387 ha->msg_phys = scratch_dma_handle;
4389 ha->coal_stat = (gdth_coal_status *)
4390 pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4391 MAXOFFSETS, &scratch_dma_handle);
4392 ha->coal_stat_phys = scratch_dma_handle;
4395 ha->scratch_busy = FALSE;
4396 ha->req_first = NULL;
4397 ha->tid_cnt = MAX_HDRIVES;
4398 if (max_ids > 0 && max_ids < ha->tid_cnt)
4399 ha->tid_cnt = max_ids;
4400 for (i=0; i<GDTH_MAXCMDS; ++i)
4401 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4402 ha->scan_mode = rescan ? 0x10 : 0;
4404 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4405 !gdth_search_drives(hanum)) {
4406 printk("GDT-ISA: Error during device scan\n");
4412 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4413 MAXOFFSETS, ha->coal_stat,
4414 ha->coal_stat_phys);
4417 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4418 ha->pscratch, ha->scratch_phys);
4420 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4421 ha->pmsg, ha->msg_phys);
4423 free_irq(ha->irq,ha);
4424 scsi_unregister(shp);
4427 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4428 hdr_channel = ha->bus_cnt;
4429 ha->virt_bus = hdr_channel;
4431 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) && \
4432 LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4433 shp->highmem_io = 0;
4435 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4436 shp->max_cmd_len = 16;
4438 shp->max_id = ha->tid_cnt;
4439 shp->max_lun = MAXLUN;
4440 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4443 /* register addit. SCSI channels as virtual controllers */
4444 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4445 shp = scsi_register(shtp,sizeof(gdth_num_str));
4446 shp->unchecked_isa_dma = 1;
4448 shp->dma_channel = ha->drq;
4449 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4450 NUMDATA(shp)->hanum = (ushort)hanum;
4451 NUMDATA(shp)->busnum = b;
4455 spin_lock_init(&ha->smp_lock);
4456 gdth_enable_int(hanum);
4457 #endif /* !__ia64__ */
4461 /* scanning for EISA controllers */
4462 for (eisa_slot=0x1000; eisa_slot<=0x8000; eisa_slot+=0x1000) {
4463 dma_addr_t scratch_dma_handle;
4464 scratch_dma_handle = 0;
4466 if (gdth_ctr_count >= MAXHA)
4468 if (gdth_search_eisa(eisa_slot)) { /* controller found */
4469 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4474 if (!gdth_init_eisa(eisa_slot,ha)) {
4475 scsi_unregister(shp);
4478 /* controller found and initialized */
4479 printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4480 eisa_slot>>12,ha->irq);
4482 if (request_irq(ha->irq,gdth_interrupt,IRQF_DISABLED,"gdth",ha)) {
4483 printk("GDT-EISA: Unable to allocate IRQ\n");
4484 scsi_unregister(shp);
4487 shp->unchecked_isa_dma = 0;
4489 shp->dma_channel = 0xff;
4490 hanum = gdth_ctr_count;
4491 gdth_ctr_tab[gdth_ctr_count++] = shp;
4492 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4494 NUMDATA(shp)->hanum = (ushort)hanum;
4495 NUMDATA(shp)->busnum= 0;
4496 TRACE2(("EISA detect Bus 0: hanum %d\n",
4497 NUMDATA(shp)->hanum));
4499 ha->pccb = CMDDATA(shp);
4503 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4504 &scratch_dma_handle);
4505 ha->scratch_phys = scratch_dma_handle;
4506 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4507 &scratch_dma_handle);
4508 ha->msg_phys = scratch_dma_handle;
4510 ha->coal_stat = (gdth_coal_status *)
4511 pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4512 MAXOFFSETS, &scratch_dma_handle);
4513 ha->coal_stat_phys = scratch_dma_handle;
4516 pci_map_single(ha->pdev,ha->pccb,
4517 sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4518 ha->scratch_busy = FALSE;
4519 ha->req_first = NULL;
4520 ha->tid_cnt = MAX_HDRIVES;
4521 if (max_ids > 0 && max_ids < ha->tid_cnt)
4522 ha->tid_cnt = max_ids;
4523 for (i=0; i<GDTH_MAXCMDS; ++i)
4524 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4525 ha->scan_mode = rescan ? 0x10 : 0;
4527 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4528 !gdth_search_drives(hanum)) {
4529 printk("GDT-EISA: Error during device scan\n");
4534 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4535 MAXOFFSETS, ha->coal_stat,
4536 ha->coal_stat_phys);
4539 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4540 ha->pscratch, ha->scratch_phys);
4542 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4543 ha->pmsg, ha->msg_phys);
4545 pci_unmap_single(ha->pdev,ha->ccb_phys,
4546 sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4547 free_irq(ha->irq,ha);
4548 scsi_unregister(shp);
4551 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4552 hdr_channel = ha->bus_cnt;
4553 ha->virt_bus = hdr_channel;
4555 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) && \
4556 LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4557 shp->highmem_io = 0;
4559 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4560 shp->max_cmd_len = 16;
4562 shp->max_id = ha->tid_cnt;
4563 shp->max_lun = MAXLUN;
4564 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4567 /* register addit. SCSI channels as virtual controllers */
4568 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4569 shp = scsi_register(shtp,sizeof(gdth_num_str));
4570 shp->unchecked_isa_dma = 0;
4572 shp->dma_channel = 0xff;
4573 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4574 NUMDATA(shp)->hanum = (ushort)hanum;
4575 NUMDATA(shp)->busnum = b;
4579 spin_lock_init(&ha->smp_lock);
4580 gdth_enable_int(hanum);
4585 /* scanning for PCI controllers */
4586 cnt = gdth_search_pci(pcistr);
4587 printk("GDT-HA: Found %d PCI Storage RAID Controllers\n",cnt);
4588 gdth_sort_pci(pcistr,cnt);
4589 for (ctr = 0; ctr < cnt; ++ctr) {
4590 dma_addr_t scratch_dma_handle;
4591 scratch_dma_handle = 0;
4593 if (gdth_ctr_count >= MAXHA)
4595 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4600 if (!gdth_init_pci(&pcistr[ctr],ha)) {
4601 scsi_unregister(shp);
4604 /* controller found and initialized */
4605 printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4606 pcistr[ctr].bus,PCI_SLOT(pcistr[ctr].device_fn),ha->irq);
4608 if (request_irq(ha->irq, gdth_interrupt,
4609 IRQF_DISABLED|IRQF_SHARED, "gdth", ha))
4611 printk("GDT-PCI: Unable to allocate IRQ\n");
4612 scsi_unregister(shp);
4615 shp->unchecked_isa_dma = 0;
4617 shp->dma_channel = 0xff;
4618 hanum = gdth_ctr_count;
4619 gdth_ctr_tab[gdth_ctr_count++] = shp;
4620 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4622 NUMDATA(shp)->hanum = (ushort)hanum;
4623 NUMDATA(shp)->busnum= 0;
4625 ha->pccb = CMDDATA(shp);
4628 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4629 &scratch_dma_handle);
4630 ha->scratch_phys = scratch_dma_handle;
4631 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4632 &scratch_dma_handle);
4633 ha->msg_phys = scratch_dma_handle;
4635 ha->coal_stat = (gdth_coal_status *)
4636 pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4637 MAXOFFSETS, &scratch_dma_handle);
4638 ha->coal_stat_phys = scratch_dma_handle;
4640 ha->scratch_busy = FALSE;
4641 ha->req_first = NULL;
4642 ha->tid_cnt = pcistr[ctr].device_id >= 0x200 ? MAXID : MAX_HDRIVES;
4643 if (max_ids > 0 && max_ids < ha->tid_cnt)
4644 ha->tid_cnt = max_ids;
4645 for (i=0; i<GDTH_MAXCMDS; ++i)
4646 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4647 ha->scan_mode = rescan ? 0x10 : 0;
4650 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4651 !gdth_search_drives(hanum)) {
4654 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4655 hdr_channel = ha->bus_cnt;
4656 ha->virt_bus = hdr_channel;
4659 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4660 scsi_set_pci_device(shp, pcistr[ctr].pdev);
4662 if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat &GDT_64BIT)||
4663 /* 64-bit DMA only supported from FW >= x.43 */
4664 (!ha->dma64_support)) {
4665 if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
4666 printk(KERN_WARNING "GDT-PCI %d: Unable to set 32-bit DMA\n", hanum);
4670 shp->max_cmd_len = 16;
4671 if (!pci_set_dma_mask(pcistr[ctr].pdev, DMA_64BIT_MASK)) {
4672 printk("GDT-PCI %d: 64-bit DMA enabled\n", hanum);
4673 } else if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
4674 printk(KERN_WARNING "GDT-PCI %d: Unable to set 64/32-bit DMA\n", hanum);
4681 printk("GDT-PCI %d: Error during device scan\n", hanum);
4686 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4687 MAXOFFSETS, ha->coal_stat,
4688 ha->coal_stat_phys);
4691 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4692 ha->pscratch, ha->scratch_phys);
4694 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4695 ha->pmsg, ha->msg_phys);
4696 free_irq(ha->irq,ha);
4697 scsi_unregister(shp);
4701 shp->max_id = ha->tid_cnt;
4702 shp->max_lun = MAXLUN;
4703 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4706 /* register addit. SCSI channels as virtual controllers */
4707 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4708 shp = scsi_register(shtp,sizeof(gdth_num_str));
4709 shp->unchecked_isa_dma = 0;
4711 shp->dma_channel = 0xff;
4712 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4713 NUMDATA(shp)->hanum = (ushort)hanum;
4714 NUMDATA(shp)->busnum = b;
4718 spin_lock_init(&ha->smp_lock);
4719 gdth_enable_int(hanum);
4722 TRACE2(("gdth_detect() %d controller detected\n",gdth_ctr_count));
4723 if (gdth_ctr_count > 0) {
4724 #ifdef GDTH_STATISTICS
4725 TRACE2(("gdth_detect(): Initializing timer !\n"));
4726 init_timer(&gdth_timer);
4727 gdth_timer.expires = jiffies + HZ;
4728 gdth_timer.data = 0L;
4729 gdth_timer.function = gdth_timeout;
4730 add_timer(&gdth_timer);
4732 major = register_chrdev(0,"gdth",&gdth_fops);
4733 notifier_disabled = 0;
4734 register_reboot_notifier(&gdth_notifier);
4736 gdth_polling = FALSE;
4737 return gdth_ctr_vcount;
4740 static int gdth_release(struct Scsi_Host *shp)
4745 TRACE2(("gdth_release()\n"));
4746 if (NUMDATA(shp)->busnum == 0) {
4747 hanum = NUMDATA(shp)->hanum;
4748 ha = HADATA(gdth_ctr_tab[hanum]);
4750 scsi_free_host_dev(ha->sdev);
4756 free_irq(shp->irq,ha);
4759 if (shp->dma_channel != 0xff) {
4760 free_dma(shp->dma_channel);
4765 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4766 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
4769 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4770 ha->pscratch, ha->scratch_phys);
4772 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4773 ha->pmsg, ha->msg_phys);
4775 pci_unmap_single(ha->pdev,ha->ccb_phys,
4776 sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4777 gdth_ctr_released++;
4778 TRACE2(("gdth_release(): HA %d of %d\n",
4779 gdth_ctr_released, gdth_ctr_count));
4781 if (gdth_ctr_released == gdth_ctr_count) {
4782 #ifdef GDTH_STATISTICS
4783 del_timer(&gdth_timer);
4785 unregister_chrdev(major,"gdth");
4786 unregister_reboot_notifier(&gdth_notifier);
4790 scsi_unregister(shp);
4795 static const char *gdth_ctr_name(int hanum)
4799 TRACE2(("gdth_ctr_name()\n"));
4801 ha = HADATA(gdth_ctr_tab[hanum]);
4803 if (ha->type == GDT_EISA) {
4804 switch (ha->stype) {
4806 return("GDT3000/3020");
4808 return("GDT3000A/3020A/3050A");
4810 return("GDT3000B/3010A");
4812 } else if (ha->type == GDT_ISA) {
4813 return("GDT2000/2020");
4814 } else if (ha->type == GDT_PCI) {
4815 switch (ha->stype) {
4816 case PCI_DEVICE_ID_VORTEX_GDT60x0:
4817 return("GDT6000/6020/6050");
4818 case PCI_DEVICE_ID_VORTEX_GDT6000B:
4819 return("GDT6000B/6010");
4822 /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
4827 static const char *gdth_info(struct Scsi_Host *shp)
4832 TRACE2(("gdth_info()\n"));
4833 hanum = NUMDATA(shp)->hanum;
4834 ha = HADATA(gdth_ctr_tab[hanum]);
4836 return ((const char *)ha->binfo.type_string);
4839 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
4847 TRACE2(("gdth_eh_bus_reset()\n"));
4849 hanum = NUMDATA(scp->device->host)->hanum;
4850 b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
4851 ha = HADATA(gdth_ctr_tab[hanum]);
4853 /* clear command tab */
4854 spin_lock_irqsave(&ha->smp_lock, flags);
4855 for (i = 0; i < GDTH_MAXCMDS; ++i) {
4856 cmnd = ha->cmd_tab[i].cmnd;
4857 if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
4858 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4860 spin_unlock_irqrestore(&ha->smp_lock, flags);
4862 if (b == ha->virt_bus) {
4864 for (i = 0; i < MAX_HDRIVES; ++i) {
4865 if (ha->hdr[i].present) {
4866 spin_lock_irqsave(&ha->smp_lock, flags);
4867 gdth_polling = TRUE;
4868 while (gdth_test_busy(hanum))
4870 if (gdth_internal_cmd(hanum, CACHESERVICE,
4871 GDT_CLUST_RESET, i, 0, 0))
4872 ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4873 gdth_polling = FALSE;
4874 spin_unlock_irqrestore(&ha->smp_lock, flags);
4879 spin_lock_irqsave(&ha->smp_lock, flags);
4880 for (i = 0; i < MAXID; ++i)
4881 ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4882 gdth_polling = TRUE;
4883 while (gdth_test_busy(hanum))
4885 gdth_internal_cmd(hanum, SCSIRAWSERVICE, GDT_RESET_BUS,
4886 BUS_L2P(ha,b), 0, 0);
4887 gdth_polling = FALSE;
4888 spin_unlock_irqrestore(&ha->smp_lock, flags);
4893 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4894 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
4896 static int gdth_bios_param(Disk *disk,kdev_t dev,int *ip)
4902 struct scsi_device *sd;
4905 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4910 capacity = disk->capacity;
4912 hanum = NUMDATA(sd->host)->hanum;
4913 b = virt_ctr ? NUMDATA(sd->host)->busnum : sd->channel;
4915 TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4916 ha = HADATA(gdth_ctr_tab[hanum]);
4918 if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4919 /* raw device or host drive without mapping information */
4920 TRACE2(("Evaluate mapping\n"));
4921 gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
4923 ip[0] = ha->hdr[t].heads;
4924 ip[1] = ha->hdr[t].secs;
4925 ip[2] = capacity / ip[0] / ip[1];
4928 TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4929 ip[0],ip[1],ip[2]));
4934 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *))
4939 TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4941 scp->scsi_done = (void *)done;
4942 scp->SCp.have_data_in = 1;
4943 scp->SCp.phase = -1;
4944 scp->SCp.sent_command = -1;
4945 scp->SCp.Status = GDTH_MAP_NONE;
4946 scp->SCp.buffer = (struct scatterlist *)NULL;
4948 hanum = NUMDATA(scp->device->host)->hanum;
4949 #ifdef GDTH_STATISTICS
4953 priority = DEFAULT_PRI;
4954 if (scp->done == gdth_scsi_done)
4955 priority = scp->SCp.this_residual;
4957 gdth_update_timeout(hanum, scp, scp->timeout_per_command * 6);
4959 gdth_putq( hanum, scp, priority );
4965 static int gdth_open(struct inode *inode, struct file *filep)
4970 for (i = 0; i < gdth_ctr_count; i++) {
4971 ha = HADATA(gdth_ctr_tab[i]);
4973 ha->sdev = scsi_get_host_dev(gdth_ctr_tab[i]);
4976 TRACE(("gdth_open()\n"));
4980 static int gdth_close(struct inode *inode, struct file *filep)
4982 TRACE(("gdth_close()\n"));
4986 static int ioc_event(void __user *arg)
4988 gdth_ioctl_event evt;
4992 if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)) ||
4993 evt.ionode >= gdth_ctr_count)
4995 ha = HADATA(gdth_ctr_tab[evt.ionode]);
4997 if (evt.erase == 0xff) {
4998 if (evt.event.event_source == ES_TEST)
4999 evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
5000 else if (evt.event.event_source == ES_DRIVER)
5001 evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
5002 else if (evt.event.event_source == ES_SYNC)
5003 evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
5005 evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
5006 spin_lock_irqsave(&ha->smp_lock, flags);
5007 gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
5008 &evt.event.event_data);
5009 spin_unlock_irqrestore(&ha->smp_lock, flags);
5010 } else if (evt.erase == 0xfe) {
5011 gdth_clear_events();
5012 } else if (evt.erase == 0) {
5013 evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
5015 gdth_readapp_event(ha, evt.erase, &evt.event);
5017 if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
5022 static int ioc_lockdrv(void __user *arg)
5024 gdth_ioctl_lockdrv ldrv;
5029 if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)) ||
5030 ldrv.ionode >= gdth_ctr_count)
5032 ha = HADATA(gdth_ctr_tab[ldrv.ionode]);
5034 for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
5036 if (j >= MAX_HDRIVES || !ha->hdr[j].present)
5039 spin_lock_irqsave(&ha->smp_lock, flags);
5040 ha->hdr[j].lock = 1;
5041 spin_unlock_irqrestore(&ha->smp_lock, flags);
5042 gdth_wait_completion(ldrv.ionode, ha->bus_cnt, j);
5043 gdth_stop_timeout(ldrv.ionode, ha->bus_cnt, j);
5045 spin_lock_irqsave(&ha->smp_lock, flags);
5046 ha->hdr[j].lock = 0;
5047 spin_unlock_irqrestore(&ha->smp_lock, flags);
5048 gdth_start_timeout(ldrv.ionode, ha->bus_cnt, j);
5049 gdth_next(ldrv.ionode);
5055 static int ioc_resetdrv(void __user *arg, char *cmnd)
5057 gdth_ioctl_reset res;
5063 if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
5064 res.ionode >= gdth_ctr_count || res.number >= MAX_HDRIVES)
5067 ha = HADATA(gdth_ctr_tab[hanum]);
5069 if (!ha->hdr[res.number].present)
5071 memset(&cmd, 0, sizeof(gdth_cmd_str));
5072 cmd.Service = CACHESERVICE;
5073 cmd.OpCode = GDT_CLUST_RESET;
5074 if (ha->cache_feat & GDT_64BIT)
5075 cmd.u.cache64.DeviceNo = res.number;
5077 cmd.u.cache.DeviceNo = res.number;
5079 rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
5084 if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
5089 static int ioc_general(void __user *arg, char *cmnd)
5091 gdth_ioctl_general gen;
5098 if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)) ||
5099 gen.ionode >= gdth_ctr_count)
5102 ha = HADATA(gdth_ctr_tab[hanum]);
5103 if (gen.data_len + gen.sense_len != 0) {
5104 if (!(buf = gdth_ioctl_alloc(hanum, gen.data_len + gen.sense_len,
5107 if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
5108 gen.data_len + gen.sense_len)) {
5109 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5113 if (gen.command.OpCode == GDT_IOCTL) {
5114 gen.command.u.ioctl.p_param = paddr;
5115 } else if (gen.command.Service == CACHESERVICE) {
5116 if (ha->cache_feat & GDT_64BIT) {
5117 /* copy elements from 32-bit IOCTL structure */
5118 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
5119 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
5120 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
5122 if (ha->cache_feat & SCATTER_GATHER) {
5123 gen.command.u.cache64.DestAddr = (ulong64)-1;
5124 gen.command.u.cache64.sg_canz = 1;
5125 gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
5126 gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
5127 gen.command.u.cache64.sg_lst[1].sg_len = 0;
5129 gen.command.u.cache64.DestAddr = paddr;
5130 gen.command.u.cache64.sg_canz = 0;
5133 if (ha->cache_feat & SCATTER_GATHER) {
5134 gen.command.u.cache.DestAddr = 0xffffffff;
5135 gen.command.u.cache.sg_canz = 1;
5136 gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
5137 gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
5138 gen.command.u.cache.sg_lst[1].sg_len = 0;
5140 gen.command.u.cache.DestAddr = paddr;
5141 gen.command.u.cache.sg_canz = 0;
5144 } else if (gen.command.Service == SCSIRAWSERVICE) {
5145 if (ha->raw_feat & GDT_64BIT) {
5146 /* copy elements from 32-bit IOCTL structure */
5148 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
5149 gen.command.u.raw64.bus = gen.command.u.raw.bus;
5150 gen.command.u.raw64.lun = gen.command.u.raw.lun;
5151 gen.command.u.raw64.target = gen.command.u.raw.target;
5152 memcpy(cmd, gen.command.u.raw.cmd, 16);
5153 memcpy(gen.command.u.raw64.cmd, cmd, 16);
5154 gen.command.u.raw64.clen = gen.command.u.raw.clen;
5155 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
5156 gen.command.u.raw64.direction = gen.command.u.raw.direction;
5158 if (ha->raw_feat & SCATTER_GATHER) {
5159 gen.command.u.raw64.sdata = (ulong64)-1;
5160 gen.command.u.raw64.sg_ranz = 1;
5161 gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
5162 gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
5163 gen.command.u.raw64.sg_lst[1].sg_len = 0;
5165 gen.command.u.raw64.sdata = paddr;
5166 gen.command.u.raw64.sg_ranz = 0;
5168 gen.command.u.raw64.sense_data = paddr + gen.data_len;
5170 if (ha->raw_feat & SCATTER_GATHER) {
5171 gen.command.u.raw.sdata = 0xffffffff;
5172 gen.command.u.raw.sg_ranz = 1;
5173 gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
5174 gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
5175 gen.command.u.raw.sg_lst[1].sg_len = 0;
5177 gen.command.u.raw.sdata = paddr;
5178 gen.command.u.raw.sg_ranz = 0;
5180 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
5183 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5188 rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
5193 if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
5194 gen.data_len + gen.sense_len)) {
5195 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5198 if (copy_to_user(arg, &gen,
5199 sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
5200 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5203 gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5207 static int ioc_hdrlist(void __user *arg, char *cmnd)
5209 gdth_ioctl_rescan *rsc;
5213 int hanum, rc = -ENOMEM;
5214 u32 cluster_type = 0;
5216 rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
5217 cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
5221 if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
5222 rsc->ionode >= gdth_ctr_count) {
5226 hanum = rsc->ionode;
5227 ha = HADATA(gdth_ctr_tab[hanum]);
5228 memset(cmd, 0, sizeof(gdth_cmd_str));
5230 for (i = 0; i < MAX_HDRIVES; ++i) {
5231 if (!ha->hdr[i].present) {
5232 rsc->hdr_list[i].bus = 0xff;
5235 rsc->hdr_list[i].bus = ha->virt_bus;
5236 rsc->hdr_list[i].target = i;
5237 rsc->hdr_list[i].lun = 0;
5238 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5239 if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
5240 cmd->Service = CACHESERVICE;
5241 cmd->OpCode = GDT_CLUST_INFO;
5242 if (ha->cache_feat & GDT_64BIT)
5243 cmd->u.cache64.DeviceNo = i;
5245 cmd->u.cache.DeviceNo = i;
5246 if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
5247 rsc->hdr_list[i].cluster_type = cluster_type;
5251 if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
5262 static int ioc_rescan(void __user *arg, char *cmnd)
5264 gdth_ioctl_rescan *rsc;
5266 ushort i, status, hdr_cnt;
5268 int hanum, cyls, hds, secs;
5273 rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
5274 cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
5278 if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
5279 rsc->ionode >= gdth_ctr_count) {
5283 hanum = rsc->ionode;
5284 ha = HADATA(gdth_ctr_tab[hanum]);
5285 memset(cmd, 0, sizeof(gdth_cmd_str));
5287 if (rsc->flag == 0) {
5288 /* old method: re-init. cache service */
5289 cmd->Service = CACHESERVICE;
5290 if (ha->cache_feat & GDT_64BIT) {
5291 cmd->OpCode = GDT_X_INIT_HOST;
5292 cmd->u.cache64.DeviceNo = LINUX_OS;
5294 cmd->OpCode = GDT_INIT;
5295 cmd->u.cache.DeviceNo = LINUX_OS;
5298 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5300 hdr_cnt = (status == S_OK ? (ushort)info : 0);
5306 for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
5307 cmd->Service = CACHESERVICE;
5308 cmd->OpCode = GDT_INFO;
5309 if (ha->cache_feat & GDT_64BIT)
5310 cmd->u.cache64.DeviceNo = i;
5312 cmd->u.cache.DeviceNo = i;
5314 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5316 spin_lock_irqsave(&ha->smp_lock, flags);
5317 rsc->hdr_list[i].bus = ha->virt_bus;
5318 rsc->hdr_list[i].target = i;
5319 rsc->hdr_list[i].lun = 0;
5320 if (status != S_OK) {
5321 ha->hdr[i].present = FALSE;
5323 ha->hdr[i].present = TRUE;
5324 ha->hdr[i].size = info;
5325 /* evaluate mapping */
5326 ha->hdr[i].size &= ~SECS32;
5327 gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
5328 ha->hdr[i].heads = hds;
5329 ha->hdr[i].secs = secs;
5331 ha->hdr[i].size = cyls * hds * secs;
5333 spin_unlock_irqrestore(&ha->smp_lock, flags);
5337 /* extended info, if GDT_64BIT, for drives > 2 TB */
5338 /* but we need ha->info2, not yet stored in scp->SCp */
5340 /* devtype, cluster info, R/W attribs */
5341 cmd->Service = CACHESERVICE;
5342 cmd->OpCode = GDT_DEVTYPE;
5343 if (ha->cache_feat & GDT_64BIT)
5344 cmd->u.cache64.DeviceNo = i;
5346 cmd->u.cache.DeviceNo = i;
5348 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5350 spin_lock_irqsave(&ha->smp_lock, flags);
5351 ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
5352 spin_unlock_irqrestore(&ha->smp_lock, flags);
5354 cmd->Service = CACHESERVICE;
5355 cmd->OpCode = GDT_CLUST_INFO;
5356 if (ha->cache_feat & GDT_64BIT)
5357 cmd->u.cache64.DeviceNo = i;
5359 cmd->u.cache.DeviceNo = i;
5361 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5363 spin_lock_irqsave(&ha->smp_lock, flags);
5364 ha->hdr[i].cluster_type =
5365 ((status == S_OK && !shared_access) ? (ushort)info : 0);
5366 spin_unlock_irqrestore(&ha->smp_lock, flags);
5367 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5369 cmd->Service = CACHESERVICE;
5370 cmd->OpCode = GDT_RW_ATTRIBS;
5371 if (ha->cache_feat & GDT_64BIT)
5372 cmd->u.cache64.DeviceNo = i;
5374 cmd->u.cache.DeviceNo = i;
5376 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5378 spin_lock_irqsave(&ha->smp_lock, flags);
5379 ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
5380 spin_unlock_irqrestore(&ha->smp_lock, flags);
5383 if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
5394 static int gdth_ioctl(struct inode *inode, struct file *filep,
5395 unsigned int cmd, unsigned long arg)
5400 char cmnd[MAX_COMMAND_SIZE];
5401 void __user *argp = (void __user *)arg;
5403 memset(cmnd, 0xff, 12);
5405 TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
5408 case GDTIOCTL_CTRCNT:
5410 int cnt = gdth_ctr_count;
5411 if (put_user(cnt, (int __user *)argp))
5416 case GDTIOCTL_DRVERS:
5418 int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
5419 if (put_user(ver, (int __user *)argp))
5424 case GDTIOCTL_OSVERS:
5426 gdth_ioctl_osvers osv;
5428 osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
5429 osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
5430 osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
5431 if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
5436 case GDTIOCTL_CTRTYPE:
5438 gdth_ioctl_ctrtype ctrt;
5440 if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
5441 ctrt.ionode >= gdth_ctr_count)
5443 ha = HADATA(gdth_ctr_tab[ctrt.ionode]);
5444 if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
5445 ctrt.type = (unchar)((ha->stype>>20) - 0x10);
5447 if (ha->type != GDT_PCIMPR) {
5448 ctrt.type = (unchar)((ha->stype<<4) + 6);
5451 (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
5452 if (ha->stype >= 0x300)
5453 ctrt.ext_type = 0x6000 | ha->subdevice_id;
5455 ctrt.ext_type = 0x6000 | ha->stype;
5457 ctrt.device_id = ha->stype;
5458 ctrt.sub_device_id = ha->subdevice_id;
5460 ctrt.info = ha->brd_phys;
5461 ctrt.oem_id = ha->oem_id;
5462 if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
5467 case GDTIOCTL_GENERAL:
5468 return ioc_general(argp, cmnd);
5470 case GDTIOCTL_EVENT:
5471 return ioc_event(argp);
5473 case GDTIOCTL_LOCKDRV:
5474 return ioc_lockdrv(argp);
5476 case GDTIOCTL_LOCKCHN:
5478 gdth_ioctl_lockchn lchn;
5481 if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
5482 lchn.ionode >= gdth_ctr_count)
5484 ha = HADATA(gdth_ctr_tab[lchn.ionode]);
5487 if (i < ha->bus_cnt) {
5489 spin_lock_irqsave(&ha->smp_lock, flags);
5490 ha->raw[i].lock = 1;
5491 spin_unlock_irqrestore(&ha->smp_lock, flags);
5492 for (j = 0; j < ha->tid_cnt; ++j) {
5493 gdth_wait_completion(lchn.ionode, i, j);
5494 gdth_stop_timeout(lchn.ionode, i, j);
5497 spin_lock_irqsave(&ha->smp_lock, flags);
5498 ha->raw[i].lock = 0;
5499 spin_unlock_irqrestore(&ha->smp_lock, flags);
5500 for (j = 0; j < ha->tid_cnt; ++j) {
5501 gdth_start_timeout(lchn.ionode, i, j);
5502 gdth_next(lchn.ionode);
5509 case GDTIOCTL_RESCAN:
5510 return ioc_rescan(argp, cmnd);
5512 case GDTIOCTL_HDRLIST:
5513 return ioc_hdrlist(argp, cmnd);
5515 case GDTIOCTL_RESET_BUS:
5517 gdth_ioctl_reset res;
5520 if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
5521 res.ionode >= gdth_ctr_count)
5524 ha = HADATA(gdth_ctr_tab[hanum]);
5526 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5527 scp = kmalloc(sizeof(*scp), GFP_KERNEL);
5530 memset(scp, 0, sizeof(*scp));
5531 scp->device = ha->sdev;
5534 scp->device->channel = virt_ctr ? 0 : res.number;
5535 rval = gdth_eh_bus_reset(scp);
5536 res.status = (rval == SUCCESS ? S_OK : S_GENERR);
5539 scp = scsi_allocate_device(ha->sdev, 1, FALSE);
5544 scp->channel = virt_ctr ? 0 : res.number;
5545 rval = gdth_eh_bus_reset(scp);
5546 res.status = (rval == SUCCESS ? S_OK : S_GENERR);
5547 scsi_release_command(scp);
5549 if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
5554 case GDTIOCTL_RESET_DRV:
5555 return ioc_resetdrv(argp, cmnd);
5565 static void gdth_flush(int hanum)
5569 gdth_cmd_str gdtcmd;
5570 char cmnd[MAX_COMMAND_SIZE];
5571 memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5573 TRACE2(("gdth_flush() hanum %d\n",hanum));
5574 ha = HADATA(gdth_ctr_tab[hanum]);
5576 for (i = 0; i < MAX_HDRIVES; ++i) {
5577 if (ha->hdr[i].present) {
5578 gdtcmd.BoardNode = LOCALBOARD;
5579 gdtcmd.Service = CACHESERVICE;
5580 gdtcmd.OpCode = GDT_FLUSH;
5581 if (ha->cache_feat & GDT_64BIT) {
5582 gdtcmd.u.cache64.DeviceNo = i;
5583 gdtcmd.u.cache64.BlockNo = 1;
5584 gdtcmd.u.cache64.sg_canz = 0;
5586 gdtcmd.u.cache.DeviceNo = i;
5587 gdtcmd.u.cache.BlockNo = 1;
5588 gdtcmd.u.cache.sg_canz = 0;
5590 TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));
5592 gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 30, NULL);
5597 /* shutdown routine */
5598 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
5602 gdth_cmd_str gdtcmd;
5603 char cmnd[MAX_COMMAND_SIZE];
5606 if (notifier_disabled)
5609 TRACE2(("gdth_halt() event %d\n",(int)event));
5610 if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5613 notifier_disabled = 1;
5614 printk("GDT-HA: Flushing all host drives .. ");
5615 for (hanum = 0; hanum < gdth_ctr_count; ++hanum) {
5619 /* controller reset */
5620 memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5621 gdtcmd.BoardNode = LOCALBOARD;
5622 gdtcmd.Service = CACHESERVICE;
5623 gdtcmd.OpCode = GDT_RESET;
5624 TRACE2(("gdth_halt(): reset controller %d\n", hanum));
5625 gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 10, NULL);
5630 #ifdef GDTH_STATISTICS
5631 del_timer(&gdth_timer);
5636 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5638 static int gdth_slave_configure(struct scsi_device *sdev)
5640 scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
5641 sdev->skip_ms_page_3f = 1;
5642 sdev->skip_ms_page_8 = 1;
5647 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5648 static struct scsi_host_template driver_template = {
5650 static Scsi_Host_Template driver_template = {
5652 .proc_name = "gdth",
5653 .proc_info = gdth_proc_info,
5654 .name = "GDT SCSI Disk Array Controller",
5655 .detect = gdth_detect,
5656 .release = gdth_release,
5658 .queuecommand = gdth_queuecommand,
5659 .eh_bus_reset_handler = gdth_eh_bus_reset,
5660 .bios_param = gdth_bios_param,
5661 .can_queue = GDTH_MAXCMDS,
5662 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5663 .slave_configure = gdth_slave_configure,
5666 .sg_tablesize = GDTH_MAXSG,
5667 .cmd_per_lun = GDTH_MAXC_P_L,
5668 .unchecked_isa_dma = 1,
5669 .use_clustering = ENABLE_CLUSTERING,
5670 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
5671 .use_new_eh_code = 1,
5672 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)
5678 #include "scsi_module.c"
5680 __setup("gdth=", option_setup);