drivers/scsi/sata_nv.c

   1 /*
   2  *  sata_nv.c - NVIDIA nForce SATA
   3  *
   4  *  Copyright 2004 NVIDIA Corp.  All rights reserved.
   5  *  Copyright 2004 Andrew Chew
   6  *
   7  *  The contents of this file are subject to the Open
   8  *  Software License version 1.1 that can be found at
   9  *  http://www.opensource.org/licenses/osl-1.1.txt and is included herein
  10  *  by reference.
  11  *
  12  *  Alternatively, the contents of this file may be used under the terms
  13  *  of the GNU General Public License version 2 (the "GPL") as distributed
  14  *  in the kernel source COPYING file, in which case the provisions of
  15  *  the GPL are applicable instead of the above.  If you wish to allow
  16  *  the use of your version of this file only under the terms of the
  17  *  GPL and not to allow others to use your version of this file under
  18  *  the OSL, indicate your decision by deleting the provisions above and
  19  *  replace them with the notice and other provisions required by the GPL.
  20  *  If you do not delete the provisions above, a recipient may use your
  21  *  version of this file under either the OSL or the GPL.
  22  *
  23  *  0.02
  24  *     - Added support for CK804 SATA controller.
  25  *
  26  *  0.01
  27  *     - Initial revision.
  28  */
  29
  30 #include <linux/config.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/pci.h>
  34 #include <linux/init.h>
  35 #include <linux/blkdev.h>
  36 #include <linux/delay.h>
  37 #include <linux/interrupt.h>
  38 #include "scsi.h"
  39 #include <scsi/scsi_host.h>
  40 #include <linux/libata.h>
  41
  42 #define DRV_NAME                        "sata_nv"
  43 #define DRV_VERSION                     "0.02"
  44
  45 #define NV_PORTS                        2
  46 #define NV_PIO_MASK                     0x1f
  47 #define NV_UDMA_MASK                    0x7f
  48 #define NV_PORT0_BMDMA_REG_OFFSET       0x00
  49 #define NV_PORT1_BMDMA_REG_OFFSET       0x08
  50 #define NV_PORT0_SCR_REG_OFFSET         0x00
  51 #define NV_PORT1_SCR_REG_OFFSET         0x40
  52
  53 #define NV_INT_STATUS                   0x10
  54 #define NV_INT_STATUS_CK804             0x440
  55 #define NV_INT_STATUS_PDEV_INT          0x01
  56 #define NV_INT_STATUS_PDEV_PM           0x02
  57 #define NV_INT_STATUS_PDEV_ADDED        0x04
  58 #define NV_INT_STATUS_PDEV_REMOVED      0x08
  59 #define NV_INT_STATUS_SDEV_INT          0x10
  60 #define NV_INT_STATUS_SDEV_PM           0x20
  61 #define NV_INT_STATUS_SDEV_ADDED        0x40
  62 #define NV_INT_STATUS_SDEV_REMOVED      0x80
  63 #define NV_INT_STATUS_PDEV_HOTPLUG      (NV_INT_STATUS_PDEV_ADDED | \
  64                                         NV_INT_STATUS_PDEV_REMOVED)
  65 #define NV_INT_STATUS_SDEV_HOTPLUG      (NV_INT_STATUS_SDEV_ADDED | \
  66                                         NV_INT_STATUS_SDEV_REMOVED)
  67 #define NV_INT_STATUS_HOTPLUG           (NV_INT_STATUS_PDEV_HOTPLUG | \
  68                                         NV_INT_STATUS_SDEV_HOTPLUG)
  69
  70 #define NV_INT_ENABLE                   0x11
  71 #define NV_INT_ENABLE_CK804             0x441
  72 #define NV_INT_ENABLE_PDEV_MASK         0x01
  73 #define NV_INT_ENABLE_PDEV_PM           0x02
  74 #define NV_INT_ENABLE_PDEV_ADDED        0x04
  75 #define NV_INT_ENABLE_PDEV_REMOVED      0x08
  76 #define NV_INT_ENABLE_SDEV_MASK         0x10
  77 #define NV_INT_ENABLE_SDEV_PM           0x20
  78 #define NV_INT_ENABLE_SDEV_ADDED        0x40
  79 #define NV_INT_ENABLE_SDEV_REMOVED      0x80
  80 #define NV_INT_ENABLE_PDEV_HOTPLUG      (NV_INT_ENABLE_PDEV_ADDED | \
  81                                         NV_INT_ENABLE_PDEV_REMOVED)
  82 #define NV_INT_ENABLE_SDEV_HOTPLUG      (NV_INT_ENABLE_SDEV_ADDED | \
  83                                         NV_INT_ENABLE_SDEV_REMOVED)
  84 #define NV_INT_ENABLE_HOTPLUG           (NV_INT_ENABLE_PDEV_HOTPLUG | \
  85                                         NV_INT_ENABLE_SDEV_HOTPLUG)
  86
  87 #define NV_INT_CONFIG                   0x12
  88 #define NV_INT_CONFIG_METHD             0x01 // 0 = INT, 1 = SMI
  89
  90 // For PCI config register 20
  91 #define NV_MCP_SATA_CFG_20              0x50
  92 #define NV_MCP_SATA_CFG_20_SATA_SPACE_EN        0x04
  93
  94 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
  95 irqreturn_t nv_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
  96 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg);
  97 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
  98 static void nv_host_stop (struct ata_host_set *host_set);
  99 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent);
 100 static void nv_disable_hotplug(struct ata_host_set *host_set);
 101 static void nv_check_hotplug(struct ata_host_set *host_set);
 102 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent);
 103 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set);
 104 static void nv_check_hotplug_ck804(struct ata_host_set *host_set);
 105
 106 enum nv_host_type
 107 {
 108         NFORCE2,
 109         NFORCE3,
 110         CK804
 111 };
 112
 113 static struct pci_device_id nv_pci_tbl[] = {
 114         { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
 115                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE2 },
 116         { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
 117                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
 118         { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
 119                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
 120         { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA,
 121                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
 122         { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2,
 123                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
 124         { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA,
 125                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
 126         { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
 127                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
 128         { 0, } /* terminate list */
 129 };
 130
 131 #define NV_HOST_FLAGS_SCR_MMIO  0x00000001
 132
 133 struct nv_host_desc
 134 {
 135         enum nv_host_type       host_type;
 136         unsigned long           host_flags;
 137         void                    (*enable_hotplug)(struct ata_probe_ent *probe_ent);
 138         void                    (*disable_hotplug)(struct ata_host_set *host_set);
 139         void                    (*check_hotplug)(struct ata_host_set *host_set);
 140
 141 };
 142 static struct nv_host_desc nv_device_tbl[] = {
 143         {
 144                 .host_type      = NFORCE2,
 145                 .host_flags     = 0x00000000,
 146                 .enable_hotplug = nv_enable_hotplug,
 147                 .disable_hotplug= nv_disable_hotplug,
 148                 .check_hotplug  = nv_check_hotplug,
 149         },
 150         {
 151                 .host_type      = NFORCE3,
 152                 .host_flags     = 0x00000000,
 153                 .enable_hotplug = nv_enable_hotplug,
 154                 .disable_hotplug= nv_disable_hotplug,
 155                 .check_hotplug  = nv_check_hotplug,
 156         },
 157         {       .host_type      = CK804,
 158                 .host_flags     = NV_HOST_FLAGS_SCR_MMIO,
 159                 .enable_hotplug = nv_enable_hotplug_ck804,
 160                 .disable_hotplug= nv_disable_hotplug_ck804,
 161                 .check_hotplug  = nv_check_hotplug_ck804,
 162         },
 163 };
 164
 165 struct nv_host
 166 {
 167         struct nv_host_desc     *host_desc;
 168 };
 169
 170 static struct pci_driver nv_pci_driver = {
 171         .name                   = DRV_NAME,
 172         .id_table               = nv_pci_tbl,
 173         .probe                  = nv_init_one,
 174         .remove                 = ata_pci_remove_one,
 175 };
 176
 177 static Scsi_Host_Template nv_sht = {
 178         .module                 = THIS_MODULE,
 179         .name                   = DRV_NAME,
 180         .queuecommand           = ata_scsi_queuecmd,
 181         .eh_strategy_handler    = ata_scsi_error,
 182         .can_queue              = ATA_DEF_QUEUE,
 183         .this_id                = ATA_SHT_THIS_ID,
 184         .sg_tablesize           = ATA_MAX_PRD,
 185         .max_sectors            = ATA_MAX_SECTORS,
 186         .cmd_per_lun            = ATA_SHT_CMD_PER_LUN,
 187         .emulated               = ATA_SHT_EMULATED,
 188         .use_clustering         = ATA_SHT_USE_CLUSTERING,
 189         .proc_name              = DRV_NAME,
 190         .dma_boundary           = ATA_DMA_BOUNDARY,
 191         .slave_configure        = ata_scsi_slave_config,
 192         .bios_param             = ata_std_bios_param,
 193 };
 194
 195 static struct ata_port_operations nv_ops = {
 196         .port_disable           = ata_port_disable,
 197         .tf_load                = ata_tf_load_pio,
 198         .tf_read                = ata_tf_read_pio,
 199         .exec_command           = ata_exec_command_pio,
 200         .check_status           = ata_check_status_pio,
 201         .phy_reset              = sata_phy_reset,
 202         .bmdma_setup            = ata_bmdma_setup_pio,
 203         .bmdma_start            = ata_bmdma_start_pio,
 204         .qc_prep                = ata_qc_prep,
 205         .qc_issue               = ata_qc_issue_prot,
 206         .eng_timeout            = ata_eng_timeout,
 207         .irq_handler            = nv_interrupt,
 208         .irq_clear              = ata_bmdma_irq_clear,
 209         .scr_read               = nv_scr_read,
 210         .scr_write              = nv_scr_write,
 211         .port_start             = ata_port_start,
 212         .port_stop              = ata_port_stop,
 213         .host_stop              = nv_host_stop,
 214 };
 215
 216 MODULE_AUTHOR("NVIDIA");
 217 MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
 218 MODULE_LICENSE("GPL");
 219 MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
 220
 221 irqreturn_t nv_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
 222 {
 223         struct ata_host_set *host_set = dev_instance;
 224         struct nv_host *host = host_set->private_data;
 225         unsigned int i;
 226         unsigned int handled = 0;
 227         unsigned long flags;
 228
 229         spin_lock_irqsave(&host_set->lock, flags);
 230
 231         for (i = 0; i < host_set->n_ports; i++) {
 232                 struct ata_port *ap;
 233
 234                 ap = host_set->ports[i];
 235                 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) {
 236                         struct ata_queued_cmd *qc;
 237
 238                         qc = ata_qc_from_tag(ap, ap->active_tag);
 239                         if (qc && (!(qc->tf.ctl & ATA_NIEN)))
 240                                 handled += ata_host_intr(ap, qc);
 241                 }
 242
 243         }
 244
 245         if (host->host_desc->check_hotplug)
 246                 host->host_desc->check_hotplug(host_set);
 247
 248         spin_unlock_irqrestore(&host_set->lock, flags);
 249
 250         return IRQ_RETVAL(handled);
 251 }
 252
 253 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg)
 254 {
 255         struct ata_host_set *host_set = ap->host_set;
 256         struct nv_host *host = host_set->private_data;
 257
 258         if (sc_reg > SCR_CONTROL)
 259                 return 0xffffffffU;
 260
 261         if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO)
 262                 return readl(ap->ioaddr.scr_addr + (sc_reg * 4));
 263         else
 264                 return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
 265 }
 266
 267 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
 268 {
 269         struct ata_host_set *host_set = ap->host_set;
 270         struct nv_host *host = host_set->private_data;
 271
 272         if (sc_reg > SCR_CONTROL)
 273                 return;
 274
 275         if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO)
 276                 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
 277         else
 278                 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
 279 }
 280
 281 static void nv_host_stop (struct ata_host_set *host_set)
 282 {
 283         struct nv_host *host = host_set->private_data;
 284
 285         // Disable hotplug event interrupts.
 286         if (host->host_desc->disable_hotplug)
 287                 host->host_desc->disable_hotplug(host_set);
 288
 289         kfree(host);
 290 }
 291
 292 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
 293 {
 294         static int printed_version = 0;
 295         struct nv_host *host;
 296         struct ata_probe_ent *probe_ent = NULL;
 297         int rc;
 298
 299         if (!printed_version++)
 300                 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
 301
 302         rc = pci_enable_device(pdev);
 303         if (rc)
 304                 return rc;
 305
 306         rc = pci_request_regions(pdev, DRV_NAME);
 307         if (rc)
 308                 goto err_out;
 309
 310         rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
 311         if (rc)
 312                 goto err_out_regions;
 313         rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
 314         if (rc)
 315                 goto err_out_regions;
 316
 317         probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
 318         if (!probe_ent) {
 319                 rc = -ENOMEM;
 320                 goto err_out_regions;
 321         }
 322
 323         host = kmalloc(sizeof(struct nv_host), GFP_KERNEL);
 324         if (!host) {
 325                 rc = -ENOMEM;
 326                 goto err_out_free_ent;
 327         }
 328
 329         host->host_desc = &nv_device_tbl[ent->driver_data];
 330
 331         memset(probe_ent, 0, sizeof(*probe_ent));
 332         INIT_LIST_HEAD(&probe_ent->node);
 333
 334         probe_ent->pdev = pdev;
 335         probe_ent->sht = &nv_sht;
 336         probe_ent->host_flags = ATA_FLAG_SATA |
 337                                 ATA_FLAG_SATA_RESET |
 338                                 ATA_FLAG_SRST |
 339                                 ATA_FLAG_NO_LEGACY;
 340
 341         probe_ent->port_ops = &nv_ops;
 342         probe_ent->n_ports = NV_PORTS;
 343         probe_ent->irq = pdev->irq;
 344         probe_ent->irq_flags = SA_SHIRQ;
 345         probe_ent->pio_mask = NV_PIO_MASK;
 346         probe_ent->udma_mask = NV_UDMA_MASK;
 347
 348         probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
 349         ata_std_ports(&probe_ent->port[0]);
 350         probe_ent->port[0].altstatus_addr =
 351         probe_ent->port[0].ctl_addr =
 352                 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
 353         probe_ent->port[0].bmdma_addr =
 354                 pci_resource_start(pdev, 4) | NV_PORT0_BMDMA_REG_OFFSET;
 355
 356         probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
 357         ata_std_ports(&probe_ent->port[1]);
 358         probe_ent->port[1].altstatus_addr =
 359         probe_ent->port[1].ctl_addr =
 360                 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
 361         probe_ent->port[1].bmdma_addr =
 362                 pci_resource_start(pdev, 4) | NV_PORT1_BMDMA_REG_OFFSET;
 363
 364         probe_ent->private_data = host;
 365
 366         if (host->host_desc->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
 367                 unsigned long base;
 368
 369                 probe_ent->mmio_base = ioremap(pci_resource_start(pdev, 5),
 370                                 pci_resource_len(pdev, 5));
 371                 if (probe_ent->mmio_base == NULL)
 372                         goto err_out_free_ent;
 373
 374                 base = (unsigned long)probe_ent->mmio_base;
 375
 376                 probe_ent->port[0].scr_addr =
 377                         base + NV_PORT0_SCR_REG_OFFSET;
 378                 probe_ent->port[1].scr_addr =
 379                         base + NV_PORT1_SCR_REG_OFFSET;
 380         } else {
 381
 382                 probe_ent->port[0].scr_addr =
 383                         pci_resource_start(pdev, 5) | NV_PORT0_SCR_REG_OFFSET;
 384                 probe_ent->port[1].scr_addr =
 385                         pci_resource_start(pdev, 5) | NV_PORT1_SCR_REG_OFFSET;
 386         }
 387
 388         pci_set_master(pdev);
 389
 390         // Enable hotplug event interrupts.
 391         if (host->host_desc->enable_hotplug)
 392                 host->host_desc->enable_hotplug(probe_ent);
 393
 394         rc = ata_device_add(probe_ent);
 395         if (rc != NV_PORTS)
 396                 goto err_out_free_ent;
 397
 398         kfree(probe_ent);
 399
 400         return 0;
 401
 402 err_out_free_ent:
 403         kfree(probe_ent);
 404
 405 err_out_regions:
 406         pci_release_regions(pdev);
 407
 408 err_out:
 409         pci_disable_device(pdev);
 410         return rc;
 411 }
 412
 413 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent)
 414 {
 415         u8 intr_mask;
 416
 417         outb(NV_INT_STATUS_HOTPLUG,
 418                 (unsigned long)probe_ent->mmio_base + NV_INT_STATUS);
 419
 420         intr_mask = inb((unsigned long)probe_ent->mmio_base + NV_INT_ENABLE);
 421         intr_mask |= NV_INT_ENABLE_HOTPLUG;
 422
 423         outb(intr_mask, (unsigned long)probe_ent->mmio_base + NV_INT_ENABLE);
 424 }
 425
 426 static void nv_disable_hotplug(struct ata_host_set *host_set)
 427 {
 428         u8 intr_mask;
 429
 430         intr_mask = inb((unsigned long)host_set->mmio_base + NV_INT_ENABLE);
 431
 432         intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
 433
 434         outb(intr_mask, (unsigned long)host_set->mmio_base + NV_INT_ENABLE);
 435 }
 436
 437 static void nv_check_hotplug(struct ata_host_set *host_set)
 438 {
 439         u8 intr_status;
 440
 441         intr_status = inb((unsigned long)host_set->mmio_base + NV_INT_STATUS);
 442
 443         // Clear interrupt status.
 444         outb(0xff, (unsigned long)host_set->mmio_base + NV_INT_STATUS);
 445
 446         if (intr_status & NV_INT_STATUS_HOTPLUG) {
 447                 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
 448                         printk(KERN_WARNING "nv_sata: "
 449                                 "Primary device added\n");
 450
 451                 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
 452                         printk(KERN_WARNING "nv_sata: "
 453                                 "Primary device removed\n");
 454
 455                 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
 456                         printk(KERN_WARNING "nv_sata: "
 457                                 "Secondary device added\n");
 458
 459                 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
 460                         printk(KERN_WARNING "nv_sata: "
 461                                 "Secondary device removed\n");
 462         }
 463 }
 464
 465 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent)
 466 {
 467         u8 intr_mask;
 468         u8 regval;
 469
 470         pci_read_config_byte(probe_ent->pdev, NV_MCP_SATA_CFG_20, &regval);
 471         regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
 472         pci_write_config_byte(probe_ent->pdev, NV_MCP_SATA_CFG_20, regval);
 473
 474         writeb(NV_INT_STATUS_HOTPLUG, probe_ent->mmio_base + NV_INT_STATUS_CK804);
 475
 476         intr_mask = readb(probe_ent->mmio_base + NV_INT_ENABLE_CK804);
 477         intr_mask |= NV_INT_ENABLE_HOTPLUG;
 478
 479         writeb(intr_mask, probe_ent->mmio_base + NV_INT_ENABLE_CK804);
 480 }
 481
 482 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set)
 483 {
 484         u8 intr_mask;
 485         u8 regval;
 486
 487         intr_mask = readb(host_set->mmio_base + NV_INT_ENABLE_CK804);
 488
 489         intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
 490
 491         writeb(intr_mask, host_set->mmio_base + NV_INT_ENABLE_CK804);
 492
 493         pci_read_config_byte(host_set->pdev, NV_MCP_SATA_CFG_20, &regval);
 494         regval &= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
 495         pci_write_config_byte(host_set->pdev, NV_MCP_SATA_CFG_20, regval);
 496 }
 497
 498 static void nv_check_hotplug_ck804(struct ata_host_set *host_set)
 499 {
 500         u8 intr_status;
 501
 502         intr_status = readb(host_set->mmio_base + NV_INT_STATUS_CK804);
 503
 504         // Clear interrupt status.
 505         writeb(0xff, host_set->mmio_base + NV_INT_STATUS_CK804);
 506
 507         if (intr_status & NV_INT_STATUS_HOTPLUG) {
 508                 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
 509                         printk(KERN_WARNING "nv_sata: "
 510                                 "Primary device added\n");
 511
 512                 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
 513                         printk(KERN_WARNING "nv_sata: "
 514                                 "Primary device removed\n");
 515
 516                 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
 517                         printk(KERN_WARNING "nv_sata: "
 518                                 "Secondary device added\n");
 519
 520                 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
 521                         printk(KERN_WARNING "nv_sata: "
 522                                 "Secondary device removed\n");
 523         }
 524 }
 525
 526 static int __init nv_init(void)
 527 {
 528         return pci_module_init(&nv_pci_driver);
 529 }
 530
 531 static void __exit nv_exit(void)
 532 {
 533         pci_unregister_driver(&nv_pci_driver);
 534 }
 535
 536 module_init(nv_init);
 537 module_exit(nv_exit);