patch-2_6_7-vs1_9_1_12
[linux-2.6.git] / drivers / serial / 68360serial.c
1 /*
2  *  UART driver for 68360 CPM SCC or SMC
3  *  Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4  *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5  *  Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6  *
7  * I used the serial.c driver as the framework for this driver.
8  * Give credit to those guys.
9  * The original code was written for the MBX860 board.  I tried to make
10  * it generic, but there may be some assumptions in the structures that
11  * have to be fixed later.
12  * To save porting time, I did not bother to change any object names
13  * that are not accessed outside of this file.
14  * It still needs lots of work........When it was easy, I included code
15  * to support the SCCs, but this has never been tested, nor is it complete.
16  * Only the SCCs support modem control, so that is not complete either.
17  *
18  * This module exports the following rs232 io functions:
19  *
20  *      int rs_360_init(void);
21  */
22
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/serialP.h> 
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
38 #include <linux/mm.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <asm/irq.h>
42 #include <asm/m68360.h>
43 #include <asm/commproc.h>
44
45  
46 #ifdef CONFIG_KGDB
47 extern void breakpoint(void);
48 extern void set_debug_traps(void);
49 extern int  kgdb_output_string (const char* s, unsigned int count);
50 #endif
51
52
53 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
54 #include <linux/console.h>
55
56 /* this defines the index into rs_table for the port to use
57  */
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT      1 /* ie SMC2 - note USE_SMC2 must be defined */
60 #endif
61 /* #endif */
62
63 #if 0
64 /* SCC2 for console
65  */
66 #undef CONFIG_SERIAL_CONSOLE_PORT
67 #define CONFIG_SERIAL_CONSOLE_PORT      2
68 #endif
69
70
71 #define TX_WAKEUP       ASYNC_SHARE_IRQ
72
73 static char *serial_name = "CPM UART driver";
74 static char *serial_version = "0.03";
75
76 static struct tty_driver *serial_driver;
77 int serial_console_setup(struct console *co, char *options);
78
79 /*
80  * Serial driver configuration section.  Here are the various options:
81  */
82 #define SERIAL_PARANOIA_CHECK
83 #define CONFIG_SERIAL_NOPAUSE_IO
84 #define SERIAL_DO_RESTART
85
86 /* Set of debugging defines */
87
88 #undef SERIAL_DEBUG_INTR
89 #undef SERIAL_DEBUG_OPEN
90 #undef SERIAL_DEBUG_FLOW
91 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
92
93 #define _INLINE_ inline
94   
95 #define DBG_CNT(s)
96
97 /* We overload some of the items in the data structure to meet our
98  * needs.  For example, the port address is the CPM parameter ram
99  * offset for the SCC or SMC.  The maximum number of ports is 4 SCCs and
100  * 2 SMCs.  The "hub6" field is used to indicate the channel number, with
101  * a flag indicating SCC or SMC, and the number is used as an index into
102  * the CPM parameter area for this device.
103  * The "type" field is currently set to 0, for PORT_UNKNOWN.  It is
104  * not currently used.  I should probably use it to indicate the port
105  * type of SMC or SCC.
106  * The SMCs do not support any modem control signals.
107  */
108 #define smc_scc_num     hub6
109 #define NUM_IS_SCC      ((int)0x00010000)
110 #define PORT_NUM(P)     ((P) & 0x0000ffff)
111
112
113 #if defined (CONFIG_UCQUICC)
114
115 volatile extern void *_periph_base;
116 /* sipex transceiver
117  *   mode bits for       are on pins
118  *
119  *    SCC2                d16..19
120  *    SCC3                d20..23
121  *    SCC4                d24..27
122  */
123 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
124
125 static uint sipex_mode_bits = 0x00000000;
126
127 #endif
128
129 /* There is no `serial_state' defined back here in 2.0.
130  * Try to get by with serial_struct
131  */
132 /* #define serial_state serial_struct */
133
134 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
135  * extras: */
136
137 #if 0
138 struct async_icount_24 {
139         __u32   cts, dsr, rng, dcd, tx, rx;
140         __u32   frame, parity, overrun, brk;
141         __u32   buf_overrun;
142 } icount;
143 #endif
144
145 #if 0
146
147 struct serial_state {
148         int     magic;
149         int     baud_base;
150         unsigned long   port;
151         int     irq;
152         int     flags;
153         int     hub6;
154         int     type;
155         int     line;
156         int     revision;       /* Chip revision (950) */
157         int     xmit_fifo_size;
158         int     custom_divisor;
159         int     count;
160         u8      *iomem_base;
161         u16     iomem_reg_shift;
162         unsigned short  close_delay;
163         unsigned short  closing_wait; /* time to wait before closing */
164         struct async_icount_24     icount; 
165         int     io_type;
166         struct async_struct *info;
167 };
168 #endif
169
170 #define SSTATE_MAGIC 0x5302
171
172
173
174 /* SMC2 is sometimes used for low performance TDM interfaces.  Define
175  * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176  * Define this as 0 if you wish to use SMC2 for something else.
177  */
178 #define USE_SMC2 1
179
180 #if 0
181 /* Define SCC to ttySx mapping. */
182 #define SCC_NUM_BASE    (USE_SMC2 + 1)  /* SCC base tty "number" */
183
184 /* Define which SCC is the first one to use for a serial port.  These
185  * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186  * for Ethernet, and the first available SCC for serial UART is SCC2.
187  * NOTE:  IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188  * interrupt vectors in the table below to match.
189  */
190 #define SCC_IDX_BASE    1       /* table index */
191 #endif
192
193
194 /* Processors other than the 860 only get SMCs configured by default.
195  * Either they don't have SCCs or they are allocated somewhere else.
196  * Of course, there are now 860s without some SCCs, so we will need to
197  * address that someday.
198  * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199  * stereo codec parts, and we use SMC2 to help support that.
200  */
201 static struct serial_state rs_table[] = {
202 /*  type   line   PORT           IRQ       FLAGS  smc_scc_num (F.K.A. hub6) */
203         {  0,     0, PRSLOT_SMC1, CPMVEC_SMC1,   0,    0 }    /* SMC1 ttyS0 */
204 #if USE_SMC2
205         ,{ 0,     0, PRSLOT_SMC2, CPMVEC_SMC2,   0,    1 }     /* SMC2 ttyS1 */
206 #endif
207
208 #if defined(CONFIG_SERIAL_68360_SCC)
209         ,{ 0,     0, PRSLOT_SCC2, CPMVEC_SCC2,   0, (NUM_IS_SCC | 1) }    /* SCC2 ttyS2 */
210         ,{ 0,     0, PRSLOT_SCC3, CPMVEC_SCC3,   0, (NUM_IS_SCC | 2) }    /* SCC3 ttyS3 */
211         ,{ 0,     0, PRSLOT_SCC4, CPMVEC_SCC4,   0, (NUM_IS_SCC | 3) }    /* SCC4 ttyS4 */
212 #endif
213 };
214
215 #define NR_PORTS        (sizeof(rs_table)/sizeof(struct serial_state))
216
217 /* The number of buffer descriptors and their sizes.
218  */
219 #define RX_NUM_FIFO     4
220 #define RX_BUF_SIZE     32
221 #define TX_NUM_FIFO     4
222 #define TX_BUF_SIZE     32
223
224 #define CONSOLE_NUM_FIFO 2
225 #define CONSOLE_BUF_SIZE 4
226
227 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
228
229 /* The async_struct in serial.h does not really give us what we
230  * need, so define our own here.
231  */
232 typedef struct serial_info {
233         int                     magic;
234         int                     flags;
235
236         struct serial_state     *state;
237         /* struct serial_struct *state; */
238         /* struct async_struct  *state; */
239         
240         struct tty_struct       *tty;
241         int                     read_status_mask;
242         int                     ignore_status_mask;
243         int                     timeout;
244         int                     line;
245         int                     x_char; /* xon/xoff character */
246         int                     close_delay;
247         unsigned short          closing_wait;
248         unsigned short          closing_wait2;
249         unsigned long           event;
250         unsigned long           last_active;
251         int                     blocked_open; /* # of blocked opens */
252         struct work_struct      tqueue;
253         struct work_struct      tqueue_hangup;
254         wait_queue_head_t       open_wait; 
255         wait_queue_head_t       close_wait; 
256
257         
258 /* CPM Buffer Descriptor pointers.
259         */
260         QUICC_BD                        *rx_bd_base;
261         QUICC_BD                        *rx_cur;
262         QUICC_BD                        *tx_bd_base;
263         QUICC_BD                        *tx_cur;
264 } ser_info_t;
265
266
267 /* since kmalloc_init() does not get called until much after this initialization: */
268 static ser_info_t  quicc_ser_info[NR_PORTS];
269 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
271
272 static void change_speed(ser_info_t *info);
273 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
274
275 static inline int serial_paranoia_check(ser_info_t *info,
276                                         char *name, const char *routine)
277 {
278 #ifdef SERIAL_PARANOIA_CHECK
279         static const char *badmagic =
280                 "Warning: bad magic number for serial struct (%s) in %s\n";
281         static const char *badinfo =
282                 "Warning: null async_struct for (%s) in %s\n";
283
284         if (!info) {
285                 printk(badinfo, name, routine);
286                 return 1;
287         }
288         if (info->magic != SERIAL_MAGIC) {
289                 printk(badmagic, name, routine);
290                 return 1;
291         }
292 #endif
293         return 0;
294 }
295
296 /*
297  * This is used to figure out the divisor speeds and the timeouts,
298  * indexed by the termio value.  The generic CPM functions are responsible
299  * for setting and assigning baud rate generators for us.
300  */
301 static int baud_table[] = {
302         0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303         9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
304
305 /* This sucks. There is a better way: */
306 #if defined(CONFIG_CONSOLE_9600)
307   #define CONSOLE_BAUDRATE 9600
308 #elif defined(CONFIG_CONSOLE_19200)
309   #define CONSOLE_BAUDRATE 19200
310 #elif defined(CONFIG_CONSOLE_115200)
311   #define CONSOLE_BAUDRATE 115200
312 #else
313   #warning "console baud rate undefined"
314   #define CONSOLE_BAUDRATE 9600
315 #endif
316
317 /*
318  * ------------------------------------------------------------
319  * rs_stop() and rs_start()
320  *
321  * This routines are called before setting or resetting tty->stopped.
322  * They enable or disable transmitter interrupts, as necessary.
323  * ------------------------------------------------------------
324  */
325 static void rs_360_stop(struct tty_struct *tty)
326 {
327         ser_info_t *info = (ser_info_t *)tty->driver_data;
328         int     idx;
329         unsigned long flags;
330         volatile struct scc_regs *sccp;
331         volatile struct smc_regs *smcp;
332
333         if (serial_paranoia_check(info, tty->name, "rs_stop"))
334                 return;
335         
336         local_irq_save(flags);
337         idx = PORT_NUM(info->state->smc_scc_num);
338         if (info->state->smc_scc_num & NUM_IS_SCC) {
339                 sccp = &pquicc->scc_regs[idx];
340                 sccp->scc_sccm &= ~UART_SCCM_TX;
341         } else {
342                 /* smcp = &cpmp->cp_smc[idx]; */
343                 smcp = &pquicc->smc_regs[idx];
344                 smcp->smc_smcm &= ~SMCM_TX;
345         }
346         local_irq_restore(flags);
347 }
348
349
350 static void rs_360_start(struct tty_struct *tty)
351 {
352         ser_info_t *info = (ser_info_t *)tty->driver_data;
353         int     idx;
354         unsigned long flags;
355         volatile struct scc_regs *sccp;
356         volatile struct smc_regs *smcp;
357
358         if (serial_paranoia_check(info, tty->name, "rs_stop"))
359                 return;
360         
361         local_irq_save(flags);
362         idx = PORT_NUM(info->state->smc_scc_num);
363         if (info->state->smc_scc_num & NUM_IS_SCC) {
364                 sccp = &pquicc->scc_regs[idx];
365                 sccp->scc_sccm |= UART_SCCM_TX;
366         } else {
367                 smcp = &pquicc->smc_regs[idx];
368                 smcp->smc_smcm |= SMCM_TX;
369         }
370         local_irq_restore(flags);
371 }
372
373 /*
374  * ----------------------------------------------------------------------
375  *
376  * Here starts the interrupt handling routines.  All of the following
377  * subroutines are declared as inline and are folded into
378  * rs_interrupt().  They were separated out for readability's sake.
379  *
380  * Note: rs_interrupt() is a "fast" interrupt, which means that it
381  * runs with interrupts turned off.  People who may want to modify
382  * rs_interrupt() should try to keep the interrupt handler as fast as
383  * possible.  After you are done making modifications, it is not a bad
384  * idea to do:
385  * 
386  * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
387  *
388  * and look at the resulting assemble code in serial.s.
389  *
390  *                              - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391  * -----------------------------------------------------------------------
392  */
393
394 static _INLINE_ void receive_chars(ser_info_t *info)
395 {
396         struct tty_struct *tty = info->tty;
397         unsigned char ch, *cp;
398         /*int   ignored = 0;*/
399         int     i;
400         ushort  status;
401          struct async_icount *icount; 
402         /* struct       async_icount_24 *icount; */
403         volatile QUICC_BD       *bdp;
404
405         icount = &info->state->icount;
406
407         /* Just loop through the closed BDs and copy the characters into
408          * the buffer.
409          */
410         bdp = info->rx_cur;
411         for (;;) {
412                 if (bdp->status & BD_SC_EMPTY)  /* If this one is empty */
413                         break;                  /*   we are all done */
414
415                 /* The read status mask tell us what we should do with
416                  * incoming characters, especially if errors occur.
417                  * One special case is the use of BD_SC_EMPTY.  If
418                  * this is not set, we are supposed to be ignoring
419                  * inputs.  In this case, just mark the buffer empty and
420                  * continue.
421                  */
422                 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423                         bdp->status |= BD_SC_EMPTY;
424                         bdp->status &=
425                                 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
426
427                         if (bdp->status & BD_SC_WRAP)
428                                 bdp = info->rx_bd_base;
429                         else
430                                 bdp++;
431                         continue;
432                 }
433
434                 /* Get the number of characters and the buffer pointer.
435                 */
436                 i = bdp->length;
437                 /* cp = (unsigned char *)__va(bdp->buf); */
438                 cp = (char *)bdp->buf;
439                 status = bdp->status;
440
441                 /* Check to see if there is room in the tty buffer for
442                  * the characters in our BD buffer.  If not, we exit
443                  * now, leaving the BD with the characters.  We'll pick
444                  * them up again on the next receive interrupt (which could
445                  * be a timeout).
446                  */
447                 if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
448                         break;
449
450                 while (i-- > 0) {
451                         ch = *cp++;
452                         *tty->flip.char_buf_ptr = ch;
453                         icount->rx++;
454
455 #ifdef SERIAL_DEBUG_INTR
456                         printk("DR%02x:%02x...", ch, status);
457 #endif
458                         *tty->flip.flag_buf_ptr = 0;
459                         if (status & (BD_SC_BR | BD_SC_FR |
460                                        BD_SC_PR | BD_SC_OV)) {
461                                 /*
462                                  * For statistics only
463                                  */
464                                 if (status & BD_SC_BR)
465                                         icount->brk++;
466                                 else if (status & BD_SC_PR)
467                                         icount->parity++;
468                                 else if (status & BD_SC_FR)
469                                         icount->frame++;
470                                 if (status & BD_SC_OV)
471                                         icount->overrun++;
472
473                                 /*
474                                  * Now check to see if character should be
475                                  * ignored, and mask off conditions which
476                                  * should be ignored.
477                                 if (status & info->ignore_status_mask) {
478                                         if (++ignored > 100)
479                                                 break;
480                                         continue;
481                                 }
482                                  */
483                                 status &= info->read_status_mask;
484                 
485                                 if (status & (BD_SC_BR)) {
486 #ifdef SERIAL_DEBUG_INTR
487                                         printk("handling break....");
488 #endif
489                                         *tty->flip.flag_buf_ptr = TTY_BREAK;
490                                         if (info->flags & ASYNC_SAK)
491                                                 do_SAK(tty);
492                                 } else if (status & BD_SC_PR)
493                                         *tty->flip.flag_buf_ptr = TTY_PARITY;
494                                 else if (status & BD_SC_FR)
495                                         *tty->flip.flag_buf_ptr = TTY_FRAME;
496                                 if (status & BD_SC_OV) {
497                                         /*
498                                          * Overrun is special, since it's
499                                          * reported immediately, and doesn't
500                                          * affect the current character
501                                          */
502                                         if (tty->flip.count < TTY_FLIPBUF_SIZE) {
503                                                 tty->flip.count++;
504                                                 tty->flip.flag_buf_ptr++;
505                                                 tty->flip.char_buf_ptr++;
506                                                 *tty->flip.flag_buf_ptr =
507                                                                 TTY_OVERRUN;
508                                         }
509                                 }
510                         }
511                         if (tty->flip.count >= TTY_FLIPBUF_SIZE)
512                                 break;
513
514                         tty->flip.flag_buf_ptr++;
515                         tty->flip.char_buf_ptr++;
516                         tty->flip.count++;
517                 }
518
519                 /* This BD is ready to be used again.  Clear status.
520                  * Get next BD.
521                  */
522                 bdp->status |= BD_SC_EMPTY;
523                 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
524
525                 if (bdp->status & BD_SC_WRAP)
526                         bdp = info->rx_bd_base;
527                 else
528                         bdp++;
529         }
530
531         info->rx_cur = (QUICC_BD *)bdp;
532
533         schedule_work(&tty->flip.work);
534 }
535
536 static _INLINE_ void receive_break(ser_info_t *info)
537 {
538         struct tty_struct *tty = info->tty;
539
540         info->state->icount.brk++;
541         /* Check to see if there is room in the tty buffer for
542          * the break.  If not, we exit now, losing the break.  FIXME
543          */
544         if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
545                 return;
546         *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
547         *(tty->flip.char_buf_ptr++) = 0;
548         tty->flip.count++;
549
550         schedule_work(&tty->flip.work);
551 }
552
553 static _INLINE_ void transmit_chars(ser_info_t *info)
554 {
555
556         if ((info->flags & TX_WAKEUP) ||
557             (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
558                 schedule_work(&info->tqueue);
559         }
560
561 #ifdef SERIAL_DEBUG_INTR
562         printk("THRE...");
563 #endif
564 }
565
566 #ifdef notdef
567         /* I need to do this for the SCCs, so it is left as a reminder.
568         */
569 static _INLINE_ void check_modem_status(struct async_struct *info)
570 {
571         int     status;
572         /* struct       async_icount *icount; */
573         struct  async_icount_24 *icount;
574         
575         status = serial_in(info, UART_MSR);
576
577         if (status & UART_MSR_ANY_DELTA) {
578                 icount = &info->state->icount;
579                 /* update input line counters */
580                 if (status & UART_MSR_TERI)
581                         icount->rng++;
582                 if (status & UART_MSR_DDSR)
583                         icount->dsr++;
584                 if (status & UART_MSR_DDCD) {
585                         icount->dcd++;
586 #ifdef CONFIG_HARD_PPS
587                         if ((info->flags & ASYNC_HARDPPS_CD) &&
588                             (status & UART_MSR_DCD))
589                                 hardpps();
590 #endif
591                 }
592                 if (status & UART_MSR_DCTS)
593                         icount->cts++;
594                 wake_up_interruptible(&info->delta_msr_wait);
595         }
596
597         if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
598 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
599                 printk("ttys%d CD now %s...", info->line,
600                        (status & UART_MSR_DCD) ? "on" : "off");
601 #endif          
602                 if (status & UART_MSR_DCD)
603                         wake_up_interruptible(&info->open_wait);
604                 else {
605 #ifdef SERIAL_DEBUG_OPEN
606                         printk("scheduling hangup...");
607 #endif
608                         queue_task(&info->tqueue_hangup,
609                                            &tq_scheduler);
610                 }
611         }
612         if (info->flags & ASYNC_CTS_FLOW) {
613                 if (info->tty->hw_stopped) {
614                         if (status & UART_MSR_CTS) {
615 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
616                                 printk("CTS tx start...");
617 #endif
618                                 info->tty->hw_stopped = 0;
619                                 info->IER |= UART_IER_THRI;
620                                 serial_out(info, UART_IER, info->IER);
621                                 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
622                                 return;
623                         }
624                 } else {
625                         if (!(status & UART_MSR_CTS)) {
626 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
627                                 printk("CTS tx stop...");
628 #endif
629                                 info->tty->hw_stopped = 1;
630                                 info->IER &= ~UART_IER_THRI;
631                                 serial_out(info, UART_IER, info->IER);
632                         }
633                 }
634         }
635 }
636 #endif
637
638 /*
639  * This is the serial driver's interrupt routine for a single port
640  */
641 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
642 static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
643 {
644         u_char  events;
645         int     idx;
646         ser_info_t *info;
647         volatile struct smc_regs *smcp;
648         volatile struct scc_regs *sccp;
649         
650         info = (ser_info_t *)dev_id;
651
652         idx = PORT_NUM(info->state->smc_scc_num);
653         if (info->state->smc_scc_num & NUM_IS_SCC) {
654                 sccp = &pquicc->scc_regs[idx];
655                 events = sccp->scc_scce;
656                 if (events & SCCM_RX)
657                         receive_chars(info);
658                 if (events & SCCM_TX)
659                         transmit_chars(info);
660                 sccp->scc_scce = events;
661         } else {
662                 smcp = &pquicc->smc_regs[idx];
663                 events = smcp->smc_smce;
664                 if (events & SMCM_BRKE)
665                         receive_break(info);
666                 if (events & SMCM_RX)
667                         receive_chars(info);
668                 if (events & SMCM_TX)
669                         transmit_chars(info);
670                 smcp->smc_smce = events;
671         }
672         
673 #ifdef SERIAL_DEBUG_INTR
674         printk("rs_interrupt_single(%d, %x)...",
675                                         info->state->smc_scc_num, events);
676 #endif
677 #ifdef modem_control
678         check_modem_status(info);
679 #endif
680         info->last_active = jiffies;
681 #ifdef SERIAL_DEBUG_INTR
682         printk("end.\n");
683 #endif
684 }
685
686
687 /*
688  * -------------------------------------------------------------------
689  * Here ends the serial interrupt routines.
690  * -------------------------------------------------------------------
691  */
692
693
694 static void do_softint(void *private_)
695 {
696         ser_info_t      *info = (ser_info_t *) private_;
697         struct tty_struct       *tty;
698         
699         tty = info->tty;
700         if (!tty)
701                 return;
702
703         if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
704                 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
705                     tty->ldisc.write_wakeup)
706                         (tty->ldisc.write_wakeup)(tty);
707                 wake_up_interruptible(&tty->write_wait);
708         }
709 }
710
711
712 /*
713  * This routine is called from the scheduler tqueue when the interrupt
714  * routine has signalled that a hangup has occurred.  The path of
715  * hangup processing is:
716  *
717  *      serial interrupt routine -> (scheduler tqueue) ->
718  *      do_serial_hangup() -> tty->hangup() -> rs_hangup()
719  * 
720  */
721 static void do_serial_hangup(void *private_)
722 {
723         struct async_struct     *info = (struct async_struct *) private_;
724         struct tty_struct       *tty;
725         
726         tty = info->tty;
727         if (!tty)
728                 return;
729
730         tty_hangup(tty);
731 }
732
733
734 static int startup(ser_info_t *info)
735 {
736         unsigned long flags;
737         int     retval=0;
738         int     idx;
739         /*struct serial_state *state = info->state;*/
740         volatile struct smc_regs *smcp;
741         volatile struct scc_regs *sccp;
742         volatile struct smc_uart_pram   *up;
743         volatile struct uart_pram           *scup;
744
745
746         local_irq_save(flags);
747
748         if (info->flags & ASYNC_INITIALIZED) {
749                 goto errout;
750         }
751
752 #ifdef maybe
753         if (!state->port || !state->type) {
754                 if (info->tty)
755                         set_bit(TTY_IO_ERROR, &info->tty->flags);
756                 goto errout;
757         }
758 #endif
759
760 #ifdef SERIAL_DEBUG_OPEN
761         printk("starting up ttys%d (irq %d)...", info->line, state->irq);
762 #endif
763
764
765 #ifdef modem_control
766         info->MCR = 0;
767         if (info->tty->termios->c_cflag & CBAUD)
768                 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
769 #endif
770         
771         if (info->tty)
772                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
773
774         /*
775          * and set the speed of the serial port
776          */
777         change_speed(info);
778
779         idx = PORT_NUM(info->state->smc_scc_num);
780         if (info->state->smc_scc_num & NUM_IS_SCC) {
781                 sccp = &pquicc->scc_regs[idx];
782                 scup = &pquicc->pram[info->state->port].scc.pscc.u;
783
784                 scup->mrblr = RX_BUF_SIZE;
785                 scup->max_idl = RX_BUF_SIZE;
786
787                 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
788                 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
789
790         } else {
791                 smcp = &pquicc->smc_regs[idx];
792
793                 /* Enable interrupts and I/O.
794                 */
795                 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
796                 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
797
798                 /* We can tune the buffer length and idle characters
799                  * to take advantage of the entire incoming buffer size.
800                  * If mrblr is something other than 1, maxidl has to be
801                  * non-zero or we never get an interrupt.  The maxidl
802                  * is the number of character times we wait after reception
803                  * of the last character before we decide no more characters
804                  * are coming.
805                  */
806                 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
807                 /* holy unionized structures, Batman: */
808                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
809
810                 up->mrblr = RX_BUF_SIZE;
811                 up->max_idl = RX_BUF_SIZE;
812
813                 up->brkcr = 1;  /* number of break chars */
814         }
815
816         info->flags |= ASYNC_INITIALIZED;
817         local_irq_restore(flags);
818         return 0;
819         
820 errout:
821         local_irq_restore(flags);
822         return retval;
823 }
824
825 /*
826  * This routine will shutdown a serial port; interrupts are disabled, and
827  * DTR is dropped if the hangup on close termio flag is on.
828  */
829 static void shutdown(ser_info_t *info)
830 {
831         unsigned long   flags;
832         struct serial_state *state;
833         int             idx;
834         volatile struct smc_regs        *smcp;
835         volatile struct scc_regs        *sccp;
836
837         if (!(info->flags & ASYNC_INITIALIZED))
838                 return;
839
840         state = info->state;
841
842 #ifdef SERIAL_DEBUG_OPEN
843         printk("Shutting down serial port %d (irq %d)....", info->line,
844                state->irq);
845 #endif
846         
847         local_irq_save(flags);
848
849         idx = PORT_NUM(state->smc_scc_num);
850         if (state->smc_scc_num & NUM_IS_SCC) {
851                 sccp = &pquicc->scc_regs[idx];
852                 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
853 #ifdef CONFIG_SERIAL_CONSOLE
854                 /* We can't disable the transmitter if this is the
855                  * system console.
856                  */
857                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
858 #endif
859                 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
860         } else {
861                 smcp = &pquicc->smc_regs[idx];
862
863                 /* Disable interrupts and I/O.
864                  */
865                 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
866 #ifdef CONFIG_SERIAL_CONSOLE
867                 /* We can't disable the transmitter if this is the
868                  * system console.
869                  */
870                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
871 #endif
872                         smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
873         }
874         
875         if (info->tty)
876                 set_bit(TTY_IO_ERROR, &info->tty->flags);
877
878         info->flags &= ~ASYNC_INITIALIZED;
879         local_irq_restore(flags);
880 }
881
882 /*
883  * This routine is called to set the UART divisor registers to match
884  * the specified baud rate for a serial port.
885  */
886 static void change_speed(ser_info_t *info)
887 {
888         int     baud_rate;
889         unsigned cflag, cval, scval, prev_mode;
890         int     i, bits, sbits, idx;
891         unsigned long   flags;
892         struct serial_state *state;
893         volatile struct smc_regs        *smcp;
894         volatile struct scc_regs        *sccp;
895
896         if (!info->tty || !info->tty->termios)
897                 return;
898         cflag = info->tty->termios->c_cflag;
899
900         state = info->state;
901
902         /* Character length programmed into the mode register is the
903          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
904          * 1 or 2 stop bits, minus 1.
905          * The value 'bits' counts this for us.
906          */
907         cval = 0;
908         scval = 0;
909
910         /* byte size and parity */
911         switch (cflag & CSIZE) {
912               case CS5: bits = 5; break;
913               case CS6: bits = 6; break;
914               case CS7: bits = 7; break;
915               case CS8: bits = 8; break;
916               /* Never happens, but GCC is too dumb to figure it out */
917               default:  bits = 8; break;
918         }
919         sbits = bits - 5;
920
921         if (cflag & CSTOPB) {
922                 cval |= SMCMR_SL;       /* Two stops */
923                 scval |= SCU_PMSR_SL;
924                 bits++;
925         }
926         if (cflag & PARENB) {
927                 cval |= SMCMR_PEN;
928                 scval |= SCU_PMSR_PEN;
929                 bits++;
930         }
931         if (!(cflag & PARODD)) {
932                 cval |= SMCMR_PM_EVEN;
933                 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
934         }
935
936         /* Determine divisor based on baud rate */
937         i = cflag & CBAUD;
938         if (i >= (sizeof(baud_table)/sizeof(int)))
939                 baud_rate = 9600;
940         else
941                 baud_rate = baud_table[i];
942
943         info->timeout = (TX_BUF_SIZE*HZ*bits);
944         info->timeout += HZ/50;         /* Add .02 seconds of slop */
945
946 #ifdef modem_control
947         /* CTS flow control flag and modem status interrupts */
948         info->IER &= ~UART_IER_MSI;
949         if (info->flags & ASYNC_HARDPPS_CD)
950                 info->IER |= UART_IER_MSI;
951         if (cflag & CRTSCTS) {
952                 info->flags |= ASYNC_CTS_FLOW;
953                 info->IER |= UART_IER_MSI;
954         } else
955                 info->flags &= ~ASYNC_CTS_FLOW;
956         if (cflag & CLOCAL)
957                 info->flags &= ~ASYNC_CHECK_CD;
958         else {
959                 info->flags |= ASYNC_CHECK_CD;
960                 info->IER |= UART_IER_MSI;
961         }
962         serial_out(info, UART_IER, info->IER);
963 #endif
964
965         /*
966          * Set up parity check flag
967          */
968 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
969
970         info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
971         if (I_INPCK(info->tty))
972                 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
973         if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
974                 info->read_status_mask |= BD_SC_BR;
975         
976         /*
977          * Characters to ignore
978          */
979         info->ignore_status_mask = 0;
980         if (I_IGNPAR(info->tty))
981                 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
982         if (I_IGNBRK(info->tty)) {
983                 info->ignore_status_mask |= BD_SC_BR;
984                 /*
985                  * If we're ignore parity and break indicators, ignore 
986                  * overruns too.  (For real raw support).
987                  */
988                 if (I_IGNPAR(info->tty))
989                         info->ignore_status_mask |= BD_SC_OV;
990         }
991         /*
992          * !!! ignore all characters if CREAD is not set
993          */
994         if ((cflag & CREAD) == 0)
995          info->read_status_mask &= ~BD_SC_EMPTY;
996          local_irq_save(flags);
997
998          /* Start bit has not been added (so don't, because we would just
999           * subtract it later), and we need to add one for the number of
1000           * stops bits (there is always at least one).
1001           */
1002          bits++;
1003          idx = PORT_NUM(state->smc_scc_num);
1004          if (state->smc_scc_num & NUM_IS_SCC) {
1005          sccp = &pquicc->scc_regs[idx];
1006          sccp->scc_psmr = (sbits << 12) | scval;
1007      } else {
1008          smcp = &pquicc->smc_regs[idx];
1009
1010                 /* Set the mode register.  We want to keep a copy of the
1011                  * enables, because we want to put them back if they were
1012                  * present.
1013                  */
1014                 prev_mode = smcp->smc_smcmr;
1015                 smcp->smc_smcmr = smcr_mk_clen(bits) | cval |  SMCMR_SM_UART;
1016                 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
1017         }
1018
1019         m360_cpm_setbrg((state - rs_table), baud_rate);
1020
1021         local_irq_restore(flags);
1022 }
1023
1024 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
1025 {
1026         ser_info_t *info = (ser_info_t *)tty->driver_data;
1027         volatile QUICC_BD       *bdp;
1028
1029         if (serial_paranoia_check(info, tty->name, "rs_put_char"))
1030                 return;
1031
1032         if (!tty)
1033                 return;
1034
1035         bdp = info->tx_cur;
1036         while (bdp->status & BD_SC_READY);
1037
1038         /* *((char *)__va(bdp->buf)) = ch; */
1039         *((char *)bdp->buf) = ch;
1040         bdp->length = 1;
1041         bdp->status |= BD_SC_READY;
1042
1043         /* Get next BD.
1044         */
1045         if (bdp->status & BD_SC_WRAP)
1046                 bdp = info->tx_bd_base;
1047         else
1048                 bdp++;
1049
1050         info->tx_cur = (QUICC_BD *)bdp;
1051
1052 }
1053
1054 static int rs_360_write(struct tty_struct * tty, int from_user,
1055                     const unsigned char *buf, int count)
1056 {
1057         int     c, ret = 0;
1058         ser_info_t *info = (ser_info_t *)tty->driver_data;
1059         volatile QUICC_BD *bdp;
1060
1061 #ifdef CONFIG_KGDB
1062         /* Try to let stub handle output. Returns true if it did. */ 
1063         if (kgdb_output_string(buf, count))
1064                 return ret;
1065 #endif
1066
1067         if (serial_paranoia_check(info, tty->name, "rs_write"))
1068                 return 0;
1069
1070         if (!tty) 
1071                 return 0;
1072
1073         bdp = info->tx_cur;
1074
1075         while (1) {
1076                 c = min(count, TX_BUF_SIZE);
1077
1078                 if (c <= 0)
1079                         break;
1080
1081                 if (bdp->status & BD_SC_READY) {
1082                         info->flags |= TX_WAKEUP;
1083                         break;
1084                 }
1085
1086                 if (from_user) {
1087                         if (copy_from_user((void *)bdp->buf, buf, c)) {
1088                                 if (!ret)
1089                                         ret = -EFAULT;
1090                                 break;
1091                         }
1092                 } else {
1093                         /* memcpy(__va(bdp->buf), buf, c); */
1094                         memcpy((void *)bdp->buf, buf, c);
1095                 }
1096
1097                 bdp->length = c;
1098                 bdp->status |= BD_SC_READY;
1099
1100                 buf += c;
1101                 count -= c;
1102                 ret += c;
1103
1104                 /* Get next BD.
1105                 */
1106                 if (bdp->status & BD_SC_WRAP)
1107                         bdp = info->tx_bd_base;
1108                 else
1109                         bdp++;
1110                 info->tx_cur = (QUICC_BD *)bdp;
1111         }
1112         return ret;
1113 }
1114
1115 static int rs_360_write_room(struct tty_struct *tty)
1116 {
1117         ser_info_t *info = (ser_info_t *)tty->driver_data;
1118         int     ret;
1119
1120         if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1121                 return 0;
1122
1123         if ((info->tx_cur->status & BD_SC_READY) == 0) {
1124                 info->flags &= ~TX_WAKEUP;
1125                 ret = TX_BUF_SIZE;
1126         }
1127         else {
1128                 info->flags |= TX_WAKEUP;
1129                 ret = 0;
1130         }
1131         return ret;
1132 }
1133
1134 /* I could track this with transmit counters....maybe later.
1135 */
1136 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1137 {
1138         ser_info_t *info = (ser_info_t *)tty->driver_data;
1139                                 
1140         if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1141                 return 0;
1142         return 0;
1143 }
1144
1145 static void rs_360_flush_buffer(struct tty_struct *tty)
1146 {
1147         ser_info_t *info = (ser_info_t *)tty->driver_data;
1148                                 
1149         if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1150                 return;
1151
1152         /* There is nothing to "flush", whatever we gave the CPM
1153          * is on its way out.
1154          */
1155         wake_up_interruptible(&tty->write_wait);
1156         if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
1157             tty->ldisc.write_wakeup)
1158                 (tty->ldisc.write_wakeup)(tty);
1159         info->flags &= ~TX_WAKEUP;
1160 }
1161
1162 /*
1163  * This function is used to send a high-priority XON/XOFF character to
1164  * the device
1165  */
1166 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1167 {
1168         volatile QUICC_BD       *bdp;
1169
1170         ser_info_t *info = (ser_info_t *)tty->driver_data;
1171
1172         if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1173                 return;
1174
1175         bdp = info->tx_cur;
1176         while (bdp->status & BD_SC_READY);
1177
1178         /* *((char *)__va(bdp->buf)) = ch; */
1179         *((char *)bdp->buf) = ch;
1180         bdp->length = 1;
1181         bdp->status |= BD_SC_READY;
1182
1183         /* Get next BD.
1184         */
1185         if (bdp->status & BD_SC_WRAP)
1186                 bdp = info->tx_bd_base;
1187         else
1188                 bdp++;
1189
1190         info->tx_cur = (QUICC_BD *)bdp;
1191 }
1192
1193 /*
1194  * ------------------------------------------------------------
1195  * rs_throttle()
1196  * 
1197  * This routine is called by the upper-layer tty layer to signal that
1198  * incoming characters should be throttled.
1199  * ------------------------------------------------------------
1200  */
1201 static void rs_360_throttle(struct tty_struct * tty)
1202 {
1203         ser_info_t *info = (ser_info_t *)tty->driver_data;
1204 #ifdef SERIAL_DEBUG_THROTTLE
1205         char    buf[64];
1206         
1207         printk("throttle %s: %d....\n", _tty_name(tty, buf),
1208                tty->ldisc.chars_in_buffer(tty));
1209 #endif
1210
1211         if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1212                 return;
1213         
1214         if (I_IXOFF(tty))
1215                 rs_360_send_xchar(tty, STOP_CHAR(tty));
1216
1217 #ifdef modem_control
1218         if (tty->termios->c_cflag & CRTSCTS)
1219                 info->MCR &= ~UART_MCR_RTS;
1220
1221         local_irq_disable();
1222         serial_out(info, UART_MCR, info->MCR);
1223         local_irq_enable();
1224 #endif
1225 }
1226
1227 static void rs_360_unthrottle(struct tty_struct * tty)
1228 {
1229         ser_info_t *info = (ser_info_t *)tty->driver_data;
1230 #ifdef SERIAL_DEBUG_THROTTLE
1231         char    buf[64];
1232         
1233         printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1234                tty->ldisc.chars_in_buffer(tty));
1235 #endif
1236
1237         if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1238                 return;
1239         
1240         if (I_IXOFF(tty)) {
1241                 if (info->x_char)
1242                         info->x_char = 0;
1243                 else
1244                         rs_360_send_xchar(tty, START_CHAR(tty));
1245         }
1246 #ifdef modem_control
1247         if (tty->termios->c_cflag & CRTSCTS)
1248                 info->MCR |= UART_MCR_RTS;
1249         local_irq_disable();
1250         serial_out(info, UART_MCR, info->MCR);
1251         local_irq_enable();
1252 #endif
1253 }
1254
1255 /*
1256  * ------------------------------------------------------------
1257  * rs_ioctl() and friends
1258  * ------------------------------------------------------------
1259  */
1260
1261 #ifdef maybe
1262 /*
1263  * get_lsr_info - get line status register info
1264  *
1265  * Purpose: Let user call ioctl() to get info when the UART physically
1266  *          is emptied.  On bus types like RS485, the transmitter must
1267  *          release the bus after transmitting. This must be done when
1268  *          the transmit shift register is empty, not be done when the
1269  *          transmit holding register is empty.  This functionality
1270  *          allows an RS485 driver to be written in user space. 
1271  */
1272 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1273 {
1274         unsigned char status;
1275         unsigned int result;
1276
1277         local_irq_disable();
1278         status = serial_in(info, UART_LSR);
1279         local_irq_enable();
1280         result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1281         return put_user(result,value);
1282 }
1283 #endif
1284
1285 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1286 {
1287         ser_info_t *info = (ser_info_t *)tty->driver_data;
1288         unsigned int result = 0;
1289 #ifdef modem_control
1290         unsigned char control, status;
1291
1292         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1293                 return -ENODEV;
1294
1295         if (tty->flags & (1 << TTY_IO_ERROR))
1296                 return -EIO;
1297
1298         control = info->MCR;
1299         local_irq_disable();
1300         status = serial_in(info, UART_MSR);
1301         local_irq_enable();
1302         result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1303                 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1304 #ifdef TIOCM_OUT1
1305                 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1306                 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1307 #endif
1308                 | ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
1309                 | ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
1310                 | ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
1311                 | ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
1312 #endif
1313         return result;
1314 }
1315
1316 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1317                            unsigned int set, unsigned int clear)
1318 {
1319 #ifdef modem_control
1320         ser_info_t *info = (ser_info_t *)tty->driver_data;
1321         unsigned int arg;
1322
1323         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1324                 return -ENODEV;
1325
1326         if (tty->flags & (1 << TTY_IO_ERROR))
1327                 return -EIO;
1328
1329         if (set & TIOCM_RTS)
1330                 info->mcr |= UART_MCR_RTS;
1331         if (set & TIOCM_DTR)
1332                 info->mcr |= UART_MCR_DTR;
1333         if (clear & TIOCM_RTS)
1334                 info->MCR &= ~UART_MCR_RTS;
1335         if (clear & TIOCM_DTR)
1336                 info->MCR &= ~UART_MCR_DTR;
1337
1338 #ifdef TIOCM_OUT1
1339         if (set & TIOCM_OUT1)
1340                 info->MCR |= UART_MCR_OUT1;
1341         if (set & TIOCM_OUT2)
1342                 info->MCR |= UART_MCR_OUT2;
1343         if (clear & TIOCM_OUT1)
1344                 info->MCR &= ~UART_MCR_OUT1;
1345         if (clear & TIOCM_OUT2)
1346                 info->MCR &= ~UART_MCR_OUT2;
1347 #endif
1348
1349         local_irq_disable();
1350         serial_out(info, UART_MCR, info->MCR);
1351         local_irq_enable();
1352 #endif
1353         return 0;
1354 }
1355
1356 /* Sending a break is a two step process on the SMC/SCC.  It is accomplished
1357  * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1358  * command.  We take advantage of the begin/end functions to make this
1359  * happen.
1360  */
1361 static ushort   smc_chan_map[] = {
1362         CPM_CR_CH_SMC1,
1363         CPM_CR_CH_SMC2
1364 };
1365
1366 static ushort   scc_chan_map[] = {
1367         CPM_CR_CH_SCC1,
1368         CPM_CR_CH_SCC2,
1369         CPM_CR_CH_SCC3,
1370         CPM_CR_CH_SCC4
1371 };
1372
1373 static void begin_break(ser_info_t *info)
1374 {
1375         volatile QUICC *cp;
1376         ushort  chan;
1377         int     idx;
1378
1379         cp = pquicc;
1380
1381         idx = PORT_NUM(info->state->smc_scc_num);
1382         if (info->state->smc_scc_num & NUM_IS_SCC)
1383                 chan = scc_chan_map[idx];
1384         else
1385                 chan = smc_chan_map[idx];
1386
1387         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1388         while (cp->cp_cr & CPM_CR_FLG);
1389 }
1390
1391 static void end_break(ser_info_t *info)
1392 {
1393         volatile QUICC *cp;
1394         ushort  chan;
1395         int idx;
1396
1397         cp = pquicc;
1398
1399         idx = PORT_NUM(info->state->smc_scc_num);
1400         if (info->state->smc_scc_num & NUM_IS_SCC)
1401                 chan = scc_chan_map[idx];
1402         else
1403                 chan = smc_chan_map[idx];
1404
1405         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1406         while (cp->cp_cr & CPM_CR_FLG);
1407 }
1408
1409 /*
1410  * This routine sends a break character out the serial port.
1411  */
1412 static void send_break(ser_info_t *info, int duration)
1413 {
1414         current->state = TASK_INTERRUPTIBLE;
1415 #ifdef SERIAL_DEBUG_SEND_BREAK
1416         printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1417 #endif
1418         begin_break(info);
1419         schedule_timeout(duration);
1420         end_break(info);
1421 #ifdef SERIAL_DEBUG_SEND_BREAK
1422         printk("done jiffies=%lu\n", jiffies);
1423 #endif
1424 }
1425
1426
1427 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1428                     unsigned int cmd, unsigned long arg)
1429 {
1430         int error;
1431         ser_info_t *info = (ser_info_t *)tty->driver_data;
1432         int retval;
1433         struct async_icount cnow; 
1434         /* struct async_icount_24 cnow;*/       /* kernel counter temps */
1435         struct serial_icounter_struct *p_cuser; /* user space */
1436
1437         if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1438                 return -ENODEV;
1439
1440         if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1441                 if (tty->flags & (1 << TTY_IO_ERROR))
1442                     return -EIO;
1443         }
1444         
1445         switch (cmd) {
1446                 case TCSBRK:    /* SVID version: non-zero arg --> no break */
1447                         retval = tty_check_change(tty);
1448                         if (retval)
1449                                 return retval;
1450                         tty_wait_until_sent(tty, 0);
1451                         if (signal_pending(current))
1452                                 return -EINTR;
1453                         if (!arg) {
1454                                 send_break(info, HZ/4); /* 1/4 second */
1455                                 if (signal_pending(current))
1456                                         return -EINTR;
1457                         }
1458                         return 0;
1459                 case TCSBRKP:   /* support for POSIX tcsendbreak() */
1460                         retval = tty_check_change(tty);
1461                         if (retval)
1462                                 return retval;
1463                         tty_wait_until_sent(tty, 0);
1464                         if (signal_pending(current))
1465                                 return -EINTR;
1466                         send_break(info, arg ? arg*(HZ/10) : HZ/4);
1467                         if (signal_pending(current))
1468                                 return -EINTR;
1469                         return 0;
1470                 case TIOCSBRK:
1471                         retval = tty_check_change(tty);
1472                         if (retval)
1473                                 return retval;
1474                         tty_wait_until_sent(tty, 0);
1475                         begin_break(info);
1476                         return 0;
1477                 case TIOCCBRK:
1478                         retval = tty_check_change(tty);
1479                         if (retval)
1480                                 return retval;
1481                         end_break(info);
1482                         return 0;
1483                 case TIOCGSOFTCAR:
1484                         /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1485                         put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1486                         return 0;
1487                 case TIOCSSOFTCAR:
1488                         error = get_user(arg, (unsigned int *) arg); 
1489                         if (error)
1490                                 return error;
1491                         tty->termios->c_cflag =
1492                                 ((tty->termios->c_cflag & ~CLOCAL) |
1493                                  (arg ? CLOCAL : 0));
1494                         return 0;
1495 #ifdef maybe
1496                 case TIOCSERGETLSR: /* Get line status register */
1497                         return get_lsr_info(info, (unsigned int *) arg);
1498 #endif
1499                 /*
1500                  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1501                  * - mask passed in arg for lines of interest
1502                  *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1503                  * Caller should use TIOCGICOUNT to see which one it was
1504                  */
1505                  case TIOCMIWAIT:
1506 #ifdef modem_control
1507                         local_irq_disable();
1508                         /* note the counters on entry */
1509                         cprev = info->state->icount;
1510                         local_irq_enable();
1511                         while (1) {
1512                                 interruptible_sleep_on(&info->delta_msr_wait);
1513                                 /* see if a signal did it */
1514                                 if (signal_pending(current))
1515                                         return -ERESTARTSYS;
1516                                 local_irq_disable();
1517                                 cnow = info->state->icount; /* atomic copy */
1518                                 local_irq_enable();
1519                                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
1520                                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1521                                         return -EIO; /* no change => error */
1522                                 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1523                                      ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1524                                      ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
1525                                      ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1526                                         return 0;
1527                                 }
1528                                 cprev = cnow;
1529                         }
1530                         /* NOTREACHED */
1531 #else
1532                         return 0;
1533 #endif
1534
1535                 /* 
1536                  * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1537                  * Return: write counters to the user passed counter struct
1538                  * NB: both 1->0 and 0->1 transitions are counted except for
1539                  *     RI where only 0->1 is counted.
1540                  */
1541                 case TIOCGICOUNT:
1542                         local_irq_disable();
1543                         cnow = info->state->icount;
1544                         local_irq_enable();
1545                         p_cuser = (struct serial_icounter_struct *) arg;
1546 /*                      error = put_user(cnow.cts, &p_cuser->cts); */
1547 /*                      if (error) return error; */
1548 /*                      error = put_user(cnow.dsr, &p_cuser->dsr); */
1549 /*                      if (error) return error; */
1550 /*                      error = put_user(cnow.rng, &p_cuser->rng); */
1551 /*                      if (error) return error; */
1552 /*                      error = put_user(cnow.dcd, &p_cuser->dcd); */
1553 /*                      if (error) return error; */
1554
1555                         put_user(cnow.cts, &p_cuser->cts);
1556                         put_user(cnow.dsr, &p_cuser->dsr);
1557                         put_user(cnow.rng, &p_cuser->rng);
1558                         put_user(cnow.dcd, &p_cuser->dcd);
1559                         return 0;
1560
1561                 default:
1562                         return -ENOIOCTLCMD;
1563                 }
1564         return 0;
1565 }
1566
1567 /* FIX UP modem control here someday......
1568 */
1569 static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
1570 {
1571         ser_info_t *info = (ser_info_t *)tty->driver_data;
1572
1573         if (   (tty->termios->c_cflag == old_termios->c_cflag)
1574             && (   RELEVANT_IFLAG(tty->termios->c_iflag) 
1575                 == RELEVANT_IFLAG(old_termios->c_iflag)))
1576           return;
1577
1578         change_speed(info);
1579
1580 #ifdef modem_control
1581         /* Handle transition to B0 status */
1582         if ((old_termios->c_cflag & CBAUD) &&
1583             !(tty->termios->c_cflag & CBAUD)) {
1584                 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1585                 local_irq_disable();
1586                 serial_out(info, UART_MCR, info->MCR);
1587                 local_irq_enable();
1588         }
1589         
1590         /* Handle transition away from B0 status */
1591         if (!(old_termios->c_cflag & CBAUD) &&
1592             (tty->termios->c_cflag & CBAUD)) {
1593                 info->MCR |= UART_MCR_DTR;
1594                 if (!tty->hw_stopped ||
1595                     !(tty->termios->c_cflag & CRTSCTS)) {
1596                         info->MCR |= UART_MCR_RTS;
1597                 }
1598                 local_irq_disable();
1599                 serial_out(info, UART_MCR, info->MCR);
1600                 local_irq_enable();
1601         }
1602         
1603         /* Handle turning off CRTSCTS */
1604         if ((old_termios->c_cflag & CRTSCTS) &&
1605             !(tty->termios->c_cflag & CRTSCTS)) {
1606                 tty->hw_stopped = 0;
1607                 rs_360_start(tty);
1608         }
1609 #endif
1610
1611 #if 0
1612         /*
1613          * No need to wake up processes in open wait, since they
1614          * sample the CLOCAL flag once, and don't recheck it.
1615          * XXX  It's not clear whether the current behavior is correct
1616          * or not.  Hence, this may change.....
1617          */
1618         if (!(old_termios->c_cflag & CLOCAL) &&
1619             (tty->termios->c_cflag & CLOCAL))
1620                 wake_up_interruptible(&info->open_wait);
1621 #endif
1622 }
1623
1624 /*
1625  * ------------------------------------------------------------
1626  * rs_close()
1627  * 
1628  * This routine is called when the serial port gets closed.  First, we
1629  * wait for the last remaining data to be sent.  Then, we unlink its
1630  * async structure from the interrupt chain if necessary, and we free
1631  * that IRQ if nothing is left in the chain.
1632  * ------------------------------------------------------------
1633  */
1634 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1635 {
1636         ser_info_t *info = (ser_info_t *)tty->driver_data;
1637         /* struct async_state *state; */
1638         struct serial_state *state;
1639         unsigned long   flags;
1640         int             idx;
1641         volatile struct smc_regs        *smcp;
1642         volatile struct scc_regs        *sccp;
1643
1644         if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1645                 return;
1646
1647         state = info->state;
1648         
1649         local_irq_save(flags);
1650         
1651         if (tty_hung_up_p(filp)) {
1652                 DBG_CNT("before DEC-hung");
1653                 local_irq_restore(flags);
1654                 return;
1655         }
1656         
1657 #ifdef SERIAL_DEBUG_OPEN
1658         printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1659 #endif
1660         if ((tty->count == 1) && (state->count != 1)) {
1661                 /*
1662                  * Uh, oh.  tty->count is 1, which means that the tty
1663                  * structure will be freed.  state->count should always
1664                  * be one in these conditions.  If it's greater than
1665                  * one, we've got real problems, since it means the
1666                  * serial port won't be shutdown.
1667                  */
1668                 printk("rs_close: bad serial port count; tty->count is 1, "
1669                        "state->count is %d\n", state->count);
1670                 state->count = 1;
1671         }
1672         if (--state->count < 0) {
1673                 printk("rs_close: bad serial port count for ttys%d: %d\n",
1674                        info->line, state->count);
1675                 state->count = 0;
1676         }
1677         if (state->count) {
1678                 DBG_CNT("before DEC-2");
1679                 local_irq_restore(flags);
1680                 return;
1681         }
1682         info->flags |= ASYNC_CLOSING;
1683         /*
1684          * Now we wait for the transmit buffer to clear; and we notify 
1685          * the line discipline to only process XON/XOFF characters.
1686          */
1687         tty->closing = 1;
1688         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1689                 tty_wait_until_sent(tty, info->closing_wait);
1690         /*
1691          * At this point we stop accepting input.  To do this, we
1692          * disable the receive line status interrupts, and tell the
1693          * interrupt driver to stop checking the data ready bit in the
1694          * line status register.
1695          */
1696         info->read_status_mask &= ~BD_SC_EMPTY;
1697         if (info->flags & ASYNC_INITIALIZED) {
1698
1699                 idx = PORT_NUM(info->state->smc_scc_num);
1700                 if (info->state->smc_scc_num & NUM_IS_SCC) {
1701                         sccp = &pquicc->scc_regs[idx];
1702                         sccp->scc_sccm &= ~UART_SCCM_RX;
1703                         sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1704                 } else {
1705                         smcp = &pquicc->smc_regs[idx];
1706                         smcp->smc_smcm &= ~SMCM_RX;
1707                         smcp->smc_smcmr &= ~SMCMR_REN;
1708                 }
1709                 /*
1710                  * Before we drop DTR, make sure the UART transmitter
1711                  * has completely drained; this is especially
1712                  * important if there is a transmit FIFO!
1713                  */
1714                 rs_360_wait_until_sent(tty, info->timeout);
1715         }
1716         shutdown(info);
1717         if (tty->driver->flush_buffer)
1718                 tty->driver->flush_buffer(tty);
1719         if (tty->ldisc.flush_buffer)
1720                 tty->ldisc.flush_buffer(tty);
1721         tty->closing = 0;
1722         info->event = 0;
1723         info->tty = 0;
1724         if (info->blocked_open) {
1725                 if (info->close_delay) {
1726                         current->state = TASK_INTERRUPTIBLE;
1727                         schedule_timeout(info->close_delay);
1728                 }
1729                 wake_up_interruptible(&info->open_wait);
1730         }
1731         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1732         wake_up_interruptible(&info->close_wait);
1733         local_irq_restore(flags);
1734 }
1735
1736 /*
1737  * rs_wait_until_sent() --- wait until the transmitter is empty
1738  */
1739 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1740 {
1741         ser_info_t *info = (ser_info_t *)tty->driver_data;
1742         unsigned long orig_jiffies, char_time;
1743         /*int lsr;*/
1744         volatile QUICC_BD *bdp;
1745         
1746         if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1747                 return;
1748
1749 #ifdef maybe
1750         if (info->state->type == PORT_UNKNOWN)
1751                 return;
1752 #endif
1753
1754         orig_jiffies = jiffies;
1755         /*
1756          * Set the check interval to be 1/5 of the estimated time to
1757          * send a single character, and make it at least 1.  The check
1758          * interval should also be less than the timeout.
1759          * 
1760          * Note: we have to use pretty tight timings here to satisfy
1761          * the NIST-PCTS.
1762          */
1763         char_time = 1;
1764         if (timeout)
1765                 char_time = min(char_time, (unsigned long)timeout);
1766 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1767         printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1768         printk("jiff=%lu...", jiffies);
1769 #endif
1770
1771         /* We go through the loop at least once because we can't tell
1772          * exactly when the last character exits the shifter.  There can
1773          * be at least two characters waiting to be sent after the buffers
1774          * are empty.
1775          */
1776         do {
1777 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1778                 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1779 #endif
1780                 current->state = TASK_INTERRUPTIBLE;
1781 /*              current->counter = 0;    make us low-priority */
1782                 schedule_timeout(char_time);
1783                 if (signal_pending(current))
1784                         break;
1785                 if (timeout && ((orig_jiffies + timeout) < jiffies))
1786                         break;
1787                 /* The 'tx_cur' is really the next buffer to send.  We
1788                  * have to back up to the previous BD and wait for it
1789                  * to go.  This isn't perfect, because all this indicates
1790                  * is the buffer is available.  There are still characters
1791                  * in the CPM FIFO.
1792                  */
1793                 bdp = info->tx_cur;
1794                 if (bdp == info->tx_bd_base)
1795                         bdp += (TX_NUM_FIFO-1);
1796                 else
1797                         bdp--;
1798         } while (bdp->status & BD_SC_READY);
1799         current->state = TASK_RUNNING;
1800 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1801         printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1802 #endif
1803 }
1804
1805 /*
1806  * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1807  */
1808 static void rs_360_hangup(struct tty_struct *tty)
1809 {
1810         ser_info_t *info = (ser_info_t *)tty->driver_data;
1811         struct serial_state *state = info->state;
1812         
1813         if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1814                 return;
1815
1816         state = info->state;
1817         
1818         rs_360_flush_buffer(tty);
1819         shutdown(info);
1820         info->event = 0;
1821         state->count = 0;
1822         info->flags &= ~ASYNC_NORMAL_ACTIVE;
1823         info->tty = 0;
1824         wake_up_interruptible(&info->open_wait);
1825 }
1826
1827 /*
1828  * ------------------------------------------------------------
1829  * rs_open() and friends
1830  * ------------------------------------------------------------
1831  */
1832 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1833                            ser_info_t *info)
1834 {
1835 #ifdef DO_THIS_LATER
1836         DECLARE_WAITQUEUE(wait, current);
1837 #endif
1838         struct serial_state *state = info->state;
1839         int             retval;
1840         int             do_clocal = 0;
1841
1842         /*
1843          * If the device is in the middle of being closed, then block
1844          * until it's done, and then try again.
1845          */
1846         if (tty_hung_up_p(filp) ||
1847             (info->flags & ASYNC_CLOSING)) {
1848                 if (info->flags & ASYNC_CLOSING)
1849                         interruptible_sleep_on(&info->close_wait);
1850 #ifdef SERIAL_DO_RESTART
1851                 if (info->flags & ASYNC_HUP_NOTIFY)
1852                         return -EAGAIN;
1853                 else
1854                         return -ERESTARTSYS;
1855 #else
1856                 return -EAGAIN;
1857 #endif
1858         }
1859
1860         /*
1861          * If non-blocking mode is set, or the port is not enabled,
1862          * then make the check up front and then exit.
1863          * If this is an SMC port, we don't have modem control to wait
1864          * for, so just get out here.
1865          */
1866         if ((filp->f_flags & O_NONBLOCK) ||
1867             (tty->flags & (1 << TTY_IO_ERROR)) ||
1868             !(info->state->smc_scc_num & NUM_IS_SCC)) {
1869                 info->flags |= ASYNC_NORMAL_ACTIVE;
1870                 return 0;
1871         }
1872
1873         if (tty->termios->c_cflag & CLOCAL)
1874                 do_clocal = 1;
1875         
1876         /*
1877          * Block waiting for the carrier detect and the line to become
1878          * free (i.e., not in use by the callout).  While we are in
1879          * this loop, state->count is dropped by one, so that
1880          * rs_close() knows when to free things.  We restore it upon
1881          * exit, either normal or abnormal.
1882          */
1883         retval = 0;
1884 #ifdef DO_THIS_LATER
1885         add_wait_queue(&info->open_wait, &wait);
1886 #ifdef SERIAL_DEBUG_OPEN
1887         printk("block_til_ready before block: ttys%d, count = %d\n",
1888                state->line, state->count);
1889 #endif
1890         local_irq_disable();
1891         if (!tty_hung_up_p(filp)) 
1892                 state->count--;
1893         local_irq_enable();
1894         info->blocked_open++;
1895         while (1) {
1896                 local_irq_disable();
1897                 if (tty->termios->c_cflag & CBAUD)
1898                         serial_out(info, UART_MCR,
1899                                    serial_inp(info, UART_MCR) |
1900                                    (UART_MCR_DTR | UART_MCR_RTS));
1901                 local_irq_enable();
1902                 set_current_state(TASK_INTERRUPTIBLE);
1903                 if (tty_hung_up_p(filp) ||
1904                     !(info->flags & ASYNC_INITIALIZED)) {
1905 #ifdef SERIAL_DO_RESTART
1906                         if (info->flags & ASYNC_HUP_NOTIFY)
1907                                 retval = -EAGAIN;
1908                         else
1909                                 retval = -ERESTARTSYS;  
1910 #else
1911                         retval = -EAGAIN;
1912 #endif
1913                         break;
1914                 }
1915                 if (!(info->flags & ASYNC_CLOSING) &&
1916                     (do_clocal || (serial_in(info, UART_MSR) &
1917                                    UART_MSR_DCD)))
1918                         break;
1919                 if (signal_pending(current)) {
1920                         retval = -ERESTARTSYS;
1921                         break;
1922                 }
1923 #ifdef SERIAL_DEBUG_OPEN
1924                 printk("block_til_ready blocking: ttys%d, count = %d\n",
1925                        info->line, state->count);
1926 #endif
1927                 schedule();
1928         }
1929         current->state = TASK_RUNNING;
1930         remove_wait_queue(&info->open_wait, &wait);
1931         if (!tty_hung_up_p(filp))
1932                 state->count++;
1933         info->blocked_open--;
1934 #ifdef SERIAL_DEBUG_OPEN
1935         printk("block_til_ready after blocking: ttys%d, count = %d\n",
1936                info->line, state->count);
1937 #endif
1938 #endif /* DO_THIS_LATER */
1939         if (retval)
1940                 return retval;
1941         info->flags |= ASYNC_NORMAL_ACTIVE;
1942         return 0;
1943 }
1944
1945 static int get_async_struct(int line, ser_info_t **ret_info)
1946 {
1947         struct serial_state *sstate;
1948
1949         sstate = rs_table + line;
1950         if (sstate->info) {
1951                 sstate->count++;
1952                 *ret_info = (ser_info_t *)sstate->info;
1953                 return 0;
1954         }
1955         else {
1956                 return -ENOMEM;
1957         }
1958 }
1959
1960 /*
1961  * This routine is called whenever a serial port is opened.  It
1962  * enables interrupts for a serial port, linking in its async structure into
1963  * the IRQ chain.   It also performs the serial-specific
1964  * initialization for the tty structure.
1965  */
1966 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1967 {
1968         ser_info_t      *info;
1969         int             retval, line;
1970
1971         line = tty->index;
1972         if ((line < 0) || (line >= NR_PORTS))
1973                 return -ENODEV;
1974         retval = get_async_struct(line, &info);
1975         if (retval)
1976                 return retval;
1977         if (serial_paranoia_check(info, tty->name, "rs_open"))
1978                 return -ENODEV;
1979
1980 #ifdef SERIAL_DEBUG_OPEN
1981         printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1982 #endif
1983         tty->driver_data = info;
1984         info->tty = tty;
1985
1986         /*
1987          * Start up serial port
1988          */
1989         retval = startup(info);
1990         if (retval)
1991                 return retval;
1992
1993         retval = block_til_ready(tty, filp, info);
1994         if (retval) {
1995 #ifdef SERIAL_DEBUG_OPEN
1996                 printk("rs_open returning after block_til_ready with %d\n",
1997                        retval);
1998 #endif
1999                 return retval;
2000         }
2001
2002 #ifdef SERIAL_DEBUG_OPEN
2003         printk("rs_open %s successful...", tty->name);
2004 #endif
2005         return 0;
2006 }
2007
2008 /*
2009  * /proc fs routines....
2010  */
2011
2012 static inline int line_info(char *buf, struct serial_state *state)
2013 {
2014 #ifdef notdef
2015         struct async_struct *info = state->info, scr_info;
2016         char    stat_buf[30], control, status;
2017 #endif
2018         int     ret;
2019
2020         ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
2021                       state->line,
2022                       (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
2023                       (unsigned int)(state->port), state->irq);
2024
2025         if (!state->port || (state->type == PORT_UNKNOWN)) {
2026                 ret += sprintf(buf+ret, "\n");
2027                 return ret;
2028         }
2029
2030 #ifdef notdef
2031         /*
2032          * Figure out the current RS-232 lines
2033          */
2034         if (!info) {
2035                 info = &scr_info;       /* This is just for serial_{in,out} */
2036
2037                 info->magic = SERIAL_MAGIC;
2038                 info->port = state->port;
2039                 info->flags = state->flags;
2040                 info->quot = 0;
2041                 info->tty = 0;
2042         }
2043         local_irq_disable();
2044         status = serial_in(info, UART_MSR);
2045         control = info ? info->MCR : serial_in(info, UART_MCR);
2046         local_irq_enable();
2047         
2048         stat_buf[0] = 0;
2049         stat_buf[1] = 0;
2050         if (control & UART_MCR_RTS)
2051                 strcat(stat_buf, "|RTS");
2052         if (status & UART_MSR_CTS)
2053                 strcat(stat_buf, "|CTS");
2054         if (control & UART_MCR_DTR)
2055                 strcat(stat_buf, "|DTR");
2056         if (status & UART_MSR_DSR)
2057                 strcat(stat_buf, "|DSR");
2058         if (status & UART_MSR_DCD)
2059                 strcat(stat_buf, "|CD");
2060         if (status & UART_MSR_RI)
2061                 strcat(stat_buf, "|RI");
2062
2063         if (info->quot) {
2064                 ret += sprintf(buf+ret, " baud:%d",
2065                                state->baud_base / info->quot);
2066         }
2067
2068         ret += sprintf(buf+ret, " tx:%d rx:%d",
2069                       state->icount.tx, state->icount.rx);
2070
2071         if (state->icount.frame)
2072                 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2073         
2074         if (state->icount.parity)
2075                 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2076         
2077         if (state->icount.brk)
2078                 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);  
2079
2080         if (state->icount.overrun)
2081                 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2082
2083         /*
2084          * Last thing is the RS-232 status lines
2085          */
2086         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2087 #endif
2088         return ret;
2089 }
2090
2091 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2092                  int *eof, void *data)
2093 {
2094         int i, len = 0;
2095         off_t   begin = 0;
2096
2097         len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2098         for (i = 0; i < NR_PORTS && len < 4000; i++) {
2099                 len += line_info(page + len, &rs_table[i]);
2100                 if (len+begin > off+count)
2101                         goto done;
2102                 if (len+begin < off) {
2103                         begin += len;
2104                         len = 0;
2105                 }
2106         }
2107         *eof = 1;
2108 done:
2109         if (off >= len+begin)
2110                 return 0;
2111         *start = page + (begin-off);
2112         return ((count < begin+len-off) ? count : begin+len-off);
2113 }
2114
2115 /*
2116  * ---------------------------------------------------------------------
2117  * rs_init() and friends
2118  *
2119  * rs_init() is called at boot-time to initialize the serial driver.
2120  * ---------------------------------------------------------------------
2121  */
2122
2123 /*
2124  * This routine prints out the appropriate serial driver version
2125  * number, and identifies which options were configured into this
2126  * driver.
2127  */
2128 static _INLINE_ void show_serial_version(void)
2129 {
2130         printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2131 }
2132
2133
2134 /*
2135  * The serial console driver used during boot.  Note that these names
2136  * clash with those found in "serial.c", so we currently can't support
2137  * the 16xxx uarts and these at the same time.  I will fix this to become
2138  * an indirect function call from tty_io.c (or something).
2139  */
2140
2141 #ifdef CONFIG_SERIAL_CONSOLE
2142
2143 /*
2144  * Print a string to the serial port trying not to disturb any possible
2145  * real use of the port...
2146  */
2147 static void my_console_write(int idx, const char *s,
2148                                 unsigned count)
2149 {
2150         struct          serial_state    *ser;
2151         ser_info_t              *info;
2152         unsigned                i;
2153         QUICC_BD                *bdp, *bdbase;
2154         volatile struct smc_uart_pram   *up;
2155         volatile        u_char          *cp;
2156
2157         ser = rs_table + idx;
2158
2159
2160         /* If the port has been initialized for general use, we have
2161          * to use the buffer descriptors allocated there.  Otherwise,
2162          * we simply use the single buffer allocated.
2163          */
2164         if ((info = (ser_info_t *)ser->info) != NULL) {
2165                 bdp = info->tx_cur;
2166                 bdbase = info->tx_bd_base;
2167         }
2168         else {
2169                 /* Pointer to UART in parameter ram.
2170                 */
2171                 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2172                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2173
2174                 /* Get the address of the host memory buffer.
2175                  */
2176                 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2177         }
2178
2179         /*
2180          * We need to gracefully shut down the transmitter, disable
2181          * interrupts, then send our bytes out.
2182          */
2183
2184         /*
2185          * Now, do each character.  This is not as bad as it looks
2186          * since this is a holding FIFO and not a transmitting FIFO.
2187          * We could add the complexity of filling the entire transmit
2188          * buffer, but we would just wait longer between accesses......
2189          */
2190         for (i = 0; i < count; i++, s++) {
2191                 /* Wait for transmitter fifo to empty.
2192                  * Ready indicates output is ready, and xmt is doing
2193                  * that, not that it is ready for us to send.
2194                  */
2195                 while (bdp->status & BD_SC_READY);
2196
2197                 /* Send the character out.
2198                  */
2199                 cp = bdp->buf;
2200                 *cp = *s;
2201                 
2202                 bdp->length = 1;
2203                 bdp->status |= BD_SC_READY;
2204
2205                 if (bdp->status & BD_SC_WRAP)
2206                         bdp = bdbase;
2207                 else
2208                         bdp++;
2209
2210                 /* if a LF, also do CR... */
2211                 if (*s == 10) {
2212                         while (bdp->status & BD_SC_READY);
2213                         /* cp = __va(bdp->buf); */
2214                         cp = bdp->buf;
2215                         *cp = 13;
2216                         bdp->length = 1;
2217                         bdp->status |= BD_SC_READY;
2218
2219                         if (bdp->status & BD_SC_WRAP) {
2220                                 bdp = bdbase;
2221                         }
2222                         else {
2223                                 bdp++;
2224                         }
2225                 }
2226         }
2227
2228         /*
2229          * Finally, Wait for transmitter & holding register to empty
2230          *  and restore the IER
2231          */
2232         while (bdp->status & BD_SC_READY);
2233
2234         if (info)
2235                 info->tx_cur = (QUICC_BD *)bdp;
2236 }
2237
2238 static void serial_console_write(struct console *c, const char *s,
2239                                 unsigned count)
2240 {
2241 #ifdef CONFIG_KGDB
2242         /* Try to let stub handle output. Returns true if it did. */ 
2243         if (kgdb_output_string(s, count))
2244                 return;
2245 #endif
2246         my_console_write(c->index, s, count);
2247 }
2248
2249
2250
2251 /*void console_print_68360(const char *p)
2252 {
2253         const char *cp = p;
2254         int i;
2255
2256         for (i=0;cp[i]!=0;i++);
2257
2258         serial_console_write (p, i);
2259
2260         //Comment this if you want to have a strict interrupt-driven output
2261         //rs_fair_output();
2262
2263         return;
2264 }*/
2265
2266
2267
2268
2269
2270
2271 #ifdef CONFIG_XMON
2272 int
2273 xmon_360_write(const char *s, unsigned count)
2274 {
2275         my_console_write(0, s, count);
2276         return(count);
2277 }
2278 #endif
2279
2280 #ifdef CONFIG_KGDB
2281 void
2282 putDebugChar(char ch)
2283 {
2284         my_console_write(0, &ch, 1);
2285 }
2286 #endif
2287
2288 /*
2289  * Receive character from the serial port.  This only works well
2290  * before the port is initialized for real use.
2291  */
2292 static int my_console_wait_key(int idx, int xmon, char *obuf)
2293 {
2294         struct serial_state             *ser;
2295         u_char                  c, *cp;
2296         ser_info_t              *info;
2297         QUICC_BD                *bdp;
2298         volatile struct smc_uart_pram   *up;
2299         int                             i;
2300
2301         ser = rs_table + idx;
2302
2303         /* Get the address of the host memory buffer.
2304          * If the port has been initialized for general use, we must
2305          * use information from the port structure.
2306          */
2307         if ((info = (ser_info_t *)ser->info))
2308                 bdp = info->rx_cur;
2309         else
2310                 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2311                 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2312
2313         /* Pointer to UART in parameter ram.
2314          */
2315         /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2316         up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2317
2318         /*
2319          * We need to gracefully shut down the receiver, disable
2320          * interrupts, then read the input.
2321          * XMON just wants a poll.  If no character, return -1, else
2322          * return the character.
2323          */
2324         if (!xmon) {
2325                 while (bdp->status & BD_SC_EMPTY);
2326         }
2327         else {
2328                 if (bdp->status & BD_SC_EMPTY)
2329                         return -1;
2330         }
2331
2332         cp = (char *)bdp->buf;
2333
2334         if (obuf) {
2335                 i = c = bdp->length;
2336                 while (i-- > 0)
2337                         *obuf++ = *cp++;
2338         }
2339         else {
2340                 c = *cp;
2341         }
2342         bdp->status |= BD_SC_EMPTY;
2343
2344         if (info) {
2345                 if (bdp->status & BD_SC_WRAP) {
2346                         bdp = info->rx_bd_base;
2347                 }
2348                 else {
2349                         bdp++;
2350                 }
2351                 info->rx_cur = (QUICC_BD *)bdp;
2352         }
2353
2354         return((int)c);
2355 }
2356
2357 static int serial_console_wait_key(struct console *co)
2358 {
2359         return(my_console_wait_key(co->index, 0, NULL));
2360 }
2361
2362 #ifdef CONFIG_XMON
2363 int
2364 xmon_360_read_poll(void)
2365 {
2366         return(my_console_wait_key(0, 1, NULL));
2367 }
2368
2369 int
2370 xmon_360_read_char(void)
2371 {
2372         return(my_console_wait_key(0, 0, NULL));
2373 }
2374 #endif
2375
2376 #ifdef CONFIG_KGDB
2377 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2378 static int kgdb_chars;
2379
2380 unsigned char
2381 getDebugChar(void)
2382 {
2383         if (kgdb_chars <= 0) {
2384                 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2385                 kgdp = kgdb_buf;
2386         }
2387         kgdb_chars--;
2388
2389         return(*kgdp++);
2390 }
2391
2392 void kgdb_interruptible(int state)
2393 {
2394 }
2395 void kgdb_map_scc(void)
2396 {
2397         struct          serial_state *ser;
2398         uint            mem_addr;
2399         volatile        QUICC_BD                *bdp;
2400         volatile        smc_uart_t      *up;
2401
2402         cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2403
2404         /* To avoid data cache CPM DMA coherency problems, allocate a
2405          * buffer in the CPM DPRAM.  This will work until the CPM and
2406          * serial ports are initialized.  At that time a memory buffer
2407          * will be allocated.
2408          * The port is already initialized from the boot procedure, all
2409          * we do here is give it a different buffer and make it a FIFO.
2410          */
2411
2412         ser = rs_table;
2413
2414         /* Right now, assume we are using SMCs.
2415         */
2416         up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2417
2418         /* Allocate space for an input FIFO, plus a few bytes for output.
2419          * Allocate bytes to maintain word alignment.
2420          */
2421         mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2422
2423         /* Set the physical address of the host memory buffers in
2424          * the buffer descriptors.
2425          */
2426         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2427         bdp->buf = mem_addr;
2428
2429         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2430         bdp->buf = mem_addr+RX_BUF_SIZE;
2431
2432         up->smc_mrblr = RX_BUF_SIZE;            /* receive buffer length */
2433         up->smc_maxidl = RX_BUF_SIZE;
2434 }
2435 #endif
2436
2437 static struct tty_struct *serial_console_device(struct console *c, int *index)
2438 {
2439         *index = c->index;
2440         return serial_driver;
2441 }
2442
2443
2444 struct console sercons = {
2445         .name           = "ttyS",
2446         .write          = serial_console_write,
2447         .device         = serial_console_device,
2448         .wait_key       = serial_console_wait_key,
2449         .setup          = serial_console_setup,
2450         .flags          = CON_PRINTBUFFER,
2451         .index          = CONFIG_SERIAL_CONSOLE_PORT, 
2452 };
2453
2454
2455
2456 /*
2457  *      Register console.
2458  */
2459 long console_360_init(long kmem_start, long kmem_end)
2460 {
2461         register_console(&sercons);
2462         /*register_console (console_print_68360); - 2.0.38 only required a write
2463       function pointer. */
2464         return kmem_start;
2465 }
2466
2467 #endif
2468
2469 /* Index in baud rate table of the default console baud rate.
2470 */
2471 static  int     baud_idx;
2472
2473 static struct tty_operations rs_360_ops = {
2474         .owner = THIS_MODULE,
2475         .open = rs_360_open,
2476         .close = rs_360_close,
2477         .write = rs_360_write,
2478         .put_char = rs_360_put_char,
2479         .write_room = rs_360_write_room,
2480         .chars_in_buffer = rs_360_chars_in_buffer,
2481         .flush_buffer = rs_360_flush_buffer,
2482         .ioctl = rs_360_ioctl,
2483         .throttle = rs_360_throttle,
2484         .unthrottle = rs_360_unthrottle,
2485         /* .send_xchar = rs_360_send_xchar, */
2486         .set_termios = rs_360_set_termios,
2487         .stop = rs_360_stop,
2488         .start = rs_360_start,
2489         .hangup = rs_360_hangup,
2490         /* .wait_until_sent = rs_360_wait_until_sent, */
2491         /* .read_proc = rs_360_read_proc, */
2492         .tiocmget = rs_360_tiocmget,
2493         .tiocmset = rs_360_tiocmset,
2494 };
2495
2496 /* int __init rs_360_init(void) */
2497 int rs_360_init(void)
2498 {
2499         struct serial_state * state;
2500         ser_info_t      *info;
2501         void       *mem_addr;
2502         uint            dp_addr, iobits;
2503         int                 i, j, idx;
2504         ushort          chan;
2505         QUICC_BD        *bdp;
2506         volatile        QUICC           *cp;
2507         volatile        struct smc_regs *sp;
2508         volatile        struct smc_uart_pram    *up;
2509         volatile        struct scc_regs *scp;
2510         volatile        struct uart_pram        *sup;
2511         /* volatile     immap_t         *immap; */
2512         
2513         serial_driver = alloc_tty_driver(NR_PORTS);
2514         if (!serial_driver)
2515                 return -1;
2516
2517         show_serial_version();
2518
2519         serial_driver->name = "ttyS";
2520         serial_driver->major = TTY_MAJOR;
2521         serial_driver->minor_start = 64;
2522         serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2523         serial_driver->subtype = SERIAL_TYPE_NORMAL;
2524         serial_driver->init_termios = tty_std_termios;
2525         serial_driver->init_termios.c_cflag =
2526                 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2527         serial_driver->flags = TTY_DRIVER_REAL_RAW;
2528         tty_set_operations(serial_driver, &rs_360_ops);
2529         
2530         if (tty_register_driver(serial_driver))
2531                 panic("Couldn't register serial driver\n");
2532
2533         cp = pquicc;    /* Get pointer to Communication Processor */
2534         /* immap = (immap_t *)IMAP_ADDR; */     /* and to internal registers */
2535
2536
2537         /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2538          */
2539         /* The "standard" configuration through the 860.
2540         */
2541 /*      immap->im_ioport.iop_papar |= 0x00fc; */
2542 /*      immap->im_ioport.iop_padir &= ~0x00fc; */
2543 /*      immap->im_ioport.iop_paodr &= ~0x00fc; */
2544         cp->pio_papar |= 0x00fc;
2545         cp->pio_padir &= ~0x00fc;
2546         /* cp->pio_paodr &= ~0x00fc; */
2547
2548
2549         /* Since we don't yet do modem control, connect the port C pins
2550          * as general purpose I/O.  This will assert CTS and CD for the
2551          * SCC ports.
2552          */
2553         /* FIXME: see 360um p.7-365 and 860um p.34-12 
2554          * I can't make sense of these bits - mleslie*/
2555 /*      immap->im_ioport.iop_pcdir |= 0x03c6; */
2556 /*      immap->im_ioport.iop_pcpar &= ~0x03c6; */
2557
2558 /*      cp->pio_pcdir |= 0x03c6; */
2559 /*      cp->pio_pcpar &= ~0x03c6; */
2560
2561
2562
2563         /* Connect SCC2 and SCC3 to NMSI.  Connect BRG3 to SCC2 and
2564          * BRG4 to SCC3.
2565          */
2566         cp->si_sicr &= ~0x00ffff00;
2567         cp->si_sicr |=  0x001b1200;
2568
2569 #ifdef CONFIG_PP04
2570         /* Frequentis PP04 forced to RS-232 until we know better.
2571          * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2572          */
2573         immap->im_ioport.iop_pcdir |= 0x000c;
2574         immap->im_ioport.iop_pcpar &= ~0x000c;
2575         immap->im_ioport.iop_pcdat &= ~0x000c;
2576
2577         /* This enables the TX driver.
2578         */
2579         cp->cp_pbpar &= ~0x6000;
2580         cp->cp_pbdat &= ~0x6000;
2581 #endif
2582
2583         for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2584                 state->magic = SSTATE_MAGIC;
2585                 state->line = i;
2586                 state->type = PORT_UNKNOWN;
2587                 state->custom_divisor = 0;
2588                 state->close_delay = 5*HZ/10;
2589                 state->closing_wait = 30*HZ;
2590                 state->icount.cts = state->icount.dsr = 
2591                         state->icount.rng = state->icount.dcd = 0;
2592                 state->icount.rx = state->icount.tx = 0;
2593                 state->icount.frame = state->icount.parity = 0;
2594                 state->icount.overrun = state->icount.brk = 0;
2595                 printk(KERN_INFO "ttyS%02d at irq 0x%02x is an %s\n",
2596                        i, (unsigned int)(state->irq),
2597                        (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2598
2599 #ifdef CONFIG_SERIAL_CONSOLE
2600                 /* If we just printed the message on the console port, and
2601                  * we are about to initialize it for general use, we have
2602                  * to wait a couple of character times for the CR/NL to
2603                  * make it out of the transmit buffer.
2604                  */
2605                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2606                         mdelay(8);
2607
2608
2609 /*              idx = PORT_NUM(info->state->smc_scc_num); */
2610 /*              if (info->state->smc_scc_num & NUM_IS_SCC) */
2611 /*                      chan = scc_chan_map[idx]; */
2612 /*              else */
2613 /*                      chan = smc_chan_map[idx]; */
2614
2615 /*              cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2616 /*              while (cp->cp_cr & CPM_CR_FLG); */
2617
2618 #endif
2619                 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2620                 info = &quicc_ser_info[i];
2621                 if (info) {
2622                         memset (info, 0, sizeof(ser_info_t));
2623                         info->magic = SERIAL_MAGIC;
2624                         info->line = i;
2625                         info->flags = state->flags;
2626                         INIT_WORK(&info->tqueue, do_softint, info);
2627                         INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2628                         init_waitqueue_head(&info->open_wait);
2629                         init_waitqueue_head(&info->close_wait);
2630                         info->state = state;
2631                         state->info = (struct async_struct *)info;
2632
2633                         /* We need to allocate a transmit and receive buffer
2634                          * descriptors from dual port ram, and a character
2635                          * buffer area from host mem.
2636                          */
2637                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2638
2639                         /* Allocate space for FIFOs in the host memory.
2640                          *  (for now this is from a static array of buffers :(
2641                          */
2642                         /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2643                         /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2644                         mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2645
2646                         /* Set the physical address of the host memory
2647                          * buffers in the buffer descriptors, and the
2648                          * virtual address for us to work with.
2649                          */
2650                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2651                         info->rx_cur = info->rx_bd_base = bdp;
2652
2653                         /* initialize rx buffer descriptors */
2654                         for (j=0; j<(RX_NUM_FIFO-1); j++) {
2655                                 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2656                                 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2657                                 mem_addr += RX_BUF_SIZE;
2658                                 bdp++;
2659                         }
2660                         bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2661                         bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2662
2663
2664                         idx = PORT_NUM(info->state->smc_scc_num);
2665                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2666
2667 #if defined (CONFIG_UCQUICC) && 1
2668                                 /* set the transceiver mode to RS232 */
2669                                 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2670                                 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2671                                 *(uint *)_periph_base = sipex_mode_bits;
2672                                 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2673 #endif
2674                         }
2675
2676                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2677
2678                         /* Allocate space for FIFOs in the host memory.
2679                         */
2680                         /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2681                         /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2682                         mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2683
2684                         /* Set the physical address of the host memory
2685                          * buffers in the buffer descriptors, and the
2686                          * virtual address for us to work with.
2687                          */
2688                         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2689                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2690                         info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2691
2692                         /* initialize tx buffer descriptors */
2693                         for (j=0; j<(TX_NUM_FIFO-1); j++) {
2694                                 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2695                                 bdp->status = BD_SC_INTRPT;
2696                                 mem_addr += TX_BUF_SIZE;
2697                                 bdp++;
2698                         }
2699                         bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2700                         bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2701
2702                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2703                                 scp = &pquicc->scc_regs[idx];
2704                                 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2705                                 sup->rbase = dp_addr;
2706                                 sup->tbase = dp_addr;
2707
2708                                 /* Set up the uart parameters in the
2709                                  * parameter ram.
2710                                  */
2711                                 sup->rfcr = SMC_EB;
2712                                 sup->tfcr = SMC_EB;
2713
2714                                 /* Set this to 1 for now, so we get single
2715                                  * character interrupts.  Using idle charater
2716                                  * time requires some additional tuning.
2717                                  */
2718                                 sup->mrblr = 1;
2719                                 sup->max_idl = 0;
2720                                 sup->brkcr = 1;
2721                                 sup->parec = 0;
2722                                 sup->frmer = 0;
2723                                 sup->nosec = 0;
2724                                 sup->brkec = 0;
2725                                 sup->uaddr1 = 0;
2726                                 sup->uaddr2 = 0;
2727                                 sup->toseq = 0;
2728                                 {
2729                                         int i;
2730                                         for (i=0;i<8;i++)
2731                                                 sup->cc[i] = 0x8000;
2732                                 }
2733                                 sup->rccm = 0xc0ff;
2734
2735                                 /* Send the CPM an initialize command.
2736                                 */
2737                                 chan = scc_chan_map[idx];
2738
2739                                 /* execute the INIT RX & TX PARAMS command for this channel. */
2740                                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2741                                 while (cp->cp_cr & CPM_CR_FLG);
2742
2743                                 /* Set UART mode, 8 bit, no parity, one stop.
2744                                  * Enable receive and transmit.
2745                                  */
2746                                 scp->scc_gsmr.w.high = 0;
2747                                 scp->scc_gsmr.w.low = 
2748                                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2749
2750                                 /* Disable all interrupts and clear all pending
2751                                  * events.
2752                                  */
2753                                 scp->scc_sccm = 0;
2754                                 scp->scc_scce = 0xffff;
2755                                 scp->scc_dsr = 0x7e7e;
2756                                 scp->scc_psmr = 0x3000;
2757
2758                                 /* If the port is the console, enable Rx and Tx.
2759                                 */
2760 #ifdef CONFIG_SERIAL_CONSOLE
2761                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2762                                         scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2763 #endif
2764                         }
2765                         else {
2766                                 /* Configure SMCs Tx/Rx instead of port B
2767                                  * parallel I/O.
2768                                  */
2769                                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2770                                 up->rbase = dp_addr;
2771
2772                                 iobits = 0xc0 << (idx * 4);
2773                                 cp->pip_pbpar |= iobits;
2774                                 cp->pip_pbdir &= ~iobits;
2775                                 cp->pip_pbodr &= ~iobits;
2776
2777
2778                                 /* Connect the baud rate generator to the
2779                                  * SMC based upon index in rs_table.  Also
2780                                  * make sure it is connected to NMSI.
2781                                  */
2782                                 cp->si_simode &= ~(0xffff << (idx * 16));
2783                                 cp->si_simode |= (i << ((idx * 16) + 12));
2784
2785                                 up->tbase = dp_addr;
2786
2787                                 /* Set up the uart parameters in the
2788                                  * parameter ram.
2789                                  */
2790                                 up->rfcr = SMC_EB;
2791                                 up->tfcr = SMC_EB;
2792
2793                                 /* Set this to 1 for now, so we get single
2794                                  * character interrupts.  Using idle charater
2795                                  * time requires some additional tuning.
2796                                  */
2797                                 up->mrblr = 1;
2798                                 up->max_idl = 0;
2799                                 up->brkcr = 1;
2800
2801                                 /* Send the CPM an initialize command.
2802                                 */
2803                                 chan = smc_chan_map[idx];
2804
2805                                 cp->cp_cr = mk_cr_cmd(chan,
2806                                                                           CPM_CR_INIT_TRX) | CPM_CR_FLG;
2807 #ifdef CONFIG_SERIAL_CONSOLE
2808                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2809                                         printk("");
2810 #endif
2811                                 while (cp->cp_cr & CPM_CR_FLG);
2812
2813                                 /* Set UART mode, 8 bit, no parity, one stop.
2814                                  * Enable receive and transmit.
2815                                  */
2816                                 sp = &cp->smc_regs[idx];
2817                                 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2818
2819                                 /* Disable all interrupts and clear all pending
2820                                  * events.
2821                                  */
2822                                 sp->smc_smcm = 0;
2823                                 sp->smc_smce = 0xff;
2824
2825                                 /* If the port is the console, enable Rx and Tx.
2826                                 */
2827 #ifdef CONFIG_SERIAL_CONSOLE
2828                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2829                                         sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2830 #endif
2831                         }
2832
2833                         /* Install interrupt handler.
2834                         */
2835                         /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info);  */
2836                         /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2837                         request_irq(state->irq, rs_360_interrupt,
2838                                                 IRQ_FLG_LOCK, "ttyS", (void *)info);
2839
2840                         /* Set up the baud rate generator.
2841                         */
2842                         m360_cpm_setbrg(i, baud_table[baud_idx]);
2843
2844                 }
2845         }
2846
2847         return 0;
2848 }
2849
2850
2851
2852
2853
2854 /* This must always be called before the rs_360_init() function, otherwise
2855  * it blows away the port control information.
2856  */
2857 //static int __init serial_console_setup( struct console *co, char *options)
2858 int serial_console_setup( struct console *co, char *options)
2859 {
2860         struct          serial_state    *ser;
2861         uint            mem_addr, dp_addr, bidx, idx, iobits;
2862         ushort          chan;
2863         QUICC_BD        *bdp;
2864         volatile        QUICC                   *cp;
2865         volatile        struct smc_regs *sp;
2866         volatile        struct scc_regs *scp;
2867         volatile        struct smc_uart_pram    *up;
2868         volatile        struct uart_pram                *sup;
2869
2870 /* mleslie TODO:
2871  * add something to the 68k bootloader to store a desired initial console baud rate */
2872
2873 /*      bd_t                                            *bd; */ /* a board info struct used by EPPC-bug */
2874 /*      bd = (bd_t *)__res; */
2875
2876         for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2877          /* if (bd->bi_baudrate == baud_table[bidx]) */
2878                 if (CONSOLE_BAUDRATE == baud_table[bidx])
2879                         break;
2880
2881         /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2882         baud_idx = bidx;
2883
2884         ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2885
2886         cp = pquicc;    /* Get pointer to Communication Processor */
2887
2888         idx = PORT_NUM(ser->smc_scc_num);
2889         if (ser->smc_scc_num & NUM_IS_SCC) {
2890
2891                 /* TODO: need to set up SCC pin assignment etc. here */
2892                 
2893         }
2894         else {
2895                 iobits = 0xc0 << (idx * 4);
2896                 cp->pip_pbpar |= iobits;
2897                 cp->pip_pbdir &= ~iobits;
2898                 cp->pip_pbodr &= ~iobits;
2899
2900                 /* Connect the baud rate generator to the
2901                  * SMC based upon index in rs_table.  Also
2902                  * make sure it is connected to NMSI.
2903                  */
2904                 cp->si_simode &= ~(0xffff << (idx * 16));
2905                 cp->si_simode |= (idx << ((idx * 16) + 12));
2906         }
2907
2908         /* When we get here, the CPM has been reset, so we need
2909          * to configure the port.
2910          * We need to allocate a transmit and receive buffer descriptor
2911          * from dual port ram, and a character buffer area from host mem.
2912          */
2913
2914         /* Allocate space for two buffer descriptors in the DP ram.
2915         */
2916         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2917
2918         /* Allocate space for two 2 byte FIFOs in the host memory.
2919          */
2920         /* mem_addr = m360_cpm_hostalloc(8); */
2921         mem_addr = (uint)console_fifos;
2922
2923
2924         /* Set the physical address of the host memory buffers in
2925          * the buffer descriptors.
2926          */
2927         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2928         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2929         bdp->buf = (char *)mem_addr;
2930         (bdp+1)->buf = (char *)(mem_addr+4);
2931
2932         /* For the receive, set empty and wrap.
2933          * For transmit, set wrap.
2934          */
2935         bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2936         (bdp+1)->status = BD_SC_WRAP;
2937
2938         /* Set up the uart parameters in the parameter ram.
2939          */
2940         if (ser->smc_scc_num & NUM_IS_SCC) {
2941                 scp = &cp->scc_regs[idx];
2942                 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2943                 sup = &pquicc->pram[ser->port].scc.pscc.u;
2944
2945                 sup->rbase = dp_addr;
2946                 sup->tbase = dp_addr + sizeof(QUICC_BD);
2947
2948                 /* Set up the uart parameters in the
2949                  * parameter ram.
2950                  */
2951                 sup->rfcr = SMC_EB;
2952                 sup->tfcr = SMC_EB;
2953
2954                 /* Set this to 1 for now, so we get single
2955                  * character interrupts.  Using idle charater
2956                  * time requires some additional tuning.
2957                  */
2958                 sup->mrblr = 1;
2959                 sup->max_idl = 0;
2960                 sup->brkcr = 1;
2961                 sup->parec = 0;
2962                 sup->frmer = 0;
2963                 sup->nosec = 0;
2964                 sup->brkec = 0;
2965                 sup->uaddr1 = 0;
2966                 sup->uaddr2 = 0;
2967                 sup->toseq = 0;
2968                 {
2969                         int i;
2970                         for (i=0;i<8;i++)
2971                                 sup->cc[i] = 0x8000;
2972                 }
2973                 sup->rccm = 0xc0ff;
2974
2975                 /* Send the CPM an initialize command.
2976                 */
2977                 chan = scc_chan_map[idx];
2978
2979                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2980                 while (cp->cp_cr & CPM_CR_FLG);
2981
2982                 /* Set UART mode, 8 bit, no parity, one stop.
2983                  * Enable receive and transmit.
2984                  */
2985                 scp->scc_gsmr.w.high = 0;
2986                 scp->scc_gsmr.w.low = 
2987                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2988
2989                 /* Disable all interrupts and clear all pending
2990                  * events.
2991                  */
2992                 scp->scc_sccm = 0;
2993                 scp->scc_scce = 0xffff;
2994                 scp->scc_dsr = 0x7e7e;
2995                 scp->scc_psmr = 0x3000;
2996
2997                 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2998
2999         }
3000         else {
3001                 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
3002                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
3003
3004                 up->rbase = dp_addr;    /* Base of receive buffer desc. */
3005                 up->tbase = dp_addr+sizeof(QUICC_BD);   /* Base of xmt buffer desc. */
3006                 up->rfcr = SMC_EB;
3007                 up->tfcr = SMC_EB;
3008
3009                 /* Set this to 1 for now, so we get single character interrupts.
3010                 */
3011                 up->mrblr = 1;          /* receive buffer length */
3012                 up->max_idl = 0;                /* wait forever for next char */
3013
3014                 /* Send the CPM an initialize command.
3015                 */
3016                 chan = smc_chan_map[idx];
3017                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
3018                 while (cp->cp_cr & CPM_CR_FLG);
3019
3020                 /* Set UART mode, 8 bit, no parity, one stop.
3021                  * Enable receive and transmit.
3022                  */
3023                 sp = &cp->smc_regs[idx];
3024                 sp->smc_smcmr = smcr_mk_clen(9) |  SMCMR_SM_UART;
3025
3026                 /* And finally, enable Rx and Tx.
3027                 */
3028                 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
3029         }
3030
3031         /* Set up the baud rate generator.
3032         */
3033         /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
3034         m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
3035
3036         return 0;
3037 }
3038
3039 /*
3040  * Local variables:
3041  *  c-indent-level: 4
3042  *  c-basic-offset: 4
3043  *  tab-width: 4
3044  * End:
3045  */