vserver 1.9.3
[linux-2.6.git] / drivers / serial / 68360serial.c
1 /*
2  *  UART driver for 68360 CPM SCC or SMC
3  *  Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4  *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5  *  Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6  *
7  * I used the serial.c driver as the framework for this driver.
8  * Give credit to those guys.
9  * The original code was written for the MBX860 board.  I tried to make
10  * it generic, but there may be some assumptions in the structures that
11  * have to be fixed later.
12  * To save porting time, I did not bother to change any object names
13  * that are not accessed outside of this file.
14  * It still needs lots of work........When it was easy, I included code
15  * to support the SCCs, but this has never been tested, nor is it complete.
16  * Only the SCCs support modem control, so that is not complete either.
17  *
18  * This module exports the following rs232 io functions:
19  *
20  *      int rs_360_init(void);
21  */
22
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/serialP.h> 
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
38 #include <linux/mm.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <asm/irq.h>
42 #include <asm/m68360.h>
43 #include <asm/commproc.h>
44
45  
46 #ifdef CONFIG_KGDB
47 extern void breakpoint(void);
48 extern void set_debug_traps(void);
49 extern int  kgdb_output_string (const char* s, unsigned int count);
50 #endif
51
52
53 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
54 #include <linux/console.h>
55
56 /* this defines the index into rs_table for the port to use
57  */
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT      1 /* ie SMC2 - note USE_SMC2 must be defined */
60 #endif
61 /* #endif */
62
63 #if 0
64 /* SCC2 for console
65  */
66 #undef CONFIG_SERIAL_CONSOLE_PORT
67 #define CONFIG_SERIAL_CONSOLE_PORT      2
68 #endif
69
70
71 #define TX_WAKEUP       ASYNC_SHARE_IRQ
72
73 static char *serial_name = "CPM UART driver";
74 static char *serial_version = "0.03";
75
76 static struct tty_driver *serial_driver;
77 int serial_console_setup(struct console *co, char *options);
78
79 /*
80  * Serial driver configuration section.  Here are the various options:
81  */
82 #define SERIAL_PARANOIA_CHECK
83 #define CONFIG_SERIAL_NOPAUSE_IO
84 #define SERIAL_DO_RESTART
85
86 /* Set of debugging defines */
87
88 #undef SERIAL_DEBUG_INTR
89 #undef SERIAL_DEBUG_OPEN
90 #undef SERIAL_DEBUG_FLOW
91 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
92
93 #define _INLINE_ inline
94   
95 #define DBG_CNT(s)
96
97 /* We overload some of the items in the data structure to meet our
98  * needs.  For example, the port address is the CPM parameter ram
99  * offset for the SCC or SMC.  The maximum number of ports is 4 SCCs and
100  * 2 SMCs.  The "hub6" field is used to indicate the channel number, with
101  * a flag indicating SCC or SMC, and the number is used as an index into
102  * the CPM parameter area for this device.
103  * The "type" field is currently set to 0, for PORT_UNKNOWN.  It is
104  * not currently used.  I should probably use it to indicate the port
105  * type of SMC or SCC.
106  * The SMCs do not support any modem control signals.
107  */
108 #define smc_scc_num     hub6
109 #define NUM_IS_SCC      ((int)0x00010000)
110 #define PORT_NUM(P)     ((P) & 0x0000ffff)
111
112
113 #if defined (CONFIG_UCQUICC)
114
115 volatile extern void *_periph_base;
116 /* sipex transceiver
117  *   mode bits for       are on pins
118  *
119  *    SCC2                d16..19
120  *    SCC3                d20..23
121  *    SCC4                d24..27
122  */
123 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
124
125 static uint sipex_mode_bits = 0x00000000;
126
127 #endif
128
129 /* There is no `serial_state' defined back here in 2.0.
130  * Try to get by with serial_struct
131  */
132 /* #define serial_state serial_struct */
133
134 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
135  * extras: */
136
137 #if 0
138 struct async_icount_24 {
139         __u32   cts, dsr, rng, dcd, tx, rx;
140         __u32   frame, parity, overrun, brk;
141         __u32   buf_overrun;
142 } icount;
143 #endif
144
145 #if 0
146
147 struct serial_state {
148         int     magic;
149         int     baud_base;
150         unsigned long   port;
151         int     irq;
152         int     flags;
153         int     hub6;
154         int     type;
155         int     line;
156         int     revision;       /* Chip revision (950) */
157         int     xmit_fifo_size;
158         int     custom_divisor;
159         int     count;
160         u8      *iomem_base;
161         u16     iomem_reg_shift;
162         unsigned short  close_delay;
163         unsigned short  closing_wait; /* time to wait before closing */
164         struct async_icount_24     icount; 
165         int     io_type;
166         struct async_struct *info;
167 };
168 #endif
169
170 #define SSTATE_MAGIC 0x5302
171
172
173
174 /* SMC2 is sometimes used for low performance TDM interfaces.  Define
175  * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176  * Define this as 0 if you wish to use SMC2 for something else.
177  */
178 #define USE_SMC2 1
179
180 #if 0
181 /* Define SCC to ttySx mapping. */
182 #define SCC_NUM_BASE    (USE_SMC2 + 1)  /* SCC base tty "number" */
183
184 /* Define which SCC is the first one to use for a serial port.  These
185  * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186  * for Ethernet, and the first available SCC for serial UART is SCC2.
187  * NOTE:  IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188  * interrupt vectors in the table below to match.
189  */
190 #define SCC_IDX_BASE    1       /* table index */
191 #endif
192
193
194 /* Processors other than the 860 only get SMCs configured by default.
195  * Either they don't have SCCs or they are allocated somewhere else.
196  * Of course, there are now 860s without some SCCs, so we will need to
197  * address that someday.
198  * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199  * stereo codec parts, and we use SMC2 to help support that.
200  */
201 static struct serial_state rs_table[] = {
202 /*  type   line   PORT           IRQ       FLAGS  smc_scc_num (F.K.A. hub6) */
203         {  0,     0, PRSLOT_SMC1, CPMVEC_SMC1,   0,    0 }    /* SMC1 ttyS0 */
204 #if USE_SMC2
205         ,{ 0,     0, PRSLOT_SMC2, CPMVEC_SMC2,   0,    1 }     /* SMC2 ttyS1 */
206 #endif
207
208 #if defined(CONFIG_SERIAL_68360_SCC)
209         ,{ 0,     0, PRSLOT_SCC2, CPMVEC_SCC2,   0, (NUM_IS_SCC | 1) }    /* SCC2 ttyS2 */
210         ,{ 0,     0, PRSLOT_SCC3, CPMVEC_SCC3,   0, (NUM_IS_SCC | 2) }    /* SCC3 ttyS3 */
211         ,{ 0,     0, PRSLOT_SCC4, CPMVEC_SCC4,   0, (NUM_IS_SCC | 3) }    /* SCC4 ttyS4 */
212 #endif
213 };
214
215 #define NR_PORTS        (sizeof(rs_table)/sizeof(struct serial_state))
216
217 /* The number of buffer descriptors and their sizes.
218  */
219 #define RX_NUM_FIFO     4
220 #define RX_BUF_SIZE     32
221 #define TX_NUM_FIFO     4
222 #define TX_BUF_SIZE     32
223
224 #define CONSOLE_NUM_FIFO 2
225 #define CONSOLE_BUF_SIZE 4
226
227 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
228
229 /* The async_struct in serial.h does not really give us what we
230  * need, so define our own here.
231  */
232 typedef struct serial_info {
233         int                     magic;
234         int                     flags;
235
236         struct serial_state     *state;
237         /* struct serial_struct *state; */
238         /* struct async_struct  *state; */
239         
240         struct tty_struct       *tty;
241         int                     read_status_mask;
242         int                     ignore_status_mask;
243         int                     timeout;
244         int                     line;
245         int                     x_char; /* xon/xoff character */
246         int                     close_delay;
247         unsigned short          closing_wait;
248         unsigned short          closing_wait2;
249         unsigned long           event;
250         unsigned long           last_active;
251         int                     blocked_open; /* # of blocked opens */
252         struct work_struct      tqueue;
253         struct work_struct      tqueue_hangup;
254         wait_queue_head_t       open_wait; 
255         wait_queue_head_t       close_wait; 
256
257         
258 /* CPM Buffer Descriptor pointers.
259         */
260         QUICC_BD                        *rx_bd_base;
261         QUICC_BD                        *rx_cur;
262         QUICC_BD                        *tx_bd_base;
263         QUICC_BD                        *tx_cur;
264 } ser_info_t;
265
266
267 /* since kmalloc_init() does not get called until much after this initialization: */
268 static ser_info_t  quicc_ser_info[NR_PORTS];
269 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
271
272 static void change_speed(ser_info_t *info);
273 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
274
275 static inline int serial_paranoia_check(ser_info_t *info,
276                                         char *name, const char *routine)
277 {
278 #ifdef SERIAL_PARANOIA_CHECK
279         static const char *badmagic =
280                 "Warning: bad magic number for serial struct (%s) in %s\n";
281         static const char *badinfo =
282                 "Warning: null async_struct for (%s) in %s\n";
283
284         if (!info) {
285                 printk(badinfo, name, routine);
286                 return 1;
287         }
288         if (info->magic != SERIAL_MAGIC) {
289                 printk(badmagic, name, routine);
290                 return 1;
291         }
292 #endif
293         return 0;
294 }
295
296 /*
297  * This is used to figure out the divisor speeds and the timeouts,
298  * indexed by the termio value.  The generic CPM functions are responsible
299  * for setting and assigning baud rate generators for us.
300  */
301 static int baud_table[] = {
302         0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303         9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
304
305 /* This sucks. There is a better way: */
306 #if defined(CONFIG_CONSOLE_9600)
307   #define CONSOLE_BAUDRATE 9600
308 #elif defined(CONFIG_CONSOLE_19200)
309   #define CONSOLE_BAUDRATE 19200
310 #elif defined(CONFIG_CONSOLE_115200)
311   #define CONSOLE_BAUDRATE 115200
312 #else
313   #warning "console baud rate undefined"
314   #define CONSOLE_BAUDRATE 9600
315 #endif
316
317 /*
318  * ------------------------------------------------------------
319  * rs_stop() and rs_start()
320  *
321  * This routines are called before setting or resetting tty->stopped.
322  * They enable or disable transmitter interrupts, as necessary.
323  * ------------------------------------------------------------
324  */
325 static void rs_360_stop(struct tty_struct *tty)
326 {
327         ser_info_t *info = (ser_info_t *)tty->driver_data;
328         int     idx;
329         unsigned long flags;
330         volatile struct scc_regs *sccp;
331         volatile struct smc_regs *smcp;
332
333         if (serial_paranoia_check(info, tty->name, "rs_stop"))
334                 return;
335         
336         local_irq_save(flags);
337         idx = PORT_NUM(info->state->smc_scc_num);
338         if (info->state->smc_scc_num & NUM_IS_SCC) {
339                 sccp = &pquicc->scc_regs[idx];
340                 sccp->scc_sccm &= ~UART_SCCM_TX;
341         } else {
342                 /* smcp = &cpmp->cp_smc[idx]; */
343                 smcp = &pquicc->smc_regs[idx];
344                 smcp->smc_smcm &= ~SMCM_TX;
345         }
346         local_irq_restore(flags);
347 }
348
349
350 static void rs_360_start(struct tty_struct *tty)
351 {
352         ser_info_t *info = (ser_info_t *)tty->driver_data;
353         int     idx;
354         unsigned long flags;
355         volatile struct scc_regs *sccp;
356         volatile struct smc_regs *smcp;
357
358         if (serial_paranoia_check(info, tty->name, "rs_stop"))
359                 return;
360         
361         local_irq_save(flags);
362         idx = PORT_NUM(info->state->smc_scc_num);
363         if (info->state->smc_scc_num & NUM_IS_SCC) {
364                 sccp = &pquicc->scc_regs[idx];
365                 sccp->scc_sccm |= UART_SCCM_TX;
366         } else {
367                 smcp = &pquicc->smc_regs[idx];
368                 smcp->smc_smcm |= SMCM_TX;
369         }
370         local_irq_restore(flags);
371 }
372
373 /*
374  * ----------------------------------------------------------------------
375  *
376  * Here starts the interrupt handling routines.  All of the following
377  * subroutines are declared as inline and are folded into
378  * rs_interrupt().  They were separated out for readability's sake.
379  *
380  * Note: rs_interrupt() is a "fast" interrupt, which means that it
381  * runs with interrupts turned off.  People who may want to modify
382  * rs_interrupt() should try to keep the interrupt handler as fast as
383  * possible.  After you are done making modifications, it is not a bad
384  * idea to do:
385  * 
386  * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
387  *
388  * and look at the resulting assemble code in serial.s.
389  *
390  *                              - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391  * -----------------------------------------------------------------------
392  */
393
394 static _INLINE_ void receive_chars(ser_info_t *info)
395 {
396         struct tty_struct *tty = info->tty;
397         unsigned char ch, *cp;
398         /*int   ignored = 0;*/
399         int     i;
400         ushort  status;
401          struct async_icount *icount; 
402         /* struct       async_icount_24 *icount; */
403         volatile QUICC_BD       *bdp;
404
405         icount = &info->state->icount;
406
407         /* Just loop through the closed BDs and copy the characters into
408          * the buffer.
409          */
410         bdp = info->rx_cur;
411         for (;;) {
412                 if (bdp->status & BD_SC_EMPTY)  /* If this one is empty */
413                         break;                  /*   we are all done */
414
415                 /* The read status mask tell us what we should do with
416                  * incoming characters, especially if errors occur.
417                  * One special case is the use of BD_SC_EMPTY.  If
418                  * this is not set, we are supposed to be ignoring
419                  * inputs.  In this case, just mark the buffer empty and
420                  * continue.
421                  */
422                 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423                         bdp->status |= BD_SC_EMPTY;
424                         bdp->status &=
425                                 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
426
427                         if (bdp->status & BD_SC_WRAP)
428                                 bdp = info->rx_bd_base;
429                         else
430                                 bdp++;
431                         continue;
432                 }
433
434                 /* Get the number of characters and the buffer pointer.
435                 */
436                 i = bdp->length;
437                 /* cp = (unsigned char *)__va(bdp->buf); */
438                 cp = (char *)bdp->buf;
439                 status = bdp->status;
440
441                 /* Check to see if there is room in the tty buffer for
442                  * the characters in our BD buffer.  If not, we exit
443                  * now, leaving the BD with the characters.  We'll pick
444                  * them up again on the next receive interrupt (which could
445                  * be a timeout).
446                  */
447                 if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
448                         break;
449
450                 while (i-- > 0) {
451                         ch = *cp++;
452                         *tty->flip.char_buf_ptr = ch;
453                         icount->rx++;
454
455 #ifdef SERIAL_DEBUG_INTR
456                         printk("DR%02x:%02x...", ch, status);
457 #endif
458                         *tty->flip.flag_buf_ptr = 0;
459                         if (status & (BD_SC_BR | BD_SC_FR |
460                                        BD_SC_PR | BD_SC_OV)) {
461                                 /*
462                                  * For statistics only
463                                  */
464                                 if (status & BD_SC_BR)
465                                         icount->brk++;
466                                 else if (status & BD_SC_PR)
467                                         icount->parity++;
468                                 else if (status & BD_SC_FR)
469                                         icount->frame++;
470                                 if (status & BD_SC_OV)
471                                         icount->overrun++;
472
473                                 /*
474                                  * Now check to see if character should be
475                                  * ignored, and mask off conditions which
476                                  * should be ignored.
477                                 if (status & info->ignore_status_mask) {
478                                         if (++ignored > 100)
479                                                 break;
480                                         continue;
481                                 }
482                                  */
483                                 status &= info->read_status_mask;
484                 
485                                 if (status & (BD_SC_BR)) {
486 #ifdef SERIAL_DEBUG_INTR
487                                         printk("handling break....");
488 #endif
489                                         *tty->flip.flag_buf_ptr = TTY_BREAK;
490                                         if (info->flags & ASYNC_SAK)
491                                                 do_SAK(tty);
492                                 } else if (status & BD_SC_PR)
493                                         *tty->flip.flag_buf_ptr = TTY_PARITY;
494                                 else if (status & BD_SC_FR)
495                                         *tty->flip.flag_buf_ptr = TTY_FRAME;
496                                 if (status & BD_SC_OV) {
497                                         /*
498                                          * Overrun is special, since it's
499                                          * reported immediately, and doesn't
500                                          * affect the current character
501                                          */
502                                         if (tty->flip.count < TTY_FLIPBUF_SIZE) {
503                                                 tty->flip.count++;
504                                                 tty->flip.flag_buf_ptr++;
505                                                 tty->flip.char_buf_ptr++;
506                                                 *tty->flip.flag_buf_ptr =
507                                                                 TTY_OVERRUN;
508                                         }
509                                 }
510                         }
511                         if (tty->flip.count >= TTY_FLIPBUF_SIZE)
512                                 break;
513
514                         tty->flip.flag_buf_ptr++;
515                         tty->flip.char_buf_ptr++;
516                         tty->flip.count++;
517                 }
518
519                 /* This BD is ready to be used again.  Clear status.
520                  * Get next BD.
521                  */
522                 bdp->status |= BD_SC_EMPTY;
523                 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
524
525                 if (bdp->status & BD_SC_WRAP)
526                         bdp = info->rx_bd_base;
527                 else
528                         bdp++;
529         }
530
531         info->rx_cur = (QUICC_BD *)bdp;
532
533         schedule_work(&tty->flip.work);
534 }
535
536 static _INLINE_ void receive_break(ser_info_t *info)
537 {
538         struct tty_struct *tty = info->tty;
539
540         info->state->icount.brk++;
541         /* Check to see if there is room in the tty buffer for
542          * the break.  If not, we exit now, losing the break.  FIXME
543          */
544         if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
545                 return;
546         *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
547         *(tty->flip.char_buf_ptr++) = 0;
548         tty->flip.count++;
549
550         schedule_work(&tty->flip.work);
551 }
552
553 static _INLINE_ void transmit_chars(ser_info_t *info)
554 {
555
556         if ((info->flags & TX_WAKEUP) ||
557             (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
558                 schedule_work(&info->tqueue);
559         }
560
561 #ifdef SERIAL_DEBUG_INTR
562         printk("THRE...");
563 #endif
564 }
565
566 #ifdef notdef
567         /* I need to do this for the SCCs, so it is left as a reminder.
568         */
569 static _INLINE_ void check_modem_status(struct async_struct *info)
570 {
571         int     status;
572         /* struct       async_icount *icount; */
573         struct  async_icount_24 *icount;
574         
575         status = serial_in(info, UART_MSR);
576
577         if (status & UART_MSR_ANY_DELTA) {
578                 icount = &info->state->icount;
579                 /* update input line counters */
580                 if (status & UART_MSR_TERI)
581                         icount->rng++;
582                 if (status & UART_MSR_DDSR)
583                         icount->dsr++;
584                 if (status & UART_MSR_DDCD) {
585                         icount->dcd++;
586 #ifdef CONFIG_HARD_PPS
587                         if ((info->flags & ASYNC_HARDPPS_CD) &&
588                             (status & UART_MSR_DCD))
589                                 hardpps();
590 #endif
591                 }
592                 if (status & UART_MSR_DCTS)
593                         icount->cts++;
594                 wake_up_interruptible(&info->delta_msr_wait);
595         }
596
597         if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
598 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
599                 printk("ttys%d CD now %s...", info->line,
600                        (status & UART_MSR_DCD) ? "on" : "off");
601 #endif          
602                 if (status & UART_MSR_DCD)
603                         wake_up_interruptible(&info->open_wait);
604                 else {
605 #ifdef SERIAL_DEBUG_OPEN
606                         printk("scheduling hangup...");
607 #endif
608                         queue_task(&info->tqueue_hangup,
609                                            &tq_scheduler);
610                 }
611         }
612         if (info->flags & ASYNC_CTS_FLOW) {
613                 if (info->tty->hw_stopped) {
614                         if (status & UART_MSR_CTS) {
615 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
616                                 printk("CTS tx start...");
617 #endif
618                                 info->tty->hw_stopped = 0;
619                                 info->IER |= UART_IER_THRI;
620                                 serial_out(info, UART_IER, info->IER);
621                                 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
622                                 return;
623                         }
624                 } else {
625                         if (!(status & UART_MSR_CTS)) {
626 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
627                                 printk("CTS tx stop...");
628 #endif
629                                 info->tty->hw_stopped = 1;
630                                 info->IER &= ~UART_IER_THRI;
631                                 serial_out(info, UART_IER, info->IER);
632                         }
633                 }
634         }
635 }
636 #endif
637
638 /*
639  * This is the serial driver's interrupt routine for a single port
640  */
641 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
642 static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
643 {
644         u_char  events;
645         int     idx;
646         ser_info_t *info;
647         volatile struct smc_regs *smcp;
648         volatile struct scc_regs *sccp;
649         
650         info = (ser_info_t *)dev_id;
651
652         idx = PORT_NUM(info->state->smc_scc_num);
653         if (info->state->smc_scc_num & NUM_IS_SCC) {
654                 sccp = &pquicc->scc_regs[idx];
655                 events = sccp->scc_scce;
656                 if (events & SCCM_RX)
657                         receive_chars(info);
658                 if (events & SCCM_TX)
659                         transmit_chars(info);
660                 sccp->scc_scce = events;
661         } else {
662                 smcp = &pquicc->smc_regs[idx];
663                 events = smcp->smc_smce;
664                 if (events & SMCM_BRKE)
665                         receive_break(info);
666                 if (events & SMCM_RX)
667                         receive_chars(info);
668                 if (events & SMCM_TX)
669                         transmit_chars(info);
670                 smcp->smc_smce = events;
671         }
672         
673 #ifdef SERIAL_DEBUG_INTR
674         printk("rs_interrupt_single(%d, %x)...",
675                                         info->state->smc_scc_num, events);
676 #endif
677 #ifdef modem_control
678         check_modem_status(info);
679 #endif
680         info->last_active = jiffies;
681 #ifdef SERIAL_DEBUG_INTR
682         printk("end.\n");
683 #endif
684 }
685
686
687 /*
688  * -------------------------------------------------------------------
689  * Here ends the serial interrupt routines.
690  * -------------------------------------------------------------------
691  */
692
693
694 static void do_softint(void *private_)
695 {
696         ser_info_t      *info = (ser_info_t *) private_;
697         struct tty_struct       *tty;
698         
699         tty = info->tty;
700         if (!tty)
701                 return;
702
703         if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
704                 tty_wakeup(tty);
705 }
706
707
708 /*
709  * This routine is called from the scheduler tqueue when the interrupt
710  * routine has signalled that a hangup has occurred.  The path of
711  * hangup processing is:
712  *
713  *      serial interrupt routine -> (scheduler tqueue) ->
714  *      do_serial_hangup() -> tty->hangup() -> rs_hangup()
715  * 
716  */
717 static void do_serial_hangup(void *private_)
718 {
719         struct async_struct     *info = (struct async_struct *) private_;
720         struct tty_struct       *tty;
721         
722         tty = info->tty;
723         if (!tty)
724                 return;
725
726         tty_hangup(tty);
727 }
728
729
730 static int startup(ser_info_t *info)
731 {
732         unsigned long flags;
733         int     retval=0;
734         int     idx;
735         /*struct serial_state *state = info->state;*/
736         volatile struct smc_regs *smcp;
737         volatile struct scc_regs *sccp;
738         volatile struct smc_uart_pram   *up;
739         volatile struct uart_pram           *scup;
740
741
742         local_irq_save(flags);
743
744         if (info->flags & ASYNC_INITIALIZED) {
745                 goto errout;
746         }
747
748 #ifdef maybe
749         if (!state->port || !state->type) {
750                 if (info->tty)
751                         set_bit(TTY_IO_ERROR, &info->tty->flags);
752                 goto errout;
753         }
754 #endif
755
756 #ifdef SERIAL_DEBUG_OPEN
757         printk("starting up ttys%d (irq %d)...", info->line, state->irq);
758 #endif
759
760
761 #ifdef modem_control
762         info->MCR = 0;
763         if (info->tty->termios->c_cflag & CBAUD)
764                 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
765 #endif
766         
767         if (info->tty)
768                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
769
770         /*
771          * and set the speed of the serial port
772          */
773         change_speed(info);
774
775         idx = PORT_NUM(info->state->smc_scc_num);
776         if (info->state->smc_scc_num & NUM_IS_SCC) {
777                 sccp = &pquicc->scc_regs[idx];
778                 scup = &pquicc->pram[info->state->port].scc.pscc.u;
779
780                 scup->mrblr = RX_BUF_SIZE;
781                 scup->max_idl = RX_BUF_SIZE;
782
783                 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
784                 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
785
786         } else {
787                 smcp = &pquicc->smc_regs[idx];
788
789                 /* Enable interrupts and I/O.
790                 */
791                 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
792                 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
793
794                 /* We can tune the buffer length and idle characters
795                  * to take advantage of the entire incoming buffer size.
796                  * If mrblr is something other than 1, maxidl has to be
797                  * non-zero or we never get an interrupt.  The maxidl
798                  * is the number of character times we wait after reception
799                  * of the last character before we decide no more characters
800                  * are coming.
801                  */
802                 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
803                 /* holy unionized structures, Batman: */
804                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
805
806                 up->mrblr = RX_BUF_SIZE;
807                 up->max_idl = RX_BUF_SIZE;
808
809                 up->brkcr = 1;  /* number of break chars */
810         }
811
812         info->flags |= ASYNC_INITIALIZED;
813         local_irq_restore(flags);
814         return 0;
815         
816 errout:
817         local_irq_restore(flags);
818         return retval;
819 }
820
821 /*
822  * This routine will shutdown a serial port; interrupts are disabled, and
823  * DTR is dropped if the hangup on close termio flag is on.
824  */
825 static void shutdown(ser_info_t *info)
826 {
827         unsigned long   flags;
828         struct serial_state *state;
829         int             idx;
830         volatile struct smc_regs        *smcp;
831         volatile struct scc_regs        *sccp;
832
833         if (!(info->flags & ASYNC_INITIALIZED))
834                 return;
835
836         state = info->state;
837
838 #ifdef SERIAL_DEBUG_OPEN
839         printk("Shutting down serial port %d (irq %d)....", info->line,
840                state->irq);
841 #endif
842         
843         local_irq_save(flags);
844
845         idx = PORT_NUM(state->smc_scc_num);
846         if (state->smc_scc_num & NUM_IS_SCC) {
847                 sccp = &pquicc->scc_regs[idx];
848                 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
849 #ifdef CONFIG_SERIAL_CONSOLE
850                 /* We can't disable the transmitter if this is the
851                  * system console.
852                  */
853                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
854 #endif
855                 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
856         } else {
857                 smcp = &pquicc->smc_regs[idx];
858
859                 /* Disable interrupts and I/O.
860                  */
861                 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
862 #ifdef CONFIG_SERIAL_CONSOLE
863                 /* We can't disable the transmitter if this is the
864                  * system console.
865                  */
866                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
867 #endif
868                         smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
869         }
870         
871         if (info->tty)
872                 set_bit(TTY_IO_ERROR, &info->tty->flags);
873
874         info->flags &= ~ASYNC_INITIALIZED;
875         local_irq_restore(flags);
876 }
877
878 /*
879  * This routine is called to set the UART divisor registers to match
880  * the specified baud rate for a serial port.
881  */
882 static void change_speed(ser_info_t *info)
883 {
884         int     baud_rate;
885         unsigned cflag, cval, scval, prev_mode;
886         int     i, bits, sbits, idx;
887         unsigned long   flags;
888         struct serial_state *state;
889         volatile struct smc_regs        *smcp;
890         volatile struct scc_regs        *sccp;
891
892         if (!info->tty || !info->tty->termios)
893                 return;
894         cflag = info->tty->termios->c_cflag;
895
896         state = info->state;
897
898         /* Character length programmed into the mode register is the
899          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
900          * 1 or 2 stop bits, minus 1.
901          * The value 'bits' counts this for us.
902          */
903         cval = 0;
904         scval = 0;
905
906         /* byte size and parity */
907         switch (cflag & CSIZE) {
908               case CS5: bits = 5; break;
909               case CS6: bits = 6; break;
910               case CS7: bits = 7; break;
911               case CS8: bits = 8; break;
912               /* Never happens, but GCC is too dumb to figure it out */
913               default:  bits = 8; break;
914         }
915         sbits = bits - 5;
916
917         if (cflag & CSTOPB) {
918                 cval |= SMCMR_SL;       /* Two stops */
919                 scval |= SCU_PMSR_SL;
920                 bits++;
921         }
922         if (cflag & PARENB) {
923                 cval |= SMCMR_PEN;
924                 scval |= SCU_PMSR_PEN;
925                 bits++;
926         }
927         if (!(cflag & PARODD)) {
928                 cval |= SMCMR_PM_EVEN;
929                 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
930         }
931
932         /* Determine divisor based on baud rate */
933         i = cflag & CBAUD;
934         if (i >= (sizeof(baud_table)/sizeof(int)))
935                 baud_rate = 9600;
936         else
937                 baud_rate = baud_table[i];
938
939         info->timeout = (TX_BUF_SIZE*HZ*bits);
940         info->timeout += HZ/50;         /* Add .02 seconds of slop */
941
942 #ifdef modem_control
943         /* CTS flow control flag and modem status interrupts */
944         info->IER &= ~UART_IER_MSI;
945         if (info->flags & ASYNC_HARDPPS_CD)
946                 info->IER |= UART_IER_MSI;
947         if (cflag & CRTSCTS) {
948                 info->flags |= ASYNC_CTS_FLOW;
949                 info->IER |= UART_IER_MSI;
950         } else
951                 info->flags &= ~ASYNC_CTS_FLOW;
952         if (cflag & CLOCAL)
953                 info->flags &= ~ASYNC_CHECK_CD;
954         else {
955                 info->flags |= ASYNC_CHECK_CD;
956                 info->IER |= UART_IER_MSI;
957         }
958         serial_out(info, UART_IER, info->IER);
959 #endif
960
961         /*
962          * Set up parity check flag
963          */
964 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
965
966         info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
967         if (I_INPCK(info->tty))
968                 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
969         if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
970                 info->read_status_mask |= BD_SC_BR;
971         
972         /*
973          * Characters to ignore
974          */
975         info->ignore_status_mask = 0;
976         if (I_IGNPAR(info->tty))
977                 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
978         if (I_IGNBRK(info->tty)) {
979                 info->ignore_status_mask |= BD_SC_BR;
980                 /*
981                  * If we're ignore parity and break indicators, ignore 
982                  * overruns too.  (For real raw support).
983                  */
984                 if (I_IGNPAR(info->tty))
985                         info->ignore_status_mask |= BD_SC_OV;
986         }
987         /*
988          * !!! ignore all characters if CREAD is not set
989          */
990         if ((cflag & CREAD) == 0)
991          info->read_status_mask &= ~BD_SC_EMPTY;
992          local_irq_save(flags);
993
994          /* Start bit has not been added (so don't, because we would just
995           * subtract it later), and we need to add one for the number of
996           * stops bits (there is always at least one).
997           */
998          bits++;
999          idx = PORT_NUM(state->smc_scc_num);
1000          if (state->smc_scc_num & NUM_IS_SCC) {
1001          sccp = &pquicc->scc_regs[idx];
1002          sccp->scc_psmr = (sbits << 12) | scval;
1003      } else {
1004          smcp = &pquicc->smc_regs[idx];
1005
1006                 /* Set the mode register.  We want to keep a copy of the
1007                  * enables, because we want to put them back if they were
1008                  * present.
1009                  */
1010                 prev_mode = smcp->smc_smcmr;
1011                 smcp->smc_smcmr = smcr_mk_clen(bits) | cval |  SMCMR_SM_UART;
1012                 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
1013         }
1014
1015         m360_cpm_setbrg((state - rs_table), baud_rate);
1016
1017         local_irq_restore(flags);
1018 }
1019
1020 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
1021 {
1022         ser_info_t *info = (ser_info_t *)tty->driver_data;
1023         volatile QUICC_BD       *bdp;
1024
1025         if (serial_paranoia_check(info, tty->name, "rs_put_char"))
1026                 return;
1027
1028         if (!tty)
1029                 return;
1030
1031         bdp = info->tx_cur;
1032         while (bdp->status & BD_SC_READY);
1033
1034         /* *((char *)__va(bdp->buf)) = ch; */
1035         *((char *)bdp->buf) = ch;
1036         bdp->length = 1;
1037         bdp->status |= BD_SC_READY;
1038
1039         /* Get next BD.
1040         */
1041         if (bdp->status & BD_SC_WRAP)
1042                 bdp = info->tx_bd_base;
1043         else
1044                 bdp++;
1045
1046         info->tx_cur = (QUICC_BD *)bdp;
1047
1048 }
1049
1050 static int rs_360_write(struct tty_struct * tty, int from_user,
1051                     const unsigned char *buf, int count)
1052 {
1053         int     c, ret = 0;
1054         ser_info_t *info = (ser_info_t *)tty->driver_data;
1055         volatile QUICC_BD *bdp;
1056
1057 #ifdef CONFIG_KGDB
1058         /* Try to let stub handle output. Returns true if it did. */ 
1059         if (kgdb_output_string(buf, count))
1060                 return ret;
1061 #endif
1062
1063         if (serial_paranoia_check(info, tty->name, "rs_write"))
1064                 return 0;
1065
1066         if (!tty) 
1067                 return 0;
1068
1069         bdp = info->tx_cur;
1070
1071         while (1) {
1072                 c = min(count, TX_BUF_SIZE);
1073
1074                 if (c <= 0)
1075                         break;
1076
1077                 if (bdp->status & BD_SC_READY) {
1078                         info->flags |= TX_WAKEUP;
1079                         break;
1080                 }
1081
1082                 if (from_user) {
1083                         if (copy_from_user((void *)bdp->buf, buf, c)) {
1084                                 if (!ret)
1085                                         ret = -EFAULT;
1086                                 break;
1087                         }
1088                 } else {
1089                         /* memcpy(__va(bdp->buf), buf, c); */
1090                         memcpy((void *)bdp->buf, buf, c);
1091                 }
1092
1093                 bdp->length = c;
1094                 bdp->status |= BD_SC_READY;
1095
1096                 buf += c;
1097                 count -= c;
1098                 ret += c;
1099
1100                 /* Get next BD.
1101                 */
1102                 if (bdp->status & BD_SC_WRAP)
1103                         bdp = info->tx_bd_base;
1104                 else
1105                         bdp++;
1106                 info->tx_cur = (QUICC_BD *)bdp;
1107         }
1108         return ret;
1109 }
1110
1111 static int rs_360_write_room(struct tty_struct *tty)
1112 {
1113         ser_info_t *info = (ser_info_t *)tty->driver_data;
1114         int     ret;
1115
1116         if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1117                 return 0;
1118
1119         if ((info->tx_cur->status & BD_SC_READY) == 0) {
1120                 info->flags &= ~TX_WAKEUP;
1121                 ret = TX_BUF_SIZE;
1122         }
1123         else {
1124                 info->flags |= TX_WAKEUP;
1125                 ret = 0;
1126         }
1127         return ret;
1128 }
1129
1130 /* I could track this with transmit counters....maybe later.
1131 */
1132 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1133 {
1134         ser_info_t *info = (ser_info_t *)tty->driver_data;
1135                                 
1136         if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1137                 return 0;
1138         return 0;
1139 }
1140
1141 static void rs_360_flush_buffer(struct tty_struct *tty)
1142 {
1143         ser_info_t *info = (ser_info_t *)tty->driver_data;
1144                                 
1145         if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1146                 return;
1147
1148         /* There is nothing to "flush", whatever we gave the CPM
1149          * is on its way out.
1150          */
1151         tty_wakeup(tty);
1152         info->flags &= ~TX_WAKEUP;
1153 }
1154
1155 /*
1156  * This function is used to send a high-priority XON/XOFF character to
1157  * the device
1158  */
1159 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1160 {
1161         volatile QUICC_BD       *bdp;
1162
1163         ser_info_t *info = (ser_info_t *)tty->driver_data;
1164
1165         if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1166                 return;
1167
1168         bdp = info->tx_cur;
1169         while (bdp->status & BD_SC_READY);
1170
1171         /* *((char *)__va(bdp->buf)) = ch; */
1172         *((char *)bdp->buf) = ch;
1173         bdp->length = 1;
1174         bdp->status |= BD_SC_READY;
1175
1176         /* Get next BD.
1177         */
1178         if (bdp->status & BD_SC_WRAP)
1179                 bdp = info->tx_bd_base;
1180         else
1181                 bdp++;
1182
1183         info->tx_cur = (QUICC_BD *)bdp;
1184 }
1185
1186 /*
1187  * ------------------------------------------------------------
1188  * rs_throttle()
1189  * 
1190  * This routine is called by the upper-layer tty layer to signal that
1191  * incoming characters should be throttled.
1192  * ------------------------------------------------------------
1193  */
1194 static void rs_360_throttle(struct tty_struct * tty)
1195 {
1196         ser_info_t *info = (ser_info_t *)tty->driver_data;
1197 #ifdef SERIAL_DEBUG_THROTTLE
1198         char    buf[64];
1199         
1200         printk("throttle %s: %d....\n", _tty_name(tty, buf),
1201                tty->ldisc.chars_in_buffer(tty));
1202 #endif
1203
1204         if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1205                 return;
1206         
1207         if (I_IXOFF(tty))
1208                 rs_360_send_xchar(tty, STOP_CHAR(tty));
1209
1210 #ifdef modem_control
1211         if (tty->termios->c_cflag & CRTSCTS)
1212                 info->MCR &= ~UART_MCR_RTS;
1213
1214         local_irq_disable();
1215         serial_out(info, UART_MCR, info->MCR);
1216         local_irq_enable();
1217 #endif
1218 }
1219
1220 static void rs_360_unthrottle(struct tty_struct * tty)
1221 {
1222         ser_info_t *info = (ser_info_t *)tty->driver_data;
1223 #ifdef SERIAL_DEBUG_THROTTLE
1224         char    buf[64];
1225         
1226         printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1227                tty->ldisc.chars_in_buffer(tty));
1228 #endif
1229
1230         if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1231                 return;
1232         
1233         if (I_IXOFF(tty)) {
1234                 if (info->x_char)
1235                         info->x_char = 0;
1236                 else
1237                         rs_360_send_xchar(tty, START_CHAR(tty));
1238         }
1239 #ifdef modem_control
1240         if (tty->termios->c_cflag & CRTSCTS)
1241                 info->MCR |= UART_MCR_RTS;
1242         local_irq_disable();
1243         serial_out(info, UART_MCR, info->MCR);
1244         local_irq_enable();
1245 #endif
1246 }
1247
1248 /*
1249  * ------------------------------------------------------------
1250  * rs_ioctl() and friends
1251  * ------------------------------------------------------------
1252  */
1253
1254 #ifdef maybe
1255 /*
1256  * get_lsr_info - get line status register info
1257  *
1258  * Purpose: Let user call ioctl() to get info when the UART physically
1259  *          is emptied.  On bus types like RS485, the transmitter must
1260  *          release the bus after transmitting. This must be done when
1261  *          the transmit shift register is empty, not be done when the
1262  *          transmit holding register is empty.  This functionality
1263  *          allows an RS485 driver to be written in user space. 
1264  */
1265 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1266 {
1267         unsigned char status;
1268         unsigned int result;
1269
1270         local_irq_disable();
1271         status = serial_in(info, UART_LSR);
1272         local_irq_enable();
1273         result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1274         return put_user(result,value);
1275 }
1276 #endif
1277
1278 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1279 {
1280         ser_info_t *info = (ser_info_t *)tty->driver_data;
1281         unsigned int result = 0;
1282 #ifdef modem_control
1283         unsigned char control, status;
1284
1285         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1286                 return -ENODEV;
1287
1288         if (tty->flags & (1 << TTY_IO_ERROR))
1289                 return -EIO;
1290
1291         control = info->MCR;
1292         local_irq_disable();
1293         status = serial_in(info, UART_MSR);
1294         local_irq_enable();
1295         result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1296                 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1297 #ifdef TIOCM_OUT1
1298                 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1299                 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1300 #endif
1301                 | ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
1302                 | ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
1303                 | ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
1304                 | ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
1305 #endif
1306         return result;
1307 }
1308
1309 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1310                            unsigned int set, unsigned int clear)
1311 {
1312 #ifdef modem_control
1313         ser_info_t *info = (ser_info_t *)tty->driver_data;
1314         unsigned int arg;
1315
1316         if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1317                 return -ENODEV;
1318
1319         if (tty->flags & (1 << TTY_IO_ERROR))
1320                 return -EIO;
1321
1322         if (set & TIOCM_RTS)
1323                 info->mcr |= UART_MCR_RTS;
1324         if (set & TIOCM_DTR)
1325                 info->mcr |= UART_MCR_DTR;
1326         if (clear & TIOCM_RTS)
1327                 info->MCR &= ~UART_MCR_RTS;
1328         if (clear & TIOCM_DTR)
1329                 info->MCR &= ~UART_MCR_DTR;
1330
1331 #ifdef TIOCM_OUT1
1332         if (set & TIOCM_OUT1)
1333                 info->MCR |= UART_MCR_OUT1;
1334         if (set & TIOCM_OUT2)
1335                 info->MCR |= UART_MCR_OUT2;
1336         if (clear & TIOCM_OUT1)
1337                 info->MCR &= ~UART_MCR_OUT1;
1338         if (clear & TIOCM_OUT2)
1339                 info->MCR &= ~UART_MCR_OUT2;
1340 #endif
1341
1342         local_irq_disable();
1343         serial_out(info, UART_MCR, info->MCR);
1344         local_irq_enable();
1345 #endif
1346         return 0;
1347 }
1348
1349 /* Sending a break is a two step process on the SMC/SCC.  It is accomplished
1350  * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1351  * command.  We take advantage of the begin/end functions to make this
1352  * happen.
1353  */
1354 static ushort   smc_chan_map[] = {
1355         CPM_CR_CH_SMC1,
1356         CPM_CR_CH_SMC2
1357 };
1358
1359 static ushort   scc_chan_map[] = {
1360         CPM_CR_CH_SCC1,
1361         CPM_CR_CH_SCC2,
1362         CPM_CR_CH_SCC3,
1363         CPM_CR_CH_SCC4
1364 };
1365
1366 static void begin_break(ser_info_t *info)
1367 {
1368         volatile QUICC *cp;
1369         ushort  chan;
1370         int     idx;
1371
1372         cp = pquicc;
1373
1374         idx = PORT_NUM(info->state->smc_scc_num);
1375         if (info->state->smc_scc_num & NUM_IS_SCC)
1376                 chan = scc_chan_map[idx];
1377         else
1378                 chan = smc_chan_map[idx];
1379
1380         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1381         while (cp->cp_cr & CPM_CR_FLG);
1382 }
1383
1384 static void end_break(ser_info_t *info)
1385 {
1386         volatile QUICC *cp;
1387         ushort  chan;
1388         int idx;
1389
1390         cp = pquicc;
1391
1392         idx = PORT_NUM(info->state->smc_scc_num);
1393         if (info->state->smc_scc_num & NUM_IS_SCC)
1394                 chan = scc_chan_map[idx];
1395         else
1396                 chan = smc_chan_map[idx];
1397
1398         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1399         while (cp->cp_cr & CPM_CR_FLG);
1400 }
1401
1402 /*
1403  * This routine sends a break character out the serial port.
1404  */
1405 static void send_break(ser_info_t *info, int duration)
1406 {
1407         current->state = TASK_INTERRUPTIBLE;
1408 #ifdef SERIAL_DEBUG_SEND_BREAK
1409         printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1410 #endif
1411         begin_break(info);
1412         schedule_timeout(duration);
1413         end_break(info);
1414 #ifdef SERIAL_DEBUG_SEND_BREAK
1415         printk("done jiffies=%lu\n", jiffies);
1416 #endif
1417 }
1418
1419
1420 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1421                     unsigned int cmd, unsigned long arg)
1422 {
1423         int error;
1424         ser_info_t *info = (ser_info_t *)tty->driver_data;
1425         int retval;
1426         struct async_icount cnow; 
1427         /* struct async_icount_24 cnow;*/       /* kernel counter temps */
1428         struct serial_icounter_struct *p_cuser; /* user space */
1429
1430         if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1431                 return -ENODEV;
1432
1433         if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1434                 if (tty->flags & (1 << TTY_IO_ERROR))
1435                     return -EIO;
1436         }
1437         
1438         switch (cmd) {
1439                 case TCSBRK:    /* SVID version: non-zero arg --> no break */
1440                         retval = tty_check_change(tty);
1441                         if (retval)
1442                                 return retval;
1443                         tty_wait_until_sent(tty, 0);
1444                         if (signal_pending(current))
1445                                 return -EINTR;
1446                         if (!arg) {
1447                                 send_break(info, HZ/4); /* 1/4 second */
1448                                 if (signal_pending(current))
1449                                         return -EINTR;
1450                         }
1451                         return 0;
1452                 case TCSBRKP:   /* support for POSIX tcsendbreak() */
1453                         retval = tty_check_change(tty);
1454                         if (retval)
1455                                 return retval;
1456                         tty_wait_until_sent(tty, 0);
1457                         if (signal_pending(current))
1458                                 return -EINTR;
1459                         send_break(info, arg ? arg*(HZ/10) : HZ/4);
1460                         if (signal_pending(current))
1461                                 return -EINTR;
1462                         return 0;
1463                 case TIOCSBRK:
1464                         retval = tty_check_change(tty);
1465                         if (retval)
1466                                 return retval;
1467                         tty_wait_until_sent(tty, 0);
1468                         begin_break(info);
1469                         return 0;
1470                 case TIOCCBRK:
1471                         retval = tty_check_change(tty);
1472                         if (retval)
1473                                 return retval;
1474                         end_break(info);
1475                         return 0;
1476                 case TIOCGSOFTCAR:
1477                         /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1478                         put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1479                         return 0;
1480                 case TIOCSSOFTCAR:
1481                         error = get_user(arg, (unsigned int *) arg); 
1482                         if (error)
1483                                 return error;
1484                         tty->termios->c_cflag =
1485                                 ((tty->termios->c_cflag & ~CLOCAL) |
1486                                  (arg ? CLOCAL : 0));
1487                         return 0;
1488 #ifdef maybe
1489                 case TIOCSERGETLSR: /* Get line status register */
1490                         return get_lsr_info(info, (unsigned int *) arg);
1491 #endif
1492                 /*
1493                  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1494                  * - mask passed in arg for lines of interest
1495                  *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1496                  * Caller should use TIOCGICOUNT to see which one it was
1497                  */
1498                  case TIOCMIWAIT:
1499 #ifdef modem_control
1500                         local_irq_disable();
1501                         /* note the counters on entry */
1502                         cprev = info->state->icount;
1503                         local_irq_enable();
1504                         while (1) {
1505                                 interruptible_sleep_on(&info->delta_msr_wait);
1506                                 /* see if a signal did it */
1507                                 if (signal_pending(current))
1508                                         return -ERESTARTSYS;
1509                                 local_irq_disable();
1510                                 cnow = info->state->icount; /* atomic copy */
1511                                 local_irq_enable();
1512                                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
1513                                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1514                                         return -EIO; /* no change => error */
1515                                 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1516                                      ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1517                                      ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
1518                                      ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1519                                         return 0;
1520                                 }
1521                                 cprev = cnow;
1522                         }
1523                         /* NOTREACHED */
1524 #else
1525                         return 0;
1526 #endif
1527
1528                 /* 
1529                  * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1530                  * Return: write counters to the user passed counter struct
1531                  * NB: both 1->0 and 0->1 transitions are counted except for
1532                  *     RI where only 0->1 is counted.
1533                  */
1534                 case TIOCGICOUNT:
1535                         local_irq_disable();
1536                         cnow = info->state->icount;
1537                         local_irq_enable();
1538                         p_cuser = (struct serial_icounter_struct *) arg;
1539 /*                      error = put_user(cnow.cts, &p_cuser->cts); */
1540 /*                      if (error) return error; */
1541 /*                      error = put_user(cnow.dsr, &p_cuser->dsr); */
1542 /*                      if (error) return error; */
1543 /*                      error = put_user(cnow.rng, &p_cuser->rng); */
1544 /*                      if (error) return error; */
1545 /*                      error = put_user(cnow.dcd, &p_cuser->dcd); */
1546 /*                      if (error) return error; */
1547
1548                         put_user(cnow.cts, &p_cuser->cts);
1549                         put_user(cnow.dsr, &p_cuser->dsr);
1550                         put_user(cnow.rng, &p_cuser->rng);
1551                         put_user(cnow.dcd, &p_cuser->dcd);
1552                         return 0;
1553
1554                 default:
1555                         return -ENOIOCTLCMD;
1556                 }
1557         return 0;
1558 }
1559
1560 /* FIX UP modem control here someday......
1561 */
1562 static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
1563 {
1564         ser_info_t *info = (ser_info_t *)tty->driver_data;
1565
1566         if (   (tty->termios->c_cflag == old_termios->c_cflag)
1567             && (   RELEVANT_IFLAG(tty->termios->c_iflag) 
1568                 == RELEVANT_IFLAG(old_termios->c_iflag)))
1569           return;
1570
1571         change_speed(info);
1572
1573 #ifdef modem_control
1574         /* Handle transition to B0 status */
1575         if ((old_termios->c_cflag & CBAUD) &&
1576             !(tty->termios->c_cflag & CBAUD)) {
1577                 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1578                 local_irq_disable();
1579                 serial_out(info, UART_MCR, info->MCR);
1580                 local_irq_enable();
1581         }
1582         
1583         /* Handle transition away from B0 status */
1584         if (!(old_termios->c_cflag & CBAUD) &&
1585             (tty->termios->c_cflag & CBAUD)) {
1586                 info->MCR |= UART_MCR_DTR;
1587                 if (!tty->hw_stopped ||
1588                     !(tty->termios->c_cflag & CRTSCTS)) {
1589                         info->MCR |= UART_MCR_RTS;
1590                 }
1591                 local_irq_disable();
1592                 serial_out(info, UART_MCR, info->MCR);
1593                 local_irq_enable();
1594         }
1595         
1596         /* Handle turning off CRTSCTS */
1597         if ((old_termios->c_cflag & CRTSCTS) &&
1598             !(tty->termios->c_cflag & CRTSCTS)) {
1599                 tty->hw_stopped = 0;
1600                 rs_360_start(tty);
1601         }
1602 #endif
1603
1604 #if 0
1605         /*
1606          * No need to wake up processes in open wait, since they
1607          * sample the CLOCAL flag once, and don't recheck it.
1608          * XXX  It's not clear whether the current behavior is correct
1609          * or not.  Hence, this may change.....
1610          */
1611         if (!(old_termios->c_cflag & CLOCAL) &&
1612             (tty->termios->c_cflag & CLOCAL))
1613                 wake_up_interruptible(&info->open_wait);
1614 #endif
1615 }
1616
1617 /*
1618  * ------------------------------------------------------------
1619  * rs_close()
1620  * 
1621  * This routine is called when the serial port gets closed.  First, we
1622  * wait for the last remaining data to be sent.  Then, we unlink its
1623  * async structure from the interrupt chain if necessary, and we free
1624  * that IRQ if nothing is left in the chain.
1625  * ------------------------------------------------------------
1626  */
1627 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1628 {
1629         ser_info_t *info = (ser_info_t *)tty->driver_data;
1630         /* struct async_state *state; */
1631         struct serial_state *state;
1632         unsigned long   flags;
1633         int             idx;
1634         volatile struct smc_regs        *smcp;
1635         volatile struct scc_regs        *sccp;
1636
1637         if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1638                 return;
1639
1640         state = info->state;
1641         
1642         local_irq_save(flags);
1643         
1644         if (tty_hung_up_p(filp)) {
1645                 DBG_CNT("before DEC-hung");
1646                 local_irq_restore(flags);
1647                 return;
1648         }
1649         
1650 #ifdef SERIAL_DEBUG_OPEN
1651         printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1652 #endif
1653         if ((tty->count == 1) && (state->count != 1)) {
1654                 /*
1655                  * Uh, oh.  tty->count is 1, which means that the tty
1656                  * structure will be freed.  state->count should always
1657                  * be one in these conditions.  If it's greater than
1658                  * one, we've got real problems, since it means the
1659                  * serial port won't be shutdown.
1660                  */
1661                 printk("rs_close: bad serial port count; tty->count is 1, "
1662                        "state->count is %d\n", state->count);
1663                 state->count = 1;
1664         }
1665         if (--state->count < 0) {
1666                 printk("rs_close: bad serial port count for ttys%d: %d\n",
1667                        info->line, state->count);
1668                 state->count = 0;
1669         }
1670         if (state->count) {
1671                 DBG_CNT("before DEC-2");
1672                 local_irq_restore(flags);
1673                 return;
1674         }
1675         info->flags |= ASYNC_CLOSING;
1676         /*
1677          * Now we wait for the transmit buffer to clear; and we notify 
1678          * the line discipline to only process XON/XOFF characters.
1679          */
1680         tty->closing = 1;
1681         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1682                 tty_wait_until_sent(tty, info->closing_wait);
1683         /*
1684          * At this point we stop accepting input.  To do this, we
1685          * disable the receive line status interrupts, and tell the
1686          * interrupt driver to stop checking the data ready bit in the
1687          * line status register.
1688          */
1689         info->read_status_mask &= ~BD_SC_EMPTY;
1690         if (info->flags & ASYNC_INITIALIZED) {
1691
1692                 idx = PORT_NUM(info->state->smc_scc_num);
1693                 if (info->state->smc_scc_num & NUM_IS_SCC) {
1694                         sccp = &pquicc->scc_regs[idx];
1695                         sccp->scc_sccm &= ~UART_SCCM_RX;
1696                         sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1697                 } else {
1698                         smcp = &pquicc->smc_regs[idx];
1699                         smcp->smc_smcm &= ~SMCM_RX;
1700                         smcp->smc_smcmr &= ~SMCMR_REN;
1701                 }
1702                 /*
1703                  * Before we drop DTR, make sure the UART transmitter
1704                  * has completely drained; this is especially
1705                  * important if there is a transmit FIFO!
1706                  */
1707                 rs_360_wait_until_sent(tty, info->timeout);
1708         }
1709         shutdown(info);
1710         if (tty->driver->flush_buffer)
1711                 tty->driver->flush_buffer(tty);
1712         tty_ldisc_flush(tty);           
1713         tty->closing = 0;
1714         info->event = 0;
1715         info->tty = 0;
1716         if (info->blocked_open) {
1717                 if (info->close_delay) {
1718                         current->state = TASK_INTERRUPTIBLE;
1719                         schedule_timeout(info->close_delay);
1720                 }
1721                 wake_up_interruptible(&info->open_wait);
1722         }
1723         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1724         wake_up_interruptible(&info->close_wait);
1725         local_irq_restore(flags);
1726 }
1727
1728 /*
1729  * rs_wait_until_sent() --- wait until the transmitter is empty
1730  */
1731 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1732 {
1733         ser_info_t *info = (ser_info_t *)tty->driver_data;
1734         unsigned long orig_jiffies, char_time;
1735         /*int lsr;*/
1736         volatile QUICC_BD *bdp;
1737         
1738         if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1739                 return;
1740
1741 #ifdef maybe
1742         if (info->state->type == PORT_UNKNOWN)
1743                 return;
1744 #endif
1745
1746         orig_jiffies = jiffies;
1747         /*
1748          * Set the check interval to be 1/5 of the estimated time to
1749          * send a single character, and make it at least 1.  The check
1750          * interval should also be less than the timeout.
1751          * 
1752          * Note: we have to use pretty tight timings here to satisfy
1753          * the NIST-PCTS.
1754          */
1755         char_time = 1;
1756         if (timeout)
1757                 char_time = min(char_time, (unsigned long)timeout);
1758 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1759         printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1760         printk("jiff=%lu...", jiffies);
1761 #endif
1762
1763         /* We go through the loop at least once because we can't tell
1764          * exactly when the last character exits the shifter.  There can
1765          * be at least two characters waiting to be sent after the buffers
1766          * are empty.
1767          */
1768         do {
1769 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1770                 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1771 #endif
1772                 current->state = TASK_INTERRUPTIBLE;
1773 /*              current->counter = 0;    make us low-priority */
1774                 schedule_timeout(char_time);
1775                 if (signal_pending(current))
1776                         break;
1777                 if (timeout && ((orig_jiffies + timeout) < jiffies))
1778                         break;
1779                 /* The 'tx_cur' is really the next buffer to send.  We
1780                  * have to back up to the previous BD and wait for it
1781                  * to go.  This isn't perfect, because all this indicates
1782                  * is the buffer is available.  There are still characters
1783                  * in the CPM FIFO.
1784                  */
1785                 bdp = info->tx_cur;
1786                 if (bdp == info->tx_bd_base)
1787                         bdp += (TX_NUM_FIFO-1);
1788                 else
1789                         bdp--;
1790         } while (bdp->status & BD_SC_READY);
1791         current->state = TASK_RUNNING;
1792 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1793         printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1794 #endif
1795 }
1796
1797 /*
1798  * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1799  */
1800 static void rs_360_hangup(struct tty_struct *tty)
1801 {
1802         ser_info_t *info = (ser_info_t *)tty->driver_data;
1803         struct serial_state *state = info->state;
1804         
1805         if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1806                 return;
1807
1808         state = info->state;
1809         
1810         rs_360_flush_buffer(tty);
1811         shutdown(info);
1812         info->event = 0;
1813         state->count = 0;
1814         info->flags &= ~ASYNC_NORMAL_ACTIVE;
1815         info->tty = 0;
1816         wake_up_interruptible(&info->open_wait);
1817 }
1818
1819 /*
1820  * ------------------------------------------------------------
1821  * rs_open() and friends
1822  * ------------------------------------------------------------
1823  */
1824 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1825                            ser_info_t *info)
1826 {
1827 #ifdef DO_THIS_LATER
1828         DECLARE_WAITQUEUE(wait, current);
1829 #endif
1830         struct serial_state *state = info->state;
1831         int             retval;
1832         int             do_clocal = 0;
1833
1834         /*
1835          * If the device is in the middle of being closed, then block
1836          * until it's done, and then try again.
1837          */
1838         if (tty_hung_up_p(filp) ||
1839             (info->flags & ASYNC_CLOSING)) {
1840                 if (info->flags & ASYNC_CLOSING)
1841                         interruptible_sleep_on(&info->close_wait);
1842 #ifdef SERIAL_DO_RESTART
1843                 if (info->flags & ASYNC_HUP_NOTIFY)
1844                         return -EAGAIN;
1845                 else
1846                         return -ERESTARTSYS;
1847 #else
1848                 return -EAGAIN;
1849 #endif
1850         }
1851
1852         /*
1853          * If non-blocking mode is set, or the port is not enabled,
1854          * then make the check up front and then exit.
1855          * If this is an SMC port, we don't have modem control to wait
1856          * for, so just get out here.
1857          */
1858         if ((filp->f_flags & O_NONBLOCK) ||
1859             (tty->flags & (1 << TTY_IO_ERROR)) ||
1860             !(info->state->smc_scc_num & NUM_IS_SCC)) {
1861                 info->flags |= ASYNC_NORMAL_ACTIVE;
1862                 return 0;
1863         }
1864
1865         if (tty->termios->c_cflag & CLOCAL)
1866                 do_clocal = 1;
1867         
1868         /*
1869          * Block waiting for the carrier detect and the line to become
1870          * free (i.e., not in use by the callout).  While we are in
1871          * this loop, state->count is dropped by one, so that
1872          * rs_close() knows when to free things.  We restore it upon
1873          * exit, either normal or abnormal.
1874          */
1875         retval = 0;
1876 #ifdef DO_THIS_LATER
1877         add_wait_queue(&info->open_wait, &wait);
1878 #ifdef SERIAL_DEBUG_OPEN
1879         printk("block_til_ready before block: ttys%d, count = %d\n",
1880                state->line, state->count);
1881 #endif
1882         local_irq_disable();
1883         if (!tty_hung_up_p(filp)) 
1884                 state->count--;
1885         local_irq_enable();
1886         info->blocked_open++;
1887         while (1) {
1888                 local_irq_disable();
1889                 if (tty->termios->c_cflag & CBAUD)
1890                         serial_out(info, UART_MCR,
1891                                    serial_inp(info, UART_MCR) |
1892                                    (UART_MCR_DTR | UART_MCR_RTS));
1893                 local_irq_enable();
1894                 set_current_state(TASK_INTERRUPTIBLE);
1895                 if (tty_hung_up_p(filp) ||
1896                     !(info->flags & ASYNC_INITIALIZED)) {
1897 #ifdef SERIAL_DO_RESTART
1898                         if (info->flags & ASYNC_HUP_NOTIFY)
1899                                 retval = -EAGAIN;
1900                         else
1901                                 retval = -ERESTARTSYS;  
1902 #else
1903                         retval = -EAGAIN;
1904 #endif
1905                         break;
1906                 }
1907                 if (!(info->flags & ASYNC_CLOSING) &&
1908                     (do_clocal || (serial_in(info, UART_MSR) &
1909                                    UART_MSR_DCD)))
1910                         break;
1911                 if (signal_pending(current)) {
1912                         retval = -ERESTARTSYS;
1913                         break;
1914                 }
1915 #ifdef SERIAL_DEBUG_OPEN
1916                 printk("block_til_ready blocking: ttys%d, count = %d\n",
1917                        info->line, state->count);
1918 #endif
1919                 schedule();
1920         }
1921         current->state = TASK_RUNNING;
1922         remove_wait_queue(&info->open_wait, &wait);
1923         if (!tty_hung_up_p(filp))
1924                 state->count++;
1925         info->blocked_open--;
1926 #ifdef SERIAL_DEBUG_OPEN
1927         printk("block_til_ready after blocking: ttys%d, count = %d\n",
1928                info->line, state->count);
1929 #endif
1930 #endif /* DO_THIS_LATER */
1931         if (retval)
1932                 return retval;
1933         info->flags |= ASYNC_NORMAL_ACTIVE;
1934         return 0;
1935 }
1936
1937 static int get_async_struct(int line, ser_info_t **ret_info)
1938 {
1939         struct serial_state *sstate;
1940
1941         sstate = rs_table + line;
1942         if (sstate->info) {
1943                 sstate->count++;
1944                 *ret_info = (ser_info_t *)sstate->info;
1945                 return 0;
1946         }
1947         else {
1948                 return -ENOMEM;
1949         }
1950 }
1951
1952 /*
1953  * This routine is called whenever a serial port is opened.  It
1954  * enables interrupts for a serial port, linking in its async structure into
1955  * the IRQ chain.   It also performs the serial-specific
1956  * initialization for the tty structure.
1957  */
1958 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1959 {
1960         ser_info_t      *info;
1961         int             retval, line;
1962
1963         line = tty->index;
1964         if ((line < 0) || (line >= NR_PORTS))
1965                 return -ENODEV;
1966         retval = get_async_struct(line, &info);
1967         if (retval)
1968                 return retval;
1969         if (serial_paranoia_check(info, tty->name, "rs_open"))
1970                 return -ENODEV;
1971
1972 #ifdef SERIAL_DEBUG_OPEN
1973         printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1974 #endif
1975         tty->driver_data = info;
1976         info->tty = tty;
1977
1978         /*
1979          * Start up serial port
1980          */
1981         retval = startup(info);
1982         if (retval)
1983                 return retval;
1984
1985         retval = block_til_ready(tty, filp, info);
1986         if (retval) {
1987 #ifdef SERIAL_DEBUG_OPEN
1988                 printk("rs_open returning after block_til_ready with %d\n",
1989                        retval);
1990 #endif
1991                 return retval;
1992         }
1993
1994 #ifdef SERIAL_DEBUG_OPEN
1995         printk("rs_open %s successful...", tty->name);
1996 #endif
1997         return 0;
1998 }
1999
2000 /*
2001  * /proc fs routines....
2002  */
2003
2004 static inline int line_info(char *buf, struct serial_state *state)
2005 {
2006 #ifdef notdef
2007         struct async_struct *info = state->info, scr_info;
2008         char    stat_buf[30], control, status;
2009 #endif
2010         int     ret;
2011
2012         ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
2013                       state->line,
2014                       (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
2015                       (unsigned int)(state->port), state->irq);
2016
2017         if (!state->port || (state->type == PORT_UNKNOWN)) {
2018                 ret += sprintf(buf+ret, "\n");
2019                 return ret;
2020         }
2021
2022 #ifdef notdef
2023         /*
2024          * Figure out the current RS-232 lines
2025          */
2026         if (!info) {
2027                 info = &scr_info;       /* This is just for serial_{in,out} */
2028
2029                 info->magic = SERIAL_MAGIC;
2030                 info->port = state->port;
2031                 info->flags = state->flags;
2032                 info->quot = 0;
2033                 info->tty = 0;
2034         }
2035         local_irq_disable();
2036         status = serial_in(info, UART_MSR);
2037         control = info ? info->MCR : serial_in(info, UART_MCR);
2038         local_irq_enable();
2039         
2040         stat_buf[0] = 0;
2041         stat_buf[1] = 0;
2042         if (control & UART_MCR_RTS)
2043                 strcat(stat_buf, "|RTS");
2044         if (status & UART_MSR_CTS)
2045                 strcat(stat_buf, "|CTS");
2046         if (control & UART_MCR_DTR)
2047                 strcat(stat_buf, "|DTR");
2048         if (status & UART_MSR_DSR)
2049                 strcat(stat_buf, "|DSR");
2050         if (status & UART_MSR_DCD)
2051                 strcat(stat_buf, "|CD");
2052         if (status & UART_MSR_RI)
2053                 strcat(stat_buf, "|RI");
2054
2055         if (info->quot) {
2056                 ret += sprintf(buf+ret, " baud:%d",
2057                                state->baud_base / info->quot);
2058         }
2059
2060         ret += sprintf(buf+ret, " tx:%d rx:%d",
2061                       state->icount.tx, state->icount.rx);
2062
2063         if (state->icount.frame)
2064                 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2065         
2066         if (state->icount.parity)
2067                 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2068         
2069         if (state->icount.brk)
2070                 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);  
2071
2072         if (state->icount.overrun)
2073                 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2074
2075         /*
2076          * Last thing is the RS-232 status lines
2077          */
2078         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2079 #endif
2080         return ret;
2081 }
2082
2083 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2084                  int *eof, void *data)
2085 {
2086         int i, len = 0;
2087         off_t   begin = 0;
2088
2089         len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2090         for (i = 0; i < NR_PORTS && len < 4000; i++) {
2091                 len += line_info(page + len, &rs_table[i]);
2092                 if (len+begin > off+count)
2093                         goto done;
2094                 if (len+begin < off) {
2095                         begin += len;
2096                         len = 0;
2097                 }
2098         }
2099         *eof = 1;
2100 done:
2101         if (off >= len+begin)
2102                 return 0;
2103         *start = page + (begin-off);
2104         return ((count < begin+len-off) ? count : begin+len-off);
2105 }
2106
2107 /*
2108  * ---------------------------------------------------------------------
2109  * rs_init() and friends
2110  *
2111  * rs_init() is called at boot-time to initialize the serial driver.
2112  * ---------------------------------------------------------------------
2113  */
2114
2115 /*
2116  * This routine prints out the appropriate serial driver version
2117  * number, and identifies which options were configured into this
2118  * driver.
2119  */
2120 static _INLINE_ void show_serial_version(void)
2121 {
2122         printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2123 }
2124
2125
2126 /*
2127  * The serial console driver used during boot.  Note that these names
2128  * clash with those found in "serial.c", so we currently can't support
2129  * the 16xxx uarts and these at the same time.  I will fix this to become
2130  * an indirect function call from tty_io.c (or something).
2131  */
2132
2133 #ifdef CONFIG_SERIAL_CONSOLE
2134
2135 /*
2136  * Print a string to the serial port trying not to disturb any possible
2137  * real use of the port...
2138  */
2139 static void my_console_write(int idx, const char *s,
2140                                 unsigned count)
2141 {
2142         struct          serial_state    *ser;
2143         ser_info_t              *info;
2144         unsigned                i;
2145         QUICC_BD                *bdp, *bdbase;
2146         volatile struct smc_uart_pram   *up;
2147         volatile        u_char          *cp;
2148
2149         ser = rs_table + idx;
2150
2151
2152         /* If the port has been initialized for general use, we have
2153          * to use the buffer descriptors allocated there.  Otherwise,
2154          * we simply use the single buffer allocated.
2155          */
2156         if ((info = (ser_info_t *)ser->info) != NULL) {
2157                 bdp = info->tx_cur;
2158                 bdbase = info->tx_bd_base;
2159         }
2160         else {
2161                 /* Pointer to UART in parameter ram.
2162                 */
2163                 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2164                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2165
2166                 /* Get the address of the host memory buffer.
2167                  */
2168                 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2169         }
2170
2171         /*
2172          * We need to gracefully shut down the transmitter, disable
2173          * interrupts, then send our bytes out.
2174          */
2175
2176         /*
2177          * Now, do each character.  This is not as bad as it looks
2178          * since this is a holding FIFO and not a transmitting FIFO.
2179          * We could add the complexity of filling the entire transmit
2180          * buffer, but we would just wait longer between accesses......
2181          */
2182         for (i = 0; i < count; i++, s++) {
2183                 /* Wait for transmitter fifo to empty.
2184                  * Ready indicates output is ready, and xmt is doing
2185                  * that, not that it is ready for us to send.
2186                  */
2187                 while (bdp->status & BD_SC_READY);
2188
2189                 /* Send the character out.
2190                  */
2191                 cp = bdp->buf;
2192                 *cp = *s;
2193                 
2194                 bdp->length = 1;
2195                 bdp->status |= BD_SC_READY;
2196
2197                 if (bdp->status & BD_SC_WRAP)
2198                         bdp = bdbase;
2199                 else
2200                         bdp++;
2201
2202                 /* if a LF, also do CR... */
2203                 if (*s == 10) {
2204                         while (bdp->status & BD_SC_READY);
2205                         /* cp = __va(bdp->buf); */
2206                         cp = bdp->buf;
2207                         *cp = 13;
2208                         bdp->length = 1;
2209                         bdp->status |= BD_SC_READY;
2210
2211                         if (bdp->status & BD_SC_WRAP) {
2212                                 bdp = bdbase;
2213                         }
2214                         else {
2215                                 bdp++;
2216                         }
2217                 }
2218         }
2219
2220         /*
2221          * Finally, Wait for transmitter & holding register to empty
2222          *  and restore the IER
2223          */
2224         while (bdp->status & BD_SC_READY);
2225
2226         if (info)
2227                 info->tx_cur = (QUICC_BD *)bdp;
2228 }
2229
2230 static void serial_console_write(struct console *c, const char *s,
2231                                 unsigned count)
2232 {
2233 #ifdef CONFIG_KGDB
2234         /* Try to let stub handle output. Returns true if it did. */ 
2235         if (kgdb_output_string(s, count))
2236                 return;
2237 #endif
2238         my_console_write(c->index, s, count);
2239 }
2240
2241
2242
2243 /*void console_print_68360(const char *p)
2244 {
2245         const char *cp = p;
2246         int i;
2247
2248         for (i=0;cp[i]!=0;i++);
2249
2250         serial_console_write (p, i);
2251
2252         //Comment this if you want to have a strict interrupt-driven output
2253         //rs_fair_output();
2254
2255         return;
2256 }*/
2257
2258
2259
2260
2261
2262
2263 #ifdef CONFIG_XMON
2264 int
2265 xmon_360_write(const char *s, unsigned count)
2266 {
2267         my_console_write(0, s, count);
2268         return(count);
2269 }
2270 #endif
2271
2272 #ifdef CONFIG_KGDB
2273 void
2274 putDebugChar(char ch)
2275 {
2276         my_console_write(0, &ch, 1);
2277 }
2278 #endif
2279
2280 /*
2281  * Receive character from the serial port.  This only works well
2282  * before the port is initialized for real use.
2283  */
2284 static int my_console_wait_key(int idx, int xmon, char *obuf)
2285 {
2286         struct serial_state             *ser;
2287         u_char                  c, *cp;
2288         ser_info_t              *info;
2289         QUICC_BD                *bdp;
2290         volatile struct smc_uart_pram   *up;
2291         int                             i;
2292
2293         ser = rs_table + idx;
2294
2295         /* Get the address of the host memory buffer.
2296          * If the port has been initialized for general use, we must
2297          * use information from the port structure.
2298          */
2299         if ((info = (ser_info_t *)ser->info))
2300                 bdp = info->rx_cur;
2301         else
2302                 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2303                 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2304
2305         /* Pointer to UART in parameter ram.
2306          */
2307         /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2308         up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2309
2310         /*
2311          * We need to gracefully shut down the receiver, disable
2312          * interrupts, then read the input.
2313          * XMON just wants a poll.  If no character, return -1, else
2314          * return the character.
2315          */
2316         if (!xmon) {
2317                 while (bdp->status & BD_SC_EMPTY);
2318         }
2319         else {
2320                 if (bdp->status & BD_SC_EMPTY)
2321                         return -1;
2322         }
2323
2324         cp = (char *)bdp->buf;
2325
2326         if (obuf) {
2327                 i = c = bdp->length;
2328                 while (i-- > 0)
2329                         *obuf++ = *cp++;
2330         }
2331         else {
2332                 c = *cp;
2333         }
2334         bdp->status |= BD_SC_EMPTY;
2335
2336         if (info) {
2337                 if (bdp->status & BD_SC_WRAP) {
2338                         bdp = info->rx_bd_base;
2339                 }
2340                 else {
2341                         bdp++;
2342                 }
2343                 info->rx_cur = (QUICC_BD *)bdp;
2344         }
2345
2346         return((int)c);
2347 }
2348
2349 static int serial_console_wait_key(struct console *co)
2350 {
2351         return(my_console_wait_key(co->index, 0, NULL));
2352 }
2353
2354 #ifdef CONFIG_XMON
2355 int
2356 xmon_360_read_poll(void)
2357 {
2358         return(my_console_wait_key(0, 1, NULL));
2359 }
2360
2361 int
2362 xmon_360_read_char(void)
2363 {
2364         return(my_console_wait_key(0, 0, NULL));
2365 }
2366 #endif
2367
2368 #ifdef CONFIG_KGDB
2369 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2370 static int kgdb_chars;
2371
2372 unsigned char
2373 getDebugChar(void)
2374 {
2375         if (kgdb_chars <= 0) {
2376                 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2377                 kgdp = kgdb_buf;
2378         }
2379         kgdb_chars--;
2380
2381         return(*kgdp++);
2382 }
2383
2384 void kgdb_interruptible(int state)
2385 {
2386 }
2387 void kgdb_map_scc(void)
2388 {
2389         struct          serial_state *ser;
2390         uint            mem_addr;
2391         volatile        QUICC_BD                *bdp;
2392         volatile        smc_uart_t      *up;
2393
2394         cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2395
2396         /* To avoid data cache CPM DMA coherency problems, allocate a
2397          * buffer in the CPM DPRAM.  This will work until the CPM and
2398          * serial ports are initialized.  At that time a memory buffer
2399          * will be allocated.
2400          * The port is already initialized from the boot procedure, all
2401          * we do here is give it a different buffer and make it a FIFO.
2402          */
2403
2404         ser = rs_table;
2405
2406         /* Right now, assume we are using SMCs.
2407         */
2408         up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2409
2410         /* Allocate space for an input FIFO, plus a few bytes for output.
2411          * Allocate bytes to maintain word alignment.
2412          */
2413         mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2414
2415         /* Set the physical address of the host memory buffers in
2416          * the buffer descriptors.
2417          */
2418         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2419         bdp->buf = mem_addr;
2420
2421         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2422         bdp->buf = mem_addr+RX_BUF_SIZE;
2423
2424         up->smc_mrblr = RX_BUF_SIZE;            /* receive buffer length */
2425         up->smc_maxidl = RX_BUF_SIZE;
2426 }
2427 #endif
2428
2429 static struct tty_struct *serial_console_device(struct console *c, int *index)
2430 {
2431         *index = c->index;
2432         return serial_driver;
2433 }
2434
2435
2436 struct console sercons = {
2437         .name           = "ttyS",
2438         .write          = serial_console_write,
2439         .device         = serial_console_device,
2440         .wait_key       = serial_console_wait_key,
2441         .setup          = serial_console_setup,
2442         .flags          = CON_PRINTBUFFER,
2443         .index          = CONFIG_SERIAL_CONSOLE_PORT, 
2444 };
2445
2446
2447
2448 /*
2449  *      Register console.
2450  */
2451 long console_360_init(long kmem_start, long kmem_end)
2452 {
2453         register_console(&sercons);
2454         /*register_console (console_print_68360); - 2.0.38 only required a write
2455       function pointer. */
2456         return kmem_start;
2457 }
2458
2459 #endif
2460
2461 /* Index in baud rate table of the default console baud rate.
2462 */
2463 static  int     baud_idx;
2464
2465 static struct tty_operations rs_360_ops = {
2466         .owner = THIS_MODULE,
2467         .open = rs_360_open,
2468         .close = rs_360_close,
2469         .write = rs_360_write,
2470         .put_char = rs_360_put_char,
2471         .write_room = rs_360_write_room,
2472         .chars_in_buffer = rs_360_chars_in_buffer,
2473         .flush_buffer = rs_360_flush_buffer,
2474         .ioctl = rs_360_ioctl,
2475         .throttle = rs_360_throttle,
2476         .unthrottle = rs_360_unthrottle,
2477         /* .send_xchar = rs_360_send_xchar, */
2478         .set_termios = rs_360_set_termios,
2479         .stop = rs_360_stop,
2480         .start = rs_360_start,
2481         .hangup = rs_360_hangup,
2482         /* .wait_until_sent = rs_360_wait_until_sent, */
2483         /* .read_proc = rs_360_read_proc, */
2484         .tiocmget = rs_360_tiocmget,
2485         .tiocmset = rs_360_tiocmset,
2486 };
2487
2488 /* int __init rs_360_init(void) */
2489 int rs_360_init(void)
2490 {
2491         struct serial_state * state;
2492         ser_info_t      *info;
2493         void       *mem_addr;
2494         uint            dp_addr, iobits;
2495         int                 i, j, idx;
2496         ushort          chan;
2497         QUICC_BD        *bdp;
2498         volatile        QUICC           *cp;
2499         volatile        struct smc_regs *sp;
2500         volatile        struct smc_uart_pram    *up;
2501         volatile        struct scc_regs *scp;
2502         volatile        struct uart_pram        *sup;
2503         /* volatile     immap_t         *immap; */
2504         
2505         serial_driver = alloc_tty_driver(NR_PORTS);
2506         if (!serial_driver)
2507                 return -1;
2508
2509         show_serial_version();
2510
2511         serial_driver->name = "ttyS";
2512         serial_driver->major = TTY_MAJOR;
2513         serial_driver->minor_start = 64;
2514         serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2515         serial_driver->subtype = SERIAL_TYPE_NORMAL;
2516         serial_driver->init_termios = tty_std_termios;
2517         serial_driver->init_termios.c_cflag =
2518                 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2519         serial_driver->flags = TTY_DRIVER_REAL_RAW;
2520         tty_set_operations(serial_driver, &rs_360_ops);
2521         
2522         if (tty_register_driver(serial_driver))
2523                 panic("Couldn't register serial driver\n");
2524
2525         cp = pquicc;    /* Get pointer to Communication Processor */
2526         /* immap = (immap_t *)IMAP_ADDR; */     /* and to internal registers */
2527
2528
2529         /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2530          */
2531         /* The "standard" configuration through the 860.
2532         */
2533 /*      immap->im_ioport.iop_papar |= 0x00fc; */
2534 /*      immap->im_ioport.iop_padir &= ~0x00fc; */
2535 /*      immap->im_ioport.iop_paodr &= ~0x00fc; */
2536         cp->pio_papar |= 0x00fc;
2537         cp->pio_padir &= ~0x00fc;
2538         /* cp->pio_paodr &= ~0x00fc; */
2539
2540
2541         /* Since we don't yet do modem control, connect the port C pins
2542          * as general purpose I/O.  This will assert CTS and CD for the
2543          * SCC ports.
2544          */
2545         /* FIXME: see 360um p.7-365 and 860um p.34-12 
2546          * I can't make sense of these bits - mleslie*/
2547 /*      immap->im_ioport.iop_pcdir |= 0x03c6; */
2548 /*      immap->im_ioport.iop_pcpar &= ~0x03c6; */
2549
2550 /*      cp->pio_pcdir |= 0x03c6; */
2551 /*      cp->pio_pcpar &= ~0x03c6; */
2552
2553
2554
2555         /* Connect SCC2 and SCC3 to NMSI.  Connect BRG3 to SCC2 and
2556          * BRG4 to SCC3.
2557          */
2558         cp->si_sicr &= ~0x00ffff00;
2559         cp->si_sicr |=  0x001b1200;
2560
2561 #ifdef CONFIG_PP04
2562         /* Frequentis PP04 forced to RS-232 until we know better.
2563          * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2564          */
2565         immap->im_ioport.iop_pcdir |= 0x000c;
2566         immap->im_ioport.iop_pcpar &= ~0x000c;
2567         immap->im_ioport.iop_pcdat &= ~0x000c;
2568
2569         /* This enables the TX driver.
2570         */
2571         cp->cp_pbpar &= ~0x6000;
2572         cp->cp_pbdat &= ~0x6000;
2573 #endif
2574
2575         for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2576                 state->magic = SSTATE_MAGIC;
2577                 state->line = i;
2578                 state->type = PORT_UNKNOWN;
2579                 state->custom_divisor = 0;
2580                 state->close_delay = 5*HZ/10;
2581                 state->closing_wait = 30*HZ;
2582                 state->icount.cts = state->icount.dsr = 
2583                         state->icount.rng = state->icount.dcd = 0;
2584                 state->icount.rx = state->icount.tx = 0;
2585                 state->icount.frame = state->icount.parity = 0;
2586                 state->icount.overrun = state->icount.brk = 0;
2587                 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2588                        i, (unsigned int)(state->irq),
2589                        (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2590
2591 #ifdef CONFIG_SERIAL_CONSOLE
2592                 /* If we just printed the message on the console port, and
2593                  * we are about to initialize it for general use, we have
2594                  * to wait a couple of character times for the CR/NL to
2595                  * make it out of the transmit buffer.
2596                  */
2597                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2598                         mdelay(8);
2599
2600
2601 /*              idx = PORT_NUM(info->state->smc_scc_num); */
2602 /*              if (info->state->smc_scc_num & NUM_IS_SCC) */
2603 /*                      chan = scc_chan_map[idx]; */
2604 /*              else */
2605 /*                      chan = smc_chan_map[idx]; */
2606
2607 /*              cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2608 /*              while (cp->cp_cr & CPM_CR_FLG); */
2609
2610 #endif
2611                 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2612                 info = &quicc_ser_info[i];
2613                 if (info) {
2614                         memset (info, 0, sizeof(ser_info_t));
2615                         info->magic = SERIAL_MAGIC;
2616                         info->line = i;
2617                         info->flags = state->flags;
2618                         INIT_WORK(&info->tqueue, do_softint, info);
2619                         INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2620                         init_waitqueue_head(&info->open_wait);
2621                         init_waitqueue_head(&info->close_wait);
2622                         info->state = state;
2623                         state->info = (struct async_struct *)info;
2624
2625                         /* We need to allocate a transmit and receive buffer
2626                          * descriptors from dual port ram, and a character
2627                          * buffer area from host mem.
2628                          */
2629                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2630
2631                         /* Allocate space for FIFOs in the host memory.
2632                          *  (for now this is from a static array of buffers :(
2633                          */
2634                         /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2635                         /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2636                         mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2637
2638                         /* Set the physical address of the host memory
2639                          * buffers in the buffer descriptors, and the
2640                          * virtual address for us to work with.
2641                          */
2642                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2643                         info->rx_cur = info->rx_bd_base = bdp;
2644
2645                         /* initialize rx buffer descriptors */
2646                         for (j=0; j<(RX_NUM_FIFO-1); j++) {
2647                                 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2648                                 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2649                                 mem_addr += RX_BUF_SIZE;
2650                                 bdp++;
2651                         }
2652                         bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2653                         bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2654
2655
2656                         idx = PORT_NUM(info->state->smc_scc_num);
2657                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2658
2659 #if defined (CONFIG_UCQUICC) && 1
2660                                 /* set the transceiver mode to RS232 */
2661                                 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2662                                 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2663                                 *(uint *)_periph_base = sipex_mode_bits;
2664                                 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2665 #endif
2666                         }
2667
2668                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2669
2670                         /* Allocate space for FIFOs in the host memory.
2671                         */
2672                         /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2673                         /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2674                         mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2675
2676                         /* Set the physical address of the host memory
2677                          * buffers in the buffer descriptors, and the
2678                          * virtual address for us to work with.
2679                          */
2680                         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2681                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2682                         info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2683
2684                         /* initialize tx buffer descriptors */
2685                         for (j=0; j<(TX_NUM_FIFO-1); j++) {
2686                                 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2687                                 bdp->status = BD_SC_INTRPT;
2688                                 mem_addr += TX_BUF_SIZE;
2689                                 bdp++;
2690                         }
2691                         bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2692                         bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2693
2694                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2695                                 scp = &pquicc->scc_regs[idx];
2696                                 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2697                                 sup->rbase = dp_addr;
2698                                 sup->tbase = dp_addr;
2699
2700                                 /* Set up the uart parameters in the
2701                                  * parameter ram.
2702                                  */
2703                                 sup->rfcr = SMC_EB;
2704                                 sup->tfcr = SMC_EB;
2705
2706                                 /* Set this to 1 for now, so we get single
2707                                  * character interrupts.  Using idle charater
2708                                  * time requires some additional tuning.
2709                                  */
2710                                 sup->mrblr = 1;
2711                                 sup->max_idl = 0;
2712                                 sup->brkcr = 1;
2713                                 sup->parec = 0;
2714                                 sup->frmer = 0;
2715                                 sup->nosec = 0;
2716                                 sup->brkec = 0;
2717                                 sup->uaddr1 = 0;
2718                                 sup->uaddr2 = 0;
2719                                 sup->toseq = 0;
2720                                 {
2721                                         int i;
2722                                         for (i=0;i<8;i++)
2723                                                 sup->cc[i] = 0x8000;
2724                                 }
2725                                 sup->rccm = 0xc0ff;
2726
2727                                 /* Send the CPM an initialize command.
2728                                 */
2729                                 chan = scc_chan_map[idx];
2730
2731                                 /* execute the INIT RX & TX PARAMS command for this channel. */
2732                                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2733                                 while (cp->cp_cr & CPM_CR_FLG);
2734
2735                                 /* Set UART mode, 8 bit, no parity, one stop.
2736                                  * Enable receive and transmit.
2737                                  */
2738                                 scp->scc_gsmr.w.high = 0;
2739                                 scp->scc_gsmr.w.low = 
2740                                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2741
2742                                 /* Disable all interrupts and clear all pending
2743                                  * events.
2744                                  */
2745                                 scp->scc_sccm = 0;
2746                                 scp->scc_scce = 0xffff;
2747                                 scp->scc_dsr = 0x7e7e;
2748                                 scp->scc_psmr = 0x3000;
2749
2750                                 /* If the port is the console, enable Rx and Tx.
2751                                 */
2752 #ifdef CONFIG_SERIAL_CONSOLE
2753                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2754                                         scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2755 #endif
2756                         }
2757                         else {
2758                                 /* Configure SMCs Tx/Rx instead of port B
2759                                  * parallel I/O.
2760                                  */
2761                                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2762                                 up->rbase = dp_addr;
2763
2764                                 iobits = 0xc0 << (idx * 4);
2765                                 cp->pip_pbpar |= iobits;
2766                                 cp->pip_pbdir &= ~iobits;
2767                                 cp->pip_pbodr &= ~iobits;
2768
2769
2770                                 /* Connect the baud rate generator to the
2771                                  * SMC based upon index in rs_table.  Also
2772                                  * make sure it is connected to NMSI.
2773                                  */
2774                                 cp->si_simode &= ~(0xffff << (idx * 16));
2775                                 cp->si_simode |= (i << ((idx * 16) + 12));
2776
2777                                 up->tbase = dp_addr;
2778
2779                                 /* Set up the uart parameters in the
2780                                  * parameter ram.
2781                                  */
2782                                 up->rfcr = SMC_EB;
2783                                 up->tfcr = SMC_EB;
2784
2785                                 /* Set this to 1 for now, so we get single
2786                                  * character interrupts.  Using idle charater
2787                                  * time requires some additional tuning.
2788                                  */
2789                                 up->mrblr = 1;
2790                                 up->max_idl = 0;
2791                                 up->brkcr = 1;
2792
2793                                 /* Send the CPM an initialize command.
2794                                 */
2795                                 chan = smc_chan_map[idx];
2796
2797                                 cp->cp_cr = mk_cr_cmd(chan,
2798                                                                           CPM_CR_INIT_TRX) | CPM_CR_FLG;
2799 #ifdef CONFIG_SERIAL_CONSOLE
2800                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2801                                         printk("");
2802 #endif
2803                                 while (cp->cp_cr & CPM_CR_FLG);
2804
2805                                 /* Set UART mode, 8 bit, no parity, one stop.
2806                                  * Enable receive and transmit.
2807                                  */
2808                                 sp = &cp->smc_regs[idx];
2809                                 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2810
2811                                 /* Disable all interrupts and clear all pending
2812                                  * events.
2813                                  */
2814                                 sp->smc_smcm = 0;
2815                                 sp->smc_smce = 0xff;
2816
2817                                 /* If the port is the console, enable Rx and Tx.
2818                                 */
2819 #ifdef CONFIG_SERIAL_CONSOLE
2820                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2821                                         sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2822 #endif
2823                         }
2824
2825                         /* Install interrupt handler.
2826                         */
2827                         /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info);  */
2828                         /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2829                         request_irq(state->irq, rs_360_interrupt,
2830                                                 IRQ_FLG_LOCK, "ttyS", (void *)info);
2831
2832                         /* Set up the baud rate generator.
2833                         */
2834                         m360_cpm_setbrg(i, baud_table[baud_idx]);
2835
2836                 }
2837         }
2838
2839         return 0;
2840 }
2841
2842
2843
2844
2845
2846 /* This must always be called before the rs_360_init() function, otherwise
2847  * it blows away the port control information.
2848  */
2849 //static int __init serial_console_setup( struct console *co, char *options)
2850 int serial_console_setup( struct console *co, char *options)
2851 {
2852         struct          serial_state    *ser;
2853         uint            mem_addr, dp_addr, bidx, idx, iobits;
2854         ushort          chan;
2855         QUICC_BD        *bdp;
2856         volatile        QUICC                   *cp;
2857         volatile        struct smc_regs *sp;
2858         volatile        struct scc_regs *scp;
2859         volatile        struct smc_uart_pram    *up;
2860         volatile        struct uart_pram                *sup;
2861
2862 /* mleslie TODO:
2863  * add something to the 68k bootloader to store a desired initial console baud rate */
2864
2865 /*      bd_t                                            *bd; */ /* a board info struct used by EPPC-bug */
2866 /*      bd = (bd_t *)__res; */
2867
2868         for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2869          /* if (bd->bi_baudrate == baud_table[bidx]) */
2870                 if (CONSOLE_BAUDRATE == baud_table[bidx])
2871                         break;
2872
2873         /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2874         baud_idx = bidx;
2875
2876         ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2877
2878         cp = pquicc;    /* Get pointer to Communication Processor */
2879
2880         idx = PORT_NUM(ser->smc_scc_num);
2881         if (ser->smc_scc_num & NUM_IS_SCC) {
2882
2883                 /* TODO: need to set up SCC pin assignment etc. here */
2884                 
2885         }
2886         else {
2887                 iobits = 0xc0 << (idx * 4);
2888                 cp->pip_pbpar |= iobits;
2889                 cp->pip_pbdir &= ~iobits;
2890                 cp->pip_pbodr &= ~iobits;
2891
2892                 /* Connect the baud rate generator to the
2893                  * SMC based upon index in rs_table.  Also
2894                  * make sure it is connected to NMSI.
2895                  */
2896                 cp->si_simode &= ~(0xffff << (idx * 16));
2897                 cp->si_simode |= (idx << ((idx * 16) + 12));
2898         }
2899
2900         /* When we get here, the CPM has been reset, so we need
2901          * to configure the port.
2902          * We need to allocate a transmit and receive buffer descriptor
2903          * from dual port ram, and a character buffer area from host mem.
2904          */
2905
2906         /* Allocate space for two buffer descriptors in the DP ram.
2907         */
2908         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2909
2910         /* Allocate space for two 2 byte FIFOs in the host memory.
2911          */
2912         /* mem_addr = m360_cpm_hostalloc(8); */
2913         mem_addr = (uint)console_fifos;
2914
2915
2916         /* Set the physical address of the host memory buffers in
2917          * the buffer descriptors.
2918          */
2919         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2920         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2921         bdp->buf = (char *)mem_addr;
2922         (bdp+1)->buf = (char *)(mem_addr+4);
2923
2924         /* For the receive, set empty and wrap.
2925          * For transmit, set wrap.
2926          */
2927         bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2928         (bdp+1)->status = BD_SC_WRAP;
2929
2930         /* Set up the uart parameters in the parameter ram.
2931          */
2932         if (ser->smc_scc_num & NUM_IS_SCC) {
2933                 scp = &cp->scc_regs[idx];
2934                 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2935                 sup = &pquicc->pram[ser->port].scc.pscc.u;
2936
2937                 sup->rbase = dp_addr;
2938                 sup->tbase = dp_addr + sizeof(QUICC_BD);
2939
2940                 /* Set up the uart parameters in the
2941                  * parameter ram.
2942                  */
2943                 sup->rfcr = SMC_EB;
2944                 sup->tfcr = SMC_EB;
2945
2946                 /* Set this to 1 for now, so we get single
2947                  * character interrupts.  Using idle charater
2948                  * time requires some additional tuning.
2949                  */
2950                 sup->mrblr = 1;
2951                 sup->max_idl = 0;
2952                 sup->brkcr = 1;
2953                 sup->parec = 0;
2954                 sup->frmer = 0;
2955                 sup->nosec = 0;
2956                 sup->brkec = 0;
2957                 sup->uaddr1 = 0;
2958                 sup->uaddr2 = 0;
2959                 sup->toseq = 0;
2960                 {
2961                         int i;
2962                         for (i=0;i<8;i++)
2963                                 sup->cc[i] = 0x8000;
2964                 }
2965                 sup->rccm = 0xc0ff;
2966
2967                 /* Send the CPM an initialize command.
2968                 */
2969                 chan = scc_chan_map[idx];
2970
2971                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2972                 while (cp->cp_cr & CPM_CR_FLG);
2973
2974                 /* Set UART mode, 8 bit, no parity, one stop.
2975                  * Enable receive and transmit.
2976                  */
2977                 scp->scc_gsmr.w.high = 0;
2978                 scp->scc_gsmr.w.low = 
2979                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2980
2981                 /* Disable all interrupts and clear all pending
2982                  * events.
2983                  */
2984                 scp->scc_sccm = 0;
2985                 scp->scc_scce = 0xffff;
2986                 scp->scc_dsr = 0x7e7e;
2987                 scp->scc_psmr = 0x3000;
2988
2989                 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2990
2991         }
2992         else {
2993                 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2994                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2995
2996                 up->rbase = dp_addr;    /* Base of receive buffer desc. */
2997                 up->tbase = dp_addr+sizeof(QUICC_BD);   /* Base of xmt buffer desc. */
2998                 up->rfcr = SMC_EB;
2999                 up->tfcr = SMC_EB;
3000
3001                 /* Set this to 1 for now, so we get single character interrupts.
3002                 */
3003                 up->mrblr = 1;          /* receive buffer length */
3004                 up->max_idl = 0;                /* wait forever for next char */
3005
3006                 /* Send the CPM an initialize command.
3007                 */
3008                 chan = smc_chan_map[idx];
3009                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
3010                 while (cp->cp_cr & CPM_CR_FLG);
3011
3012                 /* Set UART mode, 8 bit, no parity, one stop.
3013                  * Enable receive and transmit.
3014                  */
3015                 sp = &cp->smc_regs[idx];
3016                 sp->smc_smcmr = smcr_mk_clen(9) |  SMCMR_SM_UART;
3017
3018                 /* And finally, enable Rx and Tx.
3019                 */
3020                 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
3021         }
3022
3023         /* Set up the baud rate generator.
3024         */
3025         /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
3026         m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
3027
3028         return 0;
3029 }
3030
3031 /*
3032  * Local variables:
3033  *  c-indent-level: 4
3034  *  c-basic-offset: 4
3035  *  tab-width: 4
3036  * End:
3037  */