drivers/serial/amba-pl011.c

   1 /*
   2  *  linux/drivers/char/amba.c
   3  *
   4  *  Driver for AMBA serial ports
   5  *
   6  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   7  *
   8  *  Copyright 1999 ARM Limited
   9  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24  *
  25  *  $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
  26  *
  27  * This is a generic driver for ARM AMBA-type serial ports.  They
  28  * have a lot of 16550-like features, but are not register compatible.
  29  * Note that although they do have CTS, DCD and DSR inputs, they do
  30  * not have an RI input, nor do they have DTR or RTS outputs.  If
  31  * required, these have to be supplied via some other means (eg, GPIO)
  32  * and hooked into this driver.
  33  */
  34 #include <linux/config.h>
  35 #include <linux/module.h>
  36 #include <linux/tty.h>
  37 #include <linux/ioport.h>
  38 #include <linux/init.h>
  39 #include <linux/serial.h>
  40 #include <linux/console.h>
  41 #include <linux/sysrq.h>
  42 #include <linux/device.h>
  43
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/hardware/amba.h>
  47 #include <asm/hardware/clock.h>
  48
  49 #if defined(CONFIG_SERIAL_AMBA_PL011_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  50 #define SUPPORT_SYSRQ
  51 #endif
  52
  53 #include <linux/serial_core.h>
  54
  55 #include <asm/hardware/amba_serial.h>
  56
  57 #define UART_NR                 14
  58
  59 #define SERIAL_AMBA_MAJOR       204
  60 #define SERIAL_AMBA_MINOR       64
  61 #define SERIAL_AMBA_NR          UART_NR
  62
  63 #define AMBA_ISR_PASS_LIMIT     256
  64
  65 #define UART_DUMMY_RSR_RX       256
  66
  67 /*
  68  * We wrap our port structure around the generic uart_port.
  69  */
  70 struct uart_amba_port {
  71         struct uart_port        port;
  72         struct clk              *clk;
  73         unsigned int            im;     /* interrupt mask */
  74         unsigned int            old_status;
  75 };
  76
  77 static void pl011_stop_tx(struct uart_port *port, unsigned int tty_stop)
  78 {
  79         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  80
  81         uap->im &= ~UART011_TXIM;
  82         writew(uap->im, uap->port.membase + UART011_IMSC);
  83 }
  84
  85 static void pl011_start_tx(struct uart_port *port, unsigned int tty_start)
  86 {
  87         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  88
  89         uap->im |= UART011_TXIM;
  90         writew(uap->im, uap->port.membase + UART011_IMSC);
  91 }
  92
  93 static void pl011_stop_rx(struct uart_port *port)
  94 {
  95         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  96
  97         uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM|
  98                      UART011_PEIM|UART011_BEIM|UART011_OEIM);
  99         writew(uap->im, uap->port.membase + UART011_IMSC);
 100 }
 101
 102 static void pl011_enable_ms(struct uart_port *port)
 103 {
 104         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 105
 106         uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM;
 107         writew(uap->im, uap->port.membase + UART011_IMSC);
 108 }
 109
 110 static void
 111 #ifdef SUPPORT_SYSRQ
 112 pl011_rx_chars(struct uart_amba_port *uap, struct pt_regs *regs)
 113 #else
 114 pl011_rx_chars(struct uart_amba_port *uap)
 115 #endif
 116 {
 117         struct tty_struct *tty = uap->port.info->tty;
 118         unsigned int status, ch, rsr, max_count = 256;
 119
 120         status = readw(uap->port.membase + UART01x_FR);
 121         while ((status & UART01x_FR_RXFE) == 0 && max_count--) {
 122                 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
 123                         tty->flip.work.func((void *)tty);
 124                         if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
 125                                 printk(KERN_WARNING "TTY_DONT_FLIP set\n");
 126                                 return;
 127                         }
 128                 }
 129
 130                 ch = readw(uap->port.membase + UART01x_DR);
 131
 132                 *tty->flip.char_buf_ptr = ch;
 133                 *tty->flip.flag_buf_ptr = TTY_NORMAL;
 134                 uap->port.icount.rx++;
 135
 136                 /*
 137                  * Note that the error handling code is
 138                  * out of the main execution path
 139                  */
 140                 rsr = readw(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
 141                 if (rsr & UART01x_RSR_ANY) {
 142                         if (rsr & UART01x_RSR_BE) {
 143                                 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
 144                                 uap->port.icount.brk++;
 145                                 if (uart_handle_break(&uap->port))
 146                                         goto ignore_char;
 147                         } else if (rsr & UART01x_RSR_PE)
 148                                 uap->port.icount.parity++;
 149                         else if (rsr & UART01x_RSR_FE)
 150                                 uap->port.icount.frame++;
 151                         if (rsr & UART01x_RSR_OE)
 152                                 uap->port.icount.overrun++;
 153
 154                         rsr &= uap->port.read_status_mask;
 155
 156                         if (rsr & UART01x_RSR_BE)
 157                                 *tty->flip.flag_buf_ptr = TTY_BREAK;
 158                         else if (rsr & UART01x_RSR_PE)
 159                                 *tty->flip.flag_buf_ptr = TTY_PARITY;
 160                         else if (rsr & UART01x_RSR_FE)
 161                                 *tty->flip.flag_buf_ptr = TTY_FRAME;
 162                 }
 163
 164                 if (uart_handle_sysrq_char(&uap->port, ch, regs))
 165                         goto ignore_char;
 166
 167                 if ((rsr & uap->port.ignore_status_mask) == 0) {
 168                         tty->flip.flag_buf_ptr++;
 169                         tty->flip.char_buf_ptr++;
 170                         tty->flip.count++;
 171                 }
 172                 if ((rsr & UART01x_RSR_OE) &&
 173                     tty->flip.count < TTY_FLIPBUF_SIZE) {
 174                         /*
 175                          * Overrun is special, since it's reported
 176                          * immediately, and doesn't affect the current
 177                          * character
 178                          */
 179                         *tty->flip.char_buf_ptr++ = 0;
 180                         *tty->flip.flag_buf_ptr++ = TTY_OVERRUN;
 181                         tty->flip.count++;
 182                 }
 183         ignore_char:
 184                 status = readw(uap->port.membase + UART01x_FR);
 185         }
 186         tty_flip_buffer_push(tty);
 187         return;
 188 }
 189
 190 static void pl011_tx_chars(struct uart_amba_port *uap)
 191 {
 192         struct circ_buf *xmit = &uap->port.info->xmit;
 193         int count;
 194
 195         if (uap->port.x_char) {
 196                 writew(uap->port.x_char, uap->port.membase + UART01x_DR);
 197                 uap->port.icount.tx++;
 198                 uap->port.x_char = 0;
 199                 return;
 200         }
 201         if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
 202                 pl011_stop_tx(&uap->port, 0);
 203                 return;
 204         }
 205
 206         count = uap->port.fifosize >> 1;
 207         do {
 208                 writew(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
 209                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 210                 uap->port.icount.tx++;
 211                 if (uart_circ_empty(xmit))
 212                         break;
 213         } while (--count > 0);
 214
 215         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 216                 uart_write_wakeup(&uap->port);
 217
 218         if (uart_circ_empty(xmit))
 219                 pl011_stop_tx(&uap->port, 0);
 220 }
 221
 222 static void pl011_modem_status(struct uart_amba_port *uap)
 223 {
 224         unsigned int status, delta;
 225
 226         status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 227
 228         delta = status ^ uap->old_status;
 229         uap->old_status = status;
 230
 231         if (!delta)
 232                 return;
 233
 234         if (delta & UART01x_FR_DCD)
 235                 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
 236
 237         if (delta & UART01x_FR_DSR)
 238                 uap->port.icount.dsr++;
 239
 240         if (delta & UART01x_FR_CTS)
 241                 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
 242
 243         wake_up_interruptible(&uap->port.info->delta_msr_wait);
 244 }
 245
 246 static irqreturn_t pl011_int(int irq, void *dev_id, struct pt_regs *regs)
 247 {
 248         struct uart_amba_port *uap = dev_id;
 249         unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
 250         int handled = 0;
 251
 252         spin_lock(&uap->port.lock);
 253
 254         status = readw(uap->port.membase + UART011_MIS);
 255         if (status) {
 256                 do {
 257                         writew(status & ~(UART011_TXIS|UART011_RTIS|
 258                                           UART011_RXIS),
 259                                uap->port.membase + UART011_ICR);
 260
 261                         if (status & (UART011_RTIS|UART011_RXIS))
 262 #ifdef SUPPORT_SYSRQ
 263                                 pl011_rx_chars(uap, regs);
 264 #else
 265                                 pl011_rx_chars(uap);
 266 #endif
 267                         if (status & (UART011_DSRMIS|UART011_DCDMIS|
 268                                       UART011_CTSMIS|UART011_RIMIS))
 269                                 pl011_modem_status(uap);
 270                         if (status & UART011_TXIS)
 271                                 pl011_tx_chars(uap);
 272
 273                         if (pass_counter-- == 0)
 274                                 break;
 275
 276                         status = readw(uap->port.membase + UART011_MIS);
 277                 } while (status != 0);
 278                 handled = 1;
 279         }
 280
 281         spin_unlock(&uap->port.lock);
 282
 283         return IRQ_RETVAL(handled);
 284 }
 285
 286 static unsigned int pl01x_tx_empty(struct uart_port *port)
 287 {
 288         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 289         unsigned int status = readw(uap->port.membase + UART01x_FR);
 290         return status & (UART01x_FR_BUSY|UART01x_FR_TXFF) ? 0 : TIOCSER_TEMT;
 291 }
 292
 293 static unsigned int pl01x_get_mctrl(struct uart_port *port)
 294 {
 295         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 296         unsigned int result = 0;
 297         unsigned int status = readw(uap->port.membase + UART01x_FR);
 298
 299 #define BIT(uartbit, tiocmbit)          \
 300         if (status & uartbit)           \
 301                 result |= tiocmbit
 302
 303         BIT(UART01x_FR_DCD, TIOCM_CAR);
 304         BIT(UART01x_FR_DSR, TIOCM_DSR);
 305         BIT(UART01x_FR_CTS, TIOCM_CTS);
 306         BIT(UART011_FR_RI, TIOCM_RNG);
 307 #undef BIT
 308         return result;
 309 }
 310
 311 static void pl011_set_mctrl(struct uart_port *port, unsigned int mctrl)
 312 {
 313         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 314         unsigned int cr;
 315
 316         cr = readw(uap->port.membase + UART011_CR);
 317
 318 #define BIT(tiocmbit, uartbit)          \
 319         if (mctrl & tiocmbit)           \
 320                 cr |= uartbit;          \
 321         else                            \
 322                 cr &= ~uartbit
 323
 324         BIT(TIOCM_RTS, UART011_CR_RTS);
 325         BIT(TIOCM_DTR, UART011_CR_DTR);
 326         BIT(TIOCM_OUT1, UART011_CR_OUT1);
 327         BIT(TIOCM_OUT2, UART011_CR_OUT2);
 328         BIT(TIOCM_LOOP, UART011_CR_LBE);
 329 #undef BIT
 330
 331         writew(cr, uap->port.membase + UART011_CR);
 332 }
 333
 334 static void pl011_break_ctl(struct uart_port *port, int break_state)
 335 {
 336         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 337         unsigned long flags;
 338         unsigned int lcr_h;
 339
 340         spin_lock_irqsave(&uap->port.lock, flags);
 341         lcr_h = readw(uap->port.membase + UART011_LCRH);
 342         if (break_state == -1)
 343                 lcr_h |= UART01x_LCRH_BRK;
 344         else
 345                 lcr_h &= ~UART01x_LCRH_BRK;
 346         writew(lcr_h, uap->port.membase + UART011_LCRH);
 347         spin_unlock_irqrestore(&uap->port.lock, flags);
 348 }
 349
 350 static int pl011_startup(struct uart_port *port)
 351 {
 352         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 353         unsigned int cr;
 354         int retval;
 355
 356         /*
 357          * Try to enable the clock producer.
 358          */
 359         retval = clk_enable(uap->clk);
 360         if (retval)
 361                 goto out;
 362
 363         uap->port.uartclk = clk_get_rate(uap->clk);
 364
 365         /*
 366          * Allocate the IRQ
 367          */
 368         retval = request_irq(uap->port.irq, pl011_int, 0, "uart-pl011", uap);
 369         if (retval)
 370                 goto clk_dis;
 371
 372         writew(UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
 373                uap->port.membase + UART011_IFLS);
 374
 375         /*
 376          * Provoke TX FIFO interrupt into asserting.
 377          */
 378         cr = UART01x_CR_UARTEN | UART011_CR_TXE | UART011_CR_LBE;
 379         writew(cr, uap->port.membase + UART011_CR);
 380         writew(0, uap->port.membase + UART011_FBRD);
 381         writew(1, uap->port.membase + UART011_IBRD);
 382         writew(0, uap->port.membase + UART011_LCRH);
 383         writew(0, uap->port.membase + UART01x_DR);
 384         while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY)
 385                 barrier();
 386
 387         cr = UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE;
 388         writew(cr, uap->port.membase + UART011_CR);
 389
 390         /*
 391          * initialise the old status of the modem signals
 392          */
 393         uap->old_status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 394
 395         /*
 396          * Finally, enable interrupts
 397          */
 398         spin_lock_irq(&uap->port.lock);
 399         uap->im = UART011_RXIM | UART011_RTIM;
 400         writew(uap->im, uap->port.membase + UART011_IMSC);
 401         spin_unlock_irq(&uap->port.lock);
 402
 403         return 0;
 404
 405  clk_dis:
 406         clk_disable(uap->clk);
 407  out:
 408         return retval;
 409 }
 410
 411 static void pl011_shutdown(struct uart_port *port)
 412 {
 413         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 414         unsigned long val;
 415
 416         /*
 417          * disable all interrupts
 418          */
 419         spin_lock_irq(&uap->port.lock);
 420         uap->im = 0;
 421         writew(uap->im, uap->port.membase + UART011_IMSC);
 422         writew(0xffff, uap->port.membase + UART011_ICR);
 423         spin_unlock_irq(&uap->port.lock);
 424
 425         /*
 426          * Free the interrupt
 427          */
 428         free_irq(uap->port.irq, uap);
 429
 430         /*
 431          * disable the port
 432          */
 433         writew(UART01x_CR_UARTEN | UART011_CR_TXE, uap->port.membase + UART011_CR);
 434
 435         /*
 436          * disable break condition and fifos
 437          */
 438         val = readw(uap->port.membase + UART011_LCRH);
 439         val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN);
 440         writew(val, uap->port.membase + UART011_LCRH);
 441
 442         /*
 443          * Shut down the clock producer
 444          */
 445         clk_disable(uap->clk);
 446 }
 447
 448 static void
 449 pl011_set_termios(struct uart_port *port, struct termios *termios,
 450                      struct termios *old)
 451 {
 452         unsigned int lcr_h, old_cr;
 453         unsigned long flags;
 454         unsigned int baud, quot;
 455
 456         /*
 457          * Ask the core to calculate the divisor for us.
 458          */
 459         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 460         quot = port->uartclk * 4 / baud;
 461
 462         switch (termios->c_cflag & CSIZE) {
 463         case CS5:
 464                 lcr_h = UART01x_LCRH_WLEN_5;
 465                 break;
 466         case CS6:
 467                 lcr_h = UART01x_LCRH_WLEN_6;
 468                 break;
 469         case CS7:
 470                 lcr_h = UART01x_LCRH_WLEN_7;
 471                 break;
 472         default: // CS8
 473                 lcr_h = UART01x_LCRH_WLEN_8;
 474                 break;
 475         }
 476         if (termios->c_cflag & CSTOPB)
 477                 lcr_h |= UART01x_LCRH_STP2;
 478         if (termios->c_cflag & PARENB) {
 479                 lcr_h |= UART01x_LCRH_PEN;
 480                 if (!(termios->c_cflag & PARODD))
 481                         lcr_h |= UART01x_LCRH_EPS;
 482         }
 483         if (port->fifosize > 1)
 484                 lcr_h |= UART01x_LCRH_FEN;
 485
 486         spin_lock_irqsave(&port->lock, flags);
 487
 488         /*
 489          * Update the per-port timeout.
 490          */
 491         uart_update_timeout(port, termios->c_cflag, baud);
 492
 493         port->read_status_mask = UART01x_RSR_OE;
 494         if (termios->c_iflag & INPCK)
 495                 port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
 496         if (termios->c_iflag & (BRKINT | PARMRK))
 497                 port->read_status_mask |= UART01x_RSR_BE;
 498
 499         /*
 500          * Characters to ignore
 501          */
 502         port->ignore_status_mask = 0;
 503         if (termios->c_iflag & IGNPAR)
 504                 port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
 505         if (termios->c_iflag & IGNBRK) {
 506                 port->ignore_status_mask |= UART01x_RSR_BE;
 507                 /*
 508                  * If we're ignoring parity and break indicators,
 509                  * ignore overruns too (for real raw support).
 510                  */
 511                 if (termios->c_iflag & IGNPAR)
 512                         port->ignore_status_mask |= UART01x_RSR_OE;
 513         }
 514
 515         /*
 516          * Ignore all characters if CREAD is not set.
 517          */
 518         if ((termios->c_cflag & CREAD) == 0)
 519                 port->ignore_status_mask |= UART_DUMMY_RSR_RX;
 520
 521         if (UART_ENABLE_MS(port, termios->c_cflag))
 522                 pl011_enable_ms(port);
 523
 524         /* first, disable everything */
 525         old_cr = readw(port->membase + UART011_CR);
 526         writew(0, port->membase + UART011_CR);
 527
 528         /* Set baud rate */
 529         writew(quot & 0x3f, port->membase + UART011_FBRD);
 530         writew(quot >> 6, port->membase + UART011_IBRD);
 531
 532         /*
 533          * ----------v----------v----------v----------v-----
 534          * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
 535          * ----------^----------^----------^----------^-----
 536          */
 537         writew(lcr_h, port->membase + UART011_LCRH);
 538         writew(old_cr, port->membase + UART011_CR);
 539
 540         spin_unlock_irqrestore(&port->lock, flags);
 541 }
 542
 543 static const char *pl011_type(struct uart_port *port)
 544 {
 545         return port->type == PORT_AMBA ? "AMBA/PL011" : NULL;
 546 }
 547
 548 /*
 549  * Release the memory region(s) being used by 'port'
 550  */
 551 static void pl010_release_port(struct uart_port *port)
 552 {
 553         release_mem_region(port->mapbase, SZ_4K);
 554 }
 555
 556 /*
 557  * Request the memory region(s) being used by 'port'
 558  */
 559 static int pl010_request_port(struct uart_port *port)
 560 {
 561         return request_mem_region(port->mapbase, SZ_4K, "uart-pl011")
 562                         != NULL ? 0 : -EBUSY;
 563 }
 564
 565 /*
 566  * Configure/autoconfigure the port.
 567  */
 568 static void pl010_config_port(struct uart_port *port, int flags)
 569 {
 570         if (flags & UART_CONFIG_TYPE) {
 571                 port->type = PORT_AMBA;
 572                 pl010_request_port(port);
 573         }
 574 }
 575
 576 /*
 577  * verify the new serial_struct (for TIOCSSERIAL).
 578  */
 579 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
 580 {
 581         int ret = 0;
 582         if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
 583                 ret = -EINVAL;
 584         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 585                 ret = -EINVAL;
 586         if (ser->baud_base < 9600)
 587                 ret = -EINVAL;
 588         return ret;
 589 }
 590
 591 static struct uart_ops amba_pl011_pops = {
 592         .tx_empty       = pl01x_tx_empty,
 593         .set_mctrl      = pl011_set_mctrl,
 594         .get_mctrl      = pl01x_get_mctrl,
 595         .stop_tx        = pl011_stop_tx,
 596         .start_tx       = pl011_start_tx,
 597         .stop_rx        = pl011_stop_rx,
 598         .enable_ms      = pl011_enable_ms,
 599         .break_ctl      = pl011_break_ctl,
 600         .startup        = pl011_startup,
 601         .shutdown       = pl011_shutdown,
 602         .set_termios    = pl011_set_termios,
 603         .type           = pl011_type,
 604         .release_port   = pl010_release_port,
 605         .request_port   = pl010_request_port,
 606         .config_port    = pl010_config_port,
 607         .verify_port    = pl010_verify_port,
 608 };
 609
 610 static struct uart_amba_port *amba_ports[UART_NR];
 611
 612 #ifdef CONFIG_SERIAL_AMBA_PL011_CONSOLE
 613
 614 static inline void
 615 pl011_console_write_char(struct uart_amba_port *uap, char ch)
 616 {
 617         unsigned int status;
 618
 619         do {
 620                 status = readw(uap->port.membase + UART01x_FR);
 621         } while (status & UART01x_FR_TXFF);
 622         writew(ch, uap->port.membase + UART01x_DR);
 623 }
 624
 625 static void
 626 pl011_console_write(struct console *co, const char *s, unsigned int count)
 627 {
 628         struct uart_amba_port *uap = amba_ports[co->index];
 629         unsigned int status, old_cr, new_cr;
 630         int i;
 631
 632         clk_enable(uap->clk);
 633
 634         /*
 635          *      First save the CR then disable the interrupts
 636          */
 637         old_cr = readw(uap->port.membase + UART011_CR);
 638         new_cr = old_cr & ~UART011_CR_CTSEN;
 639         new_cr |= UART01x_CR_UARTEN | UART011_CR_TXE;
 640         writew(new_cr, uap->port.membase + UART011_CR);
 641
 642         /*
 643          *      Now, do each character
 644          */
 645         for (i = 0; i < count; i++) {
 646                 pl011_console_write_char(uap, s[i]);
 647                 if (s[i] == '\n')
 648                         pl011_console_write_char(uap, '\r');
 649         }
 650
 651         /*
 652          *      Finally, wait for transmitter to become empty
 653          *      and restore the TCR
 654          */
 655         do {
 656                 status = readw(uap->port.membase + UART01x_FR);
 657         } while (status & UART01x_FR_BUSY);
 658         writew(old_cr, uap->port.membase + UART011_CR);
 659
 660         clk_disable(uap->clk);
 661 }
 662
 663 static void __init
 664 pl011_console_get_options(struct uart_amba_port *uap, int *baud,
 665                              int *parity, int *bits)
 666 {
 667         if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) {
 668                 unsigned int lcr_h, ibrd, fbrd;
 669
 670                 lcr_h = readw(uap->port.membase + UART011_LCRH);
 671
 672                 *parity = 'n';
 673                 if (lcr_h & UART01x_LCRH_PEN) {
 674                         if (lcr_h & UART01x_LCRH_EPS)
 675                                 *parity = 'e';
 676                         else
 677                                 *parity = 'o';
 678                 }
 679
 680                 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
 681                         *bits = 7;
 682                 else
 683                         *bits = 8;
 684
 685                 ibrd = readw(uap->port.membase + UART011_IBRD);
 686                 fbrd = readw(uap->port.membase + UART011_FBRD);
 687
 688                 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd);
 689         }
 690 }
 691
 692 static int __init pl011_console_setup(struct console *co, char *options)
 693 {
 694         struct uart_amba_port *uap;
 695         int baud = 38400;
 696         int bits = 8;
 697         int parity = 'n';
 698         int flow = 'n';
 699         int ret;
 700
 701         /*
 702          * Check whether an invalid uart number has been specified, and
 703          * if so, search for the first available port that does have
 704          * console support.
 705          */
 706         if (co->index >= UART_NR)
 707                 co->index = 0;
 708         uap = amba_ports[co->index];
 709
 710         uap->port.uartclk = clk_get_rate(uap->clk);
 711
 712         if (options)
 713                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 714         else
 715                 pl011_console_get_options(uap, &baud, &parity, &bits);
 716
 717         return uart_set_options(&uap->port, co, baud, parity, bits, flow);
 718 }
 719
 720 extern struct uart_driver amba_reg;
 721 static struct console amba_console = {
 722         .name           = "ttyAMA",
 723         .write          = pl011_console_write,
 724         .device         = uart_console_device,
 725         .setup          = pl011_console_setup,
 726         .flags          = CON_PRINTBUFFER,
 727         .index          = -1,
 728         .data           = &amba_reg,
 729 };
 730
 731 #define AMBA_CONSOLE    (&amba_console)
 732 #else
 733 #define AMBA_CONSOLE    NULL
 734 #endif
 735
 736 static struct uart_driver amba_reg = {
 737         .owner                  = THIS_MODULE,
 738         .driver_name            = "ttyAMA",
 739         .dev_name               = "ttyAMA",
 740         .major                  = SERIAL_AMBA_MAJOR,
 741         .minor                  = SERIAL_AMBA_MINOR,
 742         .nr                     = UART_NR,
 743         .cons                   = AMBA_CONSOLE,
 744 };
 745
 746 static int pl011_probe(struct amba_device *dev, void *id)
 747 {
 748         struct uart_amba_port *uap;
 749         void *base;
 750         int i, ret;
 751
 752         for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
 753                 if (amba_ports[i] == NULL)
 754                         break;
 755
 756         if (i == ARRAY_SIZE(amba_ports)) {
 757                 ret = -EBUSY;
 758                 goto out;
 759         }
 760
 761         uap = kmalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
 762         if (uap == NULL) {
 763                 ret = -ENOMEM;
 764                 goto out;
 765         }
 766
 767         base = ioremap(dev->res.start, PAGE_SIZE);
 768         if (!base) {
 769                 ret = -ENOMEM;
 770                 goto free;
 771         }
 772
 773         memset(uap, 0, sizeof(struct uart_amba_port));
 774         uap->clk = clk_get(&dev->dev, "UARTCLK");
 775         if (IS_ERR(uap->clk)) {
 776                 ret = PTR_ERR(uap->clk);
 777                 goto unmap;
 778         }
 779
 780         ret = clk_use(uap->clk);
 781         if (ret)
 782                 goto putclk;
 783
 784         uap->port.dev = &dev->dev;
 785         uap->port.mapbase = dev->res.start;
 786         uap->port.membase = base;
 787         uap->port.iotype = UPIO_MEM;
 788         uap->port.irq = dev->irq[0];
 789         uap->port.fifosize = 16;
 790         uap->port.ops = &amba_pl011_pops;
 791         uap->port.flags = UPF_BOOT_AUTOCONF;
 792         uap->port.line = i;
 793
 794         amba_ports[i] = uap;
 795
 796         amba_set_drvdata(dev, uap);
 797         ret = uart_add_one_port(&amba_reg, &uap->port);
 798         if (ret) {
 799                 amba_set_drvdata(dev, NULL);
 800                 amba_ports[i] = NULL;
 801                 clk_unuse(uap->clk);
 802  putclk:
 803                 clk_put(uap->clk);
 804  unmap:
 805                 iounmap(base);
 806  free:
 807                 kfree(uap);
 808         }
 809  out:
 810         return ret;
 811 }
 812
 813 static int pl011_remove(struct amba_device *dev)
 814 {
 815         struct uart_amba_port *uap = amba_get_drvdata(dev);
 816         int i;
 817
 818         amba_set_drvdata(dev, NULL);
 819
 820         uart_remove_one_port(&amba_reg, &uap->port);
 821
 822         for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
 823                 if (amba_ports[i] == uap)
 824                         amba_ports[i] = NULL;
 825
 826         iounmap(uap->port.membase);
 827         clk_unuse(uap->clk);
 828         clk_put(uap->clk);
 829         kfree(uap);
 830         return 0;
 831 }
 832
 833 static struct amba_id pl011_ids[] __initdata = {
 834         {
 835                 .id     = 0x00041011,
 836                 .mask   = 0x000fffff,
 837         },
 838         { 0, 0 },
 839 };
 840
 841 static struct amba_driver pl011_driver = {
 842         .drv = {
 843                 .name   = "uart-pl011",
 844         },
 845         .id_table       = pl011_ids,
 846         .probe          = pl011_probe,
 847         .remove         = pl011_remove,
 848 };
 849
 850 static int __init pl011_init(void)
 851 {
 852         int ret;
 853         printk(KERN_INFO "Serial: AMBA PL011 UART driver\n");
 854
 855         ret = uart_register_driver(&amba_reg);
 856         if (ret == 0) {
 857                 ret = amba_driver_register(&pl011_driver);
 858                 if (ret)
 859                         uart_unregister_driver(&amba_reg);
 860         }
 861         return ret;
 862 }
 863
 864 static void __exit pl011_exit(void)
 865 {
 866         amba_driver_unregister(&pl011_driver);
 867         uart_unregister_driver(&amba_reg);
 868 }
 869
 870 module_init(pl011_init);
 871 module_exit(pl011_exit);
 872
 873 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
 874 MODULE_DESCRIPTION("ARM AMBA serial port driver");
 875 MODULE_LICENSE("GPL");