2 * linux/drivers/serial/pxa.c
4 * Based on drivers/serial/8250.c by Russell King.
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
27 #include <linux/config.h>
28 #include <linux/module.h>
29 #include <linux/tty.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/serial_reg.h>
35 #include <linux/circ_buf.h>
36 #include <linux/delay.h>
37 #include <linux/interrupt.h>
40 #include <asm/hardware.h>
43 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
47 #include <linux/serial_core.h>
50 struct uart_pxa_port {
51 struct uart_port port;
55 unsigned int lsr_break_flag;
60 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
63 return readl(up->port.membase + offset);
66 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
69 writel(value, up->port.membase + offset);
72 static void serial_pxa_enable_ms(struct uart_port *port)
74 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
76 up->ier |= UART_IER_MSI;
77 serial_out(up, UART_IER, up->ier);
80 static void serial_pxa_stop_tx(struct uart_port *port, unsigned int tty_stop)
82 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
84 if (up->ier & UART_IER_THRI) {
85 up->ier &= ~UART_IER_THRI;
86 serial_out(up, UART_IER, up->ier);
90 static void serial_pxa_stop_rx(struct uart_port *port)
92 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
94 up->ier &= ~UART_IER_RLSI;
95 up->port.read_status_mask &= ~UART_LSR_DR;
96 serial_out(up, UART_IER, up->ier);
100 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
102 struct tty_struct *tty = up->port.info->tty;
107 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
109 * FIXME: Deadlock can happen here if we're a
110 * low-latency port. We're holding the per-port
111 * spinlock, and we call flush_to_ldisc->
112 * n_tty_receive_buf->n_tty_receive_char->
113 * opost->uart_put_char.
115 tty->flip.work.func((void *)tty);
116 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
117 return; // if TTY_DONT_FLIP is set
119 ch = serial_in(up, UART_RX);
120 *tty->flip.char_buf_ptr = ch;
121 *tty->flip.flag_buf_ptr = TTY_NORMAL;
122 up->port.icount.rx++;
124 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
125 UART_LSR_FE | UART_LSR_OE))) {
127 * For statistics only
129 if (*status & UART_LSR_BI) {
130 *status &= ~(UART_LSR_FE | UART_LSR_PE);
131 up->port.icount.brk++;
133 * We do the SysRQ and SAK checking
134 * here because otherwise the break
135 * may get masked by ignore_status_mask
136 * or read_status_mask.
138 if (uart_handle_break(&up->port))
140 } else if (*status & UART_LSR_PE)
141 up->port.icount.parity++;
142 else if (*status & UART_LSR_FE)
143 up->port.icount.frame++;
144 if (*status & UART_LSR_OE)
145 up->port.icount.overrun++;
148 * Mask off conditions which should be ignored.
150 *status &= up->port.read_status_mask;
152 #ifdef CONFIG_SERIAL_PXA_CONSOLE
153 if (up->port.line == up->port.cons->index) {
154 /* Recover the break flag from console xmit */
155 *status |= up->lsr_break_flag;
156 up->lsr_break_flag = 0;
159 if (*status & UART_LSR_BI) {
160 *tty->flip.flag_buf_ptr = TTY_BREAK;
161 } else if (*status & UART_LSR_PE)
162 *tty->flip.flag_buf_ptr = TTY_PARITY;
163 else if (*status & UART_LSR_FE)
164 *tty->flip.flag_buf_ptr = TTY_FRAME;
166 if (uart_handle_sysrq_char(&up->port, ch, regs))
168 if ((*status & up->port.ignore_status_mask) == 0) {
169 tty->flip.flag_buf_ptr++;
170 tty->flip.char_buf_ptr++;
173 if ((*status & UART_LSR_OE) &&
174 tty->flip.count < TTY_FLIPBUF_SIZE) {
176 * Overrun is special, since it's reported
177 * immediately, and doesn't affect the current
180 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
181 tty->flip.flag_buf_ptr++;
182 tty->flip.char_buf_ptr++;
186 *status = serial_in(up, UART_LSR);
187 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
188 tty_flip_buffer_push(tty);
191 static void transmit_chars(struct uart_pxa_port *up)
193 struct circ_buf *xmit = &up->port.info->xmit;
196 if (up->port.x_char) {
197 serial_out(up, UART_TX, up->port.x_char);
198 up->port.icount.tx++;
202 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
203 serial_pxa_stop_tx(&up->port, 0);
207 count = up->port.fifosize / 2;
209 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
210 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
211 up->port.icount.tx++;
212 if (uart_circ_empty(xmit))
214 } while (--count > 0);
216 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
217 uart_write_wakeup(&up->port);
220 if (uart_circ_empty(xmit))
221 serial_pxa_stop_tx(&up->port, 0);
224 static void serial_pxa_start_tx(struct uart_port *port, unsigned int tty_start)
226 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
228 if (!(up->ier & UART_IER_THRI)) {
229 up->ier |= UART_IER_THRI;
230 serial_out(up, UART_IER, up->ier);
234 static inline void check_modem_status(struct uart_pxa_port *up)
238 status = serial_in(up, UART_MSR);
240 if ((status & UART_MSR_ANY_DELTA) == 0)
243 if (status & UART_MSR_TERI)
244 up->port.icount.rng++;
245 if (status & UART_MSR_DDSR)
246 up->port.icount.dsr++;
247 if (status & UART_MSR_DDCD)
248 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
249 if (status & UART_MSR_DCTS)
250 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
252 wake_up_interruptible(&up->port.info->delta_msr_wait);
256 * This handles the interrupt from one port.
258 static inline irqreturn_t
259 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
261 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
262 unsigned int iir, lsr;
264 iir = serial_in(up, UART_IIR);
265 if (iir & UART_IIR_NO_INT)
267 lsr = serial_in(up, UART_LSR);
268 if (lsr & UART_LSR_DR)
269 receive_chars(up, &lsr, regs);
270 check_modem_status(up);
271 if (lsr & UART_LSR_THRE)
276 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
278 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
282 spin_lock_irqsave(&up->port.lock, flags);
283 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
284 spin_unlock_irqrestore(&up->port.lock, flags);
289 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
291 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
293 unsigned char status;
296 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
297 spin_lock_irqsave(&up->port.lock, flags);
298 status = serial_in(up, UART_MSR);
299 spin_unlock_irqrestore(&up->port.lock, flags);
302 if (status & UART_MSR_DCD)
304 if (status & UART_MSR_RI)
306 if (status & UART_MSR_DSR)
308 if (status & UART_MSR_CTS)
313 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
315 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
316 unsigned char mcr = 0;
318 if (mctrl & TIOCM_RTS)
320 if (mctrl & TIOCM_DTR)
322 if (mctrl & TIOCM_OUT1)
323 mcr |= UART_MCR_OUT1;
324 if (mctrl & TIOCM_OUT2)
325 mcr |= UART_MCR_OUT2;
326 if (mctrl & TIOCM_LOOP)
327 mcr |= UART_MCR_LOOP;
331 serial_out(up, UART_MCR, mcr);
334 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
336 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
339 spin_lock_irqsave(&up->port.lock, flags);
340 if (break_state == -1)
341 up->lcr |= UART_LCR_SBC;
343 up->lcr &= ~UART_LCR_SBC;
344 serial_out(up, UART_LCR, up->lcr);
345 spin_unlock_irqrestore(&up->port.lock, flags);
349 static void serial_pxa_dma_init(struct pxa_uart *up)
352 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
356 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
359 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
365 pxa_free_dma(up->txdma);
367 pxa_free_dma(up->rxdma);
373 static int serial_pxa_startup(struct uart_port *port)
375 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
384 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
389 * Clear the FIFO buffers and disable them.
390 * (they will be reenabled in set_termios())
392 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
393 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
394 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
395 serial_out(up, UART_FCR, 0);
398 * Clear the interrupt registers.
400 (void) serial_in(up, UART_LSR);
401 (void) serial_in(up, UART_RX);
402 (void) serial_in(up, UART_IIR);
403 (void) serial_in(up, UART_MSR);
406 * Now, initialize the UART
408 serial_out(up, UART_LCR, UART_LCR_WLEN8);
410 spin_lock_irqsave(&up->port.lock, flags);
411 up->port.mctrl |= TIOCM_OUT2;
412 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
413 spin_unlock_irqrestore(&up->port.lock, flags);
416 * Finally, enable interrupts. Note: Modem status interrupts
417 * are set via set_termios(), which will be occuring imminently
418 * anyway, so we don't enable them here.
420 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
421 serial_out(up, UART_IER, up->ier);
424 * And clear the interrupt registers again for luck.
426 (void) serial_in(up, UART_LSR);
427 (void) serial_in(up, UART_RX);
428 (void) serial_in(up, UART_IIR);
429 (void) serial_in(up, UART_MSR);
434 static void serial_pxa_shutdown(struct uart_port *port)
436 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
439 free_irq(up->port.irq, up);
442 * Disable interrupts from this port
445 serial_out(up, UART_IER, 0);
447 spin_lock_irqsave(&up->port.lock, flags);
448 up->port.mctrl &= ~TIOCM_OUT2;
449 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
450 spin_unlock_irqrestore(&up->port.lock, flags);
453 * Disable break condition and FIFOs
455 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
456 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
457 UART_FCR_CLEAR_RCVR |
458 UART_FCR_CLEAR_XMIT);
459 serial_out(up, UART_FCR, 0);
463 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
466 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
467 unsigned char cval, fcr = 0;
469 unsigned int baud, quot;
471 switch (termios->c_cflag & CSIZE) {
487 if (termios->c_cflag & CSTOPB)
489 if (termios->c_cflag & PARENB)
490 cval |= UART_LCR_PARITY;
491 if (!(termios->c_cflag & PARODD))
492 cval |= UART_LCR_EPAR;
495 * Ask the core to calculate the divisor for us.
497 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
498 quot = uart_get_divisor(port, baud);
500 if ((up->port.uartclk / quot) < (2400 * 16))
501 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
503 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
506 * Ok, we're now changing the port state. Do it with
507 * interrupts disabled.
509 spin_lock_irqsave(&up->port.lock, flags);
512 * Ensure the port will be enabled.
513 * This is required especially for serial console.
518 * Update the per-port timeout.
520 uart_update_timeout(port, termios->c_cflag, quot);
522 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
523 if (termios->c_iflag & INPCK)
524 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
525 if (termios->c_iflag & (BRKINT | PARMRK))
526 up->port.read_status_mask |= UART_LSR_BI;
529 * Characters to ignore
531 up->port.ignore_status_mask = 0;
532 if (termios->c_iflag & IGNPAR)
533 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
534 if (termios->c_iflag & IGNBRK) {
535 up->port.ignore_status_mask |= UART_LSR_BI;
537 * If we're ignoring parity and break indicators,
538 * ignore overruns too (for real raw support).
540 if (termios->c_iflag & IGNPAR)
541 up->port.ignore_status_mask |= UART_LSR_OE;
545 * ignore all characters if CREAD is not set
547 if ((termios->c_cflag & CREAD) == 0)
548 up->port.ignore_status_mask |= UART_LSR_DR;
551 * CTS flow control flag and modem status interrupts
553 up->ier &= ~UART_IER_MSI;
554 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
555 up->ier |= UART_IER_MSI;
557 serial_out(up, UART_IER, up->ier);
559 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
560 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
561 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
562 serial_out(up, UART_LCR, cval); /* reset DLAB */
563 up->lcr = cval; /* Save LCR */
564 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
565 serial_out(up, UART_FCR, fcr);
566 spin_unlock_irqrestore(&up->port.lock, flags);
570 serial_pxa_pm(struct uart_port *port, unsigned int state,
571 unsigned int oldstate)
573 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
584 static void serial_pxa_release_port(struct uart_port *port)
588 static int serial_pxa_request_port(struct uart_port *port)
593 static void serial_pxa_config_port(struct uart_port *port, int flags)
595 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
596 up->port.type = PORT_PXA;
600 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
602 /* we don't want the core code to modify any port params */
607 serial_pxa_type(struct uart_port *port)
609 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
613 #ifdef CONFIG_SERIAL_PXA_CONSOLE
615 extern struct uart_pxa_port serial_pxa_ports[];
616 extern struct uart_driver serial_pxa_reg;
618 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
621 * Wait for transmitter & holding register to empty
623 static inline void wait_for_xmitr(struct uart_pxa_port *up)
625 unsigned int status, tmout = 10000;
627 /* Wait up to 10ms for the character(s) to be sent. */
629 status = serial_in(up, UART_LSR);
631 if (status & UART_LSR_BI)
632 up->lsr_break_flag = UART_LSR_BI;
637 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
639 /* Wait up to 1s for flow control if necessary */
640 if (up->port.flags & UPF_CONS_FLOW) {
643 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
649 * Print a string to the serial port trying not to disturb
650 * any possible real use of the port...
652 * The console_lock must be held when we get here.
655 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
657 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
662 * First save the UER then disable the interrupts
664 ier = serial_in(up, UART_IER);
665 serial_out(up, UART_IER, UART_IER_UUE);
668 * Now, do each character
670 for (i = 0; i < count; i++, s++) {
674 * Send the character out.
675 * If a LF, also do CR...
677 serial_out(up, UART_TX, *s);
680 serial_out(up, UART_TX, 13);
685 * Finally, wait for transmitter to become empty
686 * and restore the IER
689 serial_out(up, UART_IER, ier);
693 serial_pxa_console_setup(struct console *co, char *options)
695 struct uart_pxa_port *up;
701 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
703 up = &serial_pxa_ports[co->index];
706 uart_parse_options(options, &baud, &parity, &bits, &flow);
708 return uart_set_options(&up->port, co, baud, parity, bits, flow);
711 static struct console serial_pxa_console = {
713 .write = serial_pxa_console_write,
714 .device = uart_console_device,
715 .setup = serial_pxa_console_setup,
716 .flags = CON_PRINTBUFFER,
718 .data = &serial_pxa_reg,
722 serial_pxa_console_init(void)
724 register_console(&serial_pxa_console);
728 console_initcall(serial_pxa_console_init);
730 #define PXA_CONSOLE &serial_pxa_console
732 #define PXA_CONSOLE NULL
735 struct uart_ops serial_pxa_pops = {
736 .tx_empty = serial_pxa_tx_empty,
737 .set_mctrl = serial_pxa_set_mctrl,
738 .get_mctrl = serial_pxa_get_mctrl,
739 .stop_tx = serial_pxa_stop_tx,
740 .start_tx = serial_pxa_start_tx,
741 .stop_rx = serial_pxa_stop_rx,
742 .enable_ms = serial_pxa_enable_ms,
743 .break_ctl = serial_pxa_break_ctl,
744 .startup = serial_pxa_startup,
745 .shutdown = serial_pxa_shutdown,
746 .set_termios = serial_pxa_set_termios,
748 .type = serial_pxa_type,
749 .release_port = serial_pxa_release_port,
750 .request_port = serial_pxa_request_port,
751 .config_port = serial_pxa_config_port,
752 .verify_port = serial_pxa_verify_port,
755 static struct uart_pxa_port serial_pxa_ports[] = {
758 .cken = CKEN6_FFUART,
762 .membase = (void *)&FFUART,
763 .mapbase = __PREG(FFUART),
765 .uartclk = 921600 * 16,
767 .ops = &serial_pxa_pops,
772 .cken = CKEN7_BTUART,
776 .membase = (void *)&BTUART,
777 .mapbase = __PREG(BTUART),
779 .uartclk = 921600 * 16,
781 .ops = &serial_pxa_pops,
786 .cken = CKEN5_STUART,
790 .membase = (void *)&STUART,
791 .mapbase = __PREG(STUART),
793 .uartclk = 921600 * 16,
795 .ops = &serial_pxa_pops,
801 static struct uart_driver serial_pxa_reg = {
802 .owner = THIS_MODULE,
803 .driver_name = "PXA serial",
804 .devfs_name = "tts/",
808 .nr = ARRAY_SIZE(serial_pxa_ports),
812 static int __init serial_pxa_init(void)
816 ret = uart_register_driver(&serial_pxa_reg);
820 for (i = 0; i < ARRAY_SIZE(serial_pxa_ports); i++)
821 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[i].port);
826 static void __exit serial_pxa_exit(void)
830 for (i = 0; i < ARRAY_SIZE(serial_pxa_ports); i++)
831 uart_remove_one_port(&serial_pxa_reg, &serial_pxa_ports[i].port);
832 uart_unregister_driver(&serial_pxa_reg);
835 module_init(serial_pxa_init);
836 module_exit(serial_pxa_exit);
838 MODULE_LICENSE("GPL");