drivers/serial/sunsab.c

   1 /* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC.
   2  *
   3  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   4  * Copyright (C) 2002  David S. Miller (davem@redhat.com)
   5  *
   6  * Rewrote buffer handling to use CIRC(Circular Buffer) macros.
   7  *   Maxim Krasnyanskiy <maxk@qualcomm.com>
   8  *
   9  * Fixed to use tty_get_baud_rate, and to allow for arbitrary baud
  10  * rates to be programmed into the UART.  Also eliminated a lot of
  11  * duplicated code in the console setup.
  12  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13  *
  14  * Ported to new 2.5.x UART layer.
  15  *   David S. Miller <davem@redhat.com>
  16  */
  17
  18 #include <linux/config.h>
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/sched.h>
  22 #include <linux/errno.h>
  23 #include <linux/tty.h>
  24 #include <linux/tty_flip.h>
  25 #include <linux/major.h>
  26 #include <linux/string.h>
  27 #include <linux/ptrace.h>
  28 #include <linux/ioport.h>
  29 #include <linux/circ_buf.h>
  30 #include <linux/serial.h>
  31 #include <linux/sysrq.h>
  32 #include <linux/console.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/slab.h>
  35 #include <linux/delay.h>
  36 #include <linux/init.h>
  37
  38 #include <asm/io.h>
  39 #include <asm/irq.h>
  40 #include <asm/oplib.h>
  41 #include <asm/ebus.h>
  42
  43 #if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  44 #define SUPPORT_SYSRQ
  45 #endif
  46
  47 #include <linux/serial_core.h>
  48
  49 #include "suncore.h"
  50 #include "sunsab.h"
  51
  52 struct uart_sunsab_port {
  53         struct uart_port                port;           /* Generic UART port    */
  54         union sab82532_async_regs       *regs;          /* Chip registers       */
  55         unsigned long                   irqflags;       /* IRQ state flags      */
  56         int                             dsr;            /* Current DSR state    */
  57         unsigned int                    cec_timeout;    /* Chip poll timeout... */
  58         unsigned int                    tec_timeout;    /* likewise             */
  59         unsigned char                   interrupt_mask0;/* ISR0 masking         */
  60         unsigned char                   interrupt_mask1;/* ISR1 masking         */
  61         unsigned char                   pvr_dtr_bit;    /* Which PVR bit is DTR */
  62         unsigned char                   pvr_dsr_bit;    /* Which PVR bit is DSR */
  63         int                             type;           /* SAB82532 version     */
  64 };
  65
  66 /*
  67  * This assumes you have a 29.4912 MHz clock for your UART.
  68  */
  69 #define SAB_BASE_BAUD ( 29491200 / 16 )
  70
  71 static char *sab82532_version[16] = {
  72         "V1.0", "V2.0", "V3.2", "V(0x03)",
  73         "V(0x04)", "V(0x05)", "V(0x06)", "V(0x07)",
  74         "V(0x08)", "V(0x09)", "V(0x0a)", "V(0x0b)",
  75         "V(0x0c)", "V(0x0d)", "V(0x0e)", "V(0x0f)"
  76 };
  77
  78 #define SAB82532_MAX_TEC_TIMEOUT 200000 /* 1 character time (at 50 baud) */
  79 #define SAB82532_MAX_CEC_TIMEOUT  50000 /* 2.5 TX CLKs (at 50 baud) */
  80
  81 #define SAB82532_RECV_FIFO_SIZE 32      /* Standard async fifo sizes */
  82 #define SAB82532_XMIT_FIFO_SIZE 32
  83
  84 static __inline__ void sunsab_tec_wait(struct uart_sunsab_port *up)
  85 {
  86         int timeout = up->tec_timeout;
  87
  88         while ((readb(&up->regs->r.star) & SAB82532_STAR_TEC) && --timeout)
  89                 udelay(1);
  90 }
  91
  92 static __inline__ void sunsab_cec_wait(struct uart_sunsab_port *up)
  93 {
  94         int timeout = up->cec_timeout;
  95
  96         while ((readb(&up->regs->r.star) & SAB82532_STAR_CEC) && --timeout)
  97                 udelay(1);
  98 }
  99
 100 static struct tty_struct *
 101 receive_chars(struct uart_sunsab_port *up,
 102               union sab82532_irq_status *stat,
 103               struct pt_regs *regs)
 104 {
 105         struct tty_struct *tty = NULL;
 106         unsigned char buf[32];
 107         int saw_console_brk = 0;
 108         int free_fifo = 0;
 109         int count = 0;
 110         int i;
 111
 112         if (up->port.info != NULL)              /* Unopened serial console */
 113                 tty = up->port.info->tty;
 114
 115         /* Read number of BYTES (Character + Status) available. */
 116         if (stat->sreg.isr0 & SAB82532_ISR0_RPF) {
 117                 count = SAB82532_RECV_FIFO_SIZE;
 118                 free_fifo++;
 119         }
 120
 121         if (stat->sreg.isr0 & SAB82532_ISR0_TCD) {
 122                 count = readb(&up->regs->r.rbcl) & (SAB82532_RECV_FIFO_SIZE - 1);
 123                 free_fifo++;
 124         }
 125
 126         /* Issue a FIFO read command in case we where idle. */
 127         if (stat->sreg.isr0 & SAB82532_ISR0_TIME) {
 128                 sunsab_cec_wait(up);
 129                 writeb(SAB82532_CMDR_RFRD, &up->regs->w.cmdr);
 130                 return tty;
 131         }
 132
 133         if (stat->sreg.isr0 & SAB82532_ISR0_RFO)
 134                 free_fifo++;
 135
 136         /* Read the FIFO. */
 137         for (i = 0; i < count; i++)
 138                 buf[i] = readb(&up->regs->r.rfifo[i]);
 139
 140         /* Issue Receive Message Complete command. */
 141         if (free_fifo) {
 142                 sunsab_cec_wait(up);
 143                 writeb(SAB82532_CMDR_RMC, &up->regs->w.cmdr);
 144         }
 145
 146         for (i = 0; i < count; i++) {
 147                 unsigned char ch = buf[i];
 148
 149                 if (tty == NULL) {
 150                         uart_handle_sysrq_char(&up->port, ch, regs);
 151                         continue;
 152                 }
 153
 154                 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
 155                         tty->flip.work.func((void *)tty);
 156                         if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 157                                 return tty; // if TTY_DONT_FLIP is set
 158                 }
 159
 160                 *tty->flip.char_buf_ptr = ch;
 161                 *tty->flip.flag_buf_ptr = TTY_NORMAL;
 162                 up->port.icount.rx++;
 163
 164                 if (unlikely(stat->sreg.isr0 & (SAB82532_ISR0_PERR |
 165                                                 SAB82532_ISR0_FERR |
 166                                                 SAB82532_ISR0_RFO)) ||
 167                     unlikely(stat->sreg.isr1 & SAB82532_ISR1_BRK)) {
 168                         /*
 169                          * For statistics only
 170                          */
 171                         if (stat->sreg.isr1 & SAB82532_ISR1_BRK) {
 172                                 stat->sreg.isr0 &= ~(SAB82532_ISR0_PERR |
 173                                                      SAB82532_ISR0_FERR);
 174                                 up->port.icount.brk++;
 175                                 if (up->port.line == up->port.cons->index)
 176                                         saw_console_brk = 1;
 177                                 /*
 178                                  * We do the SysRQ and SAK checking
 179                                  * here because otherwise the break
 180                                  * may get masked by ignore_status_mask
 181                                  * or read_status_mask.
 182                                  */
 183                                 if (uart_handle_break(&up->port))
 184                                         continue;
 185                         } else if (stat->sreg.isr0 & SAB82532_ISR0_PERR)
 186                                 up->port.icount.parity++;
 187                         else if (stat->sreg.isr0 & SAB82532_ISR0_FERR)
 188                                 up->port.icount.frame++;
 189                         if (stat->sreg.isr0 & SAB82532_ISR0_RFO)
 190                                 up->port.icount.overrun++;
 191
 192                         /*
 193                          * Mask off conditions which should be ingored.
 194                          */
 195                         stat->sreg.isr0 &= (up->port.read_status_mask & 0xff);
 196                         stat->sreg.isr1 &= ((up->port.read_status_mask >> 8) & 0xff);
 197
 198                         if (stat->sreg.isr1 & SAB82532_ISR1_BRK) {
 199                                 *tty->flip.flag_buf_ptr = TTY_BREAK;
 200                         } else if (stat->sreg.isr0 & SAB82532_ISR0_PERR)
 201                                 *tty->flip.flag_buf_ptr = TTY_PARITY;
 202                         else if (stat->sreg.isr0 & SAB82532_ISR0_FERR)
 203                                 *tty->flip.flag_buf_ptr = TTY_FRAME;
 204                 }
 205
 206                 if (uart_handle_sysrq_char(&up->port, ch, regs))
 207                         continue;
 208
 209                 if ((stat->sreg.isr0 & (up->port.ignore_status_mask & 0xff)) == 0 &&
 210                     (stat->sreg.isr1 & ((up->port.ignore_status_mask >> 8) & 0xff)) == 0){
 211                         tty->flip.flag_buf_ptr++;
 212                         tty->flip.char_buf_ptr++;
 213                         tty->flip.count++;
 214                 }
 215                 if ((stat->sreg.isr0 & SAB82532_ISR0_RFO) &&
 216                     tty->flip.count < TTY_FLIPBUF_SIZE) {
 217                         /*
 218                          * Overrun is special, since it's reported
 219                          * immediately, and doesn't affect the current
 220                          * character.
 221                          */
 222                         *tty->flip.flag_buf_ptr = TTY_OVERRUN;
 223                         tty->flip.flag_buf_ptr++;
 224                         tty->flip.char_buf_ptr++;
 225                         tty->flip.count++;
 226                 }
 227         }
 228
 229         if (saw_console_brk)
 230                 sun_do_break();
 231
 232         return tty;
 233 }
 234
 235 static void sunsab_stop_tx(struct uart_port *, unsigned int);
 236
 237 static void transmit_chars(struct uart_sunsab_port *up,
 238                            union sab82532_irq_status *stat)
 239 {
 240         struct circ_buf *xmit = &up->port.info->xmit;
 241         int i;
 242
 243         if (stat->sreg.isr1 & SAB82532_ISR1_ALLS) {
 244                 up->interrupt_mask1 |= SAB82532_IMR1_ALLS;
 245                 writeb(up->interrupt_mask1, &up->regs->w.imr1);
 246                 set_bit(SAB82532_ALLS, &up->irqflags);
 247         }
 248
 249 #if 0 /* bde@nwlink.com says this check causes problems */
 250         if (!(stat->sreg.isr1 & SAB82532_ISR1_XPR))
 251                 return;
 252 #endif
 253
 254         if (!(readb(&up->regs->r.star) & SAB82532_STAR_XFW))
 255                 return;
 256
 257         set_bit(SAB82532_XPR, &up->irqflags);
 258
 259         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 260                 up->interrupt_mask1 |= SAB82532_IMR1_XPR;
 261                 writeb(up->interrupt_mask1, &up->regs->w.imr1);
 262                 uart_write_wakeup(&up->port);
 263                 return;
 264         }
 265
 266         up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR);
 267         writeb(up->interrupt_mask1, &up->regs->w.imr1);
 268         clear_bit(SAB82532_ALLS, &up->irqflags);
 269
 270         /* Stuff 32 bytes into Transmit FIFO. */
 271         clear_bit(SAB82532_XPR, &up->irqflags);
 272         for (i = 0; i < up->port.fifosize; i++) {
 273                 writeb(xmit->buf[xmit->tail],
 274                        &up->regs->w.xfifo[i]);
 275                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 276                 up->port.icount.tx++;
 277                 if (uart_circ_empty(xmit))
 278                         break;
 279         }
 280
 281         /* Issue a Transmit Frame command. */
 282         sunsab_cec_wait(up);
 283         writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr);
 284
 285         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 286                 uart_write_wakeup(&up->port);
 287
 288         if (uart_circ_empty(xmit))
 289                 sunsab_stop_tx(&up->port, 0);
 290 }
 291
 292 static void check_status(struct uart_sunsab_port *up,
 293                          union sab82532_irq_status *stat)
 294 {
 295         if (stat->sreg.isr0 & SAB82532_ISR0_CDSC)
 296                 uart_handle_dcd_change(&up->port,
 297                                        !(readb(&up->regs->r.vstr) & SAB82532_VSTR_CD));
 298
 299         if (stat->sreg.isr1 & SAB82532_ISR1_CSC)
 300                 uart_handle_cts_change(&up->port,
 301                                        (readb(&up->regs->r.star) & SAB82532_STAR_CTS));
 302
 303         if ((readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ^ up->dsr) {
 304                 up->dsr = (readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ? 0 : 1;
 305                 up->port.icount.dsr++;
 306         }
 307
 308         wake_up_interruptible(&up->port.info->delta_msr_wait);
 309 }
 310
 311 static irqreturn_t sunsab_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 312 {
 313         struct uart_sunsab_port *up = dev_id;
 314         struct tty_struct *tty;
 315         union sab82532_irq_status status;
 316         unsigned long flags;
 317
 318         spin_lock_irqsave(&up->port.lock, flags);
 319
 320         status.stat = 0;
 321         if (readb(&up->regs->r.gis) & SAB82532_GIS_ISA0)
 322                 status.sreg.isr0 = readb(&up->regs->r.isr0);
 323         if (readb(&up->regs->r.gis) & SAB82532_GIS_ISA1)
 324                 status.sreg.isr1 = readb(&up->regs->r.isr1);
 325
 326         tty = NULL;
 327         if (status.stat) {
 328                 if (status.sreg.isr0 & (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME |
 329                                         SAB82532_ISR0_RFO | SAB82532_ISR0_RPF))
 330                         tty = receive_chars(up, &status, regs);
 331                 if ((status.sreg.isr0 & SAB82532_ISR0_CDSC) ||
 332                     (status.sreg.isr1 & SAB82532_ISR1_CSC))
 333                         check_status(up, &status);
 334                 if (status.sreg.isr1 & (SAB82532_ISR1_ALLS | SAB82532_ISR1_XPR))
 335                         transmit_chars(up, &status);
 336         }
 337
 338         spin_unlock(&up->port.lock);
 339
 340         if (tty)
 341                 tty_flip_buffer_push(tty);
 342
 343         up++;
 344
 345         spin_lock(&up->port.lock);
 346
 347         status.stat = 0;
 348         if (readb(&up->regs->r.gis) & SAB82532_GIS_ISB0)
 349                 status.sreg.isr0 = readb(&up->regs->r.isr0);
 350         if (readb(&up->regs->r.gis) & SAB82532_GIS_ISB1)
 351                 status.sreg.isr1 = readb(&up->regs->r.isr1);
 352
 353         tty = NULL;
 354         if (status.stat) {
 355                 if (status.sreg.isr0 & (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME |
 356                                         SAB82532_ISR0_RFO | SAB82532_ISR0_RPF))
 357                         tty = receive_chars(up, &status, regs);
 358                 if ((status.sreg.isr0 & SAB82532_ISR0_CDSC) ||
 359                     (status.sreg.isr1 & (SAB82532_ISR1_BRK | SAB82532_ISR1_CSC)))
 360                         check_status(up, &status);
 361                 if (status.sreg.isr1 & (SAB82532_ISR1_ALLS | SAB82532_ISR1_XPR))
 362                         transmit_chars(up, &status);
 363         }
 364
 365         spin_unlock_irqrestore(&up->port.lock, flags);
 366
 367         if (tty)
 368                 tty_flip_buffer_push(tty);
 369
 370         return IRQ_HANDLED;
 371 }
 372
 373 /* port->lock is not held.  */
 374 static unsigned int sunsab_tx_empty(struct uart_port *port)
 375 {
 376         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 377         int ret;
 378
 379         /* Do not need a lock for a state test like this.  */
 380         if (test_bit(SAB82532_ALLS, &up->irqflags))
 381                 ret = TIOCSER_TEMT;
 382         else
 383                 ret = 0;
 384
 385         return ret;
 386 }
 387
 388 /* port->lock held by caller.  */
 389 static void sunsab_set_mctrl(struct uart_port *port, unsigned int mctrl)
 390 {
 391         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 392
 393         if (mctrl & TIOCM_RTS) {
 394                 writeb(readb(&up->regs->rw.mode) & ~SAB82532_MODE_FRTS,
 395                        &up->regs->rw.mode);
 396                 writeb(readb(&up->regs->rw.mode) | SAB82532_MODE_RTS,
 397                        &up->regs->rw.mode);
 398         } else {
 399                 writeb(readb(&up->regs->rw.mode) | SAB82532_MODE_FRTS,
 400                        &up->regs->rw.mode);
 401                 writeb(readb(&up->regs->rw.mode) | SAB82532_MODE_RTS,
 402                        &up->regs->rw.mode);
 403         }
 404         if (mctrl & TIOCM_DTR) {
 405                 writeb(readb(&up->regs->rw.pvr) & ~(up->pvr_dtr_bit), &up->regs->rw.pvr);
 406         } else {
 407                 writeb(readb(&up->regs->rw.pvr) | up->pvr_dtr_bit, &up->regs->rw.pvr);
 408         }
 409 }
 410
 411 /* port->lock is not held.  */
 412 static unsigned int sunsab_get_mctrl(struct uart_port *port)
 413 {
 414         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 415         unsigned long flags;
 416         unsigned char val;
 417         unsigned int result;
 418
 419         result = 0;
 420
 421         spin_lock_irqsave(&up->port.lock, flags);
 422
 423         val = readb(&up->regs->r.pvr);
 424         result |= (val & up->pvr_dsr_bit) ? 0 : TIOCM_DSR;
 425
 426         val = readb(&up->regs->r.vstr);
 427         result |= (val & SAB82532_VSTR_CD) ? 0 : TIOCM_CAR;
 428
 429         val = readb(&up->regs->r.star);
 430         result |= (val & SAB82532_STAR_CTS) ? TIOCM_CTS : 0;
 431
 432         spin_unlock_irqrestore(&up->port.lock, flags);
 433
 434         return result;
 435 }
 436
 437 /* port->lock held by caller.  */
 438 static void sunsab_stop_tx(struct uart_port *port, unsigned int tty_stop)
 439 {
 440         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 441
 442         up->interrupt_mask1 |= SAB82532_IMR1_XPR;
 443         writeb(up->interrupt_mask1, &up->regs->w.imr1);
 444 }
 445
 446 /* port->lock held by caller.  */
 447 static void sunsab_start_tx(struct uart_port *port, unsigned int tty_start)
 448 {
 449         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 450         struct circ_buf *xmit = &up->port.info->xmit;
 451         int i;
 452
 453         up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR);
 454         writeb(up->interrupt_mask1, &up->regs->w.imr1);
 455
 456         if (!test_bit(SAB82532_XPR, &up->irqflags))
 457                 return;
 458
 459         clear_bit(SAB82532_ALLS, &up->irqflags);
 460         clear_bit(SAB82532_XPR, &up->irqflags);
 461
 462         for (i = 0; i < up->port.fifosize; i++) {
 463                 writeb(xmit->buf[xmit->tail],
 464                        &up->regs->w.xfifo[i]);
 465                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 466                 up->port.icount.tx++;
 467                 if (uart_circ_empty(xmit))
 468                         break;
 469         }
 470
 471         /* Issue a Transmit Frame command.  */
 472         sunsab_cec_wait(up);
 473         writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr);
 474 }
 475
 476 /* port->lock is not held.  */
 477 static void sunsab_send_xchar(struct uart_port *port, char ch)
 478 {
 479         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 480         unsigned long flags;
 481
 482         spin_lock_irqsave(&up->port.lock, flags);
 483
 484         sunsab_tec_wait(up);
 485         writeb(ch, &up->regs->w.tic);
 486
 487         spin_unlock_irqrestore(&up->port.lock, flags);
 488 }
 489
 490 /* port->lock held by caller.  */
 491 static void sunsab_stop_rx(struct uart_port *port)
 492 {
 493         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 494
 495         up->interrupt_mask0 |= SAB82532_ISR0_TCD;
 496         writeb(up->interrupt_mask1, &up->regs->w.imr0);
 497 }
 498
 499 /* port->lock held by caller.  */
 500 static void sunsab_enable_ms(struct uart_port *port)
 501 {
 502         /* For now we always receive these interrupts.  */
 503 }
 504
 505 /* port->lock is not held.  */
 506 static void sunsab_break_ctl(struct uart_port *port, int break_state)
 507 {
 508         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 509         unsigned long flags;
 510         unsigned char val;
 511
 512         spin_lock_irqsave(&up->port.lock, flags);
 513
 514         val = readb(&up->regs->rw.dafo);
 515         if (break_state)
 516                 val |= SAB82532_DAFO_XBRK;
 517         else
 518                 val &= ~SAB82532_DAFO_XBRK;
 519         writeb(val, &up->regs->rw.dafo);
 520
 521         spin_unlock_irqrestore(&up->port.lock, flags);
 522 }
 523
 524 /* port->lock is not held.  */
 525 static int sunsab_startup(struct uart_port *port)
 526 {
 527         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 528         unsigned long flags;
 529         unsigned char tmp;
 530
 531         spin_lock_irqsave(&up->port.lock, flags);
 532
 533         /*
 534          * Wait for any commands or immediate characters
 535          */
 536         sunsab_cec_wait(up);
 537         sunsab_tec_wait(up);
 538
 539         /*
 540          * Clear the FIFO buffers.
 541          */
 542         writeb(SAB82532_CMDR_RRES, &up->regs->w.cmdr);
 543         sunsab_cec_wait(up);
 544         writeb(SAB82532_CMDR_XRES, &up->regs->w.cmdr);
 545
 546         /*
 547          * Clear the interrupt registers.
 548          */
 549         (void) readb(&up->regs->r.isr0);
 550         (void) readb(&up->regs->r.isr1);
 551
 552         /*
 553          * Now, initialize the UART
 554          */
 555         writeb(0, &up->regs->w.ccr0);                           /* power-down */
 556         writeb(SAB82532_CCR0_MCE | SAB82532_CCR0_SC_NRZ |
 557                SAB82532_CCR0_SM_ASYNC, &up->regs->w.ccr0);
 558         writeb(SAB82532_CCR1_ODS | SAB82532_CCR1_BCR | 7, &up->regs->w.ccr1);
 559         writeb(SAB82532_CCR2_BDF | SAB82532_CCR2_SSEL |
 560                SAB82532_CCR2_TOE, &up->regs->w.ccr2);
 561         writeb(0, &up->regs->w.ccr3);
 562         writeb(SAB82532_CCR4_MCK4 | SAB82532_CCR4_EBRG, &up->regs->w.ccr4);
 563         writeb(SAB82532_MODE_RTS | SAB82532_MODE_FCTS |
 564                SAB82532_MODE_RAC, &up->regs->w.mode);
 565         writeb(SAB82532_RFC_DPS|SAB82532_RFC_RFTH_32, &up->regs->w.rfc);
 566
 567         tmp = readb(&up->regs->rw.ccr0);
 568         tmp |= SAB82532_CCR0_PU;        /* power-up */
 569         writeb(tmp, &up->regs->rw.ccr0);
 570
 571         /*
 572          * Finally, enable interrupts
 573          */
 574         up->interrupt_mask0 = (SAB82532_IMR0_PERR | SAB82532_IMR0_FERR |
 575                                SAB82532_IMR0_PLLA);
 576         writeb(up->interrupt_mask0, &up->regs->w.imr0);
 577         up->interrupt_mask1 = (SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS |
 578                                SAB82532_IMR1_XOFF | SAB82532_IMR1_TIN |
 579                                SAB82532_IMR1_CSC | SAB82532_IMR1_XON |
 580                                SAB82532_IMR1_XPR);
 581         writeb(up->interrupt_mask1, &up->regs->w.imr1);
 582         set_bit(SAB82532_ALLS, &up->irqflags);
 583         set_bit(SAB82532_XPR, &up->irqflags);
 584
 585         spin_unlock_irqrestore(&up->port.lock, flags);
 586
 587         return 0;
 588 }
 589
 590 /* port->lock is not held.  */
 591 static void sunsab_shutdown(struct uart_port *port)
 592 {
 593         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 594         unsigned long flags;
 595         unsigned char tmp;
 596
 597         spin_lock_irqsave(&up->port.lock, flags);
 598
 599         /* Disable Interrupts */
 600         up->interrupt_mask0 = 0xff;
 601         writeb(up->interrupt_mask0, &up->regs->w.imr0);
 602         up->interrupt_mask1 = 0xff;
 603         writeb(up->interrupt_mask1, &up->regs->w.imr1);
 604
 605         /* Disable break condition */
 606         tmp = readb(&up->regs->rw.dafo);
 607         tmp &= ~SAB82532_DAFO_XBRK;
 608         writeb(tmp, &up->regs->rw.dafo);
 609
 610         /* Disable Receiver */
 611         tmp = readb(&up->regs->rw.mode);
 612         tmp &= ~SAB82532_MODE_RAC;
 613         writeb(tmp, &up->regs->rw.mode);
 614
 615         /*
 616          * XXX FIXME
 617          *
 618          * If the chip is powered down here the system hangs/crashes during
 619          * reboot or shutdown.  This needs to be investigated further,
 620          * similar behaviour occurs in 2.4 when the driver is configured
 621          * as a module only.  One hint may be that data is sometimes
 622          * transmitted at 9600 baud during shutdown (regardless of the
 623          * speed the chip was configured for when the port was open).
 624          */
 625 #if 0
 626         /* Power Down */
 627         tmp = readb(&up->regs->rw.ccr0);
 628         tmp &= ~SAB82532_CCR0_PU;
 629         writeb(tmp, &up->regs->rw.ccr0);
 630 #endif
 631
 632         spin_unlock_irqrestore(&up->port.lock, flags);
 633 }
 634
 635 /*
 636  * This is used to figure out the divisor speeds.
 637  *
 638  * The formula is:    Baud = SAB_BASE_BAUD / ((N + 1) * (1 << M)),
 639  *
 640  * with               0 <= N < 64 and 0 <= M < 16
 641  */
 642
 643 static void calc_ebrg(int baud, int *n_ret, int *m_ret)
 644 {
 645         int     n, m;
 646
 647         if (baud == 0) {
 648                 *n_ret = 0;
 649                 *m_ret = 0;
 650                 return;
 651         }
 652
 653         /*
 654          * We scale numbers by 10 so that we get better accuracy
 655          * without having to use floating point.  Here we increment m
 656          * until n is within the valid range.
 657          */
 658         n = (SAB_BASE_BAUD * 10) / baud;
 659         m = 0;
 660         while (n >= 640) {
 661                 n = n / 2;
 662                 m++;
 663         }
 664         n = (n+5) / 10;
 665         /*
 666          * We try very hard to avoid speeds with M == 0 since they may
 667          * not work correctly for XTAL frequences above 10 MHz.
 668          */
 669         if ((m == 0) && ((n & 1) == 0)) {
 670                 n = n / 2;
 671                 m++;
 672         }
 673         *n_ret = n - 1;
 674         *m_ret = m;
 675 }
 676
 677 /* Internal routine, port->lock is held and local interrupts are disabled.  */
 678 static void sunsab_convert_to_sab(struct uart_sunsab_port *up, unsigned int cflag,
 679                                   unsigned int iflag, int baud)
 680 {
 681         unsigned int ebrg;
 682         unsigned char dafo;
 683         int bits, n, m;
 684
 685         /* Byte size and parity */
 686         switch (cflag & CSIZE) {
 687               case CS5: dafo = SAB82532_DAFO_CHL5; bits = 7; break;
 688               case CS6: dafo = SAB82532_DAFO_CHL6; bits = 8; break;
 689               case CS7: dafo = SAB82532_DAFO_CHL7; bits = 9; break;
 690               case CS8: dafo = SAB82532_DAFO_CHL8; bits = 10; break;
 691               /* Never happens, but GCC is too dumb to figure it out */
 692               default:  dafo = SAB82532_DAFO_CHL5; bits = 7; break;
 693         }
 694
 695         if (cflag & CSTOPB) {
 696                 dafo |= SAB82532_DAFO_STOP;
 697                 bits++;
 698         }
 699
 700         if (cflag & PARENB) {
 701                 dafo |= SAB82532_DAFO_PARE;
 702                 bits++;
 703         }
 704
 705         if (cflag & PARODD) {
 706                 dafo |= SAB82532_DAFO_PAR_ODD;
 707         } else {
 708                 dafo |= SAB82532_DAFO_PAR_EVEN;
 709         }
 710
 711         calc_ebrg(baud, &n, &m);
 712
 713         ebrg = n | (m << 6);
 714
 715         up->tec_timeout = (10 * 1000000) / baud;
 716         up->cec_timeout = up->tec_timeout >> 2;
 717
 718         /* CTS flow control flags */
 719         /* We encode read_status_mask and ignore_status_mask like so:
 720          *
 721          * ---------------------
 722          * | ... | ISR1 | ISR0 |
 723          * ---------------------
 724          *  ..    15   8 7    0
 725          */
 726
 727         up->port.read_status_mask = (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME |
 728                                      SAB82532_ISR0_RFO | SAB82532_ISR0_RPF |
 729                                      SAB82532_ISR0_CDSC);
 730         up->port.read_status_mask |= (SAB82532_ISR1_CSC |
 731                                       SAB82532_ISR1_ALLS |
 732                                       SAB82532_ISR1_XPR) << 8;
 733         if (iflag & INPCK)
 734                 up->port.read_status_mask |= (SAB82532_ISR0_PERR |
 735                                               SAB82532_ISR0_FERR);
 736         if (iflag & (BRKINT | PARMRK))
 737                 up->port.read_status_mask |= (SAB82532_ISR1_BRK << 8);
 738
 739         /*
 740          * Characteres to ignore
 741          */
 742         up->port.ignore_status_mask = 0;
 743         if (iflag & IGNPAR)
 744                 up->port.ignore_status_mask |= (SAB82532_ISR0_PERR |
 745                                                 SAB82532_ISR0_FERR);
 746         if (iflag & IGNBRK) {
 747                 up->port.ignore_status_mask |= (SAB82532_ISR1_BRK << 8);
 748                 /*
 749                  * If we're ignoring parity and break indicators,
 750                  * ignore overruns too (for real raw support).
 751                  */
 752                 if (iflag & IGNPAR)
 753                         up->port.ignore_status_mask |= SAB82532_ISR0_RFO;
 754         }
 755
 756         /*
 757          * ignore all characters if CREAD is not set
 758          */
 759         if ((cflag & CREAD) == 0)
 760                 up->port.ignore_status_mask |= (SAB82532_ISR0_RPF |
 761                                                 SAB82532_ISR0_TCD);
 762
 763         /* Now bang the new settings into the chip.  */
 764         sunsab_cec_wait(up);
 765         sunsab_tec_wait(up);
 766         writeb(dafo, &up->regs->w.dafo);
 767         writeb(ebrg & 0xff, &up->regs->w.bgr);
 768         writeb((readb(&up->regs->rw.ccr2) & ~0xc0) | ((ebrg >> 2) & 0xc0),
 769                &up->regs->rw.ccr2);
 770
 771         writeb(readb(&up->regs->rw.mode) | SAB82532_MODE_RAC, &up->regs->rw.mode);
 772
 773 }
 774
 775 /* port->lock is not held.  */
 776 static void sunsab_set_termios(struct uart_port *port, struct termios *termios,
 777                                struct termios *old)
 778 {
 779         struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
 780         unsigned long flags;
 781         int baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
 782
 783         spin_lock_irqsave(&up->port.lock, flags);
 784         sunsab_convert_to_sab(up, termios->c_cflag, termios->c_iflag, baud);
 785         spin_unlock_irqrestore(&up->port.lock, flags);
 786 }
 787
 788 static const char *sunsab_type(struct uart_port *port)
 789 {
 790         struct uart_sunsab_port *up = (void *)port;
 791         static char buf[36];
 792
 793         sprintf(buf, "SAB82532 %s", sab82532_version[up->type]);
 794         return buf;
 795 }
 796
 797 static void sunsab_release_port(struct uart_port *port)
 798 {
 799 }
 800
 801 static int sunsab_request_port(struct uart_port *port)
 802 {
 803         return 0;
 804 }
 805
 806 static void sunsab_config_port(struct uart_port *port, int flags)
 807 {
 808 }
 809
 810 static int sunsab_verify_port(struct uart_port *port, struct serial_struct *ser)
 811 {
 812         return -EINVAL;
 813 }
 814
 815 static struct uart_ops sunsab_pops = {
 816         .tx_empty       = sunsab_tx_empty,
 817         .set_mctrl      = sunsab_set_mctrl,
 818         .get_mctrl      = sunsab_get_mctrl,
 819         .stop_tx        = sunsab_stop_tx,
 820         .start_tx       = sunsab_start_tx,
 821         .send_xchar     = sunsab_send_xchar,
 822         .stop_rx        = sunsab_stop_rx,
 823         .enable_ms      = sunsab_enable_ms,
 824         .break_ctl      = sunsab_break_ctl,
 825         .startup        = sunsab_startup,
 826         .shutdown       = sunsab_shutdown,
 827         .set_termios    = sunsab_set_termios,
 828         .type           = sunsab_type,
 829         .release_port   = sunsab_release_port,
 830         .request_port   = sunsab_request_port,
 831         .config_port    = sunsab_config_port,
 832         .verify_port    = sunsab_verify_port,
 833 };
 834
 835 static struct uart_driver sunsab_reg = {
 836         .owner                  = THIS_MODULE,
 837         .driver_name            = "serial",
 838         .devfs_name             = "tts/",
 839         .dev_name               = "ttyS",
 840         .major                  = TTY_MAJOR,
 841 };
 842
 843 static struct uart_sunsab_port *sunsab_ports;
 844 static int num_channels;
 845
 846 #ifdef CONFIG_SERIAL_SUNSAB_CONSOLE
 847
 848 static __inline__ void sunsab_console_putchar(struct uart_sunsab_port *up, char c)
 849 {
 850         unsigned long flags;
 851
 852         spin_lock_irqsave(&up->port.lock, flags);
 853
 854         sunsab_tec_wait(up);
 855         writeb(c, &up->regs->w.tic);
 856
 857         spin_unlock_irqrestore(&up->port.lock, flags);
 858 }
 859
 860 static void sunsab_console_write(struct console *con, const char *s, unsigned n)
 861 {
 862         struct uart_sunsab_port *up = &sunsab_ports[con->index];
 863         int i;
 864
 865         for (i = 0; i < n; i++) {
 866                 if (*s == '\n')
 867                         sunsab_console_putchar(up, '\r');
 868                 sunsab_console_putchar(up, *s++);
 869         }
 870         sunsab_tec_wait(up);
 871 }
 872
 873 static int sunsab_console_setup(struct console *con, char *options)
 874 {
 875         struct uart_sunsab_port *up = &sunsab_ports[con->index];
 876         unsigned long flags;
 877         int baud;
 878
 879         printk("Console: ttyS%d (SAB82532)\n",
 880                (sunsab_reg.minor - 64) + con->index);
 881
 882         sunserial_console_termios(con);
 883
 884         /* Firmware console speed is limited to 150-->38400 baud so
 885          * this hackish cflag thing is OK.
 886          */
 887         switch (con->cflag & CBAUD) {
 888         case B150: baud = 150; break;
 889         case B300: baud = 300; break;
 890         case B600: baud = 600; break;
 891         case B1200: baud = 1200; break;
 892         case B2400: baud = 2400; break;
 893         case B4800: baud = 4800; break;
 894         default: case B9600: baud = 9600; break;
 895         case B19200: baud = 19200; break;
 896         case B38400: baud = 38400; break;
 897         };
 898
 899         /*
 900          * Temporary fix.
 901          */
 902         spin_lock_init(&up->port.lock);
 903
 904         /*
 905          * Initialize the hardware
 906          */
 907         sunsab_startup(&up->port);
 908
 909         spin_lock_irqsave(&up->port.lock, flags);
 910
 911         /*
 912          * Finally, enable interrupts
 913          */
 914         up->interrupt_mask0 = SAB82532_IMR0_PERR | SAB82532_IMR0_FERR |
 915                                 SAB82532_IMR0_PLLA | SAB82532_IMR0_CDSC;
 916         writeb(up->interrupt_mask0, &up->regs->w.imr0);
 917         up->interrupt_mask1 = SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS |
 918                                 SAB82532_IMR1_XOFF | SAB82532_IMR1_TIN |
 919                                 SAB82532_IMR1_CSC | SAB82532_IMR1_XON |
 920                                 SAB82532_IMR1_XPR;
 921         writeb(up->interrupt_mask1, &up->regs->w.imr1);
 922
 923         sunsab_convert_to_sab(up, con->cflag, 0, baud);
 924         sunsab_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS);
 925
 926         spin_unlock_irqrestore(&up->port.lock, flags);
 927
 928         return 0;
 929 }
 930
 931 static struct console sunsab_console = {
 932         .name   =       "ttyS",
 933         .write  =       sunsab_console_write,
 934         .device =       uart_console_device,
 935         .setup  =       sunsab_console_setup,
 936         .flags  =       CON_PRINTBUFFER,
 937         .index  =       -1,
 938         .data   =       &sunsab_reg,
 939 };
 940 #define SUNSAB_CONSOLE  (&sunsab_console)
 941
 942 static void __init sunsab_console_init(void)
 943 {
 944         int i;
 945
 946         if (con_is_present())
 947                 return;
 948
 949         for (i = 0; i < num_channels; i++) {
 950                 int this_minor = sunsab_reg.minor + i;
 951
 952                 if ((this_minor - 64) == (serial_console - 1))
 953                         break;
 954         }
 955         if (i == num_channels)
 956                 return;
 957
 958         sunsab_console.index = i;
 959         register_console(&sunsab_console);
 960 }
 961 #else
 962 #define SUNSAB_CONSOLE          (NULL)
 963 #define sunsab_console_init()   do { } while (0)
 964 #endif
 965
 966 static void __init for_each_sab_edev(void (*callback)(struct linux_ebus_device *, void *), void *arg)
 967 {
 968         struct linux_ebus *ebus;
 969         struct linux_ebus_device *edev = NULL;
 970
 971         for_each_ebus(ebus) {
 972                 for_each_ebusdev(edev, ebus) {
 973                         if (!strcmp(edev->prom_name, "se")) {
 974                                 callback(edev, arg);
 975                                 continue;
 976                         } else if (!strcmp(edev->prom_name, "serial")) {
 977                                 char compat[32];
 978                                 int clen;
 979
 980                                 /* On RIO this can be an SE, check it.  We could
 981                                  * just check ebus->is_rio, but this is more portable.
 982                                  */
 983                                 clen = prom_getproperty(edev->prom_node, "compatible",
 984                                                         compat, sizeof(compat));
 985                                 if (clen > 0) {
 986                                         if (strncmp(compat, "sab82532", 8) == 0) {
 987                                                 callback(edev, arg);
 988                                                 continue;
 989                                         }
 990                                 }
 991                         }
 992                 }
 993         }
 994 }
 995
 996 static void __init sab_count_callback(struct linux_ebus_device *edev, void *arg)
 997 {
 998         int *count_p = arg;
 999
1000         (*count_p)++;
1001 }
1002
1003 static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg)
1004 {
1005         int *instance_p = arg;
1006         struct uart_sunsab_port *up;
1007         unsigned long regs, offset;
1008         int i;
1009
1010         /* Note: ports are located in reverse order */
1011         regs = edev->resource[0].start;
1012         offset = sizeof(union sab82532_async_regs);
1013         for (i = 0; i < 2; i++) {
1014                 up = &sunsab_ports[(*instance_p * 2) + 1 - i];
1015
1016                 memset(up, 0, sizeof(*up));
1017                 up->regs = ioremap(regs + offset, sizeof(union sab82532_async_regs));
1018                 up->port.irq = edev->irqs[0];
1019                 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
1020                 up->port.mapbase = (unsigned long)up->regs;
1021                 up->port.iotype = SERIAL_IO_MEM;
1022
1023                 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);
1024
1025                 offset -= sizeof(union sab82532_async_regs);
1026         }
1027
1028         (*instance_p)++;
1029 }
1030
1031 static int __init probe_for_sabs(void)
1032 {
1033         int this_sab = 0;
1034
1035         /* Find device instances.  */
1036         for_each_sab_edev(&sab_count_callback, &this_sab);
1037         if (!this_sab)
1038                 return -ENODEV;
1039
1040         /* Allocate tables.  */
1041         sunsab_ports = kmalloc(sizeof(struct uart_sunsab_port) * this_sab * 2,
1042                                GFP_KERNEL);
1043         if (!sunsab_ports)
1044                 return -ENOMEM;
1045
1046         num_channels = this_sab * 2;
1047
1048         this_sab = 0;
1049         for_each_sab_edev(&sab_attach_callback, &this_sab);
1050         return 0;
1051 }
1052
1053 static void __init sunsab_init_hw(void)
1054 {
1055         int i;
1056
1057         for (i = 0; i < num_channels; i++) {
1058                 struct uart_sunsab_port *up = &sunsab_ports[i];
1059
1060                 up->port.line = i;
1061                 up->port.ops = &sunsab_pops;
1062                 up->port.type = PORT_SUNSAB;
1063                 up->port.uartclk = SAB_BASE_BAUD;
1064
1065                 up->type = readb(&up->regs->r.vstr) & 0x0f;
1066                 writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
1067                 writeb(0xff, &up->regs->w.pim);
1068                 if (up->port.line == 0) {
1069                         up->pvr_dsr_bit = (1 << 0);
1070                         up->pvr_dtr_bit = (1 << 1);
1071                 } else {
1072                         up->pvr_dsr_bit = (1 << 3);
1073                         up->pvr_dtr_bit = (1 << 2);
1074                 }
1075                 writeb((1 << 1) | (1 << 2) | (1 << 4), &up->regs->w.pvr);
1076                 writeb(readb(&up->regs->rw.mode) | SAB82532_MODE_FRTS,
1077                        &up->regs->rw.mode);
1078                 writeb(readb(&up->regs->rw.mode) | SAB82532_MODE_RTS,
1079                        &up->regs->rw.mode);
1080
1081                 up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
1082                 up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
1083
1084                 if (!(up->port.line & 0x01)) {
1085                         if (request_irq(up->port.irq, sunsab_interrupt,
1086                                         SA_SHIRQ, "serial(sab82532)", up)) {
1087                                 printk("sunsab%d: can't get IRQ %x\n",
1088                                        i, up->port.irq);
1089                                 continue;
1090                         }
1091                 }
1092         }
1093 }
1094
1095 static int __init sunsab_init(void)
1096 {
1097         int ret = probe_for_sabs();
1098         int i;
1099
1100         if (ret < 0)
1101                 return ret;
1102
1103         sunsab_init_hw();
1104
1105         sunsab_reg.minor = sunserial_current_minor;
1106         sunsab_reg.nr = num_channels;
1107         sunsab_reg.cons = SUNSAB_CONSOLE;
1108
1109         ret = uart_register_driver(&sunsab_reg);
1110         if (ret < 0) {
1111                 int i;
1112
1113                 for (i = 0; i < num_channels; i++) {
1114                         struct uart_sunsab_port *up = &sunsab_ports[i];
1115
1116                         if (!(up->port.line & 0x01))
1117                                 free_irq(up->port.irq, up);
1118                         iounmap(up->regs);
1119                 }
1120                 kfree(sunsab_ports);
1121                 sunsab_ports = NULL;
1122
1123                 return ret;
1124         }
1125
1126         sunserial_current_minor += num_channels;
1127
1128         for (i = 0; i < num_channels; i++) {
1129                 struct uart_sunsab_port *up = &sunsab_ports[i];
1130
1131                 uart_add_one_port(&sunsab_reg, &up->port);
1132         }
1133
1134         sunsab_console_init();
1135
1136         return 0;
1137 }
1138
1139 static void __exit sunsab_exit(void)
1140 {
1141         int i;
1142
1143         for (i = 0; i < num_channels; i++) {
1144                 struct uart_sunsab_port *up = &sunsab_ports[i];
1145
1146                 uart_remove_one_port(&sunsab_reg, &up->port);
1147
1148                 if (!(up->port.line & 0x01))
1149                         free_irq(up->port.irq, up);
1150                 iounmap(up->regs);
1151         }
1152
1153         sunserial_current_minor -= num_channels;
1154         uart_unregister_driver(&sunsab_reg);
1155
1156         kfree(sunsab_ports);
1157         sunsab_ports = NULL;
1158 }
1159
1160 module_init(sunsab_init);
1161 module_exit(sunsab_exit);
1162
1163 MODULE_AUTHOR("Eddie C. Dost and David S. Miller");
1164 MODULE_DESCRIPTION("Sun SAB82532 serial port driver");
1165 MODULE_LICENSE("GPL");