drivers/serial/sunsu.c

   1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
   2  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
   3  *
   4  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   5  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
   6  *
   7  * This is mainly a variation of 8250.c, credits go to authors mentioned
   8  * therein.  In fact this driver should be merged into the generic 8250.c
   9  * infrastructure perhaps using a 8250_sparc.c module.
  10  *
  11  * Fixed to use tty_get_baud_rate().
  12  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13  *
  14  * Converted to new 2.5.x UART layer.
  15  *   David S. Miller (davem@redhat.com), 2002-Jul-29
  16  */
  17
  18 #include <linux/config.h>
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/sched.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/errno.h>
  24 #include <linux/tty.h>
  25 #include <linux/tty_flip.h>
  26 #include <linux/major.h>
  27 #include <linux/string.h>
  28 #include <linux/ptrace.h>
  29 #include <linux/ioport.h>
  30 #include <linux/circ_buf.h>
  31 #include <linux/serial.h>
  32 #include <linux/sysrq.h>
  33 #include <linux/console.h>
  34 #ifdef CONFIG_SERIO
  35 #include <linux/serio.h>
  36 #endif
  37 #include <linux/serial_reg.h>
  38 #include <linux/init.h>
  39 #include <linux/delay.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/irq.h>
  43 #include <asm/oplib.h>
  44 #include <asm/ebus.h>
  45 #ifdef CONFIG_SPARC64
  46 #include <asm/isa.h>
  47 #endif
  48
  49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  50 #define SUPPORT_SYSRQ
  51 #endif
  52
  53 #include <linux/serial_core.h>
  54
  55 #include "suncore.h"
  56
  57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  58  * in a UART clock of 1.8462 MHz.
  59  */
  60 #define SU_BASE_BAUD    (1846200 / 16)
  61
  62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  64
  65 /*
  66  * Here we define the default xmit fifo size used for each type of UART.
  67  */
  68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
  69         { "unknown",    1,      0 },
  70         { "8250",       1,      0 },
  71         { "16450",      1,      0 },
  72         { "16550",      1,      0 },
  73         { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
  74         { "Cirrus",     1,      0 },
  75         { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
  76         { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  77         { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
  78         { "Startech",   1,      0 },
  79         { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
  80         { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  81         { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  82         { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
  83 };
  84
  85 struct uart_sunsu_port {
  86         struct uart_port        port;
  87         unsigned char           acr;
  88         unsigned char           ier;
  89         unsigned short          rev;
  90         unsigned char           lcr;
  91         unsigned int            lsr_break_flag;
  92         unsigned int            cflag;
  93
  94         /* Probing information.  */
  95         enum su_type            su_type;
  96         unsigned int            type_probed;    /* XXX Stupid */
  97         int                     port_node;
  98         unsigned int            irq;
  99
 100 #ifdef CONFIG_SERIO
 101         struct serio            serio;
 102         int                     serio_open;
 103 #endif
 104 };
 105
 106 #define _INLINE_
 107
 108 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 109 {
 110         offset <<= up->port.regshift;
 111
 112         switch (up->port.iotype) {
 113         case SERIAL_IO_HUB6:
 114                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 115                 return inb(up->port.iobase + 1);
 116
 117         case SERIAL_IO_MEM:
 118                 return readb(up->port.membase + offset);
 119
 120         default:
 121                 return inb(up->port.iobase + offset);
 122         }
 123 }
 124
 125 static _INLINE_ void
 126 serial_out(struct uart_sunsu_port *up, int offset, int value)
 127 {
 128 #ifndef CONFIG_SPARC64
 129         /*
 130          * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 131          * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 132          * gate outputs a logical one. Since we use level triggered interrupts
 133          * we have lockup and watchdog reset. We cannot mask IRQ because
 134          * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 135          * This problem is similar to what Alpha people suffer, see serial.c.
 136          */
 137         if (offset == UART_MCR)
 138                 value |= UART_MCR_OUT2;
 139 #endif
 140         offset <<= up->port.regshift;
 141
 142         switch (up->port.iotype) {
 143         case SERIAL_IO_HUB6:
 144                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 145                 outb(value, up->port.iobase + 1);
 146                 break;
 147
 148         case SERIAL_IO_MEM:
 149                 writeb(value, up->port.membase + offset);
 150                 break;
 151
 152         default:
 153                 outb(value, up->port.iobase + offset);
 154         }
 155 }
 156
 157 /*
 158  * We used to support using pause I/O for certain machines.  We
 159  * haven't supported this for a while, but just in case it's badly
 160  * needed for certain old 386 machines, I've left these #define's
 161  * in....
 162  */
 163 #define serial_inp(up, offset)          serial_in(up, offset)
 164 #define serial_outp(up, offset, value)  serial_out(up, offset, value)
 165
 166
 167 /*
 168  * For the 16C950
 169  */
 170 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 171 {
 172         serial_out(up, UART_SCR, offset);
 173         serial_out(up, UART_ICR, value);
 174 }
 175
 176 #if 0 /* Unused currently */
 177 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 178 {
 179         unsigned int value;
 180
 181         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 182         serial_out(up, UART_SCR, offset);
 183         value = serial_in(up, UART_ICR);
 184         serial_icr_write(up, UART_ACR, up->acr);
 185
 186         return value;
 187 }
 188 #endif
 189
 190 #ifdef CONFIG_SERIAL_8250_RSA
 191 /*
 192  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 193  * We set the port uart clock rate if we succeed.
 194  */
 195 static int __enable_rsa(struct uart_sunsu_port *up)
 196 {
 197         unsigned char mode;
 198         int result;
 199
 200         mode = serial_inp(up, UART_RSA_MSR);
 201         result = mode & UART_RSA_MSR_FIFO;
 202
 203         if (!result) {
 204                 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 205                 mode = serial_inp(up, UART_RSA_MSR);
 206                 result = mode & UART_RSA_MSR_FIFO;
 207         }
 208
 209         if (result)
 210                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 211
 212         return result;
 213 }
 214
 215 static void enable_rsa(struct uart_sunsu_port *up)
 216 {
 217         if (up->port.type == PORT_RSA) {
 218                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 219                         spin_lock_irq(&up->port.lock);
 220                         __enable_rsa(up);
 221                         spin_unlock_irq(&up->port.lock);
 222                 }
 223                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 224                         serial_outp(up, UART_RSA_FRR, 0);
 225         }
 226 }
 227
 228 /*
 229  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 230  * It is unknown why interrupts were disabled in here.  However,
 231  * the caller is expected to preserve this behaviour by grabbing
 232  * the spinlock before calling this function.
 233  */
 234 static void disable_rsa(struct uart_sunsu_port *up)
 235 {
 236         unsigned char mode;
 237         int result;
 238
 239         if (up->port.type == PORT_RSA &&
 240             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 241                 spin_lock_irq(&up->port.lock);
 242
 243                 mode = serial_inp(up, UART_RSA_MSR);
 244                 result = !(mode & UART_RSA_MSR_FIFO);
 245
 246                 if (!result) {
 247                         serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 248                         mode = serial_inp(up, UART_RSA_MSR);
 249                         result = !(mode & UART_RSA_MSR_FIFO);
 250                 }
 251
 252                 if (result)
 253                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 254                 spin_unlock_irq(&up->port.lock);
 255         }
 256 }
 257 #endif /* CONFIG_SERIAL_8250_RSA */
 258
 259 static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop)
 260 {
 261         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 262
 263         if (up->ier & UART_IER_THRI) {
 264                 up->ier &= ~UART_IER_THRI;
 265                 serial_out(up, UART_IER, up->ier);
 266         }
 267         if (up->port.type == PORT_16C950 && tty_stop) {
 268                 up->acr |= UART_ACR_TXDIS;
 269                 serial_icr_write(up, UART_ACR, up->acr);
 270         }
 271 }
 272
 273 static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start)
 274 {
 275         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 276
 277         if (!(up->ier & UART_IER_THRI)) {
 278                 up->ier |= UART_IER_THRI;
 279                 serial_out(up, UART_IER, up->ier);
 280         }
 281         /*
 282          * We only do this from uart_start
 283          */
 284         if (tty_start && up->port.type == PORT_16C950) {
 285                 up->acr &= ~UART_ACR_TXDIS;
 286                 serial_icr_write(up, UART_ACR, up->acr);
 287         }
 288 }
 289
 290 static void sunsu_stop_rx(struct uart_port *port)
 291 {
 292         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 293         unsigned long flags;
 294
 295         spin_lock_irqsave(&up->port.lock, flags);
 296         up->ier &= ~UART_IER_RLSI;
 297         up->port.read_status_mask &= ~UART_LSR_DR;
 298         serial_out(up, UART_IER, up->ier);
 299         spin_unlock_irqrestore(&up->port.lock, flags);
 300 }
 301
 302 static void sunsu_enable_ms(struct uart_port *port)
 303 {
 304         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 305         unsigned long flags;
 306
 307         spin_lock_irqsave(&up->port.lock, flags);
 308         up->ier |= UART_IER_MSI;
 309         serial_out(up, UART_IER, up->ier);
 310         spin_unlock_irqrestore(&up->port.lock, flags);
 311 }
 312
 313 static _INLINE_ void
 314 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
 315 {
 316         struct tty_struct *tty = up->port.info->tty;
 317         unsigned char ch;
 318         int max_count = 256;
 319         int saw_console_brk = 0;
 320
 321         do {
 322                 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
 323                         tty->flip.work.func((void *)tty);
 324                         if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 325                                 return; // if TTY_DONT_FLIP is set
 326                 }
 327                 ch = serial_inp(up, UART_RX);
 328                 *tty->flip.char_buf_ptr = ch;
 329                 *tty->flip.flag_buf_ptr = TTY_NORMAL;
 330                 up->port.icount.rx++;
 331
 332                 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 333                                        UART_LSR_FE | UART_LSR_OE))) {
 334                         /*
 335                          * For statistics only
 336                          */
 337                         if (*status & UART_LSR_BI) {
 338                                 *status &= ~(UART_LSR_FE | UART_LSR_PE);
 339                                 up->port.icount.brk++;
 340                                 if (up->port.cons != NULL &&
 341                                     up->port.line == up->port.cons->index)
 342                                         saw_console_brk = 1;
 343                                 /*
 344                                  * We do the SysRQ and SAK checking
 345                                  * here because otherwise the break
 346                                  * may get masked by ignore_status_mask
 347                                  * or read_status_mask.
 348                                  */
 349                                 if (uart_handle_break(&up->port))
 350                                         goto ignore_char;
 351                         } else if (*status & UART_LSR_PE)
 352                                 up->port.icount.parity++;
 353                         else if (*status & UART_LSR_FE)
 354                                 up->port.icount.frame++;
 355                         if (*status & UART_LSR_OE)
 356                                 up->port.icount.overrun++;
 357
 358                         /*
 359                          * Mask off conditions which should be ingored.
 360                          */
 361                         *status &= up->port.read_status_mask;
 362
 363                         if (up->port.cons != NULL &&
 364                             up->port.line == up->port.cons->index) {
 365                                 /* Recover the break flag from console xmit */
 366                                 *status |= up->lsr_break_flag;
 367                                 up->lsr_break_flag = 0;
 368                         }
 369
 370                         if (*status & UART_LSR_BI) {
 371                                 *tty->flip.flag_buf_ptr = TTY_BREAK;
 372                         } else if (*status & UART_LSR_PE)
 373                                 *tty->flip.flag_buf_ptr = TTY_PARITY;
 374                         else if (*status & UART_LSR_FE)
 375                                 *tty->flip.flag_buf_ptr = TTY_FRAME;
 376                 }
 377                 if (uart_handle_sysrq_char(&up->port, ch, regs))
 378                         goto ignore_char;
 379                 if ((*status & up->port.ignore_status_mask) == 0) {
 380                         tty->flip.flag_buf_ptr++;
 381                         tty->flip.char_buf_ptr++;
 382                         tty->flip.count++;
 383                 }
 384                 if ((*status & UART_LSR_OE) &&
 385                     tty->flip.count < TTY_FLIPBUF_SIZE) {
 386                         /*
 387                          * Overrun is special, since it's reported
 388                          * immediately, and doesn't affect the current
 389                          * character.
 390                          */
 391                         *tty->flip.flag_buf_ptr = TTY_OVERRUN;
 392                         tty->flip.flag_buf_ptr++;
 393                         tty->flip.char_buf_ptr++;
 394                         tty->flip.count++;
 395                 }
 396         ignore_char:
 397                 *status = serial_inp(up, UART_LSR);
 398         } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 399         tty_flip_buffer_push(tty);
 400
 401         if (saw_console_brk)
 402                 sun_do_break();
 403 }
 404
 405 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
 406 {
 407         struct circ_buf *xmit = &up->port.info->xmit;
 408         int count;
 409
 410         if (up->port.x_char) {
 411                 serial_outp(up, UART_TX, up->port.x_char);
 412                 up->port.icount.tx++;
 413                 up->port.x_char = 0;
 414                 return;
 415         }
 416         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 417                 sunsu_stop_tx(&up->port, 0);
 418                 return;
 419         }
 420
 421         count = up->port.fifosize;
 422         do {
 423                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 424                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 425                 up->port.icount.tx++;
 426                 if (uart_circ_empty(xmit))
 427                         break;
 428         } while (--count > 0);
 429
 430         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 431                 uart_write_wakeup(&up->port);
 432
 433         if (uart_circ_empty(xmit))
 434                 sunsu_stop_tx(&up->port, 0);
 435 }
 436
 437 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
 438 {
 439         int status;
 440
 441         status = serial_in(up, UART_MSR);
 442
 443         if ((status & UART_MSR_ANY_DELTA) == 0)
 444                 return;
 445
 446         if (status & UART_MSR_TERI)
 447                 up->port.icount.rng++;
 448         if (status & UART_MSR_DDSR)
 449                 up->port.icount.dsr++;
 450         if (status & UART_MSR_DDCD)
 451                 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 452         if (status & UART_MSR_DCTS)
 453                 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 454
 455         wake_up_interruptible(&up->port.info->delta_msr_wait);
 456 }
 457
 458 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 459 {
 460         struct uart_sunsu_port *up = dev_id;
 461         unsigned long flags;
 462         unsigned char status;
 463
 464         spin_lock_irqsave(&up->port.lock, flags);
 465
 466         do {
 467                 status = serial_inp(up, UART_LSR);
 468                 if (status & UART_LSR_DR)
 469                         receive_chars(up, &status, regs);
 470                 check_modem_status(up);
 471                 if (status & UART_LSR_THRE)
 472                         transmit_chars(up);
 473         } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 474
 475         spin_unlock_irqrestore(&up->port.lock, flags);
 476
 477         return IRQ_HANDLED;
 478 }
 479
 480 /* Separate interrupt handling path for keyboard/mouse ports.  */
 481
 482 static void
 483 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 484                    unsigned int iflag, unsigned int quot);
 485
 486 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 487 {
 488         unsigned int cur_cflag = up->cflag;
 489         int quot, new_baud;
 490
 491         up->cflag &= ~CBAUD;
 492         up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 493
 494         quot = up->port.uartclk / (16 * new_baud);
 495
 496         spin_unlock(&up->port.lock);
 497
 498         sunsu_change_speed(&up->port, up->cflag, 0, quot);
 499
 500         spin_lock(&up->port.lock);
 501 }
 502
 503 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
 504 {
 505         do {
 506                 unsigned char ch = serial_inp(up, UART_RX);
 507
 508                 /* Stop-A is handled by drivers/char/keyboard.c now. */
 509                 if (up->su_type == SU_PORT_KBD) {
 510 #ifdef CONFIG_SERIO
 511                         serio_interrupt(&up->serio, ch, 0, regs);
 512 #endif
 513                 } else if (up->su_type == SU_PORT_MS) {
 514                         int ret = suncore_mouse_baud_detection(ch, is_break);
 515
 516                         switch (ret) {
 517                         case 2:
 518                                 sunsu_change_mouse_baud(up);
 519                                 /* fallthru */
 520                         case 1:
 521                                 break;
 522
 523                         case 0:
 524 #ifdef CONFIG_SERIO
 525                                 serio_interrupt(&up->serio, ch, 0, regs);
 526 #endif
 527                                 break;
 528                         };
 529                 }
 530         } while (serial_in(up, UART_LSR) & UART_LSR_DR);
 531 }
 532
 533 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 534 {
 535         struct uart_sunsu_port *up = dev_id;
 536
 537         if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 538                 unsigned char status = serial_inp(up, UART_LSR);
 539
 540                 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 541                         receive_kbd_ms_chars(up, regs,
 542                                              (status & UART_LSR_BI) != 0);
 543         }
 544
 545         return IRQ_HANDLED;
 546 }
 547
 548 static unsigned int sunsu_tx_empty(struct uart_port *port)
 549 {
 550         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 551         unsigned long flags;
 552         unsigned int ret;
 553
 554         spin_lock_irqsave(&up->port.lock, flags);
 555         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 556         spin_unlock_irqrestore(&up->port.lock, flags);
 557
 558         return ret;
 559 }
 560
 561 static unsigned int sunsu_get_mctrl(struct uart_port *port)
 562 {
 563         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 564         unsigned long flags;
 565         unsigned char status;
 566         unsigned int ret;
 567
 568         spin_lock_irqsave(&up->port.lock, flags);
 569         status = serial_in(up, UART_MSR);
 570         spin_unlock_irqrestore(&up->port.lock, flags);
 571
 572         ret = 0;
 573         if (status & UART_MSR_DCD)
 574                 ret |= TIOCM_CAR;
 575         if (status & UART_MSR_RI)
 576                 ret |= TIOCM_RNG;
 577         if (status & UART_MSR_DSR)
 578                 ret |= TIOCM_DSR;
 579         if (status & UART_MSR_CTS)
 580                 ret |= TIOCM_CTS;
 581         return ret;
 582 }
 583
 584 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 585 {
 586         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 587         unsigned char mcr = 0;
 588
 589         if (mctrl & TIOCM_RTS)
 590                 mcr |= UART_MCR_RTS;
 591         if (mctrl & TIOCM_DTR)
 592                 mcr |= UART_MCR_DTR;
 593         if (mctrl & TIOCM_OUT1)
 594                 mcr |= UART_MCR_OUT1;
 595         if (mctrl & TIOCM_OUT2)
 596                 mcr |= UART_MCR_OUT2;
 597         if (mctrl & TIOCM_LOOP)
 598                 mcr |= UART_MCR_LOOP;
 599
 600         serial_out(up, UART_MCR, mcr);
 601 }
 602
 603 static void sunsu_break_ctl(struct uart_port *port, int break_state)
 604 {
 605         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 606         unsigned long flags;
 607
 608         spin_lock_irqsave(&up->port.lock, flags);
 609         if (break_state == -1)
 610                 up->lcr |= UART_LCR_SBC;
 611         else
 612                 up->lcr &= ~UART_LCR_SBC;
 613         serial_out(up, UART_LCR, up->lcr);
 614         spin_unlock_irqrestore(&up->port.lock, flags);
 615 }
 616
 617 static int sunsu_startup(struct uart_port *port)
 618 {
 619         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 620         unsigned long flags;
 621         int retval;
 622
 623         if (up->port.type == PORT_16C950) {
 624                 /* Wake up and initialize UART */
 625                 up->acr = 0;
 626                 serial_outp(up, UART_LCR, 0xBF);
 627                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 628                 serial_outp(up, UART_IER, 0);
 629                 serial_outp(up, UART_LCR, 0);
 630                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 631                 serial_outp(up, UART_LCR, 0xBF);
 632                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 633                 serial_outp(up, UART_LCR, 0);
 634         }
 635
 636 #ifdef CONFIG_SERIAL_8250_RSA
 637         /*
 638          * If this is an RSA port, see if we can kick it up to the
 639          * higher speed clock.
 640          */
 641         enable_rsa(up);
 642 #endif
 643
 644         /*
 645          * Clear the FIFO buffers and disable them.
 646          * (they will be reeanbled in set_termios())
 647          */
 648         if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 649                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 650                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 651                                 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 652                 serial_outp(up, UART_FCR, 0);
 653         }
 654
 655         /*
 656          * Clear the interrupt registers.
 657          */
 658         (void) serial_inp(up, UART_LSR);
 659         (void) serial_inp(up, UART_RX);
 660         (void) serial_inp(up, UART_IIR);
 661         (void) serial_inp(up, UART_MSR);
 662
 663         /*
 664          * At this point, there's no way the LSR could still be 0xff;
 665          * if it is, then bail out, because there's likely no UART
 666          * here.
 667          */
 668         if (!(up->port.flags & ASYNC_BUGGY_UART) &&
 669             (serial_inp(up, UART_LSR) == 0xff)) {
 670                 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 671                 return -ENODEV;
 672         }
 673
 674         if (up->su_type != SU_PORT_PORT) {
 675                 retval = request_irq(up->irq, sunsu_kbd_ms_interrupt,
 676                                      SA_SHIRQ, su_typev[up->su_type], up);
 677         } else {
 678                 retval = request_irq(up->irq, sunsu_serial_interrupt,
 679                                      SA_SHIRQ, su_typev[up->su_type], up);
 680         }
 681         if (retval) {
 682                 printk("su: Cannot register IRQ %d\n", up->irq);
 683                 return retval;
 684         }
 685
 686         /*
 687          * Now, initialize the UART
 688          */
 689         serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 690
 691         spin_lock_irqsave(&up->port.lock, flags);
 692
 693         up->port.mctrl |= TIOCM_OUT2;
 694
 695         sunsu_set_mctrl(&up->port, up->port.mctrl);
 696         spin_unlock_irqrestore(&up->port.lock, flags);
 697
 698         /*
 699          * Finally, enable interrupts.  Note: Modem status interrupts
 700          * are set via set_termios(), which will be occurring imminently
 701          * anyway, so we don't enable them here.
 702          */
 703         up->ier = UART_IER_RLSI | UART_IER_RDI;
 704         serial_outp(up, UART_IER, up->ier);
 705
 706         if (up->port.flags & ASYNC_FOURPORT) {
 707                 unsigned int icp;
 708                 /*
 709                  * Enable interrupts on the AST Fourport board
 710                  */
 711                 icp = (up->port.iobase & 0xfe0) | 0x01f;
 712                 outb_p(0x80, icp);
 713                 (void) inb_p(icp);
 714         }
 715
 716         /*
 717          * And clear the interrupt registers again for luck.
 718          */
 719         (void) serial_inp(up, UART_LSR);
 720         (void) serial_inp(up, UART_RX);
 721         (void) serial_inp(up, UART_IIR);
 722         (void) serial_inp(up, UART_MSR);
 723
 724         return 0;
 725 }
 726
 727 static void sunsu_shutdown(struct uart_port *port)
 728 {
 729         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 730         unsigned long flags;
 731
 732         /*
 733          * Disable interrupts from this port
 734          */
 735         up->ier = 0;
 736         serial_outp(up, UART_IER, 0);
 737
 738         spin_lock_irqsave(&up->port.lock, flags);
 739         if (up->port.flags & ASYNC_FOURPORT) {
 740                 /* reset interrupts on the AST Fourport board */
 741                 inb((up->port.iobase & 0xfe0) | 0x1f);
 742                 up->port.mctrl |= TIOCM_OUT1;
 743         } else
 744                 up->port.mctrl &= ~TIOCM_OUT2;
 745
 746         sunsu_set_mctrl(&up->port, up->port.mctrl);
 747         spin_unlock_irqrestore(&up->port.lock, flags);
 748
 749         /*
 750          * Disable break condition and FIFOs
 751          */
 752         serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 753         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 754                                   UART_FCR_CLEAR_RCVR |
 755                                   UART_FCR_CLEAR_XMIT);
 756         serial_outp(up, UART_FCR, 0);
 757
 758 #ifdef CONFIG_SERIAL_8250_RSA
 759         /*
 760          * Reset the RSA board back to 115kbps compat mode.
 761          */
 762         disable_rsa(up);
 763 #endif
 764
 765         /*
 766          * Read data port to reset things.
 767          */
 768         (void) serial_in(up, UART_RX);
 769
 770         free_irq(up->irq, up);
 771 }
 772
 773 static void
 774 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 775                    unsigned int iflag, unsigned int quot)
 776 {
 777         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 778         unsigned char cval, fcr = 0;
 779         unsigned long flags;
 780
 781         switch (cflag & CSIZE) {
 782         case CS5:
 783                 cval = 0x00;
 784                 break;
 785         case CS6:
 786                 cval = 0x01;
 787                 break;
 788         case CS7:
 789                 cval = 0x02;
 790                 break;
 791         default:
 792         case CS8:
 793                 cval = 0x03;
 794                 break;
 795         }
 796
 797         if (cflag & CSTOPB)
 798                 cval |= 0x04;
 799         if (cflag & PARENB)
 800                 cval |= UART_LCR_PARITY;
 801         if (!(cflag & PARODD))
 802                 cval |= UART_LCR_EPAR;
 803 #ifdef CMSPAR
 804         if (cflag & CMSPAR)
 805                 cval |= UART_LCR_SPAR;
 806 #endif
 807
 808         /*
 809          * Work around a bug in the Oxford Semiconductor 952 rev B
 810          * chip which causes it to seriously miscalculate baud rates
 811          * when DLL is 0.
 812          */
 813         if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 814             up->rev == 0x5201)
 815                 quot ++;
 816
 817         if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 818                 if ((up->port.uartclk / quot) < (2400 * 16))
 819                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 820 #ifdef CONFIG_SERIAL_8250_RSA
 821                 else if (up->port.type == PORT_RSA)
 822                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 823 #endif
 824                 else
 825                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 826         }
 827         if (up->port.type == PORT_16750)
 828                 fcr |= UART_FCR7_64BYTE;
 829
 830         /*
 831          * Ok, we're now changing the port state.  Do it with
 832          * interrupts disabled.
 833          */
 834         spin_lock_irqsave(&up->port.lock, flags);
 835
 836         /*
 837          * Update the per-port timeout.
 838          */
 839         uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 840
 841         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 842         if (iflag & INPCK)
 843                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 844         if (iflag & (BRKINT | PARMRK))
 845                 up->port.read_status_mask |= UART_LSR_BI;
 846
 847         /*
 848          * Characteres to ignore
 849          */
 850         up->port.ignore_status_mask = 0;
 851         if (iflag & IGNPAR)
 852                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 853         if (iflag & IGNBRK) {
 854                 up->port.ignore_status_mask |= UART_LSR_BI;
 855                 /*
 856                  * If we're ignoring parity and break indicators,
 857                  * ignore overruns too (for real raw support).
 858                  */
 859                 if (iflag & IGNPAR)
 860                         up->port.ignore_status_mask |= UART_LSR_OE;
 861         }
 862
 863         /*
 864          * ignore all characters if CREAD is not set
 865          */
 866         if ((cflag & CREAD) == 0)
 867                 up->port.ignore_status_mask |= UART_LSR_DR;
 868
 869         /*
 870          * CTS flow control flag and modem status interrupts
 871          */
 872         up->ier &= ~UART_IER_MSI;
 873         if (UART_ENABLE_MS(&up->port, cflag))
 874                 up->ier |= UART_IER_MSI;
 875
 876         serial_out(up, UART_IER, up->ier);
 877
 878         if (uart_config[up->port.type].flags & UART_STARTECH) {
 879                 serial_outp(up, UART_LCR, 0xBF);
 880                 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 881         }
 882         serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 883         serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
 884         serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
 885         if (up->port.type == PORT_16750)
 886                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 887         serial_outp(up, UART_LCR, cval);                /* reset DLAB */
 888         up->lcr = cval;                                 /* Save LCR */
 889         if (up->port.type != PORT_16750) {
 890                 if (fcr & UART_FCR_ENABLE_FIFO) {
 891                         /* emulated UARTs (Lucent Venus 167x) need two steps */
 892                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 893                 }
 894                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 895         }
 896
 897         up->cflag = cflag;
 898
 899         spin_unlock_irqrestore(&up->port.lock, flags);
 900 }
 901
 902 static void
 903 sunsu_set_termios(struct uart_port *port, struct termios *termios,
 904                   struct termios *old)
 905 {
 906         unsigned int baud, quot;
 907
 908         /*
 909          * Ask the core to calculate the divisor for us.
 910          */
 911         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 912         quot = uart_get_divisor(port, baud);
 913
 914         sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 915 }
 916
 917 static void sunsu_release_port(struct uart_port *port)
 918 {
 919 }
 920
 921 static int sunsu_request_port(struct uart_port *port)
 922 {
 923         return 0;
 924 }
 925
 926 static void sunsu_config_port(struct uart_port *port, int flags)
 927 {
 928         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 929
 930         if (flags & UART_CONFIG_TYPE) {
 931                 /*
 932                  * We are supposed to call autoconfig here, but this requires
 933                  * splitting all the OBP probing crap from the UART probing.
 934                  * We'll do it when we kill sunsu.c altogether.
 935                  */
 936                 port->type = up->type_probed;   /* XXX */
 937         }
 938 }
 939
 940 static int
 941 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 942 {
 943         return -EINVAL;
 944 }
 945
 946 static const char *
 947 sunsu_type(struct uart_port *port)
 948 {
 949         int type = port->type;
 950
 951         if (type >= ARRAY_SIZE(uart_config))
 952                 type = 0;
 953         return uart_config[type].name;
 954 }
 955
 956 static struct uart_ops sunsu_pops = {
 957         .tx_empty       = sunsu_tx_empty,
 958         .set_mctrl      = sunsu_set_mctrl,
 959         .get_mctrl      = sunsu_get_mctrl,
 960         .stop_tx        = sunsu_stop_tx,
 961         .start_tx       = sunsu_start_tx,
 962         .stop_rx        = sunsu_stop_rx,
 963         .enable_ms      = sunsu_enable_ms,
 964         .break_ctl      = sunsu_break_ctl,
 965         .startup        = sunsu_startup,
 966         .shutdown       = sunsu_shutdown,
 967         .set_termios    = sunsu_set_termios,
 968         .type           = sunsu_type,
 969         .release_port   = sunsu_release_port,
 970         .request_port   = sunsu_request_port,
 971         .config_port    = sunsu_config_port,
 972         .verify_port    = sunsu_verify_port,
 973 };
 974
 975 #define UART_NR 4
 976
 977 static struct uart_sunsu_port sunsu_ports[UART_NR];
 978
 979 #ifdef CONFIG_SERIO
 980
 981 static spinlock_t sunsu_serio_lock = SPIN_LOCK_UNLOCKED;
 982
 983 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 984 {
 985         struct uart_sunsu_port *up = serio->driver;
 986         unsigned long flags;
 987         int lsr;
 988
 989         spin_lock_irqsave(&sunsu_serio_lock, flags);
 990
 991         do {
 992                 lsr = serial_in(up, UART_LSR);
 993         } while (!(lsr & UART_LSR_THRE));
 994
 995         /* Send the character out. */
 996         serial_out(up, UART_TX, ch);
 997
 998         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 999
1000         return 0;
1001 }
1002
1003 static int sunsu_serio_open(struct serio *serio)
1004 {
1005         struct uart_sunsu_port *up = serio->driver;
1006         unsigned long flags;
1007         int ret;
1008
1009         spin_lock_irqsave(&sunsu_serio_lock, flags);
1010         if (!up->serio_open) {
1011                 up->serio_open = 1;
1012                 ret = 0;
1013         } else
1014                 ret = -EBUSY;
1015         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1016
1017         return ret;
1018 }
1019
1020 static void sunsu_serio_close(struct serio *serio)
1021 {
1022         struct uart_sunsu_port *up = serio->driver;
1023         unsigned long flags;
1024
1025         spin_lock_irqsave(&sunsu_serio_lock, flags);
1026         up->serio_open = 0;
1027         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1028 }
1029
1030 #endif /* CONFIG_SERIO */
1031
1032 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1033 {
1034         unsigned char status1, status2, scratch, scratch2, scratch3;
1035         unsigned char save_lcr, save_mcr;
1036         struct linux_ebus_device *dev = 0;
1037         struct linux_ebus *ebus;
1038 #ifdef CONFIG_SPARC64
1039         struct sparc_isa_bridge *isa_br;
1040         struct sparc_isa_device *isa_dev;
1041 #endif
1042 #ifndef CONFIG_SPARC64
1043         struct linux_prom_registers reg0;
1044 #endif
1045         unsigned long flags;
1046
1047         if (!up->port_node || !up->su_type)
1048                 return;
1049
1050         up->type_probed = PORT_UNKNOWN;
1051         up->port.iotype = SERIAL_IO_MEM;
1052
1053         /*
1054          * First we look for Ebus-bases su's
1055          */
1056         for_each_ebus(ebus) {
1057                 for_each_ebusdev(dev, ebus) {
1058                         if (dev->prom_node == up->port_node) {
1059                                 /*
1060                                  * The EBus is broken on sparc; it delivers
1061                                  * virtual addresses in resources. Oh well...
1062                                  * This is correct on sparc64, though.
1063                                  */
1064                                 up->port.membase = (char *) dev->resource[0].start;
1065                                 /*
1066                                  * This is correct on both architectures.
1067                                  */
1068                                 up->port.mapbase = dev->resource[0].start;
1069                                 up->irq = dev->irqs[0];
1070                                 goto ebus_done;
1071                         }
1072                 }
1073         }
1074
1075 #ifdef CONFIG_SPARC64
1076         for_each_isa(isa_br) {
1077                 for_each_isadev(isa_dev, isa_br) {
1078                         if (isa_dev->prom_node == up->port_node) {
1079                                 /* Same on sparc64. Cool architecure... */
1080                                 up->port.membase = (char *) isa_dev->resource.start;
1081                                 up->port.mapbase = isa_dev->resource.start;
1082                                 up->irq = isa_dev->irq;
1083                                 goto ebus_done;
1084                         }
1085                 }
1086         }
1087 #endif
1088
1089 #ifdef CONFIG_SPARC64
1090         /*
1091          * Not on Ebus, bailing.
1092          */
1093         return;
1094 #else
1095         /*
1096          * Not on Ebus, must be OBIO.
1097          */
1098         if (prom_getproperty(up->port_node, "reg",
1099                              (char *)&reg0, sizeof(reg0)) == -1) {
1100                 prom_printf("sunsu: no \"reg\" property\n");
1101                 return;
1102         }
1103         prom_apply_obio_ranges(&reg0, 1);
1104         if (reg0.which_io != 0) {       /* Just in case... */
1105                 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1106                     reg0.which_io, reg0.phys_addr);
1107                 return;
1108         }
1109         up->port.mapbase = reg0.phys_addr;
1110         if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1111                 prom_printf("sunsu: Cannot map registers.\n");
1112                 return;
1113         }
1114
1115         /*
1116          * 0x20 is sun4m thing, Dave Redman heritage.
1117          * See arch/sparc/kernel/irq.c.
1118          */
1119 #define IRQ_4M(n)       ((n)|0x20)
1120
1121         /*
1122          * There is no intr property on MrCoffee, so hardwire it.
1123          */
1124         up->irq = IRQ_4M(13);
1125 #endif
1126
1127 ebus_done:
1128
1129         spin_lock_irqsave(&up->port.lock, flags);
1130
1131         if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1132                 /*
1133                  * Do a simple existence test first; if we fail this, there's
1134                  * no point trying anything else.
1135                  *
1136                  * 0x80 is used as a nonsense port to prevent against false
1137                  * positives due to ISA bus float.  The assumption is that
1138                  * 0x80 is a non-existent port; which should be safe since
1139                  * include/asm/io.h also makes this assumption.
1140                  */
1141                 scratch = serial_inp(up, UART_IER);
1142                 serial_outp(up, UART_IER, 0);
1143 #ifdef __i386__
1144                 outb(0xff, 0x080);
1145 #endif
1146                 scratch2 = serial_inp(up, UART_IER);
1147                 serial_outp(up, UART_IER, 0x0f);
1148 #ifdef __i386__
1149                 outb(0, 0x080);
1150 #endif
1151                 scratch3 = serial_inp(up, UART_IER);
1152                 serial_outp(up, UART_IER, scratch);
1153                 if (scratch2 != 0 || scratch3 != 0x0F)
1154                         goto out;       /* We failed; there's nothing here */
1155         }
1156
1157         save_mcr = serial_in(up, UART_MCR);
1158         save_lcr = serial_in(up, UART_LCR);
1159
1160         /*
1161          * Check to see if a UART is really there.  Certain broken
1162          * internal modems based on the Rockwell chipset fail this
1163          * test, because they apparently don't implement the loopback
1164          * test mode.  So this test is skipped on the COM 1 through
1165          * COM 4 ports.  This *should* be safe, since no board
1166          * manufacturer would be stupid enough to design a board
1167          * that conflicts with COM 1-4 --- we hope!
1168          */
1169         if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1170                 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1171                 status1 = serial_inp(up, UART_MSR) & 0xF0;
1172                 serial_outp(up, UART_MCR, save_mcr);
1173                 if (status1 != 0x90)
1174                         goto out;       /* We failed loopback test */
1175         }
1176         serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1177         serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1178         serial_outp(up, UART_LCR, 0);
1179         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1180         scratch = serial_in(up, UART_IIR) >> 6;
1181         switch (scratch) {
1182                 case 0:
1183                         up->port.type = PORT_16450;
1184                         break;
1185                 case 1:
1186                         up->port.type = PORT_UNKNOWN;
1187                         break;
1188                 case 2:
1189                         up->port.type = PORT_16550;
1190                         break;
1191                 case 3:
1192                         up->port.type = PORT_16550A;
1193                         break;
1194         }
1195         if (up->port.type == PORT_16550A) {
1196                 /* Check for Startech UART's */
1197                 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1198                 if (serial_in(up, UART_EFR) == 0) {
1199                         up->port.type = PORT_16650;
1200                 } else {
1201                         serial_outp(up, UART_LCR, 0xBF);
1202                         if (serial_in(up, UART_EFR) == 0)
1203                                 up->port.type = PORT_16650V2;
1204                 }
1205         }
1206         if (up->port.type == PORT_16550A) {
1207                 /* Check for TI 16750 */
1208                 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1209                 serial_outp(up, UART_FCR,
1210                             UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1211                 scratch = serial_in(up, UART_IIR) >> 5;
1212                 if (scratch == 7) {
1213                         /*
1214                          * If this is a 16750, and not a cheap UART
1215                          * clone, then it should only go into 64 byte
1216                          * mode if the UART_FCR7_64BYTE bit was set
1217                          * while UART_LCR_DLAB was latched.
1218                          */
1219                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1220                         serial_outp(up, UART_LCR, 0);
1221                         serial_outp(up, UART_FCR,
1222                                     UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1223                         scratch = serial_in(up, UART_IIR) >> 5;
1224                         if (scratch == 6)
1225                                 up->port.type = PORT_16750;
1226                 }
1227                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1228         }
1229         serial_outp(up, UART_LCR, save_lcr);
1230         if (up->port.type == PORT_16450) {
1231                 scratch = serial_in(up, UART_SCR);
1232                 serial_outp(up, UART_SCR, 0xa5);
1233                 status1 = serial_in(up, UART_SCR);
1234                 serial_outp(up, UART_SCR, 0x5a);
1235                 status2 = serial_in(up, UART_SCR);
1236                 serial_outp(up, UART_SCR, scratch);
1237
1238                 if ((status1 != 0xa5) || (status2 != 0x5a))
1239                         up->port.type = PORT_8250;
1240         }
1241
1242         up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1243
1244         if (up->port.type == PORT_UNKNOWN)
1245                 goto out;
1246         up->type_probed = up->port.type;        /* XXX */
1247
1248         /*
1249          * Reset the UART.
1250          */
1251 #ifdef CONFIG_SERIAL_8250_RSA
1252         if (up->port.type == PORT_RSA)
1253                 serial_outp(up, UART_RSA_FRR, 0);
1254 #endif
1255         serial_outp(up, UART_MCR, save_mcr);
1256         serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1257                                      UART_FCR_CLEAR_RCVR |
1258                                      UART_FCR_CLEAR_XMIT));
1259         serial_outp(up, UART_FCR, 0);
1260         (void)serial_in(up, UART_RX);
1261         serial_outp(up, UART_IER, 0);
1262
1263 out:
1264         spin_unlock_irqrestore(&up->port.lock, flags);
1265 }
1266
1267 static struct uart_driver sunsu_reg = {
1268         .owner                  = THIS_MODULE,
1269         .driver_name            = "serial",
1270         .devfs_name             = "tts/",
1271         .dev_name               = "ttyS",
1272         .major                  = TTY_MAJOR,
1273 };
1274
1275 static int __init sunsu_kbd_ms_init(void)
1276 {
1277         struct uart_sunsu_port *up;
1278         int i;
1279
1280         for (i = 0, up = sunsu_ports; i < 2; i++, up++) {
1281                 up->port.line = i;
1282                 up->port.type = PORT_UNKNOWN;
1283                 up->port.uartclk = (SU_BASE_BAUD * 16);
1284
1285                 if (up->su_type == SU_PORT_KBD)
1286                         up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1287                 else
1288                         up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1289
1290                 sunsu_autoconfig(up);
1291                 if (up->port.type == PORT_UNKNOWN)
1292                         continue;
1293
1294                 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1295                        i,
1296                        up->port.membase, __irq_itoa(up->irq),
1297                        sunsu_type(&up->port));
1298
1299 #ifdef CONFIG_SERIO
1300                 memset(&up->serio, 0, sizeof(up->serio));
1301
1302                 up->serio.driver = up;
1303
1304                 up->serio.type = SERIO_RS232;
1305                 if (up->su_type == SU_PORT_KBD) {
1306                         up->serio.type |= SERIO_SUNKBD;
1307                         up->serio.name = "sukbd";
1308                 } else {
1309                         up->serio.type |= (SERIO_SUN | (1 << 16));
1310                         up->serio.name = "sums";
1311                 }
1312                 up->serio.phys = (i == 0 ? "su/serio0" : "su/serio1");
1313
1314                 up->serio.write = sunsu_serio_write;
1315                 up->serio.open = sunsu_serio_open;
1316                 up->serio.close = sunsu_serio_close;
1317
1318                 serio_register_port(&up->serio);
1319 #endif
1320
1321                 sunsu_startup(&up->port);
1322         }
1323         return 0;
1324 }
1325
1326 /*
1327  * ------------------------------------------------------------
1328  * Serial console driver
1329  * ------------------------------------------------------------
1330  */
1331
1332 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1333
1334 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1335
1336 /*
1337  *      Wait for transmitter & holding register to empty
1338  */
1339 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1340 {
1341         unsigned int status, tmout = 10000;
1342
1343         /* Wait up to 10ms for the character(s) to be sent. */
1344         do {
1345                 status = serial_in(up, UART_LSR);
1346
1347                 if (status & UART_LSR_BI)
1348                         up->lsr_break_flag = UART_LSR_BI;
1349
1350                 if (--tmout == 0)
1351                         break;
1352                 udelay(1);
1353         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1354
1355         /* Wait up to 1s for flow control if necessary */
1356         if (up->port.flags & ASYNC_CONS_FLOW) {
1357                 tmout = 1000000;
1358                 while (--tmout &&
1359                        ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1360                         udelay(1);
1361         }
1362 }
1363
1364 /*
1365  *      Print a string to the serial port trying not to disturb
1366  *      any possible real use of the port...
1367  */
1368 static void sunsu_console_write(struct console *co, const char *s,
1369                                 unsigned int count)
1370 {
1371         struct uart_sunsu_port *up = &sunsu_ports[co->index];
1372         unsigned int ier;
1373         int i;
1374
1375         /*
1376          *      First save the UER then disable the interrupts
1377          */
1378         ier = serial_in(up, UART_IER);
1379         serial_out(up, UART_IER, 0);
1380
1381         /*
1382          *      Now, do each character
1383          */
1384         for (i = 0; i < count; i++, s++) {
1385                 wait_for_xmitr(up);
1386
1387                 /*
1388                  *      Send the character out.
1389                  *      If a LF, also do CR...
1390                  */
1391                 serial_out(up, UART_TX, *s);
1392                 if (*s == 10) {
1393                         wait_for_xmitr(up);
1394                         serial_out(up, UART_TX, 13);
1395                 }
1396         }
1397
1398         /*
1399          *      Finally, wait for transmitter to become empty
1400          *      and restore the IER
1401          */
1402         wait_for_xmitr(up);
1403         serial_out(up, UART_IER, ier);
1404 }
1405
1406 /*
1407  *      Setup initial baud/bits/parity. We do two things here:
1408  *      - construct a cflag setting for the first su_open()
1409  *      - initialize the serial port
1410  *      Return non-zero if we didn't find a serial port.
1411  */
1412 static int __init sunsu_console_setup(struct console *co, char *options)
1413 {
1414         struct uart_port *port;
1415         int baud = 9600;
1416         int bits = 8;
1417         int parity = 'n';
1418         int flow = 'n';
1419
1420         printk("Console: ttyS%d (SU)\n",
1421                (sunsu_reg.minor - 64) + co->index);
1422
1423         /*
1424          * Check whether an invalid uart number has been specified, and
1425          * if so, search for the first available port that does have
1426          * console support.
1427          */
1428         if (co->index >= UART_NR)
1429                 co->index = 0;
1430         port = &sunsu_ports[co->index].port;
1431
1432         /*
1433          * Temporary fix.
1434          */
1435         spin_lock_init(&port->lock);
1436
1437         if (options)
1438                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1439
1440         return uart_set_options(port, co, baud, parity, bits, flow);
1441 }
1442
1443 static struct console sunsu_cons = {
1444         .name   =       "ttyS",
1445         .write  =       sunsu_console_write,
1446         .device =       uart_console_device,
1447         .setup  =       sunsu_console_setup,
1448         .flags  =       CON_PRINTBUFFER,
1449         .index  =       -1,
1450         .data   =       &sunsu_reg,
1451 };
1452 #define SUNSU_CONSOLE   (&sunsu_cons)
1453
1454 /*
1455  *      Register console.
1456  */
1457
1458 static int __init sunsu_serial_console_init(void)
1459 {
1460         int i;
1461
1462         if (con_is_present())
1463                 return 0;
1464
1465         for (i = 0; i < UART_NR; i++) {
1466                 int this_minor = sunsu_reg.minor + i;
1467
1468                 if ((this_minor - 64) == (serial_console - 1))
1469                         break;
1470         }
1471         if (i == UART_NR)
1472                 return 0;
1473         if (sunsu_ports[i].port_node == 0)
1474                 return 0;
1475
1476         sunsu_cons.index = i;
1477         register_console(&sunsu_cons);
1478         return 0;
1479 }
1480 #else
1481 #define SUNSU_CONSOLE                   (NULL)
1482 #define sunsu_serial_console_init()     do { } while (0)
1483 #endif
1484
1485 static int __init sunsu_serial_init(void)
1486 {
1487         int instance, ret, i;
1488
1489         /* How many instances do we need?  */
1490         instance = 0;
1491         for (i = 0; i < UART_NR; i++) {
1492                 struct uart_sunsu_port *up = &sunsu_ports[i];
1493
1494                 if (up->su_type == SU_PORT_MS ||
1495                     up->su_type == SU_PORT_KBD)
1496                         continue;
1497
1498                 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1499                 up->port.type = PORT_UNKNOWN;
1500                 up->port.uartclk = (SU_BASE_BAUD * 16);
1501
1502                 sunsu_autoconfig(up);
1503                 if (up->port.type == PORT_UNKNOWN)
1504                         continue;
1505
1506                 up->port.line = instance++;
1507                 up->port.ops = &sunsu_pops;
1508         }
1509
1510         sunsu_reg.minor = sunserial_current_minor;
1511         sunserial_current_minor += instance;
1512
1513         sunsu_reg.nr = instance;
1514         sunsu_reg.cons = SUNSU_CONSOLE;
1515
1516         ret = uart_register_driver(&sunsu_reg);
1517         if (ret < 0)
1518                 return ret;
1519
1520         for (i = 0; i < UART_NR; i++) {
1521                 struct uart_sunsu_port *up = &sunsu_ports[i];
1522
1523                 /* Do not register Keyboard/Mouse lines with UART
1524                  * layer.
1525                  */
1526                 if (up->su_type == SU_PORT_MS ||
1527                     up->su_type == SU_PORT_KBD)
1528                         continue;
1529
1530                 if (up->port.type == PORT_UNKNOWN)
1531                         continue;
1532
1533                 uart_add_one_port(&sunsu_reg, &up->port);
1534         }
1535
1536         return 0;
1537 }
1538
1539 static int su_node_ok(int node, char *name, int namelen)
1540 {
1541         if (strncmp(name, "su", namelen) == 0 ||
1542             strncmp(name, "su_pnp", namelen) == 0)
1543                 return 1;
1544
1545         if (strncmp(name, "serial", namelen) == 0) {
1546                 char compat[32];
1547                 int clen;
1548
1549                 /* Is it _really_ a 'su' device? */
1550                 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1551                 if (clen > 0) {
1552                         if (strncmp(compat, "sab82532", 8) == 0) {
1553                                 /* Nope, Siemens serial, not for us. */
1554                                 return 0;
1555                         }
1556                 }
1557                 return 1;
1558         }
1559
1560         return 0;
1561 }
1562
1563 #define SU_PROPSIZE     128
1564
1565 /*
1566  * Scan status structure.
1567  * "prop" is a local variable but it eats stack to keep it in each
1568  * stack frame of a recursive procedure.
1569  */
1570 struct su_probe_scan {
1571         int msnode, kbnode;     /* PROM nodes for mouse and keyboard */
1572         int msx, kbx;           /* minors for mouse and keyboard */
1573         int devices;            /* scan index */
1574         char prop[SU_PROPSIZE];
1575 };
1576
1577 /*
1578  * We have several platforms which present 'su' in different parts
1579  * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1580  * We walk over the tree and find them wherever PROM hides them.
1581  */
1582 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1583 {
1584         struct uart_sunsu_port *up;
1585         int len;
1586
1587         if (t->devices >= UART_NR)
1588                 return;
1589
1590         for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1591                 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1592                 if (len <= 1)
1593                         continue;               /* Broken PROM node */
1594
1595                 if (su_node_ok(sunode, t->prop, len)) {
1596                         up = &sunsu_ports[t->devices];
1597                         if (t->kbnode != 0 && sunode == t->kbnode) {
1598                                 t->kbx = t->devices;
1599                                 up->su_type = SU_PORT_KBD;
1600                         } else if (t->msnode != 0 && sunode == t->msnode) {
1601                                 t->msx = t->devices;
1602                                 up->su_type = SU_PORT_MS;
1603                         } else {
1604 #ifdef CONFIG_SPARC64
1605                                 /*
1606                                  * Do not attempt to use the truncated
1607                                  * keyboard/mouse ports as serial ports
1608                                  * on Ultras with PC keyboard attached.
1609                                  */
1610                                 if (prom_getbool(sunode, "mouse"))
1611                                         continue;
1612                                 if (prom_getbool(sunode, "keyboard"))
1613                                         continue;
1614 #endif
1615                                 up->su_type = SU_PORT_PORT;
1616                         }
1617                         up->port_node = sunode;
1618                         ++t->devices;
1619                 } else {
1620                         su_probe_any(t, prom_getchild(sunode));
1621                 }
1622         }
1623 }
1624
1625 static int __init sunsu_probe(void)
1626 {
1627         int node;
1628         int len;
1629         struct su_probe_scan scan;
1630
1631         /*
1632          * First, we scan the tree.
1633          */
1634         scan.devices = 0;
1635         scan.msx = -1;
1636         scan.kbx = -1;
1637         scan.kbnode = 0;
1638         scan.msnode = 0;
1639
1640         /*
1641          * Get the nodes for keyboard and mouse from 'aliases'...
1642          */
1643         node = prom_getchild(prom_root_node);
1644         node = prom_searchsiblings(node, "aliases");
1645         if (node != 0) {
1646                 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1647                 if (len > 0) {
1648                         scan.prop[len] = 0;
1649                         scan.kbnode = prom_finddevice(scan.prop);
1650                 }
1651
1652                 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1653                 if (len > 0) {
1654                         scan.prop[len] = 0;
1655                         scan.msnode = prom_finddevice(scan.prop);
1656                 }
1657         }
1658
1659         su_probe_any(&scan, prom_getchild(prom_root_node));
1660
1661         /*
1662          * Second, we process the special case of keyboard and mouse.
1663          *
1664          * Currently if we got keyboard and mouse hooked to "su" ports
1665          * we do not use any possible remaining "su" as a serial port.
1666          * Thus, we ignore values of .msx and .kbx, then compact ports.
1667          */
1668         if (scan.msx != -1 && scan.kbx != -1) {
1669                 sunsu_ports[0].su_type = SU_PORT_MS;
1670                 sunsu_ports[0].port_node = scan.msnode;
1671                 sunsu_ports[1].su_type = SU_PORT_KBD;
1672                 sunsu_ports[1].port_node = scan.kbnode;
1673
1674                 sunsu_kbd_ms_init();
1675                 return 0;
1676         }
1677
1678         if (scan.msx != -1 || scan.kbx != -1) {
1679                 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1680                 return -ENODEV;
1681         }
1682
1683         if (scan.devices == 0)
1684                 return -ENODEV;
1685
1686         /*
1687          * Console must be initiated after the generic initialization.
1688          */
1689         sunsu_serial_init();
1690         sunsu_serial_console_init();
1691
1692         return 0;
1693 }
1694
1695 static void __exit sunsu_exit(void)
1696 {
1697         int i, saw_uart;
1698
1699         saw_uart = 0;
1700         for (i = 0; i < UART_NR; i++) {
1701                 struct uart_sunsu_port *up = &sunsu_ports[i];
1702
1703                 if (up->su_type == SU_PORT_MS ||
1704                     up->su_type == SU_PORT_KBD) {
1705 #ifdef CONFIG_SERIO
1706                         serio_unregister_port(&up->serio);
1707 #endif
1708                 } else if (up->port.type != PORT_UNKNOWN) {
1709                         uart_remove_one_port(&sunsu_reg, &up->port);
1710                         saw_uart++;
1711                 }
1712         }
1713
1714         if (saw_uart)
1715                 uart_unregister_driver(&sunsu_reg);
1716 }
1717
1718 module_init(sunsu_probe);
1719 module_exit(sunsu_exit);