drivers/usb/gadget/omap_udc.c

   1 /*
   2  * omap_udc.c -- for OMAP 1610 udc, with OTG support
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  * Copyright (C) 2004 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #undef  DEBUG
  23 #undef  VERBOSE
  24
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/kernel.h>
  28 #include <linux/ioport.h>
  29 #include <linux/types.h>
  30 #include <linux/errno.h>
  31 #include <linux/delay.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/init.h>
  35 #include <linux/timer.h>
  36 #include <linux/list.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/proc_fs.h>
  39 #include <linux/mm.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/device.h>
  42 #include <linux/usb_ch9.h>
  43 #include <linux/usb_gadget.h>
  44 #include <linux/usb_otg.h>
  45 #include <linux/dma-mapping.h>
  46
  47 #include <asm/byteorder.h>
  48 #include <asm/io.h>
  49 #include <asm/irq.h>
  50 #include <asm/system.h>
  51 #include <asm/unaligned.h>
  52 #include <asm/mach-types.h>
  53
  54 #include <asm/arch/dma.h>
  55 #include <asm/arch/mux.h>
  56 #include <asm/arch/usb.h>
  57
  58 #include "omap_udc.h"
  59
  60 #undef  USB_TRACE
  61
  62 /* OUT-dma seems to be behaving */
  63 #define USE_DMA
  64
  65 /* ISO too */
  66 #define USE_ISO
  67
  68
  69 #define DRIVER_DESC     "OMAP UDC driver"
  70 #define DRIVER_VERSION  "24 August 2004"
  71
  72 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  73
  74
  75 /*
  76  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
  77  * D+ pullup to allow enumeration.  That's too early for the gadget
  78  * framework to use from usb_endpoint_enable(), which happens after
  79  * enumeration as part of activating an interface.  (But if we add an
  80  * optional new "UDC not yet running" state to the gadget driver model,
  81  * even just during driver binding, the endpoint autoconfig logic is the
  82  * natural spot to manufacture new endpoints.)
  83  *
  84  * So instead of using endpoint enable calls to control the hardware setup,
  85  * this driver defines a "fifo mode" parameter.  It's used during driver
  86  * initialization to choose among a set of pre-defined endpoint configs.
  87  * See omap_udc_setup() for available modes, or to add others.  That code
  88  * lives in an init section, so use this driver as a module if you need
  89  * to change the fifo mode after the kernel boots.
  90  *
  91  * Gadget drivers normally ignore endpoints they don't care about, and
  92  * won't include them in configuration descriptors.  That means only
  93  * misbehaving hosts would even notice they exist.
  94  */
  95 #ifdef  USE_ISO
  96 static unsigned fifo_mode = 3;
  97 #else
  98 static unsigned fifo_mode = 0;
  99 #endif
 100
 101 /* "modprobe omap_udc fifo_mode=42", or else as a kernel
 102  * boot parameter "omap_udc:fifo_mode=42"
 103  */
 104 module_param (fifo_mode, uint, 0);
 105 MODULE_PARM_DESC (fifo_mode, "endpoint setup (0 == default)");
 106
 107
 108 #ifdef  USE_DMA
 109 static unsigned use_dma = 1;
 110
 111 /* "modprobe omap_udc use_dma=y", or else as a kernel
 112  * boot parameter "omap_udc:use_dma=y"
 113  */
 114 module_param (use_dma, bool, 0);
 115 MODULE_PARM_DESC (use_dma, "enable/disable DMA");
 116 #else   /* !USE_DMA */
 117
 118 /* save a bit of code */
 119 #define use_dma         0
 120 #endif  /* !USE_DMA */
 121
 122
 123 static const char driver_name [] = "omap_udc";
 124 static const char driver_desc [] = DRIVER_DESC;
 125
 126 /*-------------------------------------------------------------------------*/
 127
 128 /* there's a notion of "current endpoint" for modifying endpoint
 129  * state, and PIO access to its FIFO.
 130  */
 131
 132 static void use_ep(struct omap_ep *ep, u16 select)
 133 {
 134         u16     num = ep->bEndpointAddress & 0x0f;
 135
 136         if (ep->bEndpointAddress & USB_DIR_IN)
 137                 num |= UDC_EP_DIR;
 138         UDC_EP_NUM_REG = num | select;
 139         /* when select, MUST deselect later !! */
 140 }
 141
 142 static inline void deselect_ep(void)
 143 {
 144         UDC_EP_NUM_REG &= ~UDC_EP_SEL;
 145         /* 6 wait states before TX will happen */
 146 }
 147
 148 static void dma_channel_claim(struct omap_ep *ep, unsigned preferred);
 149
 150 /*-------------------------------------------------------------------------*/
 151
 152 static int omap_ep_enable(struct usb_ep *_ep,
 153                 const struct usb_endpoint_descriptor *desc)
 154 {
 155         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 156         struct omap_udc *udc;
 157         unsigned long   flags;
 158         u16             maxp;
 159
 160         /* catch various bogus parameters */
 161         if (!_ep || !desc || ep->desc
 162                         || desc->bDescriptorType != USB_DT_ENDPOINT
 163                         || ep->bEndpointAddress != desc->bEndpointAddress
 164                         || ep->maxpacket < le16_to_cpu
 165                                                 (desc->wMaxPacketSize)) {
 166                 DBG("%s, bad ep or descriptor\n", __FUNCTION__);
 167                 return -EINVAL;
 168         }
 169         maxp = le16_to_cpu (desc->wMaxPacketSize);
 170         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 171                                 && maxp != ep->maxpacket)
 172                         || desc->wMaxPacketSize > ep->maxpacket
 173                         || !desc->wMaxPacketSize) {
 174                 DBG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
 175                 return -ERANGE;
 176         }
 177
 178 #ifdef  USE_ISO
 179         if ((desc->bmAttributes == USB_ENDPOINT_XFER_ISOC
 180                                 && desc->bInterval != 1)) {
 181                 /* hardware wants period = 1; USB allows 2^(Interval-1) */
 182                 DBG("%s, unsupported ISO period %dms\n", _ep->name,
 183                                 1 << (desc->bInterval - 1));
 184                 return -EDOM;
 185         }
 186 #else
 187         if (desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 188                 DBG("%s, ISO nyet\n", _ep->name);
 189                 return -EDOM;
 190         }
 191 #endif
 192
 193         /* xfer types must match, except that interrupt ~= bulk */
 194         if (ep->bmAttributes != desc->bmAttributes
 195                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 196                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 197                 DBG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
 198                 return -EINVAL;
 199         }
 200
 201         udc = ep->udc;
 202         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
 203                 DBG("%s, bogus device state\n", __FUNCTION__);
 204                 return -ESHUTDOWN;
 205         }
 206
 207         spin_lock_irqsave(&udc->lock, flags);
 208
 209         ep->desc = desc;
 210         ep->irqs = 0;
 211         ep->stopped = 0;
 212         ep->ep.maxpacket = maxp;
 213
 214         /* set endpoint to initial state */
 215         ep->dma_channel = 0;
 216         ep->has_dma = 0;
 217         ep->lch = -1;
 218         use_ep(ep, UDC_EP_SEL);
 219         UDC_CTRL_REG = UDC_RESET_EP;
 220         ep->ackwait = 0;
 221         deselect_ep();
 222
 223         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
 224                 list_add(&ep->iso, &udc->iso);
 225
 226         /* maybe assign a DMA channel to this endpoint */
 227         if (use_dma && desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 228                         && !(ep->bEndpointAddress & USB_DIR_IN))
 229                         /* FIXME ISO can dma, but prefers first channel.
 230                          * IN can dma, but lacks debugging.
 231                          */
 232                 dma_channel_claim(ep, 0);
 233
 234         /* PIO OUT may RX packets */
 235         if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
 236                         && !ep->has_dma
 237                         && !(ep->bEndpointAddress & USB_DIR_IN))
 238                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 239
 240         spin_unlock_irqrestore(&udc->lock, flags);
 241         VDBG("%s enabled\n", _ep->name);
 242         return 0;
 243 }
 244
 245 static void nuke(struct omap_ep *, int status);
 246
 247 static int omap_ep_disable(struct usb_ep *_ep)
 248 {
 249         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 250         unsigned long   flags;
 251
 252         if (!_ep || !ep->desc) {
 253                 DBG("%s, %s not enabled\n", __FUNCTION__,
 254                         _ep ? ep->ep.name : NULL);
 255                 return -EINVAL;
 256         }
 257
 258         spin_lock_irqsave(&ep->udc->lock, flags);
 259         ep->desc = 0;
 260         nuke (ep, -ESHUTDOWN);
 261         ep->ep.maxpacket = ep->maxpacket;
 262         ep->has_dma = 0;
 263         UDC_CTRL_REG = UDC_SET_HALT;
 264         list_del_init(&ep->iso);
 265
 266         spin_unlock_irqrestore(&ep->udc->lock, flags);
 267
 268         VDBG("%s disabled\n", _ep->name);
 269         return 0;
 270 }
 271
 272 /*-------------------------------------------------------------------------*/
 273
 274 static struct usb_request *
 275 omap_alloc_request(struct usb_ep *ep, int gfp_flags)
 276 {
 277         struct omap_req *req;
 278
 279         req = kmalloc(sizeof *req, gfp_flags);
 280         if (req) {
 281                 memset (req, 0, sizeof *req);
 282                 req->req.dma = DMA_ADDR_INVALID;
 283                 INIT_LIST_HEAD (&req->queue);
 284         }
 285         return &req->req;
 286 }
 287
 288 static void
 289 omap_free_request(struct usb_ep *ep, struct usb_request *_req)
 290 {
 291         struct omap_req *req = container_of(_req, struct omap_req, req);
 292
 293         if (_req)
 294                 kfree (req);
 295 }
 296
 297 /*-------------------------------------------------------------------------*/
 298
 299 static void *
 300 omap_alloc_buffer(
 301         struct usb_ep   *_ep,
 302         unsigned        bytes,
 303         dma_addr_t      *dma,
 304         int             gfp_flags
 305 )
 306 {
 307         void            *retval;
 308         struct omap_ep  *ep;
 309
 310         ep = container_of(_ep, struct omap_ep, ep);
 311         if (use_dma && ep->has_dma) {
 312                 static int      warned;
 313                 if (!warned && bytes < PAGE_SIZE) {
 314                         dev_warn(ep->udc->gadget.dev.parent,
 315                                 "using dma_alloc_coherent for "
 316                                 "small allocations wastes memory\n");
 317                         warned++;
 318                 }
 319                 return dma_alloc_coherent(ep->udc->gadget.dev.parent,
 320                                 bytes, dma, gfp_flags);
 321         }
 322
 323         retval = kmalloc(bytes, gfp_flags);
 324         if (retval)
 325                 *dma = virt_to_phys(retval);
 326         return retval;
 327 }
 328
 329 static void omap_free_buffer(
 330         struct usb_ep   *_ep,
 331         void            *buf,
 332         dma_addr_t      dma,
 333         unsigned        bytes
 334 )
 335 {
 336         struct omap_ep  *ep;
 337
 338         ep = container_of(_ep, struct omap_ep, ep);
 339         if (use_dma && _ep && ep->has_dma)
 340                 dma_free_coherent(ep->udc->gadget.dev.parent, bytes, buf, dma);
 341         else
 342                 kfree (buf);
 343 }
 344
 345 /*-------------------------------------------------------------------------*/
 346
 347 static void
 348 done(struct omap_ep *ep, struct omap_req *req, int status)
 349 {
 350         unsigned                stopped = ep->stopped;
 351
 352         list_del_init(&req->queue);
 353
 354         if (req->req.status == -EINPROGRESS)
 355                 req->req.status = status;
 356         else
 357                 status = req->req.status;
 358
 359         if (use_dma && ep->has_dma) {
 360                 if (req->mapped) {
 361                         dma_unmap_single(ep->udc->gadget.dev.parent,
 362                                 req->req.dma, req->req.length,
 363                                 (ep->bEndpointAddress & USB_DIR_IN)
 364                                         ? DMA_TO_DEVICE
 365                                         : DMA_FROM_DEVICE);
 366                         req->req.dma = DMA_ADDR_INVALID;
 367                         req->mapped = 0;
 368                 } else
 369                         dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 370                                 req->req.dma, req->req.length,
 371                                 (ep->bEndpointAddress & USB_DIR_IN)
 372                                         ? DMA_TO_DEVICE
 373                                         : DMA_FROM_DEVICE);
 374         }
 375
 376 #ifndef USB_TRACE
 377         if (status && status != -ESHUTDOWN)
 378 #endif
 379                 VDBG("complete %s req %p stat %d len %u/%u\n",
 380                         ep->ep.name, &req->req, status,
 381                         req->req.actual, req->req.length);
 382
 383         /* don't modify queue heads during completion callback */
 384         ep->stopped = 1;
 385         spin_unlock(&ep->udc->lock);
 386         req->req.complete(&ep->ep, &req->req);
 387         spin_lock(&ep->udc->lock);
 388         ep->stopped = stopped;
 389 }
 390
 391 /*-------------------------------------------------------------------------*/
 392
 393 #define FIFO_FULL       (UDC_NON_ISO_FIFO_FULL | UDC_ISO_FIFO_FULL)
 394 #define FIFO_UNWRITABLE (UDC_EP_HALTED | FIFO_FULL)
 395
 396 #define FIFO_EMPTY      (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
 397 #define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
 398
 399 static inline int
 400 write_packet(u8 *buf, struct omap_req *req, unsigned max)
 401 {
 402         unsigned        len;
 403         u16             *wp;
 404
 405         len = min(req->req.length - req->req.actual, max);
 406         req->req.actual += len;
 407
 408         max = len;
 409         if (likely((((int)buf) & 1) == 0)) {
 410                 wp = (u16 *)buf;
 411                 while (max >= 2) {
 412                         UDC_DATA_REG = *wp++;
 413                         max -= 2;
 414                 }
 415                 buf = (u8 *)wp;
 416         }
 417         while (max--)
 418                 *(volatile u8 *)&UDC_DATA_REG = *buf++;
 419         return len;
 420 }
 421
 422 // FIXME change r/w fifo calling convention
 423
 424
 425 // return:  0 = still running, 1 = completed, negative = errno
 426 static int write_fifo(struct omap_ep *ep, struct omap_req *req)
 427 {
 428         u8              *buf;
 429         unsigned        count;
 430         int             is_last;
 431         u16             ep_stat;
 432
 433         buf = req->req.buf + req->req.actual;
 434         prefetch(buf);
 435
 436         /* PIO-IN isn't double buffered except for iso */
 437         ep_stat = UDC_STAT_FLG_REG;
 438         if (ep_stat & FIFO_UNWRITABLE)
 439                 return 0;
 440
 441         count = ep->ep.maxpacket;
 442         count = write_packet(buf, req, count);
 443         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 444         ep->ackwait = 1;
 445
 446         /* last packet is often short (sometimes a zlp) */
 447         if (count != ep->ep.maxpacket)
 448                 is_last = 1;
 449         else if (req->req.length == req->req.actual
 450                         && !req->req.zero)
 451                 is_last = 1;
 452         else
 453                 is_last = 0;
 454
 455         /* NOTE:  requests complete when all IN data is in a
 456          * FIFO (or sometimes later, if a zlp was needed).
 457          * Use usb_ep_fifo_status() where needed.
 458          */
 459         if (is_last)
 460                 done(ep, req, 0);
 461         return is_last;
 462 }
 463
 464 static inline int
 465 read_packet(u8 *buf, struct omap_req *req, unsigned avail)
 466 {
 467         unsigned        len;
 468         u16             *wp;
 469
 470         len = min(req->req.length - req->req.actual, avail);
 471         req->req.actual += len;
 472         avail = len;
 473
 474         if (likely((((int)buf) & 1) == 0)) {
 475                 wp = (u16 *)buf;
 476                 while (avail >= 2) {
 477                         *wp++ = UDC_DATA_REG;
 478                         avail -= 2;
 479                 }
 480                 buf = (u8 *)wp;
 481         }
 482         while (avail--)
 483                 *buf++ = *(volatile u8 *)&UDC_DATA_REG;
 484         return len;
 485 }
 486
 487 // return:  0 = still running, 1 = queue empty, negative = errno
 488 static int read_fifo(struct omap_ep *ep, struct omap_req *req)
 489 {
 490         u8              *buf;
 491         unsigned        count, avail;
 492         int             is_last;
 493
 494         buf = req->req.buf + req->req.actual;
 495         prefetchw(buf);
 496
 497         for (;;) {
 498                 u16     ep_stat = UDC_STAT_FLG_REG;
 499
 500                 is_last = 0;
 501                 if (ep_stat & FIFO_UNREADABLE)
 502                         break;
 503
 504                 if (ep_stat & (UDC_NON_ISO_FIFO_FULL|UDC_ISO_FIFO_FULL))
 505                         avail = ep->ep.maxpacket;
 506                 else
 507                         avail = UDC_RXFSTAT_REG;
 508                 count = read_packet(buf, req, avail);
 509
 510                 // FIXME double buffered PIO OUT wasn't behaving...
 511
 512                 /* partial packet reads may not be errors */
 513                 if (count < ep->ep.maxpacket) {
 514                         is_last = 1;
 515                         /* overflowed this request?  flush extra data */
 516                         if (count != avail) {
 517                                 req->req.status = -EOVERFLOW;
 518                                 avail -= count;
 519                                 while (avail--)
 520                                         (void) *(volatile u8 *)&UDC_DATA_REG;
 521                         }
 522                 } else if (req->req.length == req->req.actual)
 523                         is_last = 1;
 524                 else
 525                         is_last = 0;
 526
 527                 if (!ep->bEndpointAddress)
 528                         break;
 529                 if (!ep->double_buf) {
 530                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 531                         if (!is_last)
 532                                 break;
 533                 }
 534
 535                 if (is_last) {
 536                         done(ep, req, 0);
 537                         if (list_empty(&ep->queue) || !ep->double_buf)
 538                                 break;
 539                         req = container_of(ep->queue.next,
 540                                         struct omap_req, queue);
 541                         is_last = 0;
 542                 }
 543         }
 544         return is_last;
 545 }
 546
 547 /*-------------------------------------------------------------------------*/
 548
 549 /* Each USB transfer request using DMA maps to one or more DMA transfers.
 550  * When DMA completion isn't request completion, the UDC continues with
 551  * the next DMA transfer for that USB transfer.
 552  */
 553
 554 static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
 555 {
 556         u16             txdma_ctrl;
 557         unsigned        length = req->req.length - req->req.actual;
 558
 559         /* measure length in either bytes or packets */
 560         if (length <= (UDC_TXN_TSC + 1)) {
 561                 txdma_ctrl = UDC_TXN_EOT | length;
 562                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 563                                 length, 1, OMAP_DMA_SYNC_ELEMENT);
 564         } else {
 565                 length = max(length / ep->maxpacket,
 566                                 (unsigned) UDC_TXN_TSC + 1);
 567                 txdma_ctrl = length;
 568                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 569                                 ep->ep.maxpacket, length,
 570                                 OMAP_DMA_SYNC_ELEMENT);
 571                 length *= ep->maxpacket;
 572         }
 573
 574         omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 575                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 576
 577         omap_start_dma(ep->lch);
 578         UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel);
 579         UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl;
 580         req->dma_bytes = length;
 581 }
 582
 583 static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
 584 {
 585         if (status == 0) {
 586                 req->req.actual += req->dma_bytes;
 587
 588                 /* return if this request needs to send data or zlp */
 589                 if (req->req.actual < req->req.length)
 590                         return;
 591                 if (req->req.zero
 592                                 && req->dma_bytes != 0
 593                                 && (req->req.actual % ep->maxpacket) == 0)
 594                         return;
 595         } else {
 596                 u32     last;
 597
 598                 // FIXME this surely isn't #bytes transferred
 599                 last = (omap_readw(OMAP_DMA_CSSA_U(ep->lch)) << 16)
 600                                 | omap_readw(OMAP_DMA_CSSA_L(ep->lch));
 601                 req->req.actual = last - req->req.dma;
 602         }
 603
 604         /* tx completion */
 605         omap_stop_dma(ep->lch);
 606         UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel);
 607         done(ep, req, status);
 608 }
 609
 610 static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
 611 {
 612         unsigned packets;
 613
 614         /* NOTE:  we filtered out "short reads" before, so we know
 615          * the buffer has only whole numbers of packets.
 616          */
 617
 618         /* set up this DMA transfer, enable the fifo, start */
 619         packets = (req->req.length - req->req.actual) / ep->ep.maxpacket;
 620         packets = min(packets, (unsigned)UDC_RXN_TC + 1);
 621         req->dma_bytes = packets * ep->ep.maxpacket;
 622         omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 623                         ep->ep.maxpacket, packets,
 624                         OMAP_DMA_SYNC_ELEMENT);
 625         omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 626                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 627
 628         UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1);
 629         UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel);
 630         UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf);
 631         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 632
 633         omap_start_dma(ep->lch);
 634 }
 635
 636 static void
 637 finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status)
 638 {
 639         u16     count;
 640
 641         /* FIXME must be a better way to see how much dma
 642          * happened, even when it never got going...
 643          */
 644         count = omap_readw(OMAP_DMA_CDAC(ep->lch));
 645         count -= 0xffff & (req->req.dma + req->req.actual);
 646         count += req->req.actual;
 647         if (count <= req->req.length)
 648                 req->req.actual = count;
 649
 650         if (count != req->dma_bytes || status)
 651                 omap_stop_dma(ep->lch);
 652
 653         /* if this wasn't short, request may need another transfer */
 654         else if (req->req.actual < req->req.length)
 655                 return;
 656
 657         /* rx completion */
 658         UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel);
 659         done(ep, req, status);
 660 }
 661
 662 static void dma_irq(struct omap_udc *udc, u16 irq_src)
 663 {
 664         u16             dman_stat = UDC_DMAN_STAT_REG;
 665         struct omap_ep  *ep;
 666         struct omap_req *req;
 667
 668         /* IN dma: tx to host */
 669         if (irq_src & UDC_TXN_DONE) {
 670                 ep = &udc->ep[16 + UDC_DMA_TX_SRC(dman_stat)];
 671                 ep->irqs++;
 672                 /* can see TXN_DONE after dma abort */
 673                 if (!list_empty(&ep->queue)) {
 674                         req = container_of(ep->queue.next,
 675                                                 struct omap_req, queue);
 676                         finish_in_dma(ep, req, 0);
 677                 }
 678                 UDC_IRQ_SRC_REG = UDC_TXN_DONE;
 679
 680                 if (!list_empty (&ep->queue)) {
 681                         req = container_of(ep->queue.next,
 682                                         struct omap_req, queue);
 683                         next_in_dma(ep, req);
 684                 }
 685         }
 686
 687         /* OUT dma: rx from host */
 688         if (irq_src & UDC_RXN_EOT) {
 689                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 690                 ep->irqs++;
 691                 /* can see RXN_EOT after dma abort */
 692                 if (!list_empty(&ep->queue)) {
 693                         req = container_of(ep->queue.next,
 694                                         struct omap_req, queue);
 695                         finish_out_dma(ep, req, 0);
 696                 }
 697                 UDC_IRQ_SRC_REG = UDC_RXN_EOT;
 698
 699                 if (!list_empty (&ep->queue)) {
 700                         req = container_of(ep->queue.next,
 701                                         struct omap_req, queue);
 702                         next_out_dma(ep, req);
 703                 }
 704         }
 705
 706         if (irq_src & UDC_RXN_CNT) {
 707                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 708                 DBG("%s, RX_CNT irq?\n", ep->ep.name);
 709                 UDC_IRQ_SRC_REG = UDC_RXN_CNT;
 710         }
 711 }
 712
 713 static void dma_error(int lch, u16 ch_status, void *data)
 714 {
 715         struct omap_ep  *ep = data;
 716
 717         /* if ch_status & OMAP_DMA_DROP_IRQ ... */
 718         /* if ch_status & OMAP_DMA_TOUT_IRQ ... */
 719         ERR("%s dma error, lch %d status %02x\n", ep->ep.name, lch, ch_status);
 720
 721         /* complete current transfer ... */
 722 }
 723
 724 static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
 725 {
 726         u16     reg;
 727         int     status, restart, is_in;
 728
 729         is_in = ep->bEndpointAddress & USB_DIR_IN;
 730         if (is_in)
 731                 reg = UDC_TXDMA_CFG_REG;
 732         else
 733                 reg = UDC_RXDMA_CFG_REG;
 734         reg |= 1 << 12;         /* "pulse" activated */
 735
 736         ep->dma_channel = 0;
 737         ep->lch = -1;
 738         if (channel == 0 || channel > 3) {
 739                 if ((reg & 0x0f00) == 0)
 740                         channel = 3;
 741                 else if ((reg & 0x00f0) == 0)
 742                         channel = 2;
 743                 else if ((reg & 0x000f) == 0)   /* preferred for ISO */
 744                         channel = 1;
 745                 else {
 746                         status = -EMLINK;
 747                         goto just_restart;
 748                 }
 749         }
 750         reg |= (0x0f & ep->bEndpointAddress) << (4 * (channel - 1));
 751         ep->dma_channel = channel;
 752
 753         if (is_in) {
 754                 status = omap_request_dma(OMAP_DMA_USB_W2FC_TX0 - 1 + channel,
 755                         ep->ep.name, dma_error, ep, &ep->lch);
 756                 if (status == 0) {
 757                         UDC_TXDMA_CFG_REG = reg;
 758                         omap_set_dma_dest_params(ep->lch,
 759                                 OMAP_DMA_PORT_TIPB,
 760                                 OMAP_DMA_AMODE_CONSTANT,
 761                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 762                 }
 763         } else {
 764                 status = omap_request_dma(OMAP_DMA_USB_W2FC_RX0 - 1 + channel,
 765                         ep->ep.name, dma_error, ep, &ep->lch);
 766                 if (status == 0) {
 767                         UDC_RXDMA_CFG_REG = reg;
 768                         omap_set_dma_src_params(ep->lch,
 769                                 OMAP_DMA_PORT_TIPB,
 770                                 OMAP_DMA_AMODE_CONSTANT,
 771                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 772                 }
 773         }
 774         if (status)
 775                 ep->dma_channel = 0;
 776         else {
 777                 ep->has_dma = 1;
 778                 omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
 779
 780                 /* channel type P: hw synch (fifo) */
 781                 omap_writew(2, OMAP_DMA_LCH_CTRL(ep->lch));
 782         }
 783
 784 just_restart:
 785         /* restart any queue, even if the claim failed  */
 786         restart = !ep->stopped && !list_empty(&ep->queue);
 787
 788         if (status)
 789                 DBG("%s no dma channel: %d%s\n", ep->ep.name, status,
 790                         restart ? " (restart)" : "");
 791         else
 792                 DBG("%s claimed %cxdma%d lch %d%s\n", ep->ep.name,
 793                         is_in ? 't' : 'r',
 794                         ep->dma_channel - 1, ep->lch,
 795                         restart ? " (restart)" : "");
 796
 797         if (restart) {
 798                 struct omap_req *req;
 799                 req = container_of(ep->queue.next, struct omap_req, queue);
 800                 if (ep->has_dma)
 801                         (is_in ? next_in_dma : next_out_dma)(ep, req);
 802                 else {
 803                         use_ep(ep, UDC_EP_SEL);
 804                         (is_in ? write_fifo : read_fifo)(ep, req);
 805                         deselect_ep();
 806                         /* IN: 6 wait states before it'll tx */
 807                 }
 808         }
 809 }
 810
 811 static void dma_channel_release(struct omap_ep *ep)
 812 {
 813         int             shift = 4 * (ep->dma_channel - 1);
 814         u16             mask = 0x0f << shift;
 815         struct omap_req *req;
 816         int             active;
 817
 818         /* abort any active usb transfer request */
 819         if (!list_empty(&ep->queue))
 820                 req = container_of(ep->queue.next, struct omap_req, queue);
 821         else
 822                 req = 0;
 823
 824         active = ((1 << 7) & omap_readl(OMAP_DMA_CCR(ep->lch))) != 0;
 825
 826         DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
 827                         active ? "active" : "idle",
 828                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
 829                         ep->dma_channel - 1, req);
 830
 831         /* wait till current packet DMA finishes, and fifo empties */
 832         if (ep->bEndpointAddress & USB_DIR_IN) {
 833                 UDC_TXDMA_CFG_REG &= ~mask;
 834
 835                 if (req) {
 836                         if (active)
 837                                 udelay(50);
 838                         finish_in_dma(ep, req, -ECONNRESET);
 839                         if (UDC_TXDMA_CFG_REG & mask)
 840                                 WARN("%s, SPIN abort TX dma\n", ep->ep.name);
 841                 }
 842
 843                 /* host may empty the fifo (or not...) */
 844                 while (UDC_TXDMA_CFG_REG & mask)
 845                         udelay(10);
 846
 847         } else {
 848                 UDC_RXDMA_CFG_REG &= ~mask;
 849
 850                 /* dma empties the fifo */
 851                 while (active && (UDC_RXDMA_CFG_REG & mask))
 852                         udelay(10);
 853                 omap_stop_dma(ep->lch);
 854                 if (req)
 855                         finish_out_dma(ep, req, -ECONNRESET);
 856         }
 857         omap_free_dma(ep->lch);
 858         ep->dma_channel = 0;
 859         ep->lch = -1;
 860         /* has_dma still set, till endpoint is fully quiesced */
 861 }
 862
 863
 864 /*-------------------------------------------------------------------------*/
 865
 866 static int
 867 omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, int gfp_flags)
 868 {
 869         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 870         struct omap_req *req = container_of(_req, struct omap_req, req);
 871         struct omap_udc *udc;
 872         unsigned long   flags;
 873         int             is_iso = 0;
 874
 875         /* catch various bogus parameters */
 876         if (!_req || !req->req.complete || !req->req.buf
 877                         || !list_empty(&req->queue)) {
 878                 DBG("%s, bad params\n", __FUNCTION__);
 879                 return -EINVAL;
 880         }
 881         if (!_ep || (!ep->desc && ep->bEndpointAddress)) {
 882                 DBG("%s, bad ep\n", __FUNCTION__);
 883                 return -EINVAL;
 884         }
 885         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 886                 if (req->req.length > ep->ep.maxpacket)
 887                         return -EMSGSIZE;
 888                 is_iso = 1;
 889         }
 890
 891         /* this isn't bogus, but OMAP DMA isn't the only hardware to
 892          * have a hard time with partial packet reads...  reject it.
 893          */
 894         if (use_dma
 895                         && ep->has_dma
 896                         && ep->bEndpointAddress != 0
 897                         && (ep->bEndpointAddress & USB_DIR_IN) == 0
 898                         && (req->req.length % ep->ep.maxpacket) != 0) {
 899                 DBG("%s, no partial packet OUT reads\n", __FUNCTION__);
 900                 return -EMSGSIZE;
 901         }
 902
 903         udc = ep->udc;
 904         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 905                 return -ESHUTDOWN;
 906
 907         if (use_dma && ep->has_dma) {
 908                 if (req->req.dma == DMA_ADDR_INVALID) {
 909                         req->req.dma = dma_map_single(
 910                                 ep->udc->gadget.dev.parent,
 911                                 req->req.buf,
 912                                 req->req.length,
 913                                 (ep->bEndpointAddress & USB_DIR_IN)
 914                                         ? DMA_TO_DEVICE
 915                                         : DMA_FROM_DEVICE);
 916                         req->mapped = 1;
 917                 } else {
 918                         dma_sync_single_for_device(
 919                                 ep->udc->gadget.dev.parent,
 920                                 req->req.dma, req->req.length,
 921                                 (ep->bEndpointAddress & USB_DIR_IN)
 922                                         ? DMA_TO_DEVICE
 923                                         : DMA_FROM_DEVICE);
 924                         req->mapped = 0;
 925                 }
 926         }
 927
 928         VDBG("%s queue req %p, len %d buf %p\n",
 929                 ep->ep.name, _req, _req->length, _req->buf);
 930
 931         spin_lock_irqsave(&udc->lock, flags);
 932
 933         req->req.status = -EINPROGRESS;
 934         req->req.actual = 0;
 935
 936         /* maybe kickstart non-iso i/o queues */
 937         if (is_iso)
 938                 UDC_IRQ_EN_REG |= UDC_SOF_IE;
 939         else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
 940                 int     is_in;
 941
 942                 if (ep->bEndpointAddress == 0) {
 943                         if (!udc->ep0_pending || !list_empty (&ep->queue)) {
 944                                 spin_unlock_irqrestore(&udc->lock, flags);
 945                                 return -EL2HLT;
 946                         }
 947
 948                         /* empty DATA stage? */
 949                         is_in = udc->ep0_in;
 950                         if (!req->req.length) {
 951
 952                                 /* chip became CONFIGURED or ADDRESSED
 953                                  * earlier; drivers may already have queued
 954                                  * requests to non-control endpoints
 955                                  */
 956                                 if (udc->ep0_set_config) {
 957                                         u16     irq_en = UDC_IRQ_EN_REG;
 958
 959                                         irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
 960                                         if (!udc->ep0_reset_config)
 961                                                 irq_en |= UDC_EPN_RX_IE
 962                                                         | UDC_EPN_TX_IE;
 963                                         UDC_IRQ_EN_REG = irq_en;
 964                                 }
 965
 966                                 /* STATUS is reverse direction */
 967                                 UDC_EP_NUM_REG = is_in
 968                                                 ? UDC_EP_SEL
 969                                                 : (UDC_EP_SEL|UDC_EP_DIR);
 970                                 UDC_CTRL_REG = UDC_CLR_EP;
 971                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 972                                 UDC_EP_NUM_REG = udc->ep0_in ? 0 : UDC_EP_DIR;
 973
 974                                 /* cleanup */
 975                                 udc->ep0_pending = 0;
 976                                 done(ep, req, 0);
 977                                 req = 0;
 978
 979                         /* non-empty DATA stage */
 980                         } else if (is_in) {
 981                                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
 982                         } else {
 983                                 if (udc->ep0_setup)
 984                                         goto irq_wait;
 985                                 UDC_EP_NUM_REG = UDC_EP_SEL;
 986                         }
 987                 } else {
 988                         is_in = ep->bEndpointAddress & USB_DIR_IN;
 989                         if (!ep->has_dma)
 990                                 use_ep(ep, UDC_EP_SEL);
 991                         /* if ISO: SOF IRQs must be enabled/disabled! */
 992                 }
 993
 994                 if (ep->has_dma)
 995                         (is_in ? next_in_dma : next_out_dma)(ep, req);
 996                 else if (req) {
 997                         if ((is_in ? write_fifo : read_fifo)(ep, req) == 1)
 998                                 req = 0;
 999                         deselect_ep();
1000                         /* IN: 6 wait states before it'll tx */
1001                 }
1002         }
1003
1004 irq_wait:
1005         /* irq handler advances the queue */
1006         if (req != 0)
1007                 list_add_tail(&req->queue, &ep->queue);
1008         spin_unlock_irqrestore(&udc->lock, flags);
1009
1010         return 0;
1011 }
1012
1013 static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1014 {
1015         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1016         struct omap_req *req;
1017         unsigned long   flags;
1018
1019         if (!_ep || !_req)
1020                 return -EINVAL;
1021
1022         spin_lock_irqsave(&ep->udc->lock, flags);
1023
1024         /* make sure it's actually queued on this endpoint */
1025         list_for_each_entry (req, &ep->queue, queue) {
1026                 if (&req->req == _req)
1027                         break;
1028         }
1029         if (&req->req != _req) {
1030                 spin_unlock_irqrestore(&ep->udc->lock, flags);
1031                 return -EINVAL;
1032         }
1033
1034         if (use_dma && ep->dma_channel && ep->queue.next == &req->queue) {
1035                 int channel = ep->dma_channel;
1036
1037                 /* releasing the dma completion cancels the request,
1038                  * reclaiming the channel restarts the queue
1039                  */
1040                 dma_channel_release(ep);
1041                 dma_channel_claim(ep, channel);
1042         } else
1043                 done(ep, req, -ECONNRESET);
1044         spin_unlock_irqrestore(&ep->udc->lock, flags);
1045         return 0;
1046 }
1047
1048 /*-------------------------------------------------------------------------*/
1049
1050 static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1051 {
1052         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1053         unsigned long   flags;
1054         int             status = -EOPNOTSUPP;
1055
1056         spin_lock_irqsave(&ep->udc->lock, flags);
1057
1058         /* just use protocol stalls for ep0; real halts are annoying */
1059         if (ep->bEndpointAddress == 0) {
1060                 if (!ep->udc->ep0_pending)
1061                         status = -EINVAL;
1062                 else if (value) {
1063                         if (ep->udc->ep0_set_config) {
1064                                 WARN("error changing config?\n");
1065                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1066                         }
1067                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1068                         ep->udc->ep0_pending = 0;
1069                         status = 0;
1070                 } else /* NOP */
1071                         status = 0;
1072
1073         /* otherwise, all active non-ISO endpoints can halt */
1074         } else if (ep->bmAttributes != USB_ENDPOINT_XFER_ISOC && ep->desc) {
1075
1076                 /* IN endpoints must already be idle */
1077                 if ((ep->bEndpointAddress & USB_DIR_IN)
1078                                 && !list_empty(&ep->queue)) {
1079                         status = -EAGAIN;
1080                         goto done;
1081                 }
1082
1083                 if (value) {
1084                         int     channel;
1085
1086                         if (use_dma && ep->dma_channel
1087                                         && !list_empty(&ep->queue)) {
1088                                 channel = ep->dma_channel;
1089                                 dma_channel_release(ep);
1090                         } else
1091                                 channel = 0;
1092
1093                         use_ep(ep, UDC_EP_SEL);
1094                         if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) {
1095                                 UDC_CTRL_REG = UDC_SET_HALT;
1096                                 status = 0;
1097                         } else
1098                                 status = -EAGAIN;
1099                         deselect_ep();
1100
1101                         if (channel)
1102                                 dma_channel_claim(ep, channel);
1103                 } else {
1104                         use_ep(ep, 0);
1105                         UDC_CTRL_REG = UDC_RESET_EP;
1106                         ep->ackwait = 0;
1107                         if (!(ep->bEndpointAddress & USB_DIR_IN))
1108                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1109                 }
1110         }
1111 done:
1112         VDBG("%s %s halt stat %d\n", ep->ep.name,
1113                 value ? "set" : "clear", status);
1114
1115         spin_unlock_irqrestore(&ep->udc->lock, flags);
1116         return status;
1117 }
1118
1119 static struct usb_ep_ops omap_ep_ops = {
1120         .enable         = omap_ep_enable,
1121         .disable        = omap_ep_disable,
1122
1123         .alloc_request  = omap_alloc_request,
1124         .free_request   = omap_free_request,
1125
1126         .alloc_buffer   = omap_alloc_buffer,
1127         .free_buffer    = omap_free_buffer,
1128
1129         .queue          = omap_ep_queue,
1130         .dequeue        = omap_ep_dequeue,
1131
1132         .set_halt       = omap_ep_set_halt,
1133         // fifo_status ... report bytes in fifo
1134         // fifo_flush ... flush fifo
1135 };
1136
1137 /*-------------------------------------------------------------------------*/
1138
1139 static int omap_get_frame(struct usb_gadget *gadget)
1140 {
1141         u16     sof = UDC_SOF_REG;
1142         return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1143 }
1144
1145 static int omap_wakeup(struct usb_gadget *gadget)
1146 {
1147         struct omap_udc *udc;
1148         unsigned long   flags;
1149         int             retval = -EHOSTUNREACH;
1150
1151         udc = container_of(gadget, struct omap_udc, gadget);
1152
1153         spin_lock_irqsave(&udc->lock, flags);
1154         if (udc->devstat & UDC_SUS) {
1155                 /* NOTE:  OTG spec erratum says that OTG devices may
1156                  * issue wakeups without host enable.
1157                  */
1158                 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1159                         DBG("remote wakeup...\n");
1160                         UDC_SYSCON2_REG = UDC_RMT_WKP;
1161                         retval = 0;
1162                 }
1163
1164         /* NOTE:  non-OTG systems may use SRP TOO... */
1165         } else if (!(udc->devstat & UDC_ATT)) {
1166                 if (udc->transceiver)
1167                         retval = otg_start_srp(udc->transceiver);
1168         }
1169         spin_unlock_irqrestore(&udc->lock, flags);
1170
1171         return retval;
1172 }
1173
1174 static int
1175 omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1176 {
1177         struct omap_udc *udc;
1178         unsigned long   flags;
1179         u16             syscon1;
1180
1181         udc = container_of(gadget, struct omap_udc, gadget);
1182         spin_lock_irqsave(&udc->lock, flags);
1183         syscon1 = UDC_SYSCON1_REG;
1184         if (is_selfpowered)
1185                 syscon1 |= UDC_SELF_PWR;
1186         else
1187                 syscon1 &= ~UDC_SELF_PWR;
1188         UDC_SYSCON1_REG = syscon1;
1189         spin_unlock_irqrestore(&udc->lock, flags);
1190
1191         return 0;
1192 }
1193
1194 static int can_pullup(struct omap_udc *udc)
1195 {
1196         return udc->driver && udc->softconnect && udc->vbus_active;
1197 }
1198
1199 static void pullup_enable(struct omap_udc *udc)
1200 {
1201         UDC_SYSCON1_REG |= UDC_PULLUP_EN;
1202 #ifndef CONFIG_USB_OTG
1203         OTG_CTRL_REG |= OTG_BSESSVLD;
1204 #endif
1205         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1206 }
1207
1208 static void pullup_disable(struct omap_udc *udc)
1209 {
1210 #ifndef CONFIG_USB_OTG
1211         OTG_CTRL_REG &= ~OTG_BSESSVLD;
1212 #endif
1213         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1214         UDC_SYSCON1_REG &= ~UDC_PULLUP_EN;
1215 }
1216
1217 /*
1218  * Called by whatever detects VBUS sessions:  external transceiver
1219  * driver, or maybe GPIO0 VBUS IRQ.
1220  */
1221 static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1222 {
1223         struct omap_udc *udc;
1224         unsigned long   flags;
1225
1226         udc = container_of(gadget, struct omap_udc, gadget);
1227         spin_lock_irqsave(&udc->lock, flags);
1228         VDBG("VBUS %s\n", is_active ? "on" : "off");
1229         udc->vbus_active = (is_active != 0);
1230         if (can_pullup(udc))
1231                 pullup_enable(udc);
1232         else
1233                 pullup_disable(udc);
1234         spin_unlock_irqrestore(&udc->lock, flags);
1235         return 0;
1236 }
1237
1238 static int omap_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1239 {
1240         struct omap_udc *udc;
1241
1242         udc = container_of(gadget, struct omap_udc, gadget);
1243         if (udc->transceiver)
1244                 return otg_set_power(udc->transceiver, mA);
1245         return -EOPNOTSUPP;
1246 }
1247
1248 static int omap_pullup(struct usb_gadget *gadget, int is_on)
1249 {
1250         struct omap_udc *udc;
1251         unsigned long   flags;
1252
1253         udc = container_of(gadget, struct omap_udc, gadget);
1254         spin_lock_irqsave(&udc->lock, flags);
1255         udc->softconnect = (is_on != 0);
1256         if (can_pullup(udc))
1257                 pullup_enable(udc);
1258         else
1259                 pullup_disable(udc);
1260         spin_unlock_irqrestore(&udc->lock, flags);
1261         return 0;
1262 }
1263
1264 static struct usb_gadget_ops omap_gadget_ops = {
1265         .get_frame              = omap_get_frame,
1266         .wakeup                 = omap_wakeup,
1267         .set_selfpowered        = omap_set_selfpowered,
1268         .vbus_session           = omap_vbus_session,
1269         .vbus_draw              = omap_vbus_draw,
1270         .pullup                 = omap_pullup,
1271 };
1272
1273 /*-------------------------------------------------------------------------*/
1274
1275 /* dequeue ALL requests; caller holds udc->lock */
1276 static void nuke(struct omap_ep *ep, int status)
1277 {
1278         struct omap_req *req;
1279
1280         ep->stopped = 1;
1281
1282         if (use_dma && ep->dma_channel)
1283                 dma_channel_release(ep);
1284
1285         use_ep(ep, 0);
1286         UDC_CTRL_REG = UDC_CLR_EP;
1287         if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1288                 UDC_CTRL_REG = UDC_SET_HALT;
1289
1290         while (!list_empty(&ep->queue)) {
1291                 req = list_entry(ep->queue.next, struct omap_req, queue);
1292                 done(ep, req, status);
1293         }
1294 }
1295
1296 /* caller holds udc->lock */
1297 static void udc_quiesce(struct omap_udc *udc)
1298 {
1299         struct omap_ep  *ep;
1300
1301         udc->gadget.speed = USB_SPEED_UNKNOWN;
1302         nuke(&udc->ep[0], -ESHUTDOWN);
1303         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list)
1304                 nuke(ep, -ESHUTDOWN);
1305 }
1306
1307 /*-------------------------------------------------------------------------*/
1308
1309 static void update_otg(struct omap_udc *udc)
1310 {
1311         u16     devstat;
1312
1313         if (!udc->gadget.is_otg)
1314                 return;
1315
1316         if (OTG_CTRL_REG & OTG_ID)
1317                 devstat = UDC_DEVSTAT_REG;
1318         else
1319                 devstat = 0;
1320
1321         udc->gadget.b_hnp_enable = !!(devstat & UDC_B_HNP_ENABLE);
1322         udc->gadget.a_hnp_support = !!(devstat & UDC_A_HNP_SUPPORT);
1323         udc->gadget.a_alt_hnp_support = !!(devstat & UDC_A_ALT_HNP_SUPPORT);
1324
1325         /* Enable HNP early, avoiding races on suspend irq path.
1326          * ASSUMES OTG state machine B_BUS_REQ input is true.
1327          */
1328         if (udc->gadget.b_hnp_enable)
1329                 OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ)
1330                                 & ~OTG_PULLUP;
1331 }
1332
1333 static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1334 {
1335         struct omap_ep  *ep0 = &udc->ep[0];
1336         struct omap_req *req = 0;
1337
1338         ep0->irqs++;
1339
1340         /* Clear any pending requests and then scrub any rx/tx state
1341          * before starting to handle the SETUP request.
1342          */
1343         if (irq_src & UDC_SETUP)
1344                 nuke(ep0, 0);
1345
1346         /* IN/OUT packets mean we're in the DATA or STATUS stage.
1347          * This driver uses only uses protocol stalls (ep0 never halts),
1348          * and if we got this far the gadget driver already had a
1349          * chance to stall.  Tries to be forgiving of host oddities.
1350          *
1351          * NOTE:  the last chance gadget drivers have to stall control
1352          * requests is during their request completion callback.
1353          */
1354         if (!list_empty(&ep0->queue))
1355                 req = container_of(ep0->queue.next, struct omap_req, queue);
1356
1357         /* IN == TX to host */
1358         if (irq_src & UDC_EP0_TX) {
1359                 int     stat;
1360
1361                 UDC_IRQ_SRC_REG = UDC_EP0_TX;
1362                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1363                 stat = UDC_STAT_FLG_REG;
1364                 if (stat & UDC_ACK) {
1365                         if (udc->ep0_in) {
1366                                 /* write next IN packet from response,
1367                                  * or set up the status stage.
1368                                  */
1369                                 if (req)
1370                                         stat = write_fifo(ep0, req);
1371                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1372                                 if (!req && udc->ep0_pending) {
1373                                         UDC_EP_NUM_REG = UDC_EP_SEL;
1374                                         UDC_CTRL_REG = UDC_CLR_EP;
1375                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1376                                         UDC_EP_NUM_REG = 0;
1377                                         udc->ep0_pending = 0;
1378                                 } /* else:  6 wait states before it'll tx */
1379                         } else {
1380                                 /* ack status stage of OUT transfer */
1381                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1382                                 if (req)
1383                                         done(ep0, req, 0);
1384                         }
1385                         req = 0;
1386                 } else if (stat & UDC_STALL) {
1387                         UDC_CTRL_REG = UDC_CLR_HALT;
1388                         UDC_EP_NUM_REG = UDC_EP_DIR;
1389                 } else {
1390                         UDC_EP_NUM_REG = UDC_EP_DIR;
1391                 }
1392         }
1393
1394         /* OUT == RX from host */
1395         if (irq_src & UDC_EP0_RX) {
1396                 int     stat;
1397
1398                 UDC_IRQ_SRC_REG = UDC_EP0_RX;
1399                 UDC_EP_NUM_REG = UDC_EP_SEL;
1400                 stat = UDC_STAT_FLG_REG;
1401                 if (stat & UDC_ACK) {
1402                         if (!udc->ep0_in) {
1403                                 stat = 0;
1404                                 /* read next OUT packet of request, maybe
1405                                  * reactiviting the fifo; stall on errors.
1406                                  */
1407                                 if (!req || (stat = read_fifo(ep0, req)) < 0) {
1408                                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1409                                         udc->ep0_pending = 0;
1410                                         stat = 0;
1411                                 } else if (stat == 0)
1412                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1413                                 UDC_EP_NUM_REG = 0;
1414
1415                                 /* activate status stage */
1416                                 if (stat == 1) {
1417                                         done(ep0, req, 0);
1418                                         /* that may have STALLed ep0... */
1419                                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1420                                         UDC_CTRL_REG = UDC_CLR_EP;
1421                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1422                                         UDC_EP_NUM_REG = UDC_EP_DIR;
1423                                         udc->ep0_pending = 0;
1424                                 }
1425                         } else {
1426                                 /* ack status stage of IN transfer */
1427                                 UDC_EP_NUM_REG = 0;
1428                                 if (req)
1429                                         done(ep0, req, 0);
1430                         }
1431                 } else if (stat & UDC_STALL) {
1432                         UDC_CTRL_REG = UDC_CLR_HALT;
1433                         UDC_EP_NUM_REG = 0;
1434                 } else {
1435                         UDC_EP_NUM_REG = 0;
1436                 }
1437         }
1438
1439         /* SETUP starts all control transfers */
1440         if (irq_src & UDC_SETUP) {
1441                 union u {
1442                         u16                     word[4];
1443                         struct usb_ctrlrequest  r;
1444                 } u;
1445                 int                     status = -EINVAL;
1446                 struct omap_ep          *ep;
1447
1448                 /* read the (latest) SETUP message */
1449                 do {
1450                         UDC_EP_NUM_REG = UDC_SETUP_SEL;
1451                         /* two bytes at a time */
1452                         u.word[0] = UDC_DATA_REG;
1453                         u.word[1] = UDC_DATA_REG;
1454                         u.word[2] = UDC_DATA_REG;
1455                         u.word[3] = UDC_DATA_REG;
1456                         UDC_EP_NUM_REG = 0;
1457                 } while (UDC_IRQ_SRC_REG & UDC_SETUP);
1458                 le16_to_cpus (&u.r.wValue);
1459                 le16_to_cpus (&u.r.wIndex);
1460                 le16_to_cpus (&u.r.wLength);
1461
1462                 /* Delegate almost all control requests to the gadget driver,
1463                  * except for a handful of ch9 status/feature requests that
1464                  * hardware doesn't autodecode _and_ the gadget API hides.
1465                  */
1466                 udc->ep0_in = (u.r.bRequestType & USB_DIR_IN) != 0;
1467                 udc->ep0_set_config = 0;
1468                 udc->ep0_pending = 1;
1469                 ep0->stopped = 0;
1470                 ep0->ackwait = 0;
1471                 switch (u.r.bRequest) {
1472                 case USB_REQ_SET_CONFIGURATION:
1473                         /* udc needs to know when ep != 0 is valid */
1474                         if (u.r.bRequestType != USB_RECIP_DEVICE)
1475                                 goto delegate;
1476                         if (u.r.wLength != 0)
1477                                 goto do_stall;
1478                         udc->ep0_set_config = 1;
1479                         udc->ep0_reset_config = (u.r.wValue == 0);
1480                         VDBG("set config %d\n", u.r.wValue);
1481
1482                         /* update udc NOW since gadget driver may start
1483                          * queueing requests immediately; clear config
1484                          * later if it fails the request.
1485                          */
1486                         if (udc->ep0_reset_config)
1487                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1488                         else
1489                                 UDC_SYSCON2_REG = UDC_DEV_CFG;
1490                         update_otg(udc);
1491                         goto delegate;
1492                 case USB_REQ_CLEAR_FEATURE:
1493                         /* clear endpoint halt */
1494                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1495                                 goto delegate;
1496                         if (u.r.wValue != USB_ENDPOINT_HALT
1497                                         || u.r.wLength != 0)
1498                                 goto do_stall;
1499                         ep = &udc->ep[u.r.wIndex & 0xf];
1500                         if (ep != ep0) {
1501                                 if (u.r.wIndex & USB_DIR_IN)
1502                                         ep += 16;
1503                                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1504                                                 || !ep->desc)
1505                                         goto do_stall;
1506                                 use_ep(ep, 0);
1507                                 UDC_CTRL_REG = UDC_RESET_EP;
1508                                 ep->ackwait = 0;
1509                                 if (!(ep->bEndpointAddress & USB_DIR_IN))
1510                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1511                         }
1512                         VDBG("%s halt cleared by host\n", ep->name);
1513                         goto ep0out_status_stage;
1514                 case USB_REQ_SET_FEATURE:
1515                         /* set endpoint halt */
1516                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1517                                 goto delegate;
1518                         if (u.r.wValue != USB_ENDPOINT_HALT
1519                                         || u.r.wLength != 0)
1520                                 goto do_stall;
1521                         ep = &udc->ep[u.r.wIndex & 0xf];
1522                         if (u.r.wIndex & USB_DIR_IN)
1523                                 ep += 16;
1524                         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1525                                         || ep == ep0 || !ep->desc)
1526                                 goto do_stall;
1527                         if (use_dma && ep->has_dma) {
1528                                 /* this has rude side-effects (aborts) and
1529                                  * can't really work if DMA-IN is active
1530                                  */
1531                                 DBG("%s host set_halt, NYET \n", ep->name);
1532                                 goto do_stall;
1533                         }
1534                         use_ep(ep, 0);
1535                         /* can't halt if fifo isn't empty... */
1536                         UDC_CTRL_REG = UDC_CLR_EP;
1537                         UDC_CTRL_REG = UDC_SET_HALT;
1538                         VDBG("%s halted by host\n", ep->name);
1539 ep0out_status_stage:
1540                         status = 0;
1541                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1542                         UDC_CTRL_REG = UDC_CLR_EP;
1543                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1544                         UDC_EP_NUM_REG = UDC_EP_DIR;
1545                         udc->ep0_pending = 0;
1546                         break;
1547                 case USB_REQ_GET_STATUS:
1548                         /* return interface status.  if we were pedantic,
1549                          * we'd detect non-existent interfaces, and stall.
1550                          */
1551                         if (u.r.bRequestType
1552                                         != (USB_DIR_IN|USB_RECIP_INTERFACE))
1553                                 goto delegate;
1554                         /* return two zero bytes */
1555                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1556                         UDC_DATA_REG = 0;
1557                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1558                         UDC_EP_NUM_REG = UDC_EP_DIR;
1559                         status = 0;
1560                         VDBG("GET_STATUS, interface %d\n", u.r.wIndex);
1561                         /* next, status stage */
1562                         break;
1563                 default:
1564 delegate:
1565                         /* activate the ep0out fifo right away */
1566                         if (!udc->ep0_in && u.r.wLength) {
1567                                 UDC_EP_NUM_REG = 0;
1568                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1569                         }
1570
1571                         /* gadget drivers see class/vendor specific requests,
1572                          * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION},
1573                          * and more
1574                          */
1575                         VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1576                                 u.r.bRequestType, u.r.bRequest,
1577                                 u.r.wValue, u.r.wIndex, u.r.wLength);
1578
1579                         /* The gadget driver may return an error here,
1580                          * causing an immediate protocol stall.
1581                          *
1582                          * Else it must issue a response, either queueing a
1583                          * response buffer for the DATA stage, or halting ep0
1584                          * (causing a protocol stall, not a real halt).  A
1585                          * zero length buffer means no DATA stage.
1586                          *
1587                          * It's fine to issue that response after the setup()
1588                          * call returns, and this IRQ was handled.
1589                          */
1590                         udc->ep0_setup = 1;
1591                         spin_unlock(&udc->lock);
1592                         status = udc->driver->setup (&udc->gadget, &u.r);
1593                         spin_lock(&udc->lock);
1594                         udc->ep0_setup = 0;
1595                 }
1596
1597                 if (status < 0) {
1598 do_stall:
1599                         VDBG("req %02x.%02x protocol STALL; stat %d\n",
1600                                         u.r.bRequestType, u.r.bRequest, status);
1601                         if (udc->ep0_set_config) {
1602                                 if (udc->ep0_reset_config)
1603                                         WARN("error resetting config?\n");
1604                                 else
1605                                         UDC_SYSCON2_REG = UDC_CLR_CFG;
1606                         }
1607                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1608                         udc->ep0_pending = 0;
1609                 }
1610         }
1611 }
1612
1613 /*-------------------------------------------------------------------------*/
1614
1615 #define OTG_FLAGS (UDC_B_HNP_ENABLE|UDC_A_HNP_SUPPORT|UDC_A_ALT_HNP_SUPPORT)
1616
1617 static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1618 {
1619         u16     devstat, change;
1620
1621         devstat = UDC_DEVSTAT_REG;
1622         change = devstat ^ udc->devstat;
1623         udc->devstat = devstat;
1624
1625         if (change & (UDC_USB_RESET|UDC_ATT)) {
1626                 udc_quiesce(udc);
1627
1628                 if (change & UDC_ATT) {
1629                         /* driver for any external transceiver will
1630                          * have called omap_vbus_session() already
1631                          */
1632                         if (devstat & UDC_ATT) {
1633                                 udc->gadget.speed = USB_SPEED_FULL;
1634                                 VDBG("connect\n");
1635                                 if (!udc->transceiver)
1636                                         pullup_enable(udc);
1637                                 // if (driver->connect) call it
1638                         } else if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1639                                 udc->gadget.speed = USB_SPEED_UNKNOWN;
1640                                 if (!udc->transceiver)
1641                                         pullup_disable(udc);
1642                                 DBG("disconnect, gadget %s\n",
1643                                         udc->driver->driver.name);
1644                                 if (udc->driver->disconnect) {
1645                                         spin_unlock(&udc->lock);
1646                                         udc->driver->disconnect(&udc->gadget);
1647                                         spin_lock(&udc->lock);
1648                                 }
1649                         }
1650                         change &= ~UDC_ATT;
1651                 }
1652
1653                 if (change & UDC_USB_RESET) {
1654                         if (devstat & UDC_USB_RESET) {
1655                                 VDBG("RESET=1\n");
1656                         } else {
1657                                 udc->gadget.speed = USB_SPEED_FULL;
1658                                 INFO("USB reset done, gadget %s\n",
1659                                         udc->driver->driver.name);
1660                                 /* ep0 traffic is legal from now on */
1661                                 UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE;
1662                         }
1663                         change &= ~UDC_USB_RESET;
1664                 }
1665         }
1666         if (change & UDC_SUS) {
1667                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1668                         // FIXME tell isp1301 to suspend/resume (?)
1669                         if (devstat & UDC_SUS) {
1670                                 VDBG("suspend\n");
1671                                 update_otg(udc);
1672                                 /* HNP could be under way already */
1673                                 if (udc->gadget.speed == USB_SPEED_FULL
1674                                                 && udc->driver->suspend) {
1675                                         spin_unlock(&udc->lock);
1676                                         udc->driver->suspend(&udc->gadget);
1677                                         spin_lock(&udc->lock);
1678                                 }
1679                         } else {
1680                                 VDBG("resume\n");
1681                                 if (udc->gadget.speed == USB_SPEED_FULL
1682                                                 && udc->driver->resume) {
1683                                         spin_unlock(&udc->lock);
1684                                         udc->driver->resume(&udc->gadget);
1685                                         spin_lock(&udc->lock);
1686                                 }
1687                         }
1688                 }
1689                 change &= ~UDC_SUS;
1690         }
1691         if (change & OTG_FLAGS) {
1692                 update_otg(udc);
1693                 change &= ~OTG_FLAGS;
1694         }
1695
1696         change &= ~(UDC_CFG|UDC_DEF|UDC_ADD);
1697         if (change)
1698                 VDBG("devstat %03x, ignore change %03x\n",
1699                         devstat,  change);
1700
1701         UDC_IRQ_SRC_REG = UDC_DS_CHG;
1702 }
1703
1704 static irqreturn_t
1705 omap_udc_irq(int irq, void *_udc, struct pt_regs *r)
1706 {
1707         struct omap_udc *udc = _udc;
1708         u16             irq_src;
1709         irqreturn_t     status = IRQ_NONE;
1710         unsigned long   flags;
1711
1712         spin_lock_irqsave(&udc->lock, flags);
1713         irq_src = UDC_IRQ_SRC_REG;
1714
1715         /* Device state change (usb ch9 stuff) */
1716         if (irq_src & UDC_DS_CHG) {
1717                 devstate_irq(_udc, irq_src);
1718                 status = IRQ_HANDLED;
1719                 irq_src &= ~UDC_DS_CHG;
1720         }
1721
1722         /* EP0 control transfers */
1723         if (irq_src & (UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX)) {
1724                 ep0_irq(_udc, irq_src);
1725                 status = IRQ_HANDLED;
1726                 irq_src &= ~(UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX);
1727         }
1728
1729         /* DMA transfer completion */
1730         if (use_dma && (irq_src & (UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT))) {
1731                 dma_irq(_udc, irq_src);
1732                 status = IRQ_HANDLED;
1733                 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1734         }
1735
1736         irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX);
1737         if (irq_src)
1738                 DBG("udc_irq, unhandled %03x\n", irq_src);
1739         spin_unlock_irqrestore(&udc->lock, flags);
1740
1741         return status;
1742 }
1743
1744 static irqreturn_t
1745 omap_udc_pio_irq(int irq, void *_dev, struct pt_regs *r)
1746 {
1747         u16             epn_stat, irq_src;
1748         irqreturn_t     status = IRQ_NONE;
1749         struct omap_ep  *ep;
1750         int             epnum;
1751         struct omap_udc *udc = _dev;
1752         struct omap_req *req;
1753         unsigned long   flags;
1754
1755         spin_lock_irqsave(&udc->lock, flags);
1756         epn_stat = UDC_EPN_STAT_REG;
1757         irq_src = UDC_IRQ_SRC_REG;
1758
1759         /* handle OUT first, to avoid some wasteful NAKs */
1760         if (irq_src & UDC_EPN_RX) {
1761                 epnum = (epn_stat >> 8) & 0x0f;
1762                 UDC_IRQ_SRC_REG = UDC_EPN_RX;
1763                 status = IRQ_HANDLED;
1764                 ep = &udc->ep[epnum];
1765                 ep->irqs++;
1766
1767                 if (!list_empty(&ep->queue)) {
1768                         UDC_EP_NUM_REG = epnum | UDC_EP_SEL;
1769                         if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1770                                 int stat;
1771                                 req = container_of(ep->queue.next,
1772                                                 struct omap_req, queue);
1773                                 stat = read_fifo(ep, req);
1774                                 // FIXME double buffered PIO OUT should work
1775                         }
1776                         UDC_EP_NUM_REG = epnum;
1777                 }
1778         }
1779
1780         /* then IN transfers */
1781         if (irq_src & UDC_EPN_TX) {
1782                 epnum = epn_stat & 0x0f;
1783                 UDC_IRQ_SRC_REG = UDC_EPN_TX;
1784                 status = IRQ_HANDLED;
1785                 ep = &udc->ep[16 + epnum];
1786                 ep->irqs++;
1787                 ep->ackwait = 0;
1788
1789                 if (!list_empty(&ep->queue)) {
1790                         UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL;
1791                         if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1792                                 req = container_of(ep->queue.next,
1793                                                 struct omap_req, queue);
1794                                 (void) write_fifo(ep, req);
1795                         }
1796                         UDC_EP_NUM_REG = epnum | UDC_EP_DIR;
1797                         /* 6 wait states before it'll tx */
1798                 }
1799         }
1800
1801         spin_unlock_irqrestore(&udc->lock, flags);
1802         return status;
1803 }
1804
1805 #ifdef  USE_ISO
1806 static irqreturn_t
1807 omap_udc_iso_irq(int irq, void *_dev, struct pt_regs *r)
1808 {
1809         struct omap_udc *udc = _dev;
1810         struct omap_ep  *ep;
1811         int             pending = 0;
1812         unsigned long   flags;
1813
1814         spin_lock_irqsave(&udc->lock, flags);
1815
1816         /* handle all non-DMA ISO transfers */
1817         list_for_each_entry (ep, &udc->iso, iso) {
1818                 u16             stat;
1819                 struct omap_req *req;
1820
1821                 if (ep->has_dma || list_empty(&ep->queue))
1822                         continue;
1823                 req = list_entry(ep->queue.next, struct omap_req, queue);
1824
1825                 use_ep(ep, UDC_EP_SEL);
1826                 stat = UDC_STAT_FLG_REG;
1827
1828                 /* NOTE: like the other controller drivers, this isn't
1829                  * currently reporting lost or damaged frames.
1830                  */
1831                 if (ep->bEndpointAddress & USB_DIR_IN) {
1832                         if (stat & UDC_MISS_IN)
1833                                 /* done(ep, req, -EPROTO) */;
1834                         else
1835                                 write_fifo(ep, req);
1836                 } else {
1837                         int     status = 0;
1838
1839                         if (stat & UDC_NO_RXPACKET)
1840                                 status = -EREMOTEIO;
1841                         else if (stat & UDC_ISO_ERR)
1842                                 status = -EILSEQ;
1843                         else if (stat & UDC_DATA_FLUSH)
1844                                 status = -ENOSR;
1845
1846                         if (status)
1847                                 /* done(ep, req, status) */;
1848                         else
1849                                 read_fifo(ep, req);
1850                 }
1851                 deselect_ep();
1852                 /* 6 wait states before next EP */
1853
1854                 ep->irqs++;
1855                 if (!list_empty(&ep->queue))
1856                         pending = 1;
1857         }
1858         if (!pending)
1859                 UDC_IRQ_EN_REG &= ~UDC_SOF_IE;
1860         UDC_IRQ_SRC_REG = UDC_SOF;
1861
1862         spin_unlock_irqrestore(&udc->lock, flags);
1863         return IRQ_HANDLED;
1864 }
1865 #endif
1866
1867 /*-------------------------------------------------------------------------*/
1868
1869 static struct omap_udc *udc;
1870
1871 int usb_gadget_register_driver (struct usb_gadget_driver *driver)
1872 {
1873         int             status = -ENODEV;
1874         struct omap_ep  *ep;
1875         unsigned long   flags;
1876
1877         /* basic sanity tests */
1878         if (!udc)
1879                 return -ENODEV;
1880         if (!driver
1881                         // FIXME if otg, check:  driver->is_otg
1882                         || driver->speed < USB_SPEED_FULL
1883                         || !driver->bind
1884                         || !driver->unbind
1885                         || !driver->setup)
1886                 return -EINVAL;
1887
1888         spin_lock_irqsave(&udc->lock, flags);
1889         if (udc->driver) {
1890                 spin_unlock_irqrestore(&udc->lock, flags);
1891                 return -EBUSY;
1892         }
1893
1894         /* reset state */
1895         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1896                 ep->irqs = 0;
1897                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
1898                         continue;
1899                 use_ep(ep, 0);
1900                 UDC_CTRL_REG = UDC_SET_HALT;
1901         }
1902         udc->ep0_pending = 0;
1903         udc->ep[0].irqs = 0;
1904         udc->softconnect = 1;
1905
1906         /* hook up the driver */
1907         driver->driver.bus = 0;
1908         udc->driver = driver;
1909         udc->gadget.dev.driver = &driver->driver;
1910         spin_unlock_irqrestore(&udc->lock, flags);
1911
1912         status = driver->bind (&udc->gadget);
1913         if (status) {
1914                 DBG("bind to %s --> %d\n", driver->driver.name, status);
1915                 udc->gadget.dev.driver = 0;
1916                 udc->driver = 0;
1917                 goto done;
1918         }
1919         DBG("bound to driver %s\n", driver->driver.name);
1920
1921         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
1922
1923         /* connect to bus through transceiver */
1924         if (udc->transceiver) {
1925                 status = otg_set_peripheral(udc->transceiver, &udc->gadget);
1926                 if (status < 0) {
1927                         ERR("can't bind to transceiver\n");
1928                         driver->unbind (&udc->gadget);
1929                         udc->gadget.dev.driver = 0;
1930                         udc->driver = 0;
1931                         goto done;
1932                 }
1933         } else {
1934                 if (can_pullup(udc))
1935                         pullup_enable (udc);
1936                 else
1937                         pullup_disable (udc);
1938         }
1939
1940 done:
1941         return status;
1942 }
1943 EXPORT_SYMBOL(usb_gadget_register_driver);
1944
1945 int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
1946 {
1947         unsigned long   flags;
1948         int             status = -ENODEV;
1949
1950         if (!udc)
1951                 return -ENODEV;
1952         if (!driver || driver != udc->driver)
1953                 return -EINVAL;
1954
1955         if (udc->transceiver)
1956                 (void) otg_set_peripheral(udc->transceiver, 0);
1957         else
1958                 pullup_disable(udc);
1959
1960         spin_lock_irqsave(&udc->lock, flags);
1961         udc_quiesce(udc);
1962         spin_unlock_irqrestore(&udc->lock, flags);
1963
1964         driver->unbind(&udc->gadget);
1965         udc->gadget.dev.driver = 0;
1966         udc->driver = 0;
1967
1968
1969         DBG("unregistered driver '%s'\n", driver->driver.name);
1970         return status;
1971 }
1972 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1973
1974
1975 /*-------------------------------------------------------------------------*/
1976
1977 #ifdef CONFIG_USB_OMAP_PROC
1978
1979 #include <linux/seq_file.h>
1980
1981 static const char proc_filename[] = "driver/udc";
1982
1983 #define FOURBITS "%s%s%s%s"
1984 #define EIGHTBITS FOURBITS FOURBITS
1985
1986 static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
1987 {
1988         u16             stat_flg;
1989         struct omap_req *req;
1990         char            buf[20];
1991
1992         use_ep(ep, 0);
1993
1994         if (use_dma && ep->has_dma)
1995                 snprintf(buf, sizeof buf, "(%cxdma%d lch%d) ",
1996                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
1997                         ep->dma_channel - 1, ep->lch);
1998         else
1999                 buf[0] = 0;
2000
2001         stat_flg = UDC_STAT_FLG_REG;
2002         seq_printf(s,
2003                 "\n%s %sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2004                 ep->name, buf, ep->irqs, stat_flg,
2005                 (stat_flg & UDC_NO_RXPACKET) ? "no_rxpacket " : "",
2006                 (stat_flg & UDC_MISS_IN) ? "miss_in " : "",
2007                 (stat_flg & UDC_DATA_FLUSH) ? "data_flush " : "",
2008                 (stat_flg & UDC_ISO_ERR) ? "iso_err " : "",
2009                 (stat_flg & UDC_ISO_FIFO_EMPTY) ? "iso_fifo_empty " : "",
2010                 (stat_flg & UDC_ISO_FIFO_FULL) ? "iso_fifo_full " : "",
2011                 (stat_flg & UDC_EP_HALTED) ? "HALT " : "",
2012                 (stat_flg & UDC_STALL) ? "STALL " : "",
2013                 (stat_flg & UDC_NAK) ? "NAK " : "",
2014                 (stat_flg & UDC_ACK) ? "ACK " : "",
2015                 (stat_flg & UDC_FIFO_EN) ? "fifo_en " : "",
2016                 (stat_flg & UDC_NON_ISO_FIFO_EMPTY) ? "fifo_empty " : "",
2017                 (stat_flg & UDC_NON_ISO_FIFO_FULL) ? "fifo_full " : "");
2018
2019         if (list_empty (&ep->queue))
2020                 seq_printf(s, "\t(queue empty)\n");
2021         else
2022                 list_for_each_entry (req, &ep->queue, queue)
2023                         seq_printf(s, "\treq %p len %d/%d buf %p\n",
2024                                         &req->req, req->req.actual,
2025                                         req->req.length, req->req.buf);
2026 }
2027
2028 static char *trx_mode(unsigned m)
2029 {
2030         switch (m) {
2031         case 3:
2032         case 0:         return "6wire";
2033         case 1:         return "4wire";
2034         case 2:         return "3wire";
2035         default:        return "unknown";
2036         }
2037 }
2038
2039 static int proc_udc_show(struct seq_file *s, void *_)
2040 {
2041         u32             tmp;
2042         struct omap_ep  *ep;
2043         unsigned long   flags;
2044
2045         spin_lock_irqsave(&udc->lock, flags);
2046
2047         seq_printf(s, "%s, version: " DRIVER_VERSION
2048 #ifdef  USE_ISO
2049                 " (iso)"
2050 #endif
2051                 "%s\n",
2052                 driver_desc,
2053                 use_dma ?  " (dma)" : "");
2054
2055         tmp = UDC_REV_REG & 0xff;
2056         seq_printf(s,
2057                 "UDC rev %d.%d, OTG rev %d.%d, fifo mode %d, gadget %s\n"
2058                 "hmc %d, transceiver %08x %s\n",
2059                 tmp >> 4, tmp & 0xf,
2060                 OTG_REV_REG >> 4, OTG_REV_REG & 0xf,
2061                 fifo_mode,
2062                 udc->driver ? udc->driver->driver.name : "(none)",
2063                 HMC, USB_TRANSCEIVER_CTRL_REG,
2064                 udc->transceiver ? udc->transceiver->label : "");
2065
2066         /* OTG controller registers */
2067         tmp = OTG_SYSCON_1_REG;
2068         seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2069                         FOURBITS "\n", tmp,
2070                 trx_mode(USB2_TRX_MODE(tmp)),
2071                 trx_mode(USB1_TRX_MODE(tmp)),
2072                 trx_mode(USB0_TRX_MODE(tmp)),
2073                 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2074                 (tmp & HST_IDLE_EN) ? " !host" : "",
2075                 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2076                 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2077         tmp = OTG_SYSCON_2_REG;
2078         seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2079                         " b_ase_brst=%d hmc=%d\n", tmp,
2080                 (tmp & OTG_EN) ? " otg_en" : "",
2081                 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2082                 // much more SRP stuff
2083                 (tmp & SRP_DATA) ? " srp_data" : "",
2084                 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2085                 (tmp & OTG_PADEN) ? " otg_paden" : "",
2086                 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2087                 (tmp & UHOST_EN) ? " uhost_en" : "",
2088                 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2089                 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2090                 B_ASE_BRST(tmp),
2091                 OTG_HMC(tmp));
2092         tmp = OTG_CTRL_REG;
2093         seq_printf(s, "otg_ctrl    %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2094                 (tmp & OTG_ASESSVLD) ? " asess" : "",
2095                 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2096                 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2097                 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2098                 (tmp & OTG_ID) ? " id" : "",
2099                 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2100                 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2101                 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2102                 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2103                 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2104                 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2105                 (tmp & OTG_PULLDOWN) ? " down" : "",
2106                 (tmp & OTG_PULLUP) ? " up" : "",
2107                 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2108                 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2109                 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2110                 (tmp & OTG_PU_ID) ? " pu_id" : ""
2111                 );
2112         tmp = OTG_IRQ_EN_REG;
2113         seq_printf(s, "otg_irq_en  %04x" "\n", tmp);
2114         tmp = OTG_IRQ_SRC_REG;
2115         seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2116         tmp = OTG_OUTCTRL_REG;
2117         seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2118         tmp = OTG_TEST_REG;
2119         seq_printf(s, "otg_test    %04x" "\n", tmp);
2120
2121         tmp = UDC_SYSCON1_REG;
2122         seq_printf(s, "\nsyscon1     %04x" EIGHTBITS "\n", tmp,
2123                 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2124                 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2125                 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2126                 (tmp & UDC_NAK_EN) ? " nak" : "",
2127                 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2128                 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2129                 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2130                 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2131         // syscon2 is write-only
2132
2133         /* UDC controller registers */
2134         if (!(tmp & UDC_PULLUP_EN)) {
2135                 seq_printf(s, "(suspended)\n");
2136                 spin_unlock_irqrestore(&udc->lock, flags);
2137                 return 0;
2138         }
2139
2140         tmp = UDC_DEVSTAT_REG;
2141         seq_printf(s, "devstat     %04x" EIGHTBITS "%s%s\n", tmp,
2142                 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2143                 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2144                 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2145                 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2146                 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2147                 (tmp & UDC_SUS) ? " SUS" : "",
2148                 (tmp & UDC_CFG) ? " CFG" : "",
2149                 (tmp & UDC_ADD) ? " ADD" : "",
2150                 (tmp & UDC_DEF) ? " DEF" : "",
2151                 (tmp & UDC_ATT) ? " ATT" : "");
2152         seq_printf(s, "sof         %04x\n", UDC_SOF_REG);
2153         tmp = UDC_IRQ_EN_REG;
2154         seq_printf(s, "irq_en      %04x" FOURBITS "%s\n", tmp,
2155                 (tmp & UDC_SOF_IE) ? " sof" : "",
2156                 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2157                 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2158                 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2159                 (tmp & UDC_EP0_IE) ? " ep0" : "");
2160         tmp = UDC_IRQ_SRC_REG;
2161         seq_printf(s, "irq_src     %04x" EIGHTBITS "%s%s\n", tmp,
2162                 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2163                 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2164                 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2165                 (tmp & UDC_SOF) ? " sof" : "",
2166                 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2167                 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2168                 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2169                 (tmp & UDC_SETUP) ? " setup" : "",
2170                 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2171                 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2172         if (use_dma) {
2173                 unsigned i;
2174
2175                 tmp = UDC_DMA_IRQ_EN_REG;
2176                 seq_printf(s, "dma_irq_en  %04x%s" EIGHTBITS "\n", tmp,
2177                         (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2178                         (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2179                         (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2180
2181                         (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2182                         (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2183                         (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2184
2185                         (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2186                         (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2187                         (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2188
2189                 tmp = UDC_RXDMA_CFG_REG;
2190                 seq_printf(s, "rxdma_cfg   %04x\n", tmp);
2191                 if (tmp) {
2192                         for (i = 0; i < 3; i++) {
2193                                 if ((tmp & (0x0f << (i * 4))) == 0)
2194                                         continue;
2195                                 seq_printf(s, "rxdma[%d]    %04x\n", i,
2196                                                 UDC_RXDMA_REG(i + 1));
2197                         }
2198                 }
2199                 tmp = UDC_TXDMA_CFG_REG;
2200                 seq_printf(s, "txdma_cfg   %04x\n", tmp);
2201                 if (tmp) {
2202                         for (i = 0; i < 3; i++) {
2203                                 if (!(tmp & (0x0f << (i * 4))))
2204                                         continue;
2205                                 seq_printf(s, "txdma[%d]    %04x\n", i,
2206                                                 UDC_TXDMA_REG(i + 1));
2207                         }
2208                 }
2209         }
2210
2211         tmp = UDC_DEVSTAT_REG;
2212         if (tmp & UDC_ATT) {
2213                 proc_ep_show(s, &udc->ep[0]);
2214                 if (tmp & UDC_ADD) {
2215                         list_for_each_entry (ep, &udc->gadget.ep_list,
2216                                         ep.ep_list) {
2217                                 if (ep->desc)
2218                                         proc_ep_show(s, ep);
2219                         }
2220                 }
2221         }
2222         spin_unlock_irqrestore(&udc->lock, flags);
2223         return 0;
2224 }
2225
2226 static int proc_udc_open(struct inode *inode, struct file *file)
2227 {
2228         return single_open(file, proc_udc_show, 0);
2229 }
2230
2231 static struct file_operations proc_ops = {
2232         .open           = proc_udc_open,
2233         .read           = seq_read,
2234         .llseek         = seq_lseek,
2235         .release        = single_release,
2236 };
2237
2238 static void create_proc_file(void)
2239 {
2240         struct proc_dir_entry *pde;
2241
2242         pde = create_proc_entry (proc_filename, 0, NULL);
2243         if (pde)
2244                 pde->proc_fops = &proc_ops;
2245 }
2246
2247 static void remove_proc_file(void)
2248 {
2249         remove_proc_entry(proc_filename, 0);
2250 }
2251
2252 #else
2253
2254 static inline void create_proc_file(void) {}
2255 static inline void remove_proc_file(void) {}
2256
2257 #endif
2258
2259 /*-------------------------------------------------------------------------*/
2260
2261 /* Before this controller can enumerate, we need to pick an endpoint
2262  * configuration, or "fifo_mode"  That involves allocating 2KB of packet
2263  * buffer space among the endpoints we'll be operating.
2264  */
2265 static unsigned __init
2266 omap_ep_setup(char *name, u8 addr, u8 type,
2267                 unsigned buf, unsigned maxp, int dbuf)
2268 {
2269         struct omap_ep  *ep;
2270         u16             epn_rxtx = 0;
2271
2272         /* OUT endpoints first, then IN */
2273         ep = &udc->ep[addr & 0xf];
2274         if (addr & USB_DIR_IN)
2275                 ep += 16;
2276
2277         /* in case of ep init table bugs */
2278         BUG_ON(ep->name[0]);
2279
2280         /* chip setup ... bit values are same for IN, OUT */
2281         if (type == USB_ENDPOINT_XFER_ISOC) {
2282                 switch (maxp) {
2283                 case 8:         epn_rxtx = 0 << 12; break;
2284                 case 16:        epn_rxtx = 1 << 12; break;
2285                 case 32:        epn_rxtx = 2 << 12; break;
2286                 case 64:        epn_rxtx = 3 << 12; break;
2287                 case 128:       epn_rxtx = 4 << 12; break;
2288                 case 256:       epn_rxtx = 5 << 12; break;
2289                 case 512:       epn_rxtx = 6 << 12; break;
2290                 default:        BUG();
2291                 }
2292                 epn_rxtx |= UDC_EPN_RX_ISO;
2293                 dbuf = 1;
2294         } else {
2295                 /* pio-out could potentially double-buffer,
2296                  * as can (should!) DMA-IN
2297                  */
2298                 if (!use_dma || (addr & USB_DIR_IN))
2299                         dbuf = 0;
2300
2301                 switch (maxp) {
2302                 case 8:         epn_rxtx = 0 << 12; break;
2303                 case 16:        epn_rxtx = 1 << 12; break;
2304                 case 32:        epn_rxtx = 2 << 12; break;
2305                 case 64:        epn_rxtx = 3 << 12; break;
2306                 default:        BUG();
2307                 }
2308                 if (dbuf && addr)
2309                         epn_rxtx |= UDC_EPN_RX_DB;
2310         }
2311         if (addr)
2312                 epn_rxtx |= UDC_EPN_RX_VALID;
2313         BUG_ON(buf & 0x07);
2314         epn_rxtx |= buf >> 3;
2315
2316         DBG("%s addr %02x rxtx %04x maxp %d%s buf %d\n",
2317                 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2318
2319         if (addr & USB_DIR_IN)
2320                 UDC_EP_TX_REG(addr & 0xf) = epn_rxtx;
2321         else
2322                 UDC_EP_RX_REG(addr) = epn_rxtx;
2323
2324         /* next endpoint's buffer starts after this one's */
2325         buf += maxp;
2326         if (dbuf)
2327                 buf += maxp;
2328         BUG_ON(buf > 2048);
2329
2330         /* set up driver data structures */
2331         BUG_ON(strlen(name) >= sizeof ep->name);
2332         strlcpy(ep->name, name, sizeof ep->name);
2333         INIT_LIST_HEAD(&ep->queue);
2334         INIT_LIST_HEAD(&ep->iso);
2335         ep->bEndpointAddress = addr;
2336         ep->bmAttributes = type;
2337         ep->double_buf = dbuf;
2338         ep->udc = udc;
2339
2340         ep->ep.name = ep->name;
2341         ep->ep.ops = &omap_ep_ops;
2342         ep->ep.maxpacket = ep->maxpacket = maxp;
2343         list_add_tail (&ep->ep.ep_list, &udc->gadget.ep_list);
2344
2345         return buf;
2346 }
2347
2348 static void omap_udc_release(struct device *dev)
2349 {
2350         complete(udc->done);
2351         kfree (udc);
2352         udc = 0;
2353 }
2354
2355 static int __init
2356 omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2357 {
2358         unsigned        tmp, buf;
2359
2360         /* abolish any previous hardware state */
2361         UDC_SYSCON1_REG = 0;
2362         UDC_IRQ_EN_REG = 0;
2363         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2364         UDC_DMA_IRQ_EN_REG = 0;
2365         UDC_RXDMA_CFG_REG = 0;
2366         UDC_TXDMA_CFG_REG = 0;
2367
2368         /* UDC_PULLUP_EN gates the chip clock */
2369         // OTG_SYSCON_1_REG |= DEV_IDLE_EN;
2370
2371         udc = kmalloc (sizeof *udc, SLAB_KERNEL);
2372         if (!udc)
2373                 return -ENOMEM;
2374
2375         memset(udc, 0, sizeof *udc);
2376         spin_lock_init (&udc->lock);
2377
2378         udc->gadget.ops = &omap_gadget_ops;
2379         udc->gadget.ep0 = &udc->ep[0].ep;
2380         INIT_LIST_HEAD(&udc->gadget.ep_list);
2381         INIT_LIST_HEAD(&udc->iso);
2382         udc->gadget.speed = USB_SPEED_UNKNOWN;
2383         udc->gadget.name = driver_name;
2384
2385         device_initialize(&udc->gadget.dev);
2386         strcpy (udc->gadget.dev.bus_id, "gadget");
2387         udc->gadget.dev.release = omap_udc_release;
2388         udc->gadget.dev.parent = &odev->dev;
2389         if (use_dma)
2390                 udc->gadget.dev.dma_mask = odev->dev.dma_mask;
2391
2392         udc->transceiver = xceiv;
2393
2394         /* ep0 is special; put it right after the SETUP buffer */
2395         buf = omap_ep_setup("ep0", 0, USB_ENDPOINT_XFER_CONTROL,
2396                         8 /* after SETUP */, 64 /* maxpacket */, 0);
2397         list_del_init(&udc->ep[0].ep.ep_list);
2398
2399         /* initially disable all non-ep0 endpoints */
2400         for (tmp = 1; tmp < 15; tmp++) {
2401                 UDC_EP_RX_REG(tmp) = 0;
2402                 UDC_EP_TX_REG(tmp) = 0;
2403         }
2404
2405 #define OMAP_BULK_EP(name,addr) \
2406         buf = omap_ep_setup(name "-bulk", addr, \
2407                         USB_ENDPOINT_XFER_BULK, buf, 64, 1);
2408 #define OMAP_INT_EP(name,addr, maxp) \
2409         buf = omap_ep_setup(name "-int", addr, \
2410                         USB_ENDPOINT_XFER_INT, buf, maxp, 0);
2411 #define OMAP_ISO_EP(name,addr, maxp) \
2412         buf = omap_ep_setup(name "-iso", addr, \
2413                         USB_ENDPOINT_XFER_ISOC, buf, maxp, 1);
2414
2415         switch (fifo_mode) {
2416         case 0:
2417                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2418                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2419                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2420                 break;
2421         case 1:
2422                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2423                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2424                 OMAP_BULK_EP("ep3in",  USB_DIR_IN  | 3);
2425                 OMAP_BULK_EP("ep4out", USB_DIR_OUT | 4);
2426
2427                 OMAP_BULK_EP("ep5in",  USB_DIR_IN  | 5);
2428                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2429                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2430                 OMAP_BULK_EP("ep6out", USB_DIR_OUT | 6);
2431
2432                 OMAP_BULK_EP("ep7in",  USB_DIR_IN  | 7);
2433                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2434                 OMAP_BULK_EP("ep8in",  USB_DIR_IN  | 8);
2435                 OMAP_BULK_EP("ep8out", USB_DIR_OUT | 8);
2436
2437                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2438                 OMAP_INT_EP("ep10out", USB_DIR_IN  | 10, 16);
2439                 OMAP_INT_EP("ep11in",  USB_DIR_IN  | 9, 16);
2440                 OMAP_INT_EP("ep12out", USB_DIR_IN  | 10, 16);
2441                 break;
2442
2443 #ifdef  USE_ISO
2444         case 2:                 /* mixed iso/bulk */
2445                 OMAP_ISO_EP("ep1in",   USB_DIR_IN  | 1, 256);
2446                 OMAP_ISO_EP("ep2out",  USB_DIR_OUT | 2, 256);
2447                 OMAP_ISO_EP("ep3in",   USB_DIR_IN  | 3, 128);
2448                 OMAP_ISO_EP("ep4out",  USB_DIR_OUT | 4, 128);
2449
2450                 OMAP_INT_EP("ep5in",   USB_DIR_IN  | 5, 16);
2451
2452                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2453                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2454                 OMAP_INT_EP("ep8in",   USB_DIR_IN  | 8, 16);
2455                 break;
2456         case 3:                 /* mixed bulk/iso */
2457                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2458                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2459                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2460
2461                 OMAP_BULK_EP("ep4in",  USB_DIR_IN  | 4);
2462                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2463                 OMAP_INT_EP("ep6in",   USB_DIR_IN  | 6, 16);
2464
2465                 OMAP_ISO_EP("ep7in",   USB_DIR_IN  | 7, 256);
2466                 OMAP_ISO_EP("ep8out",  USB_DIR_OUT | 8, 256);
2467                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2468                 break;
2469 #endif
2470
2471         /* add more modes as needed */
2472
2473         default:
2474                 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2475                 return -ENODEV;
2476         }
2477         UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR;
2478         INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2479         return 0;
2480 }
2481
2482 static int __init omap_udc_probe(struct device *dev)
2483 {
2484         struct platform_device  *odev = to_platform_device(dev);
2485         int                     status = -ENODEV;
2486         int                     hmc;
2487         struct otg_transceiver  *xceiv = 0;
2488         const char              *type = 0;
2489         struct omap_usb_config  *config = dev->platform_data;
2490
2491         /* NOTE:  "knows" the order of the resources! */
2492         if (!request_mem_region(odev->resource[0].start,
2493                         odev->resource[0].end - odev->resource[0].start + 1,
2494                         driver_name)) {
2495                 DBG("request_mem_region failed\n");
2496                 return -EBUSY;
2497         }
2498
2499         INFO("OMAP UDC rev %d.%d, OTG rev %d.%d, %s receptacle\n",
2500                 UDC_REV_REG >> 4, UDC_REV_REG & 0xf,
2501                 OTG_REV_REG >> 4, OTG_REV_REG & 0xf,
2502                 config->otg ? "Mini-AB" : "B/Mini-B");
2503
2504         /* use the mode given to us by board init code */
2505         hmc = HMC;
2506         switch (hmc) {
2507         case 3:
2508         case 11:
2509         case 19:
2510         case 25:
2511                 xceiv = otg_get_transceiver();
2512                 if (!xceiv) {
2513                         DBG("external transceiver not registered!\n");
2514                         goto cleanup0;
2515                 }
2516                 type = xceiv->label;
2517                 break;
2518         case 0:                 /* POWERUP DEFAULT == 0 */
2519         case 4:
2520         case 12:
2521         case 20:
2522                 type = "INTEGRATED";
2523                 break;
2524         case 21:                        /* internal loopback */
2525                 type = "(loopback)";
2526                 break;
2527         case 14:                        /* transceiverless */
2528                 type = "(none)";
2529                 break;
2530
2531         default:
2532                 ERR("unrecognized UDC HMC mode %d\n", hmc);
2533                 return -ENODEV;
2534         }
2535         INFO("hmc mode %d, transceiver %s\n", hmc, type);
2536
2537         /* a "gadget" abstracts/virtualizes the controller */
2538         status = omap_udc_setup(odev, xceiv);
2539         if (status) {
2540                 goto cleanup0;
2541         }
2542         xceiv = 0;
2543         // "udc" is now valid
2544         pullup_disable(udc);
2545         udc->gadget.is_otg = (config->otg != 0);
2546
2547         /* USB general purpose IRQ:  ep0, state changes, dma, etc */
2548         status = request_irq(odev->resource[1].start, omap_udc_irq,
2549                         SA_SAMPLE_RANDOM, driver_name, udc);
2550         if (status != 0) {
2551                 ERR( "can't get irq %ld, err %d\n",
2552                         odev->resource[1].start, status);
2553                 goto cleanup1;
2554         }
2555
2556         /* USB "non-iso" IRQ (PIO for all but ep0) */
2557         status = request_irq(odev->resource[2].start, omap_udc_pio_irq,
2558                         SA_SAMPLE_RANDOM, "omap_udc pio", udc);
2559         if (status != 0) {
2560                 ERR( "can't get irq %ld, err %d\n",
2561                         odev->resource[2].start, status);
2562                 goto cleanup2;
2563         }
2564 #ifdef  USE_ISO
2565         status = request_irq(odev->resource[3].start, omap_udc_iso_irq,
2566                         SA_INTERRUPT, "omap_udc iso", udc);
2567         if (status != 0) {
2568                 ERR("can't get irq %ld, err %d\n",
2569                         odev->resource[3].start, status);
2570                 goto cleanup3;
2571         }
2572 #endif
2573
2574         create_proc_file();
2575         device_add(&udc->gadget.dev);
2576         return 0;
2577
2578 #ifdef  USE_ISO
2579 cleanup3:
2580         free_irq(odev->resource[2].start, udc);
2581 #endif
2582
2583 cleanup2:
2584         free_irq(odev->resource[1].start, udc);
2585
2586 cleanup1:
2587         kfree (udc);
2588         udc = 0;
2589
2590 cleanup0:
2591         if (xceiv)
2592                 put_device(xceiv->dev);
2593         release_mem_region(odev->resource[0].start,
2594                         odev->resource[0].end - odev->resource[0].start + 1);
2595         return status;
2596 }
2597
2598 static int __exit omap_udc_remove(struct device *dev)
2599 {
2600         struct platform_device  *odev = to_platform_device(dev);
2601         DECLARE_COMPLETION(done);
2602
2603         if (!udc)
2604                 return -ENODEV;
2605
2606         udc->done = &done;
2607
2608         pullup_disable(udc);
2609         if (udc->transceiver) {
2610                 put_device(udc->transceiver->dev);
2611                 udc->transceiver = 0;
2612         }
2613         UDC_SYSCON1_REG = 0;
2614
2615         remove_proc_file();
2616
2617 #ifdef  USE_ISO
2618         free_irq(odev->resource[3].start, udc);
2619 #endif
2620         free_irq(odev->resource[2].start, udc);
2621         free_irq(odev->resource[1].start, udc);
2622
2623         release_mem_region(odev->resource[0].start,
2624                         odev->resource[0].end - odev->resource[0].start + 1);
2625
2626         device_unregister(&udc->gadget.dev);
2627         wait_for_completion(&done);
2628
2629         return 0;
2630 }
2631
2632 /* suspend/resume/wakeup from sysfs (echo > power/state) */
2633
2634 static int omap_udc_suspend(struct device *dev, u32 state, u32 level)
2635 {
2636         if (level != 0)
2637                 return 0;
2638
2639         DBG("suspend, state %d\n", state);
2640         omap_pullup(&udc->gadget, 0);
2641         udc->gadget.dev.power.power_state = 3;
2642         udc->gadget.dev.parent->power.power_state = 3;
2643         return 0;
2644 }
2645
2646 static int omap_udc_resume(struct device *dev, u32 level)
2647 {
2648         if (level != 0)
2649                 return 0;
2650
2651         DBG("resume + wakeup/SRP\n");
2652         udc->gadget.dev.parent->power.power_state = 0;
2653         udc->gadget.dev.power.power_state = 0;
2654         omap_pullup(&udc->gadget, 1);
2655
2656         /* maybe the host would enumerate us if we nudged it */
2657         msleep(100);
2658         return omap_wakeup(&udc->gadget);
2659 }
2660
2661 /*-------------------------------------------------------------------------*/
2662
2663 static struct device_driver udc_driver = {
2664         .name           = (char *) driver_name,
2665         .bus            = &platform_bus_type,
2666         .probe          = omap_udc_probe,
2667         .remove         = __exit_p(omap_udc_remove),
2668         .suspend        = omap_udc_suspend,
2669         .resume         = omap_udc_resume,
2670 };
2671
2672 static int __init udc_init(void)
2673 {
2674         /* should work on many OMAP systems with at most minor changes,
2675          * but the 1510 doesn't have an OTG controller.
2676          */
2677         if (cpu_is_omap1510()) {
2678                 DBG("no OMAP1510 support yet\n");
2679                 return -ENODEV;
2680         }
2681         INFO("%s, version: " DRIVER_VERSION "%s\n", driver_desc,
2682                 use_dma ?  " (dma)" : "");
2683         return driver_register(&udc_driver);
2684 }
2685 module_init(udc_init);
2686
2687 static void __exit udc_exit(void)
2688 {
2689         driver_unregister(&udc_driver);
2690 }
2691 module_exit(udc_exit);
2692
2693 MODULE_DESCRIPTION(DRIVER_DESC);
2694 MODULE_LICENSE("GPL");
2695