drivers/usb/host/ehci-sched.c

   1 /*
   2  * Copyright (c) 2001-2004 by David Brownell
   3  * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2 of the License, or (at your
   8  * option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software Foundation,
  17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  */
  19
  20 /* this file is part of ehci-hcd.c */
  21
  22 /*-------------------------------------------------------------------------*/
  23
  24 /*
  25  * EHCI scheduled transaction support:  interrupt, iso, split iso
  26  * These are called "periodic" transactions in the EHCI spec.
  27  *
  28  * Note that for interrupt transfers, the QH/QTD manipulation is shared
  29  * with the "asynchronous" transaction support (control/bulk transfers).
  30  * The only real difference is in how interrupt transfers are scheduled.
  31  *
  32  * For ISO, we make an "iso_stream" head to serve the same role as a QH.
  33  * It keeps track of every ITD (or SITD) that's linked, and holds enough
  34  * pre-calculated schedule data to make appending to the queue be quick.
  35  */
  36
  37 static int ehci_get_frame (struct usb_hcd *hcd);
  38
  39 /*-------------------------------------------------------------------------*/
  40
  41 /*
  42  * periodic_next_shadow - return "next" pointer on shadow list
  43  * @periodic: host pointer to qh/itd/sitd
  44  * @tag: hardware tag for type of this record
  45  */
  46 static union ehci_shadow *
  47 periodic_next_shadow (union ehci_shadow *periodic, __le32 tag)
  48 {
  49         switch (tag) {
  50         case Q_TYPE_QH:
  51                 return &periodic->qh->qh_next;
  52         case Q_TYPE_FSTN:
  53                 return &periodic->fstn->fstn_next;
  54         case Q_TYPE_ITD:
  55                 return &periodic->itd->itd_next;
  56         // case Q_TYPE_SITD:
  57         default:
  58                 return &periodic->sitd->sitd_next;
  59         }
  60 }
  61
  62 /* caller must hold ehci->lock */
  63 static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
  64 {
  65         union ehci_shadow       *prev_p = &ehci->pshadow [frame];
  66         __le32                  *hw_p = &ehci->periodic [frame];
  67         union ehci_shadow       here = *prev_p;
  68
  69         /* find predecessor of "ptr"; hw and shadow lists are in sync */
  70         while (here.ptr && here.ptr != ptr) {
  71                 prev_p = periodic_next_shadow (prev_p, Q_NEXT_TYPE (*hw_p));
  72                 hw_p = here.hw_next;
  73                 here = *prev_p;
  74         }
  75         /* an interrupt entry (at list end) could have been shared */
  76         if (!here.ptr)
  77                 return;
  78
  79         /* update shadow and hardware lists ... the old "next" pointers
  80          * from ptr may still be in use, the caller updates them.
  81          */
  82         *prev_p = *periodic_next_shadow (&here, Q_NEXT_TYPE (*hw_p));
  83         *hw_p = *here.hw_next;
  84 }
  85
  86 /* how many of the uframe's 125 usecs are allocated? */
  87 static unsigned short
  88 periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
  89 {
  90         __le32                  *hw_p = &ehci->periodic [frame];
  91         union ehci_shadow       *q = &ehci->pshadow [frame];
  92         unsigned                usecs = 0;
  93
  94         while (q->ptr) {
  95                 switch (Q_NEXT_TYPE (*hw_p)) {
  96                 case Q_TYPE_QH:
  97                         /* is it in the S-mask? */
  98                         if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe))
  99                                 usecs += q->qh->usecs;
 100                         /* ... or C-mask? */
 101                         if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe)))
 102                                 usecs += q->qh->c_usecs;
 103                         hw_p = &q->qh->hw_next;
 104                         q = &q->qh->qh_next;
 105                         break;
 106                 // case Q_TYPE_FSTN:
 107                 default:
 108                         /* for "save place" FSTNs, count the relevant INTR
 109                          * bandwidth from the previous frame
 110                          */
 111                         if (q->fstn->hw_prev != EHCI_LIST_END) {
 112                                 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
 113                         }
 114                         hw_p = &q->fstn->hw_next;
 115                         q = &q->fstn->fstn_next;
 116                         break;
 117                 case Q_TYPE_ITD:
 118                         usecs += q->itd->usecs [uframe];
 119                         hw_p = &q->itd->hw_next;
 120                         q = &q->itd->itd_next;
 121                         break;
 122                 case Q_TYPE_SITD:
 123                         /* is it in the S-mask?  (count SPLIT, DATA) */
 124                         if (q->sitd->hw_uframe & cpu_to_le32 (1 << uframe)) {
 125                                 if (q->sitd->hw_fullspeed_ep &
 126                                                 __constant_cpu_to_le32 (1<<31))
 127                                         usecs += q->sitd->stream->usecs;
 128                                 else    /* worst case for OUT start-split */
 129                                         usecs += HS_USECS_ISO (188);
 130                         }
 131
 132                         /* ... C-mask?  (count CSPLIT, DATA) */
 133                         if (q->sitd->hw_uframe &
 134                                         cpu_to_le32 (1 << (8 + uframe))) {
 135                                 /* worst case for IN complete-split */
 136                                 usecs += q->sitd->stream->c_usecs;
 137                         }
 138
 139                         hw_p = &q->sitd->hw_next;
 140                         q = &q->sitd->sitd_next;
 141                         break;
 142                 }
 143         }
 144 #ifdef  DEBUG
 145         if (usecs > 100)
 146                 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
 147                         frame * 8 + uframe, usecs);
 148 #endif
 149         return usecs;
 150 }
 151
 152 /*-------------------------------------------------------------------------*/
 153
 154 static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
 155 {
 156         if (!dev1->tt || !dev2->tt)
 157                 return 0;
 158         if (dev1->tt != dev2->tt)
 159                 return 0;
 160         if (dev1->tt->multi)
 161                 return dev1->ttport == dev2->ttport;
 162         else
 163                 return 1;
 164 }
 165
 166 /* return true iff the device's transaction translator is available
 167  * for a periodic transfer starting at the specified frame, using
 168  * all the uframes in the mask.
 169  */
 170 static int tt_no_collision (
 171         struct ehci_hcd         *ehci,
 172         unsigned                period,
 173         struct usb_device       *dev,
 174         unsigned                frame,
 175         u32                     uf_mask
 176 )
 177 {
 178         if (period == 0)        /* error */
 179                 return 0;
 180
 181         /* note bandwidth wastage:  split never follows csplit
 182          * (different dev or endpoint) until the next uframe.
 183          * calling convention doesn't make that distinction.
 184          */
 185         for (; frame < ehci->periodic_size; frame += period) {
 186                 union ehci_shadow       here;
 187                 __le32                  type;
 188
 189                 here = ehci->pshadow [frame];
 190                 type = Q_NEXT_TYPE (ehci->periodic [frame]);
 191                 while (here.ptr) {
 192                         switch (type) {
 193                         case Q_TYPE_ITD:
 194                                 type = Q_NEXT_TYPE (here.itd->hw_next);
 195                                 here = here.itd->itd_next;
 196                                 continue;
 197                         case Q_TYPE_QH:
 198                                 if (same_tt (dev, here.qh->dev)) {
 199                                         u32             mask;
 200
 201                                         mask = le32_to_cpu (here.qh->hw_info2);
 202                                         /* "knows" no gap is needed */
 203                                         mask |= mask >> 8;
 204                                         if (mask & uf_mask)
 205                                                 break;
 206                                 }
 207                                 type = Q_NEXT_TYPE (here.qh->hw_next);
 208                                 here = here.qh->qh_next;
 209                                 continue;
 210                         case Q_TYPE_SITD:
 211                                 if (same_tt (dev, here.itd->urb->dev)) {
 212                                         u16             mask;
 213
 214                                         mask = le32_to_cpu (here.sitd
 215                                                                 ->hw_uframe);
 216                                         /* FIXME assumes no gap for IN! */
 217                                         mask |= mask >> 8;
 218                                         if (mask & uf_mask)
 219                                                 break;
 220                                 }
 221                                 type = Q_NEXT_TYPE (here.qh->hw_next);
 222                                 here = here.sitd->sitd_next;
 223                                 continue;
 224                         // case Q_TYPE_FSTN:
 225                         default:
 226                                 ehci_dbg (ehci,
 227                                         "periodic frame %d bogus type %d\n",
 228                                         frame, type);
 229                         }
 230
 231                         /* collision or error */
 232                         return 0;
 233                 }
 234         }
 235
 236         /* no collision */
 237         return 1;
 238 }
 239
 240 /*-------------------------------------------------------------------------*/
 241
 242 static int enable_periodic (struct ehci_hcd *ehci)
 243 {
 244         u32     cmd;
 245         int     status;
 246
 247         /* did clearing PSE did take effect yet?
 248          * takes effect only at frame boundaries...
 249          */
 250         status = handshake (&ehci->regs->status, STS_PSS, 0, 9 * 125);
 251         if (status != 0) {
 252                 ehci_to_hcd(ehci)->state = USB_STATE_HALT;
 253                 return status;
 254         }
 255
 256         cmd = readl (&ehci->regs->command) | CMD_PSE;
 257         writel (cmd, &ehci->regs->command);
 258         /* posted write ... PSS happens later */
 259         ehci_to_hcd(ehci)->state = USB_STATE_RUNNING;
 260
 261         /* make sure ehci_work scans these */
 262         ehci->next_uframe = readl (&ehci->regs->frame_index)
 263                                 % (ehci->periodic_size << 3);
 264         return 0;
 265 }
 266
 267 static int disable_periodic (struct ehci_hcd *ehci)
 268 {
 269         u32     cmd;
 270         int     status;
 271
 272         /* did setting PSE not take effect yet?
 273          * takes effect only at frame boundaries...
 274          */
 275         status = handshake (&ehci->regs->status, STS_PSS, STS_PSS, 9 * 125);
 276         if (status != 0) {
 277                 ehci_to_hcd(ehci)->state = USB_STATE_HALT;
 278                 return status;
 279         }
 280
 281         cmd = readl (&ehci->regs->command) & ~CMD_PSE;
 282         writel (cmd, &ehci->regs->command);
 283         /* posted write ... */
 284
 285         ehci->next_uframe = -1;
 286         return 0;
 287 }
 288
 289 /*-------------------------------------------------------------------------*/
 290
 291 /* periodic schedule slots have iso tds (normal or split) first, then a
 292  * sparse tree for active interrupt transfers.
 293  *
 294  * this just links in a qh; caller guarantees uframe masks are set right.
 295  * no FSTN support (yet; ehci 0.96+)
 296  */
 297 static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
 298 {
 299         unsigned        i;
 300         unsigned        period = qh->period;
 301
 302         dev_dbg (&qh->dev->dev,
 303                 "link qh%d-%04x/%p start %d [%d/%d us]\n",
 304                 period, le32_to_cpup (&qh->hw_info2) & 0xffff,
 305                 qh, qh->start, qh->usecs, qh->c_usecs);
 306
 307         /* high bandwidth, or otherwise every microframe */
 308         if (period == 0)
 309                 period = 1;
 310
 311         for (i = qh->start; i < ehci->periodic_size; i += period) {
 312                 union ehci_shadow       *prev = &ehci->pshadow [i];
 313                 u32                     *hw_p = &ehci->periodic [i];
 314                 union ehci_shadow       here = *prev;
 315                 u32                     type = 0;
 316
 317                 /* skip the iso nodes at list head */
 318                 while (here.ptr) {
 319                         type = Q_NEXT_TYPE (*hw_p);
 320                         if (type == Q_TYPE_QH)
 321                                 break;
 322                         prev = periodic_next_shadow (prev, type);
 323                         hw_p = &here.qh->hw_next;
 324                         here = *prev;
 325                 }
 326
 327                 /* sorting each branch by period (slow-->fast)
 328                  * enables sharing interior tree nodes
 329                  */
 330                 while (here.ptr && qh != here.qh) {
 331                         if (qh->period > here.qh->period)
 332                                 break;
 333                         prev = &here.qh->qh_next;
 334                         hw_p = &here.qh->hw_next;
 335                         here = *prev;
 336                 }
 337                 /* link in this qh, unless some earlier pass did that */
 338                 if (qh != here.qh) {
 339                         qh->qh_next = here;
 340                         if (here.qh)
 341                                 qh->hw_next = *hw_p;
 342                         wmb ();
 343                         prev->qh = qh;
 344                         *hw_p = QH_NEXT (qh->qh_dma);
 345                 }
 346         }
 347         qh->qh_state = QH_STATE_LINKED;
 348         qh_get (qh);
 349
 350         /* update per-qh bandwidth for usbfs */
 351         ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
 352                 ? ((qh->usecs + qh->c_usecs) / qh->period)
 353                 : (qh->usecs * 8);
 354
 355         /* maybe enable periodic schedule processing */
 356         if (!ehci->periodic_sched++)
 357                 return enable_periodic (ehci);
 358
 359         return 0;
 360 }
 361
 362 static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
 363 {
 364         unsigned        i;
 365         unsigned        period;
 366
 367         // FIXME:
 368         // IF this isn't high speed
 369         //   and this qh is active in the current uframe
 370         //   (and overlay token SplitXstate is false?)
 371         // THEN
 372         //   qh->hw_info1 |= __constant_cpu_to_le32 (1 << 7 /* "ignore" */);
 373
 374         /* high bandwidth, or otherwise part of every microframe */
 375         if ((period = qh->period) == 0)
 376                 period = 1;
 377
 378         for (i = qh->start; i < ehci->periodic_size; i += period)
 379                 periodic_unlink (ehci, i, qh);
 380
 381         /* update per-qh bandwidth for usbfs */
 382         ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
 383                 ? ((qh->usecs + qh->c_usecs) / qh->period)
 384                 : (qh->usecs * 8);
 385
 386         dev_dbg (&qh->dev->dev,
 387                 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
 388                 qh->period, le32_to_cpup (&qh->hw_info2) & 0xffff,
 389                 qh, qh->start, qh->usecs, qh->c_usecs);
 390
 391         /* qh->qh_next still "live" to HC */
 392         qh->qh_state = QH_STATE_UNLINK;
 393         qh->qh_next.ptr = NULL;
 394         qh_put (qh);
 395
 396         /* maybe turn off periodic schedule */
 397         ehci->periodic_sched--;
 398         if (!ehci->periodic_sched)
 399                 (void) disable_periodic (ehci);
 400 }
 401
 402 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
 403 {
 404         unsigned        wait;
 405
 406         qh_unlink_periodic (ehci, qh);
 407
 408         /* simple/paranoid:  always delay, expecting the HC needs to read
 409          * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
 410          * expect khubd to clean up after any CSPLITs we won't issue.
 411          * active high speed queues may need bigger delays...
 412          */
 413         if (list_empty (&qh->qtd_list)
 414                         || (__constant_cpu_to_le32 (0x0ff << 8)
 415                                         & qh->hw_info2) != 0)
 416                 wait = 2;
 417         else
 418                 wait = 55;      /* worst case: 3 * 1024 */
 419
 420         udelay (wait);
 421         qh->qh_state = QH_STATE_IDLE;
 422         qh->hw_next = EHCI_LIST_END;
 423         wmb ();
 424 }
 425
 426 /*-------------------------------------------------------------------------*/
 427
 428 static int check_period (
 429         struct ehci_hcd *ehci,
 430         unsigned        frame,
 431         unsigned        uframe,
 432         unsigned        period,
 433         unsigned        usecs
 434 ) {
 435         int             claimed;
 436
 437         /* complete split running into next frame?
 438          * given FSTN support, we could sometimes check...
 439          */
 440         if (uframe >= 8)
 441                 return 0;
 442
 443         /*
 444          * 80% periodic == 100 usec/uframe available
 445          * convert "usecs we need" to "max already claimed"
 446          */
 447         usecs = 100 - usecs;
 448
 449         /* we "know" 2 and 4 uframe intervals were rejected; so
 450          * for period 0, check _every_ microframe in the schedule.
 451          */
 452         if (unlikely (period == 0)) {
 453                 do {
 454                         for (uframe = 0; uframe < 7; uframe++) {
 455                                 claimed = periodic_usecs (ehci, frame, uframe);
 456                                 if (claimed > usecs)
 457                                         return 0;
 458                         }
 459                 } while ((frame += 1) < ehci->periodic_size);
 460
 461         /* just check the specified uframe, at that period */
 462         } else {
 463                 do {
 464                         claimed = periodic_usecs (ehci, frame, uframe);
 465                         if (claimed > usecs)
 466                                 return 0;
 467                 } while ((frame += period) < ehci->periodic_size);
 468         }
 469
 470         // success!
 471         return 1;
 472 }
 473
 474 static int check_intr_schedule (
 475         struct ehci_hcd         *ehci,
 476         unsigned                frame,
 477         unsigned                uframe,
 478         const struct ehci_qh    *qh,
 479         __le32                  *c_maskp
 480 )
 481 {
 482         int             retval = -ENOSPC;
 483         u8              mask;
 484
 485         if (qh->c_usecs && uframe >= 6)         /* FSTN territory? */
 486                 goto done;
 487
 488         if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
 489                 goto done;
 490         if (!qh->c_usecs) {
 491                 retval = 0;
 492                 *c_maskp = 0;
 493                 goto done;
 494         }
 495
 496         /* Make sure this tt's buffer is also available for CSPLITs.
 497          * We pessimize a bit; probably the typical full speed case
 498          * doesn't need the second CSPLIT.
 499          *
 500          * NOTE:  both SPLIT and CSPLIT could be checked in just
 501          * one smart pass...
 502          */
 503         mask = 0x03 << (uframe + qh->gap_uf);
 504         *c_maskp = cpu_to_le32 (mask << 8);
 505
 506         mask |= 1 << uframe;
 507         if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
 508                 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
 509                                         qh->period, qh->c_usecs))
 510                         goto done;
 511                 if (!check_period (ehci, frame, uframe + qh->gap_uf,
 512                                         qh->period, qh->c_usecs))
 513                         goto done;
 514                 retval = 0;
 515         }
 516 done:
 517         return retval;
 518 }
 519
 520 /* "first fit" scheduling policy used the first time through,
 521  * or when the previous schedule slot can't be re-used.
 522  */
 523 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
 524 {
 525         int             status;
 526         unsigned        uframe;
 527         __le32          c_mask;
 528         unsigned        frame;          /* 0..(qh->period - 1), or NO_FRAME */
 529
 530         qh_refresh(ehci, qh);
 531         qh->hw_next = EHCI_LIST_END;
 532         frame = qh->start;
 533
 534         /* reuse the previous schedule slots, if we can */
 535         if (frame < qh->period) {
 536                 uframe = ffs (le32_to_cpup (&qh->hw_info2) & 0x00ff);
 537                 status = check_intr_schedule (ehci, frame, --uframe,
 538                                 qh, &c_mask);
 539         } else {
 540                 uframe = 0;
 541                 c_mask = 0;
 542                 status = -ENOSPC;
 543         }
 544
 545         /* else scan the schedule to find a group of slots such that all
 546          * uframes have enough periodic bandwidth available.
 547          */
 548         if (status) {
 549                 /* "normal" case, uframing flexible except with splits */
 550                 if (qh->period) {
 551                         frame = qh->period - 1;
 552                         do {
 553                                 for (uframe = 0; uframe < 8; uframe++) {
 554                                         status = check_intr_schedule (ehci,
 555                                                         frame, uframe, qh,
 556                                                         &c_mask);
 557                                         if (status == 0)
 558                                                 break;
 559                                 }
 560                         } while (status && frame--);
 561
 562                 /* qh->period == 0 means every uframe */
 563                 } else {
 564                         frame = 0;
 565                         status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
 566                 }
 567                 if (status)
 568                         goto done;
 569                 qh->start = frame;
 570
 571                 /* reset S-frame and (maybe) C-frame masks */
 572                 qh->hw_info2 &= __constant_cpu_to_le32 (~0xffff);
 573                 qh->hw_info2 |= qh->period
 574                         ? cpu_to_le32 (1 << uframe)
 575                         : __constant_cpu_to_le32 (0xff);
 576                 qh->hw_info2 |= c_mask;
 577         } else
 578                 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
 579
 580         /* stuff into the periodic schedule */
 581         status = qh_link_periodic (ehci, qh);
 582 done:
 583         return status;
 584 }
 585
 586 static int intr_submit (
 587         struct ehci_hcd         *ehci,
 588         struct usb_host_endpoint *ep,
 589         struct urb              *urb,
 590         struct list_head        *qtd_list,
 591         int                     mem_flags
 592 ) {
 593         unsigned                epnum;
 594         unsigned long           flags;
 595         struct ehci_qh          *qh;
 596         int                     status = 0;
 597         struct list_head        empty;
 598
 599         /* get endpoint and transfer/schedule data */
 600         epnum = ep->desc.bEndpointAddress;
 601
 602         spin_lock_irqsave (&ehci->lock, flags);
 603
 604         /* get qh and force any scheduling errors */
 605         INIT_LIST_HEAD (&empty);
 606         qh = qh_append_tds (ehci, urb, &empty, epnum, &ep->hcpriv);
 607         if (qh == NULL) {
 608                 status = -ENOMEM;
 609                 goto done;
 610         }
 611         if (qh->qh_state == QH_STATE_IDLE) {
 612                 if ((status = qh_schedule (ehci, qh)) != 0)
 613                         goto done;
 614         }
 615
 616         /* then queue the urb's tds to the qh */
 617         qh = qh_append_tds (ehci, urb, qtd_list, epnum, &ep->hcpriv);
 618         BUG_ON (qh == NULL);
 619
 620         /* ... update usbfs periodic stats */
 621         ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
 622
 623 done:
 624         spin_unlock_irqrestore (&ehci->lock, flags);
 625         if (status)
 626                 qtd_list_free (ehci, urb, qtd_list);
 627
 628         return status;
 629 }
 630
 631 /*-------------------------------------------------------------------------*/
 632
 633 /* ehci_iso_stream ops work with both ITD and SITD */
 634
 635 static struct ehci_iso_stream *
 636 iso_stream_alloc (int mem_flags)
 637 {
 638         struct ehci_iso_stream *stream;
 639
 640         stream = kmalloc(sizeof *stream, mem_flags);
 641         if (likely (stream != NULL)) {
 642                 memset (stream, 0, sizeof(*stream));
 643                 INIT_LIST_HEAD(&stream->td_list);
 644                 INIT_LIST_HEAD(&stream->free_list);
 645                 stream->next_uframe = -1;
 646                 stream->refcount = 1;
 647         }
 648         return stream;
 649 }
 650
 651 static void
 652 iso_stream_init (
 653         struct ehci_iso_stream  *stream,
 654         struct usb_device       *dev,
 655         int                     pipe,
 656         unsigned                interval
 657 )
 658 {
 659         static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
 660
 661         u32                     buf1;
 662         unsigned                epnum, maxp;
 663         int                     is_input;
 664         long                    bandwidth;
 665
 666         /*
 667          * this might be a "high bandwidth" highspeed endpoint,
 668          * as encoded in the ep descriptor's wMaxPacket field
 669          */
 670         epnum = usb_pipeendpoint (pipe);
 671         is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
 672         maxp = usb_maxpacket(dev, pipe, !is_input);
 673         if (is_input) {
 674                 buf1 = (1 << 11);
 675         } else {
 676                 buf1 = 0;
 677         }
 678
 679         /* knows about ITD vs SITD */
 680         if (dev->speed == USB_SPEED_HIGH) {
 681                 unsigned multi = hb_mult(maxp);
 682
 683                 stream->highspeed = 1;
 684
 685                 maxp = max_packet(maxp);
 686                 buf1 |= maxp;
 687                 maxp *= multi;
 688
 689                 stream->buf0 = cpu_to_le32 ((epnum << 8) | dev->devnum);
 690                 stream->buf1 = cpu_to_le32 (buf1);
 691                 stream->buf2 = cpu_to_le32 (multi);
 692
 693                 /* usbfs wants to report the average usecs per frame tied up
 694                  * when transfers on this endpoint are scheduled ...
 695                  */
 696                 stream->usecs = HS_USECS_ISO (maxp);
 697                 bandwidth = stream->usecs * 8;
 698                 bandwidth /= 1 << (interval - 1);
 699
 700         } else {
 701                 u32             addr;
 702
 703                 addr = dev->ttport << 24;
 704                 addr |= dev->tt->hub->devnum << 16;
 705                 addr |= epnum << 8;
 706                 addr |= dev->devnum;
 707                 stream->usecs = HS_USECS_ISO (maxp);
 708                 if (is_input) {
 709                         u32     tmp;
 710
 711                         addr |= 1 << 31;
 712                         stream->c_usecs = stream->usecs;
 713                         stream->usecs = HS_USECS_ISO (1);
 714                         stream->raw_mask = 1;
 715
 716                         /* pessimistic c-mask */
 717                         tmp = usb_calc_bus_time (USB_SPEED_FULL, 1, 0, maxp)
 718                                         / (125 * 1000);
 719                         stream->raw_mask |= 3 << (tmp + 9);
 720                 } else
 721                         stream->raw_mask = smask_out [maxp / 188];
 722                 bandwidth = stream->usecs + stream->c_usecs;
 723                 bandwidth /= 1 << (interval + 2);
 724
 725                 /* stream->splits gets created from raw_mask later */
 726                 stream->address = cpu_to_le32 (addr);
 727         }
 728         stream->bandwidth = bandwidth;
 729
 730         stream->udev = dev;
 731
 732         stream->bEndpointAddress = is_input | epnum;
 733         stream->interval = interval;
 734         stream->maxp = maxp;
 735 }
 736
 737 static void
 738 iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
 739 {
 740         stream->refcount--;
 741
 742         /* free whenever just a dev->ep reference remains.
 743          * not like a QH -- no persistent state (toggle, halt)
 744          */
 745         if (stream->refcount == 1) {
 746                 int             is_in;
 747
 748                 // BUG_ON (!list_empty(&stream->td_list));
 749
 750                 while (!list_empty (&stream->free_list)) {
 751                         struct list_head        *entry;
 752
 753                         entry = stream->free_list.next;
 754                         list_del (entry);
 755
 756                         /* knows about ITD vs SITD */
 757                         if (stream->highspeed) {
 758                                 struct ehci_itd         *itd;
 759
 760                                 itd = list_entry (entry, struct ehci_itd,
 761                                                 itd_list);
 762                                 dma_pool_free (ehci->itd_pool, itd,
 763                                                 itd->itd_dma);
 764                         } else {
 765                                 struct ehci_sitd        *sitd;
 766
 767                                 sitd = list_entry (entry, struct ehci_sitd,
 768                                                 sitd_list);
 769                                 dma_pool_free (ehci->sitd_pool, sitd,
 770                                                 sitd->sitd_dma);
 771                         }
 772                 }
 773
 774                 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
 775                 stream->bEndpointAddress &= 0x0f;
 776                 stream->ep->hcpriv = NULL;
 777
 778                 if (stream->rescheduled) {
 779                         ehci_info (ehci, "ep%d%s-iso rescheduled "
 780                                 "%lu times in %lu seconds\n",
 781                                 stream->bEndpointAddress, is_in ? "in" : "out",
 782                                 stream->rescheduled,
 783                                 ((jiffies - stream->start)/HZ)
 784                                 );
 785                 }
 786
 787                 kfree(stream);
 788         }
 789 }
 790
 791 static inline struct ehci_iso_stream *
 792 iso_stream_get (struct ehci_iso_stream *stream)
 793 {
 794         if (likely (stream != NULL))
 795                 stream->refcount++;
 796         return stream;
 797 }
 798
 799 static struct ehci_iso_stream *
 800 iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
 801 {
 802         unsigned                epnum;
 803         struct ehci_iso_stream  *stream;
 804         struct usb_host_endpoint *ep;
 805         unsigned long           flags;
 806
 807         epnum = usb_pipeendpoint (urb->pipe);
 808         if (usb_pipein(urb->pipe))
 809                 ep = urb->dev->ep_in[epnum];
 810         else
 811                 ep = urb->dev->ep_out[epnum];
 812
 813         spin_lock_irqsave (&ehci->lock, flags);
 814         stream = ep->hcpriv;
 815
 816         if (unlikely (stream == NULL)) {
 817                 stream = iso_stream_alloc(GFP_ATOMIC);
 818                 if (likely (stream != NULL)) {
 819                         /* dev->ep owns the initial refcount */
 820                         ep->hcpriv = stream;
 821                         stream->ep = ep;
 822                         iso_stream_init(stream, urb->dev, urb->pipe,
 823                                         urb->interval);
 824                 }
 825
 826         /* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */
 827         } else if (unlikely (stream->hw_info1 != 0)) {
 828                 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
 829                         urb->dev->devpath, epnum,
 830                         usb_pipein(urb->pipe) ? "in" : "out");
 831                 stream = NULL;
 832         }
 833
 834         /* caller guarantees an eventual matching iso_stream_put */
 835         stream = iso_stream_get (stream);
 836
 837         spin_unlock_irqrestore (&ehci->lock, flags);
 838         return stream;
 839 }
 840
 841 /*-------------------------------------------------------------------------*/
 842
 843 /* ehci_iso_sched ops can be ITD-only or SITD-only */
 844
 845 static struct ehci_iso_sched *
 846 iso_sched_alloc (unsigned packets, int mem_flags)
 847 {
 848         struct ehci_iso_sched   *iso_sched;
 849         int                     size = sizeof *iso_sched;
 850
 851         size += packets * sizeof (struct ehci_iso_packet);
 852         iso_sched = kmalloc (size, mem_flags);
 853         if (likely (iso_sched != NULL)) {
 854                 memset(iso_sched, 0, size);
 855                 INIT_LIST_HEAD (&iso_sched->td_list);
 856         }
 857         return iso_sched;
 858 }
 859
 860 static inline void
 861 itd_sched_init (
 862         struct ehci_iso_sched   *iso_sched,
 863         struct ehci_iso_stream  *stream,
 864         struct urb              *urb
 865 )
 866 {
 867         unsigned        i;
 868         dma_addr_t      dma = urb->transfer_dma;
 869
 870         /* how many uframes are needed for these transfers */
 871         iso_sched->span = urb->number_of_packets * stream->interval;
 872
 873         /* figure out per-uframe itd fields that we'll need later
 874          * when we fit new itds into the schedule.
 875          */
 876         for (i = 0; i < urb->number_of_packets; i++) {
 877                 struct ehci_iso_packet  *uframe = &iso_sched->packet [i];
 878                 unsigned                length;
 879                 dma_addr_t              buf;
 880                 u32                     trans;
 881
 882                 length = urb->iso_frame_desc [i].length;
 883                 buf = dma + urb->iso_frame_desc [i].offset;
 884
 885                 trans = EHCI_ISOC_ACTIVE;
 886                 trans |= buf & 0x0fff;
 887                 if (unlikely (((i + 1) == urb->number_of_packets))
 888                                 && !(urb->transfer_flags & URB_NO_INTERRUPT))
 889                         trans |= EHCI_ITD_IOC;
 890                 trans |= length << 16;
 891                 uframe->transaction = cpu_to_le32 (trans);
 892
 893                 /* might need to cross a buffer page within a td */
 894                 uframe->bufp = (buf & ~(u64)0x0fff);
 895                 buf += length;
 896                 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
 897                         uframe->cross = 1;
 898         }
 899 }
 900
 901 static void
 902 iso_sched_free (
 903         struct ehci_iso_stream  *stream,
 904         struct ehci_iso_sched   *iso_sched
 905 )
 906 {
 907         if (!iso_sched)
 908                 return;
 909         // caller must hold ehci->lock!
 910         list_splice (&iso_sched->td_list, &stream->free_list);
 911         kfree (iso_sched);
 912 }
 913
 914 static int
 915 itd_urb_transaction (
 916         struct ehci_iso_stream  *stream,
 917         struct ehci_hcd         *ehci,
 918         struct urb              *urb,
 919         int                     mem_flags
 920 )
 921 {
 922         struct ehci_itd         *itd;
 923         dma_addr_t              itd_dma;
 924         int                     i;
 925         unsigned                num_itds;
 926         struct ehci_iso_sched   *sched;
 927         unsigned long           flags;
 928
 929         sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
 930         if (unlikely (sched == NULL))
 931                 return -ENOMEM;
 932
 933         itd_sched_init (sched, stream, urb);
 934
 935         if (urb->interval < 8)
 936                 num_itds = 1 + (sched->span + 7) / 8;
 937         else
 938                 num_itds = urb->number_of_packets;
 939
 940         /* allocate/init ITDs */
 941         spin_lock_irqsave (&ehci->lock, flags);
 942         for (i = 0; i < num_itds; i++) {
 943
 944                 /* free_list.next might be cache-hot ... but maybe
 945                  * the HC caches it too. avoid that issue for now.
 946                  */
 947
 948                 /* prefer previously-allocated itds */
 949                 if (likely (!list_empty(&stream->free_list))) {
 950                         itd = list_entry (stream->free_list.prev,
 951                                          struct ehci_itd, itd_list);
 952                         list_del (&itd->itd_list);
 953                         itd_dma = itd->itd_dma;
 954                 } else
 955                         itd = NULL;
 956
 957                 if (!itd) {
 958                         spin_unlock_irqrestore (&ehci->lock, flags);
 959                         itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
 960                                         &itd_dma);
 961                         spin_lock_irqsave (&ehci->lock, flags);
 962                 }
 963
 964                 if (unlikely (NULL == itd)) {
 965                         iso_sched_free (stream, sched);
 966                         spin_unlock_irqrestore (&ehci->lock, flags);
 967                         return -ENOMEM;
 968                 }
 969                 memset (itd, 0, sizeof *itd);
 970                 itd->itd_dma = itd_dma;
 971                 list_add (&itd->itd_list, &sched->td_list);
 972         }
 973         spin_unlock_irqrestore (&ehci->lock, flags);
 974
 975         /* temporarily store schedule info in hcpriv */
 976         urb->hcpriv = sched;
 977         urb->error_count = 0;
 978         return 0;
 979 }
 980
 981 /*-------------------------------------------------------------------------*/
 982
 983 static inline int
 984 itd_slot_ok (
 985         struct ehci_hcd         *ehci,
 986         u32                     mod,
 987         u32                     uframe,
 988         u8                      usecs,
 989         u32                     period
 990 )
 991 {
 992         uframe %= period;
 993         do {
 994                 /* can't commit more than 80% periodic == 100 usec */
 995                 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
 996                                 > (100 - usecs))
 997                         return 0;
 998
 999                 /* we know urb->interval is 2^N uframes */
1000                 uframe += period;
1001         } while (uframe < mod);
1002         return 1;
1003 }
1004
1005 static inline int
1006 sitd_slot_ok (
1007         struct ehci_hcd         *ehci,
1008         u32                     mod,
1009         struct ehci_iso_stream  *stream,
1010         u32                     uframe,
1011         struct ehci_iso_sched   *sched,
1012         u32                     period_uframes
1013 )
1014 {
1015         u32                     mask, tmp;
1016         u32                     frame, uf;
1017
1018         mask = stream->raw_mask << (uframe & 7);
1019
1020         /* for IN, don't wrap CSPLIT into the next frame */
1021         if (mask & ~0xffff)
1022                 return 0;
1023
1024         /* this multi-pass logic is simple, but performance may
1025          * suffer when the schedule data isn't cached.
1026          */
1027
1028         /* check bandwidth */
1029         uframe %= period_uframes;
1030         do {
1031                 u32             max_used;
1032
1033                 frame = uframe >> 3;
1034                 uf = uframe & 7;
1035
1036                 /* tt must be idle for start(s), any gap, and csplit.
1037                  * assume scheduling slop leaves 10+% for control/bulk.
1038                  */
1039                 if (!tt_no_collision (ehci, period_uframes << 3,
1040                                 stream->udev, frame, mask))
1041                         return 0;
1042
1043                 /* check starts (OUT uses more than one) */
1044                 max_used = 100 - stream->usecs;
1045                 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1046                         if (periodic_usecs (ehci, frame, uf) > max_used)
1047                                 return 0;
1048                 }
1049
1050                 /* for IN, check CSPLIT */
1051                 if (stream->c_usecs) {
1052                         max_used = 100 - stream->c_usecs;
1053                         do {
1054                                 tmp = 1 << uf;
1055                                 tmp <<= 8;
1056                                 if ((stream->raw_mask & tmp) == 0)
1057                                         continue;
1058                                 if (periodic_usecs (ehci, frame, uf)
1059                                                 > max_used)
1060                                         return 0;
1061                         } while (++uf < 8);
1062                 }
1063
1064                 /* we know urb->interval is 2^N uframes */
1065                 uframe += period_uframes;
1066         } while (uframe < mod);
1067
1068         stream->splits = cpu_to_le32(stream->raw_mask << (uframe & 7));
1069         return 1;
1070 }
1071
1072 /*
1073  * This scheduler plans almost as far into the future as it has actual
1074  * periodic schedule slots.  (Affected by TUNE_FLS, which defaults to
1075  * "as small as possible" to be cache-friendlier.)  That limits the size
1076  * transfers you can stream reliably; avoid more than 64 msec per urb.
1077  * Also avoid queue depths of less than ehci's worst irq latency (affected
1078  * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1079  * and other factors); or more than about 230 msec total (for portability,
1080  * given EHCI_TUNE_FLS and the slop).  Or, write a smarter scheduler!
1081  */
1082
1083 #define SCHEDULE_SLOP   10      /* frames */
1084
1085 static int
1086 iso_stream_schedule (
1087         struct ehci_hcd         *ehci,
1088         struct urb              *urb,
1089         struct ehci_iso_stream  *stream
1090 )
1091 {
1092         u32                     now, start, max, period;
1093         int                     status;
1094         unsigned                mod = ehci->periodic_size << 3;
1095         struct ehci_iso_sched   *sched = urb->hcpriv;
1096
1097         if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
1098                 ehci_dbg (ehci, "iso request %p too long\n", urb);
1099                 status = -EFBIG;
1100                 goto fail;
1101         }
1102
1103         if ((stream->depth + sched->span) > mod) {
1104                 ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
1105                         urb, stream->depth, sched->span, mod);
1106                 status = -EFBIG;
1107                 goto fail;
1108         }
1109
1110         now = readl (&ehci->regs->frame_index) % mod;
1111
1112         /* when's the last uframe this urb could start? */
1113         max = now + mod;
1114
1115         /* typical case: reuse current schedule. stream is still active,
1116          * and no gaps from host falling behind (irq delays etc)
1117          */
1118         if (likely (!list_empty (&stream->td_list))) {
1119                 start = stream->next_uframe;
1120                 if (start < now)
1121                         start += mod;
1122                 if (likely ((start + sched->span) < max))
1123                         goto ready;
1124                 /* else fell behind; someday, try to reschedule */
1125                 status = -EL2NSYNC;
1126                 goto fail;
1127         }
1128
1129         /* need to schedule; when's the next (u)frame we could start?
1130          * this is bigger than ehci->i_thresh allows; scheduling itself
1131          * isn't free, the slop should handle reasonably slow cpus.  it
1132          * can also help high bandwidth if the dma and irq loads don't
1133          * jump until after the queue is primed.
1134          */
1135         start = SCHEDULE_SLOP * 8 + (now & ~0x07);
1136         start %= mod;
1137         stream->next_uframe = start;
1138
1139         /* NOTE:  assumes URB_ISO_ASAP, to limit complexity/bugs */
1140
1141         period = urb->interval;
1142         if (!stream->highspeed)
1143                 period <<= 3;
1144
1145         /* find a uframe slot with enough bandwidth */
1146         for (; start < (stream->next_uframe + period); start++) {
1147                 int             enough_space;
1148
1149                 /* check schedule: enough space? */
1150                 if (stream->highspeed)
1151                         enough_space = itd_slot_ok (ehci, mod, start,
1152                                         stream->usecs, period);
1153                 else {
1154                         if ((start % 8) >= 6)
1155                                 continue;
1156                         enough_space = sitd_slot_ok (ehci, mod, stream,
1157                                         start, sched, period);
1158                 }
1159
1160                 /* schedule it here if there's enough bandwidth */
1161                 if (enough_space) {
1162                         stream->next_uframe = start % mod;
1163                         goto ready;
1164                 }
1165         }
1166
1167         /* no room in the schedule */
1168         ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
1169                 list_empty (&stream->td_list) ? "" : "re",
1170                 urb, now, max);
1171         status = -ENOSPC;
1172
1173 fail:
1174         iso_sched_free (stream, sched);
1175         urb->hcpriv = NULL;
1176         return status;
1177
1178 ready:
1179         urb->start_frame = stream->next_uframe;
1180         return 0;
1181 }
1182
1183 /*-------------------------------------------------------------------------*/
1184
1185 static inline void
1186 itd_init (struct ehci_iso_stream *stream, struct ehci_itd *itd)
1187 {
1188         int i;
1189
1190         itd->hw_next = EHCI_LIST_END;
1191         itd->hw_bufp [0] = stream->buf0;
1192         itd->hw_bufp [1] = stream->buf1;
1193         itd->hw_bufp [2] = stream->buf2;
1194
1195         for (i = 0; i < 8; i++)
1196                 itd->index[i] = -1;
1197
1198         /* All other fields are filled when scheduling */
1199 }
1200
1201 static inline void
1202 itd_patch (
1203         struct ehci_itd         *itd,
1204         struct ehci_iso_sched   *iso_sched,
1205         unsigned                index,
1206         u16                     uframe,
1207         int                     first
1208 )
1209 {
1210         struct ehci_iso_packet  *uf = &iso_sched->packet [index];
1211         unsigned                pg = itd->pg;
1212
1213         // BUG_ON (pg == 6 && uf->cross);
1214
1215         uframe &= 0x07;
1216         itd->index [uframe] = index;
1217
1218         itd->hw_transaction [uframe] = uf->transaction;
1219         itd->hw_transaction [uframe] |= cpu_to_le32 (pg << 12);
1220         itd->hw_bufp [pg] |= cpu_to_le32 (uf->bufp & ~(u32)0);
1221         itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32));
1222
1223         /* iso_frame_desc[].offset must be strictly increasing */
1224         if (unlikely (!first && uf->cross)) {
1225                 u64     bufp = uf->bufp + 4096;
1226                 itd->pg = ++pg;
1227                 itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0);
1228                 itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(bufp >> 32));
1229         }
1230 }
1231
1232 static inline void
1233 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1234 {
1235         /* always prepend ITD/SITD ... only QH tree is order-sensitive */
1236         itd->itd_next = ehci->pshadow [frame];
1237         itd->hw_next = ehci->periodic [frame];
1238         ehci->pshadow [frame].itd = itd;
1239         itd->frame = frame;
1240         wmb ();
1241         ehci->periodic [frame] = cpu_to_le32 (itd->itd_dma) | Q_TYPE_ITD;
1242 }
1243
1244 /* fit urb's itds into the selected schedule slot; activate as needed */
1245 static int
1246 itd_link_urb (
1247         struct ehci_hcd         *ehci,
1248         struct urb              *urb,
1249         unsigned                mod,
1250         struct ehci_iso_stream  *stream
1251 )
1252 {
1253         int                     packet, first = 1;
1254         unsigned                next_uframe, uframe, frame;
1255         struct ehci_iso_sched   *iso_sched = urb->hcpriv;
1256         struct ehci_itd         *itd;
1257
1258         next_uframe = stream->next_uframe % mod;
1259
1260         if (unlikely (list_empty(&stream->td_list))) {
1261                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1262                                 += stream->bandwidth;
1263                 ehci_vdbg (ehci,
1264                         "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1265                         urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1266                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1267                         urb->interval,
1268                         next_uframe >> 3, next_uframe & 0x7);
1269                 stream->start = jiffies;
1270         }
1271         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1272
1273         /* fill iTDs uframe by uframe */
1274         for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1275                 if (itd == NULL) {
1276                         /* ASSERT:  we have all necessary itds */
1277                         // BUG_ON (list_empty (&iso_sched->td_list));
1278
1279                         /* ASSERT:  no itds for this endpoint in this uframe */
1280
1281                         itd = list_entry (iso_sched->td_list.next,
1282                                         struct ehci_itd, itd_list);
1283                         list_move_tail (&itd->itd_list, &stream->td_list);
1284                         itd->stream = iso_stream_get (stream);
1285                         itd->urb = usb_get_urb (urb);
1286                         first = 1;
1287                         itd_init (stream, itd);
1288                 }
1289
1290                 uframe = next_uframe & 0x07;
1291                 frame = next_uframe >> 3;
1292
1293                 itd->usecs [uframe] = stream->usecs;
1294                 itd_patch (itd, iso_sched, packet, uframe, first);
1295                 first = 0;
1296
1297                 next_uframe += stream->interval;
1298                 stream->depth += stream->interval;
1299                 next_uframe %= mod;
1300                 packet++;
1301
1302                 /* link completed itds into the schedule */
1303                 if (((next_uframe >> 3) != frame)
1304                                 || packet == urb->number_of_packets) {
1305                         itd_link (ehci, frame % ehci->periodic_size, itd);
1306                         itd = NULL;
1307                 }
1308         }
1309         stream->next_uframe = next_uframe;
1310
1311         /* don't need that schedule data any more */
1312         iso_sched_free (stream, iso_sched);
1313         urb->hcpriv = NULL;
1314
1315         timer_action (ehci, TIMER_IO_WATCHDOG);
1316         if (unlikely (!ehci->periodic_sched++))
1317                 return enable_periodic (ehci);
1318         return 0;
1319 }
1320
1321 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1322
1323 static unsigned
1324 itd_complete (
1325         struct ehci_hcd *ehci,
1326         struct ehci_itd *itd,
1327         struct pt_regs  *regs
1328 ) {
1329         struct urb                              *urb = itd->urb;
1330         struct usb_iso_packet_descriptor        *desc;
1331         u32                                     t;
1332         unsigned                                uframe;
1333         int                                     urb_index = -1;
1334         struct ehci_iso_stream                  *stream = itd->stream;
1335         struct usb_device                       *dev;
1336
1337         /* for each uframe with a packet */
1338         for (uframe = 0; uframe < 8; uframe++) {
1339                 if (likely (itd->index[uframe] == -1))
1340                         continue;
1341                 urb_index = itd->index[uframe];
1342                 desc = &urb->iso_frame_desc [urb_index];
1343
1344                 t = le32_to_cpup (&itd->hw_transaction [uframe]);
1345                 itd->hw_transaction [uframe] = 0;
1346                 stream->depth -= stream->interval;
1347
1348                 /* report transfer status */
1349                 if (unlikely (t & ISO_ERRS)) {
1350                         urb->error_count++;
1351                         if (t & EHCI_ISOC_BUF_ERR)
1352                                 desc->status = usb_pipein (urb->pipe)
1353                                         ? -ENOSR  /* hc couldn't read */
1354                                         : -ECOMM; /* hc couldn't write */
1355                         else if (t & EHCI_ISOC_BABBLE)
1356                                 desc->status = -EOVERFLOW;
1357                         else /* (t & EHCI_ISOC_XACTERR) */
1358                                 desc->status = -EPROTO;
1359
1360                         /* HC need not update length with this error */
1361                         if (!(t & EHCI_ISOC_BABBLE))
1362                                 desc->actual_length = EHCI_ITD_LENGTH (t);
1363                 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1364                         desc->status = 0;
1365                         desc->actual_length = EHCI_ITD_LENGTH (t);
1366                 }
1367         }
1368
1369         usb_put_urb (urb);
1370         itd->urb = NULL;
1371         itd->stream = NULL;
1372         list_move (&itd->itd_list, &stream->free_list);
1373         iso_stream_put (ehci, stream);
1374
1375         /* handle completion now? */
1376         if (likely ((urb_index + 1) != urb->number_of_packets))
1377                 return 0;
1378
1379         /* ASSERT: it's really the last itd for this urb
1380         list_for_each_entry (itd, &stream->td_list, itd_list)
1381                 BUG_ON (itd->urb == urb);
1382          */
1383
1384         /* give urb back to the driver ... can be out-of-order */
1385         dev = usb_get_dev (urb->dev);
1386         ehci_urb_done (ehci, urb, regs);
1387         urb = NULL;
1388
1389         /* defer stopping schedule; completion can submit */
1390         ehci->periodic_sched--;
1391         if (unlikely (!ehci->periodic_sched))
1392                 (void) disable_periodic (ehci);
1393         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1394
1395         if (unlikely (list_empty (&stream->td_list))) {
1396                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1397                                 -= stream->bandwidth;
1398                 ehci_vdbg (ehci,
1399                         "deschedule devp %s ep%d%s-iso\n",
1400                         dev->devpath, stream->bEndpointAddress & 0x0f,
1401                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1402         }
1403         iso_stream_put (ehci, stream);
1404         usb_put_dev (dev);
1405
1406         return 1;
1407 }
1408
1409 /*-------------------------------------------------------------------------*/
1410
1411 static int itd_submit (struct ehci_hcd *ehci, struct urb *urb, int mem_flags)
1412 {
1413         int                     status = -EINVAL;
1414         unsigned long           flags;
1415         struct ehci_iso_stream  *stream;
1416
1417         /* Get iso_stream head */
1418         stream = iso_stream_find (ehci, urb);
1419         if (unlikely (stream == NULL)) {
1420                 ehci_dbg (ehci, "can't get iso stream\n");
1421                 return -ENOMEM;
1422         }
1423         if (unlikely (urb->interval != stream->interval)) {
1424                 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1425                         stream->interval, urb->interval);
1426                 goto done;
1427         }
1428
1429 #ifdef EHCI_URB_TRACE
1430         ehci_dbg (ehci,
1431                 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1432                 __FUNCTION__, urb->dev->devpath, urb,
1433                 usb_pipeendpoint (urb->pipe),
1434                 usb_pipein (urb->pipe) ? "in" : "out",
1435                 urb->transfer_buffer_length,
1436                 urb->number_of_packets, urb->interval,
1437                 stream);
1438 #endif
1439
1440         /* allocate ITDs w/o locking anything */
1441         status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1442         if (unlikely (status < 0)) {
1443                 ehci_dbg (ehci, "can't init itds\n");
1444                 goto done;
1445         }
1446
1447         /* schedule ... need to lock */
1448         spin_lock_irqsave (&ehci->lock, flags);
1449         status = iso_stream_schedule (ehci, urb, stream);
1450         if (likely (status == 0))
1451                 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1452         spin_unlock_irqrestore (&ehci->lock, flags);
1453
1454 done:
1455         if (unlikely (status < 0))
1456                 iso_stream_put (ehci, stream);
1457         return status;
1458 }
1459
1460 #ifdef CONFIG_USB_EHCI_SPLIT_ISO
1461
1462 /*-------------------------------------------------------------------------*/
1463
1464 /*
1465  * "Split ISO TDs" ... used for USB 1.1 devices going through the
1466  * TTs in USB 2.0 hubs.  These need microframe scheduling.
1467  */
1468
1469 static inline void
1470 sitd_sched_init (
1471         struct ehci_iso_sched   *iso_sched,
1472         struct ehci_iso_stream  *stream,
1473         struct urb              *urb
1474 )
1475 {
1476         unsigned        i;
1477         dma_addr_t      dma = urb->transfer_dma;
1478
1479         /* how many frames are needed for these transfers */
1480         iso_sched->span = urb->number_of_packets * stream->interval;
1481
1482         /* figure out per-frame sitd fields that we'll need later
1483          * when we fit new sitds into the schedule.
1484          */
1485         for (i = 0; i < urb->number_of_packets; i++) {
1486                 struct ehci_iso_packet  *packet = &iso_sched->packet [i];
1487                 unsigned                length;
1488                 dma_addr_t              buf;
1489                 u32                     trans;
1490
1491                 length = urb->iso_frame_desc [i].length & 0x03ff;
1492                 buf = dma + urb->iso_frame_desc [i].offset;
1493
1494                 trans = SITD_STS_ACTIVE;
1495                 if (((i + 1) == urb->number_of_packets)
1496                                 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1497                         trans |= SITD_IOC;
1498                 trans |= length << 16;
1499                 packet->transaction = cpu_to_le32 (trans);
1500
1501                 /* might need to cross a buffer page within a td */
1502                 packet->bufp = buf;
1503                 buf += length;
1504                 packet->buf1 = buf & ~0x0fff;
1505                 if (packet->buf1 != (buf & ~(u64)0x0fff))
1506                         packet->cross = 1;
1507
1508                 /* OUT uses multiple start-splits */
1509                 if (stream->bEndpointAddress & USB_DIR_IN)
1510                         continue;
1511                 length = 1 + (length / 188);
1512                 packet->buf1 |= length;
1513                 if (length > 1) /* BEGIN vs ALL */
1514                         packet->buf1 |= 1 << 3;
1515         }
1516 }
1517
1518 static int
1519 sitd_urb_transaction (
1520         struct ehci_iso_stream  *stream,
1521         struct ehci_hcd         *ehci,
1522         struct urb              *urb,
1523         int                     mem_flags
1524 )
1525 {
1526         struct ehci_sitd        *sitd;
1527         dma_addr_t              sitd_dma;
1528         int                     i;
1529         struct ehci_iso_sched   *iso_sched;
1530         unsigned long           flags;
1531
1532         iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1533         if (iso_sched == NULL)
1534                 return -ENOMEM;
1535
1536         sitd_sched_init (iso_sched, stream, urb);
1537
1538         /* allocate/init sITDs */
1539         spin_lock_irqsave (&ehci->lock, flags);
1540         for (i = 0; i < urb->number_of_packets; i++) {
1541
1542                 /* NOTE:  for now, we don't try to handle wraparound cases
1543                  * for IN (using sitd->hw_backpointer, like a FSTN), which
1544                  * means we never need two sitds for full speed packets.
1545                  */
1546
1547                 /* free_list.next might be cache-hot ... but maybe
1548                  * the HC caches it too. avoid that issue for now.
1549                  */
1550
1551                 /* prefer previously-allocated sitds */
1552                 if (!list_empty(&stream->free_list)) {
1553                         sitd = list_entry (stream->free_list.prev,
1554                                          struct ehci_sitd, sitd_list);
1555                         list_del (&sitd->sitd_list);
1556                         sitd_dma = sitd->sitd_dma;
1557                 } else
1558                         sitd = NULL;
1559
1560                 if (!sitd) {
1561                         spin_unlock_irqrestore (&ehci->lock, flags);
1562                         sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1563                                         &sitd_dma);
1564                         spin_lock_irqsave (&ehci->lock, flags);
1565                 }
1566
1567                 if (!sitd) {
1568                         iso_sched_free (stream, iso_sched);
1569                         spin_unlock_irqrestore (&ehci->lock, flags);
1570                         return -ENOMEM;
1571                 }
1572                 memset (sitd, 0, sizeof *sitd);
1573                 sitd->sitd_dma = sitd_dma;
1574                 list_add (&sitd->sitd_list, &iso_sched->td_list);
1575         }
1576
1577         /* temporarily store schedule info in hcpriv */
1578         urb->hcpriv = iso_sched;
1579         urb->error_count = 0;
1580
1581         spin_unlock_irqrestore (&ehci->lock, flags);
1582         return 0;
1583 }
1584
1585 /*-------------------------------------------------------------------------*/
1586
1587 static inline void
1588 sitd_patch (
1589         struct ehci_iso_stream  *stream,
1590         struct ehci_sitd        *sitd,
1591         struct ehci_iso_sched   *iso_sched,
1592         unsigned                index
1593 )
1594 {
1595         struct ehci_iso_packet  *uf = &iso_sched->packet [index];
1596         u64                     bufp = uf->bufp;
1597
1598         sitd->hw_next = EHCI_LIST_END;
1599         sitd->hw_fullspeed_ep = stream->address;
1600         sitd->hw_uframe = stream->splits;
1601         sitd->hw_results = uf->transaction;
1602         sitd->hw_backpointer = EHCI_LIST_END;
1603
1604         bufp = uf->bufp;
1605         sitd->hw_buf [0] = cpu_to_le32 (bufp);
1606         sitd->hw_buf_hi [0] = cpu_to_le32 (bufp >> 32);
1607
1608         sitd->hw_buf [1] = cpu_to_le32 (uf->buf1);
1609         if (uf->cross) {
1610                 bufp += 4096;
1611                 sitd->hw_buf_hi [1] = cpu_to_le32 (bufp >> 32);
1612         }
1613         sitd->index = index;
1614 }
1615
1616 static inline void
1617 sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1618 {
1619         /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1620         sitd->sitd_next = ehci->pshadow [frame];
1621         sitd->hw_next = ehci->periodic [frame];
1622         ehci->pshadow [frame].sitd = sitd;
1623         sitd->frame = frame;
1624         wmb ();
1625         ehci->periodic [frame] = cpu_to_le32 (sitd->sitd_dma) | Q_TYPE_SITD;
1626 }
1627
1628 /* fit urb's sitds into the selected schedule slot; activate as needed */
1629 static int
1630 sitd_link_urb (
1631         struct ehci_hcd         *ehci,
1632         struct urb              *urb,
1633         unsigned                mod,
1634         struct ehci_iso_stream  *stream
1635 )
1636 {
1637         int                     packet;
1638         unsigned                next_uframe;
1639         struct ehci_iso_sched   *sched = urb->hcpriv;
1640         struct ehci_sitd        *sitd;
1641
1642         next_uframe = stream->next_uframe;
1643
1644         if (list_empty(&stream->td_list)) {
1645                 /* usbfs ignores TT bandwidth */
1646                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1647                                 += stream->bandwidth;
1648                 ehci_vdbg (ehci,
1649                         "sched dev%s ep%d%s-iso [%d] %dms/%04x\n",
1650                         urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1651                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1652                         (next_uframe >> 3) % ehci->periodic_size,
1653                         stream->interval, le32_to_cpu (stream->splits));
1654                 stream->start = jiffies;
1655         }
1656         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1657
1658         /* fill sITDs frame by frame */
1659         for (packet = 0, sitd = NULL;
1660                         packet < urb->number_of_packets;
1661                         packet++) {
1662
1663                 /* ASSERT:  we have all necessary sitds */
1664                 BUG_ON (list_empty (&sched->td_list));
1665
1666                 /* ASSERT:  no itds for this endpoint in this frame */
1667
1668                 sitd = list_entry (sched->td_list.next,
1669                                 struct ehci_sitd, sitd_list);
1670                 list_move_tail (&sitd->sitd_list, &stream->td_list);
1671                 sitd->stream = iso_stream_get (stream);
1672                 sitd->urb = usb_get_urb (urb);
1673
1674                 sitd_patch (stream, sitd, sched, packet);
1675                 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
1676                                 sitd);
1677
1678                 next_uframe += stream->interval << 3;
1679                 stream->depth += stream->interval << 3;
1680         }
1681         stream->next_uframe = next_uframe % mod;
1682
1683         /* don't need that schedule data any more */
1684         iso_sched_free (stream, sched);
1685         urb->hcpriv = NULL;
1686
1687         timer_action (ehci, TIMER_IO_WATCHDOG);
1688         if (!ehci->periodic_sched++)
1689                 return enable_periodic (ehci);
1690         return 0;
1691 }
1692
1693 /*-------------------------------------------------------------------------*/
1694
1695 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
1696                         | SITD_STS_XACT | SITD_STS_MMF | SITD_STS_STS)
1697
1698 static unsigned
1699 sitd_complete (
1700         struct ehci_hcd         *ehci,
1701         struct ehci_sitd        *sitd,
1702         struct pt_regs          *regs
1703 ) {
1704         struct urb                              *urb = sitd->urb;
1705         struct usb_iso_packet_descriptor        *desc;
1706         u32                                     t;
1707         int                                     urb_index = -1;
1708         struct ehci_iso_stream                  *stream = sitd->stream;
1709         struct usb_device                       *dev;
1710
1711         urb_index = sitd->index;
1712         desc = &urb->iso_frame_desc [urb_index];
1713         t = le32_to_cpup (&sitd->hw_results);
1714
1715         /* report transfer status */
1716         if (t & SITD_ERRS) {
1717                 urb->error_count++;
1718                 if (t & SITD_STS_DBE)
1719                         desc->status = usb_pipein (urb->pipe)
1720                                 ? -ENOSR  /* hc couldn't read */
1721                                 : -ECOMM; /* hc couldn't write */
1722                 else if (t & SITD_STS_BABBLE)
1723                         desc->status = -EOVERFLOW;
1724                 else /* XACT, MMF, etc */
1725                         desc->status = -EPROTO;
1726         } else {
1727                 desc->status = 0;
1728                 desc->actual_length = desc->length - SITD_LENGTH (t);
1729         }
1730
1731         usb_put_urb (urb);
1732         sitd->urb = NULL;
1733         sitd->stream = NULL;
1734         list_move (&sitd->sitd_list, &stream->free_list);
1735         stream->depth -= stream->interval << 3;
1736         iso_stream_put (ehci, stream);
1737
1738         /* handle completion now? */
1739         if ((urb_index + 1) != urb->number_of_packets)
1740                 return 0;
1741
1742         /* ASSERT: it's really the last sitd for this urb
1743         list_for_each_entry (sitd, &stream->td_list, sitd_list)
1744                 BUG_ON (sitd->urb == urb);
1745          */
1746
1747         /* give urb back to the driver */
1748         dev = usb_get_dev (urb->dev);
1749         ehci_urb_done (ehci, urb, regs);
1750         urb = NULL;
1751
1752         /* defer stopping schedule; completion can submit */
1753         ehci->periodic_sched--;
1754         if (!ehci->periodic_sched)
1755                 (void) disable_periodic (ehci);
1756         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1757
1758         if (list_empty (&stream->td_list)) {
1759                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1760                                 -= stream->bandwidth;
1761                 ehci_vdbg (ehci,
1762                         "deschedule devp %s ep%d%s-iso\n",
1763                         dev->devpath, stream->bEndpointAddress & 0x0f,
1764                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1765         }
1766         iso_stream_put (ehci, stream);
1767         usb_put_dev (dev);
1768
1769         return 1;
1770 }
1771
1772
1773 static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb, int mem_flags)
1774 {
1775         int                     status = -EINVAL;
1776         unsigned long           flags;
1777         struct ehci_iso_stream  *stream;
1778
1779         // FIXME remove when csplits behave
1780         if (usb_pipein(urb->pipe)) {
1781                 ehci_dbg (ehci, "no iso-IN split transactions yet\n");
1782                 return -ENOMEM;
1783         }
1784
1785         /* Get iso_stream head */
1786         stream = iso_stream_find (ehci, urb);
1787         if (stream == NULL) {
1788                 ehci_dbg (ehci, "can't get iso stream\n");
1789                 return -ENOMEM;
1790         }
1791         if (urb->interval != stream->interval) {
1792                 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1793                         stream->interval, urb->interval);
1794                 goto done;
1795         }
1796
1797 #ifdef EHCI_URB_TRACE
1798         ehci_dbg (ehci,
1799                 "submit %p dev%s ep%d%s-iso len %d\n",
1800                 urb, urb->dev->devpath,
1801                 usb_pipeendpoint (urb->pipe),
1802                 usb_pipein (urb->pipe) ? "in" : "out",
1803                 urb->transfer_buffer_length);
1804 #endif
1805
1806         /* allocate SITDs */
1807         status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
1808         if (status < 0) {
1809                 ehci_dbg (ehci, "can't init sitds\n");
1810                 goto done;
1811         }
1812
1813         /* schedule ... need to lock */
1814         spin_lock_irqsave (&ehci->lock, flags);
1815         status = iso_stream_schedule (ehci, urb, stream);
1816         if (status == 0)
1817                 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1818         spin_unlock_irqrestore (&ehci->lock, flags);
1819
1820 done:
1821         if (status < 0)
1822                 iso_stream_put (ehci, stream);
1823         return status;
1824 }
1825
1826 #else
1827
1828 static inline int
1829 sitd_submit (struct ehci_hcd *ehci, struct urb *urb, int mem_flags)
1830 {
1831         ehci_dbg (ehci, "split iso support is disabled\n");
1832         return -ENOSYS;
1833 }
1834
1835 static inline unsigned
1836 sitd_complete (
1837         struct ehci_hcd         *ehci,
1838         struct ehci_sitd        *sitd,
1839         struct pt_regs          *regs
1840 ) {
1841         ehci_err (ehci, "sitd_complete %p?\n", sitd);
1842         return 0;
1843 }
1844
1845 #endif /* USB_EHCI_SPLIT_ISO */
1846
1847 /*-------------------------------------------------------------------------*/
1848
1849 static void
1850 scan_periodic (struct ehci_hcd *ehci, struct pt_regs *regs)
1851 {
1852         unsigned        frame, clock, now_uframe, mod;
1853         unsigned        modified;
1854
1855         mod = ehci->periodic_size << 3;
1856
1857         /*
1858          * When running, scan from last scan point up to "now"
1859          * else clean up by scanning everything that's left.
1860          * Touches as few pages as possible:  cache-friendly.
1861          */
1862         now_uframe = ehci->next_uframe;
1863         if (HCD_IS_RUNNING (ehci_to_hcd(ehci)->state))
1864                 clock = readl (&ehci->regs->frame_index);
1865         else
1866                 clock = now_uframe + mod - 1;
1867         clock %= mod;
1868
1869         for (;;) {
1870                 union ehci_shadow       q, *q_p;
1871                 __le32                  type, *hw_p;
1872                 unsigned                uframes;
1873
1874                 /* don't scan past the live uframe */
1875                 frame = now_uframe >> 3;
1876                 if (frame == (clock >> 3))
1877                         uframes = now_uframe & 0x07;
1878                 else {
1879                         /* safe to scan the whole frame at once */
1880                         now_uframe |= 0x07;
1881                         uframes = 8;
1882                 }
1883
1884 restart:
1885                 /* scan each element in frame's queue for completions */
1886                 q_p = &ehci->pshadow [frame];
1887                 hw_p = &ehci->periodic [frame];
1888                 q.ptr = q_p->ptr;
1889                 type = Q_NEXT_TYPE (*hw_p);
1890                 modified = 0;
1891
1892                 while (q.ptr != NULL) {
1893                         unsigned                uf;
1894                         union ehci_shadow       temp;
1895                         int                     live;
1896
1897                         live = HCD_IS_RUNNING (ehci_to_hcd(ehci)->state);
1898                         switch (type) {
1899                         case Q_TYPE_QH:
1900                                 /* handle any completions */
1901                                 temp.qh = qh_get (q.qh);
1902                                 type = Q_NEXT_TYPE (q.qh->hw_next);
1903                                 q = q.qh->qh_next;
1904                                 modified = qh_completions (ehci, temp.qh, regs);
1905                                 if (unlikely (list_empty (&temp.qh->qtd_list)))
1906                                         intr_deschedule (ehci, temp.qh);
1907                                 qh_put (temp.qh);
1908                                 break;
1909                         case Q_TYPE_FSTN:
1910                                 /* for "save place" FSTNs, look at QH entries
1911                                  * in the previous frame for completions.
1912                                  */
1913                                 if (q.fstn->hw_prev != EHCI_LIST_END) {
1914                                         dbg ("ignoring completions from FSTNs");
1915                                 }
1916                                 type = Q_NEXT_TYPE (q.fstn->hw_next);
1917                                 q = q.fstn->fstn_next;
1918                                 break;
1919                         case Q_TYPE_ITD:
1920                                 /* skip itds for later in the frame */
1921                                 rmb ();
1922                                 for (uf = live ? uframes : 8; uf < 8; uf++) {
1923                                         if (0 == (q.itd->hw_transaction [uf]
1924                                                         & ITD_ACTIVE))
1925                                                 continue;
1926                                         q_p = &q.itd->itd_next;
1927                                         hw_p = &q.itd->hw_next;
1928                                         type = Q_NEXT_TYPE (q.itd->hw_next);
1929                                         q = *q_p;
1930                                         break;
1931                                 }
1932                                 if (uf != 8)
1933                                         break;
1934
1935                                 /* this one's ready ... HC won't cache the
1936                                  * pointer for much longer, if at all.
1937                                  */
1938                                 *q_p = q.itd->itd_next;
1939                                 *hw_p = q.itd->hw_next;
1940                                 type = Q_NEXT_TYPE (q.itd->hw_next);
1941                                 wmb();
1942                                 modified = itd_complete (ehci, q.itd, regs);
1943                                 q = *q_p;
1944                                 break;
1945                         case Q_TYPE_SITD:
1946                                 if ((q.sitd->hw_results & SITD_ACTIVE)
1947                                                 && live) {
1948                                         q_p = &q.sitd->sitd_next;
1949                                         hw_p = &q.sitd->hw_next;
1950                                         type = Q_NEXT_TYPE (q.sitd->hw_next);
1951                                         q = *q_p;
1952                                         break;
1953                                 }
1954                                 *q_p = q.sitd->sitd_next;
1955                                 *hw_p = q.sitd->hw_next;
1956                                 type = Q_NEXT_TYPE (q.sitd->hw_next);
1957                                 wmb();
1958                                 modified = sitd_complete (ehci, q.sitd, regs);
1959                                 q = *q_p;
1960                                 break;
1961                         default:
1962                                 dbg ("corrupt type %d frame %d shadow %p",
1963                                         type, frame, q.ptr);
1964                                 // BUG ();
1965                                 q.ptr = NULL;
1966                         }
1967
1968                         /* assume completion callbacks modify the queue */
1969                         if (unlikely (modified))
1970                                 goto restart;
1971                 }
1972
1973                 /* stop when we catch up to the HC */
1974
1975                 // FIXME:  this assumes we won't get lapped when
1976                 // latencies climb; that should be rare, but...
1977                 // detect it, and just go all the way around.
1978                 // FLR might help detect this case, so long as latencies
1979                 // don't exceed periodic_size msec (default 1.024 sec).
1980
1981                 // FIXME:  likewise assumes HC doesn't halt mid-scan
1982
1983                 if (now_uframe == clock) {
1984                         unsigned        now;
1985
1986                         if (!HCD_IS_RUNNING (ehci_to_hcd(ehci)->state))
1987                                 break;
1988                         ehci->next_uframe = now_uframe;
1989                         now = readl (&ehci->regs->frame_index) % mod;
1990                         if (now_uframe == now)
1991                                 break;
1992
1993                         /* rescan the rest of this frame, then ... */
1994                         clock = now;
1995                 } else {
1996                         now_uframe++;
1997                         now_uframe %= mod;
1998                 }
1999         }
2000 }